xref: /spdk/lib/ioat/ioat_internal.h (revision b30d57cdad6d2bc75cc1e4e2ebbcebcb0d98dcfa)
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright (c) Intel Corporation.
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32  */
33 
34 #ifndef __IOAT_INTERNAL_H__
35 #define __IOAT_INTERNAL_H__
36 
37 #include "spdk/stdinc.h"
38 
39 #include "spdk/ioat.h"
40 #include "spdk/ioat_spec.h"
41 #include "spdk/queue.h"
42 #include "spdk/mmio.h"
43 
44 /* Allocate 1 << 15 (32K) descriptors per channel by default. */
45 #define IOAT_DEFAULT_ORDER			15
46 
47 struct ioat_descriptor {
48 	uint64_t		phys_addr;
49 	spdk_ioat_req_cb	callback_fn;
50 	void			*callback_arg;
51 };
52 
53 /* One of these per allocated PCI device. */
54 struct spdk_ioat_chan {
55 	/* Opaque handle to upper layer */
56 	struct spdk_pci_device		*device;
57 	uint64_t            max_xfer_size;
58 	volatile struct spdk_ioat_registers *regs;
59 
60 	volatile uint64_t   *comp_update;
61 
62 	uint32_t            head;
63 	uint32_t            tail;
64 
65 	uint32_t            ring_size_order;
66 	uint64_t            last_seen;
67 
68 	struct ioat_descriptor		*ring;
69 	union spdk_ioat_hw_desc		*hw_ring;
70 	uint32_t			dma_capabilities;
71 
72 	/* tailq entry for attached_chans */
73 	TAILQ_ENTRY(spdk_ioat_chan)	tailq;
74 };
75 
76 static inline uint32_t
77 is_ioat_active(uint64_t status)
78 {
79 	return (status & SPDK_IOAT_CHANSTS_STATUS) == SPDK_IOAT_CHANSTS_ACTIVE;
80 }
81 
82 static inline uint32_t
83 is_ioat_idle(uint64_t status)
84 {
85 	return (status & SPDK_IOAT_CHANSTS_STATUS) == SPDK_IOAT_CHANSTS_IDLE;
86 }
87 
88 static inline uint32_t
89 is_ioat_halted(uint64_t status)
90 {
91 	return (status & SPDK_IOAT_CHANSTS_STATUS) == SPDK_IOAT_CHANSTS_HALTED;
92 }
93 
94 static inline uint32_t
95 is_ioat_suspended(uint64_t status)
96 {
97 	return (status & SPDK_IOAT_CHANSTS_STATUS) == SPDK_IOAT_CHANSTS_SUSPENDED;
98 }
99 
100 #endif /* __IOAT_INTERNAL_H__ */
101