1 /* Portions of this file derived from work with the following copyright */ 2 3 /***************************************************************************\ 4 |* *| 5 |* Copyright 2003 NVIDIA, Corporation. All rights reserved. *| 6 |* *| 7 |* NOTICE TO USER: The source code is copyrighted under U.S. and *| 8 |* international laws. Users and possessors of this source code are *| 9 |* hereby granted a nonexclusive, royalty-free copyright license to *| 10 |* use this code in individual and commercial software. *| 11 |* *| 12 |* Any use of this source code must include, in the user documenta- *| 13 |* tion and internal comments to the code, notices to the end user *| 14 |* as follows: *| 15 |* *| 16 |* Copyright 2003 NVIDIA, Corporation. All rights reserved. *| 17 |* *| 18 |* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| 19 |* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| 20 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| 21 |* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| 22 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| 23 |* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| 24 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| 25 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| 26 |* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| 27 |* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| 28 |* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| 29 |* *| 30 |* U.S. Government End Users. This source code is a "commercial *| 31 |* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| 32 |* consisting of "commercial computer software" and "commercial *| 33 |* computer software documentation," as such terms are used in *| 34 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| 35 |* ment only as a commercial end item. Consistent with 48 C.F.R. *| 36 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| 37 |* all U.S. Government End Users acquire the source code with only *| 38 |* those rights set forth herein. *| 39 |* *| 40 \***************************************************************************/ 41 42 #include <u.h> 43 #include <libc.h> 44 #include <bio.h> 45 46 #include "pci.h" 47 #include "vga.h" 48 49 typedef struct Nvidia Nvidia; 50 struct Nvidia { 51 Pcidev* pci; 52 int did; /* not always == pci->did */ 53 54 int arch; 55 int crystalfreq; 56 57 ulong* mmio; 58 ulong* pfb; /* mmio pointers */ 59 ulong* pramdac; 60 ulong* pextdev; 61 ulong* pmc; 62 ulong* ptimer; 63 ulong* pfifo; 64 ulong* pramin; 65 ulong* pgraph; 66 ulong* fifo; 67 ulong* pcrtc; 68 69 ushort repaint0; 70 ushort repaint1; 71 ushort screen; 72 ushort pixel; 73 ushort horiz; 74 ushort cursor0; 75 ushort cursor1; 76 ushort cursor2; 77 ushort interlace; 78 ushort extra; 79 ushort crtcowner; 80 ushort timingH; 81 ushort timingV; 82 83 ulong vpll; 84 ulong vpllB; 85 ulong vpll2; 86 ulong vpll2B; 87 ulong pllsel; 88 ulong general; 89 ulong scale; 90 ulong config; 91 ulong head; 92 ulong head2; 93 ulong cursorconfig; 94 ulong dither; 95 ulong crtcsync; 96 ulong displayV; 97 98 int islcd; 99 int fpwidth; 100 int fpheight; 101 int twoheads; 102 int twostagepll; 103 int crtcnumber; 104 }; 105 106 static void 107 getpcixdid(Nvidia* nv) 108 { 109 ulong pcicmd, pciid; 110 ushort vid, did; 111 112 pcicmd = pcicfgr32(nv->pci, PciPCR); 113 pcicfgw32(nv->pci, PciPCR, pcicmd | 0x02); 114 pciid = nv->mmio[0x1800/4]; 115 pcicfgw32(nv->pci, PciPCR, pcicmd); 116 117 vid = pciid >> 16; 118 did = (pciid & 0xFFFF); 119 if (did == 0x10DE) 120 did = vid; 121 else if (vid == 0xDE10) 122 did = ((pciid << 8) & 0xFF00) | ((pciid >> 8) & 0x00FF); 123 124 nv->did = did; 125 } 126 127 static void 128 snarf(Vga* vga, Ctlr* ctlr) 129 { 130 Nvidia *nv; 131 Pcidev *p; 132 ulong *mmio, tmp; 133 int implementation; 134 135 if(vga->private == nil){ 136 vga->private = alloc(sizeof(Nvidia)); 137 nv = vga->private; 138 139 p = nil; 140 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 141 if((p->ccru>>8) == 3) 142 break; 143 } 144 if(p == nil) 145 error("%s: not found\n", ctlr->name); 146 147 vgactlw("type", ctlr->name); 148 149 mmio = segattach(0, "nvidiammio", 0, p->mem[0].size); 150 if(mmio == (void*)-1) 151 error("%s: segattach nvidiammio, size %d: %r\n", 152 ctlr->name, p->mem[0].size); 153 154 nv->pci = p; 155 nv->mmio = mmio; 156 157 nv->pfb = mmio+0x00100000/4; 158 nv->pramdac = mmio+0x00680000/4; 159 nv->pextdev = mmio+0x00101000/4; 160 nv->pmc = mmio; 161 nv->ptimer = mmio+0x00009000/4; 162 nv->pfifo = mmio+0x00002000/4; 163 nv->pramin = mmio+0x00710000/4; 164 nv->pgraph = mmio+0x00400000/4; 165 nv->fifo = mmio+0x00800000/4; 166 nv->pcrtc= mmio+0x00600000/4; 167 168 nv->did = p->did; 169 if ((nv->did & 0xfff0) == 0x00f0) 170 getpcixdid(nv); 171 172 switch (nv->did & 0x0ff0) { 173 case 0x0020: 174 case 0x00A0: 175 nv->arch = 4; 176 break; 177 case 0x0100: /* GeForce 256 */ 178 case 0x0110: /* GeForce2 MX */ 179 case 0x0150: /* GeForce2 */ 180 case 0x0170: /* GeForce4 MX */ 181 case 0x0180: /* GeForce4 MX (8x AGP) */ 182 case 0x01A0: /* nForce */ 183 case 0x01F0: /* nForce2 */ 184 nv->arch = 10; 185 break; 186 case 0x0200: /* GeForce3 */ 187 case 0x0250: /* GeForce4 Ti */ 188 case 0x0280: /* GeForce4 Ti (8x AGP) */ 189 nv->arch = 20; 190 break; 191 case 0x0300: /* GeForceFX 5800 */ 192 case 0x0310: /* GeForceFX 5600 */ 193 case 0x0320: /* GeForceFX 5200 */ 194 case 0x0330: /* GeForceFX 5900 */ 195 case 0x0340: /* GeForceFX 5700 */ 196 nv->arch = 30; 197 break; 198 case 0x0040: 199 case 0x0090: 200 case 0x00C0: 201 case 0x0120: 202 case 0x0130: 203 case 0x0140: /* GeForce 6600 */ 204 case 0x0160: 205 case 0x01D0: 206 case 0x0210: 207 case 0x0290: /* nvidia 7950 */ 208 case 0x0390: 209 nv->arch = 40; 210 break; 211 default: 212 error("%s: DID %#4.4ux - %#ux unsupported\n", 213 ctlr->name, nv->did, (nv->did & 0x0ff0)); 214 break; 215 } 216 } 217 nv = vga->private; 218 implementation = nv->did & 0x0ff0; 219 220 /* 221 * Unlock 222 */ 223 vgaxo(Crtx, 0x1F, 0x57); 224 225 if (nv->pextdev[0] & 0x40) 226 nv->crystalfreq = RefFreq; 227 else 228 nv->crystalfreq = 13500000; 229 230 if ((implementation == 0x0170) || 231 (implementation == 0x0180) || 232 (implementation == 0x01F0) || 233 (implementation >= 0x0250)) 234 if(nv->pextdev[0] & (1 << 22)) 235 nv->crystalfreq = 27000000; 236 237 nv->twoheads = (nv->arch >= 10) && 238 (implementation != 0x0100) && 239 (implementation != 0x0150) && 240 (implementation != 0x01A0) && 241 (implementation != 0x0200); 242 243 nv->twostagepll = (implementation == 0x0310) || 244 (implementation == 0x0340) || (nv->arch >= 40); 245 246 if (nv->twoheads && (implementation != 0x0110)) 247 if(nv->pextdev[0] & (1 << 22)) 248 nv->crystalfreq = 27000000; 249 250 /* laptop chips */ 251 switch (nv->did & 0xffff) { 252 case 0x0112: 253 case 0x0174: 254 case 0x0175: 255 case 0x0176: 256 case 0x0177: 257 case 0x0179: 258 case 0x017C: 259 case 0x017D: 260 case 0x0186: 261 case 0x0187: 262 case 0x0189: /* 0x0189 not in nwaples's driver */ 263 case 0x018D: 264 case 0x0286: 265 case 0x028C: 266 case 0x0316: 267 case 0x0317: 268 case 0x031A: 269 case 0x031B: 270 case 0x031C: 271 case 0x031D: 272 case 0x031E: 273 case 0x031F: 274 case 0x0324: 275 case 0x0325: 276 case 0x0328: 277 case 0x0329: 278 case 0x032C: 279 case 0x032D: 280 case 0x0347: 281 case 0x0348: 282 case 0x0349: 283 case 0x034B: 284 case 0x034C: 285 case 0x0160: 286 case 0x0166: 287 case 0x00C8: 288 case 0x00CC: 289 case 0x0144: 290 case 0x0146: 291 case 0x0148: 292 nv->islcd = 1; 293 break; 294 } 295 296 if (nv->arch == 4) { 297 tmp = nv->pfb[0]; 298 if (tmp & 0x0100) 299 vga->vmz = ((tmp >> 12) & 0x0F)*1024 + 2*1024; 300 else { 301 tmp &= 0x03; 302 if (tmp) 303 vga->vmz = (1024*1024*2) << tmp; 304 else 305 vga->vmz = 1024*1024*32; 306 } 307 } else if (implementation == 0x01a0) { 308 p = nil; 309 tmp = MKBUS(BusPCI, 0, 0, 1); 310 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 311 if(p->tbdf == tmp) 312 break; 313 } 314 tmp = pcicfgr32(p, 0x7C); 315 vga->vmz = (((tmp >> 6) & 31) + 1) * 1024 * 1024; 316 } else if (implementation == 0x01f0) { 317 p = nil; 318 tmp = MKBUS(BusPCI, 0, 0, 1); 319 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 320 if(p->tbdf == tmp) 321 break; 322 } 323 tmp = pcicfgr32(p, 0x84); 324 vga->vmz = (((tmp >> 4) & 127) + 1) * 1024*1024; 325 } else { 326 tmp = (nv->pfb[0x0000020C/4] >> 20) & 0xFFF; 327 if (tmp == 0) 328 tmp = 16; 329 vga->vmz = 1024*1024*tmp; 330 } 331 332 nv->repaint0 = vgaxi(Crtx, 0x19); 333 nv->repaint1 = vgaxi(Crtx, 0x1A); 334 nv->screen = vgaxi(Crtx, 0x25); 335 nv->pixel = vgaxi(Crtx, 0x28); 336 nv->horiz = vgaxi(Crtx, 0x2D); 337 nv->cursor0 = vgaxi(Crtx, 0x30); 338 nv->cursor1 = vgaxi(Crtx, 0x31); 339 nv->cursor2 = vgaxi(Crtx, 0x2F); 340 nv->interlace = vgaxi(Crtx, 0x39); 341 342 nv->vpll = nv->pramdac[0x508/4]; 343 if (nv->twoheads) 344 nv->vpll2 = nv->pramdac[0x520/4]; 345 if (nv->twostagepll) { 346 nv->vpllB = nv->pramdac[0x578/4]; 347 nv->vpll2B = nv->pramdac[0x57C/4]; 348 } 349 nv->pllsel = nv->pramdac[0x50C/4]; 350 nv->general = nv->pramdac[0x600/4]; 351 nv->scale = nv->pramdac[0x848/4]; 352 nv->config = nv->pfb[0x200/4]; 353 354 if (nv->pixel & 0x80) 355 nv->islcd = 1; 356 357 if (nv->arch >= 10) { 358 if (nv->twoheads) { 359 nv->head = nv->pcrtc[0x0860/4]; 360 nv->head2 = nv->pcrtc[0x2860/4]; 361 nv->crtcowner = vgaxi(Crtx, 0x44); 362 } 363 nv->extra = vgaxi(Crtx, 0x41); 364 nv->cursorconfig = nv->pcrtc[0x0810/4]; 365 if (implementation == 0x0110) 366 nv->dither = nv->pramdac[0x0528/4]; 367 else if (nv->twoheads) 368 nv->dither = nv->pramdac[0x083C/4]; 369 } 370 371 /* 372 * DFP. 373 */ 374 if (nv->islcd) { 375 nv->fpwidth = nv->pramdac[0x0820/4] + 1; 376 nv->fpheight = nv->pramdac[0x0800/4] + 1; 377 nv->crtcsync = nv->pramdac[0x0828/4]; 378 } 379 380 nv->crtcnumber = 0; 381 382 ctlr->flag |= Fsnarf; 383 } 384 385 386 static void 387 options(Vga*, Ctlr* ctlr) 388 { 389 ctlr->flag |= Hlinear|Foptions; 390 } 391 392 393 static void 394 clock(Vga* vga, Ctlr* ctlr) 395 { 396 int m, n, p, f, d; 397 Nvidia *nv; 398 double trouble; 399 int fmin, mmin, nmin, crystalfreq; 400 nv = vga->private; 401 402 if(vga->f[0] == 0) 403 vga->f[0] = vga->mode->frequency; 404 405 vga->d[0] = vga->f[0]+1; 406 407 vga->n[1] = 255; 408 if (nv->twostagepll) { 409 vga->p[1] = 6; 410 vga->m[1] = 13; 411 vga->f[1] = 400000000 << 2; 412 crystalfreq = nv->crystalfreq << 2; 413 fmin = 100000000 << 2; 414 mmin = 1; 415 nmin = 5; 416 nv->vpllB = 0x80000401; 417 } else { 418 vga->p[1] = 4; 419 if (nv->crystalfreq == 13500000) 420 vga->m[1] = 13; 421 else 422 vga->m[1] = 14; 423 vga->f[1] = 350000000; 424 crystalfreq = nv->crystalfreq; 425 fmin = 128000000; 426 mmin = 7; 427 nmin = 0; 428 } 429 430 for (p=0; p <= vga->p[1]; p++){ 431 f = vga->f[0] << p; 432 if ((f >= fmin) && (f <= vga->f[1])) { 433 for (m=mmin; m <= vga->m[1]; m++){ 434 trouble = (double) crystalfreq / (double) (m << p); 435 n = (vga->f[0] / trouble)+0.5; 436 f = n*trouble + 0.5; 437 d = vga->f[0] - f; 438 if (d < 0) 439 d = -d; 440 if ((n & ~0xFF) && (n >= nmin)) 441 d = vga->d[0] + 1; 442 if (d <= vga->d[0]){ 443 vga->n[0] = n; 444 vga->m[0] = m; 445 vga->p[0] = p; 446 vga->d[0] = d; 447 } 448 } 449 } 450 } 451 if (vga->d[0] > vga->f[0]) 452 error("%s: vclk %lud out of range\n", ctlr->name, vga->f[0]); 453 } 454 455 456 static void 457 init(Vga* vga, Ctlr* ctlr) 458 { 459 Mode *mode; 460 Nvidia *nv; 461 char *p, *val; 462 int tmp, pixeldepth; 463 ulong cursorstart; 464 465 mode = vga->mode; 466 if(mode->z == 24) 467 error("%s: 24-bit colour not supported, use 32-bit\n", ctlr->name); 468 469 nv = vga->private; 470 471 if(vga->linear && (ctlr->flag & Hlinear)) 472 ctlr->flag |= Ulinear; 473 474 clock(vga, ctlr); 475 476 if(val = dbattr(vga->mode->attr, "lcd")){ 477 if((nv->islcd = strtol(val, &p, 0)) == 0 && p == val) 478 error("%s: invalid 'lcd' attr\n", ctlr->name); 479 } 480 481 if(nv->arch == 4) { 482 nv->cursor0 = 0; 483 nv->cursor1 = 0xBC; 484 nv->cursor2 = 0; 485 nv->config = 0x00001114; 486 } else if(nv->arch >= 10) { 487 cursorstart = vga->vmz - 96 * 1024; 488 nv->cursor0 = 0x80 | (cursorstart >> 17); 489 nv->cursor1 = (cursorstart >> 11) << 2; 490 nv->cursor2 = cursorstart >> 24; 491 nv->config = nv->pfb[0x200/4]; 492 } 493 494 nv->vpll = (vga->p[0] << 16) | (vga->n[0] << 8) | vga->m[0]; 495 nv->pllsel = 0x10000700; 496 if (mode->z == 16) 497 nv->general = 0x00001100; 498 else 499 nv->general = 0x00000100; 500 //if (mode->z != 8) 501 // nv->general |= 0x00000030; 502 503 if (mode->x < 1280) 504 nv->repaint1 = 0x04; 505 else 506 nv->repaint1 = 0; 507 508 vga->attribute[0x10] &= ~0x40; 509 vga->attribute[0x11] = Pblack; 510 vga->crt[0x14] = 0; 511 512 /* set vert blanking to cover full overscan */ 513 514 tmp = vga->crt[0x12]; 515 vga->crt[0x15] = tmp; 516 if(tmp & 0x100) 517 vga->crt[0x07] |= 0x08; 518 else 519 vga->crt[0x07] &= ~0x08; 520 if(tmp & 0x200) 521 vga->crt[0x09] |= 0x20; 522 else 523 vga->crt[0x09] &= ~0x20; 524 525 vga->crt[0x16] = vga->crt[0x06] + 1; 526 527 /* set horiz blanking to cover full overscan */ 528 529 vga->crt[0x02] = vga->crt[0x01]; 530 tmp = vga->crt[0] + 4; 531 vga->crt[0x03] = 0x80 | (tmp & 0x1F); 532 if (tmp & 0x20) 533 vga->crt[0x05] |= 0x80; 534 else 535 vga->crt[0x05] &= ~0x80; 536 if (tmp & 0x40) 537 nv->screen = 0x10; 538 else 539 nv->screen = 0; 540 541 /* overflow bits */ 542 543 if (nv->islcd){ 544 tmp = vga->crt[0x06] - 3; 545 vga->crt[0x10] = tmp; 546 if(tmp & 0x100) 547 vga->crt[0x07] |= 0x04; 548 else 549 vga->crt[0x07] &= ~0x04; 550 if(tmp & 0x200) 551 vga->crt[0x07] |= 0x80; 552 else 553 vga->crt[0x07] &= ~0x80; 554 555 vga->crt[0x11] = 0x20 | ((vga->crt[0x06] - 2) & 0x0F); 556 557 tmp = vga->crt[0x10]; 558 vga->crt[0x15] = tmp; 559 if(tmp & 0x100) 560 vga->crt[0x07] |= 0x08; 561 else 562 vga->crt[0x07] &= ~0x08; 563 if(tmp & 0x200) 564 vga->crt[0x09] |= 0x20; 565 else 566 vga->crt[0x09] &= ~0x20; 567 568 vga->crt[0x04] = vga->crt[0] - 5; 569 570 vga->crt[0x05] &= ~0x1F; 571 vga->crt[0x05] |= (0x1F & (vga->crt[0] - 2)); 572 } 573 574 nv->repaint0 = (vga->crt[0x13] & 0x0700) >> 3; 575 576 pixeldepth = (mode->z +1)/8; 577 if (pixeldepth > 3) 578 nv->pixel = 3; 579 else 580 nv->pixel = pixeldepth; 581 582 nv->scale &= 0xFFF000FF; 583 if(nv->islcd){ 584 nv->pixel |= 0x80; 585 nv->scale |= 0x100; 586 } 587 588 if (vga->crt[0x06] & 0x400) 589 nv->screen |= 0x01; 590 if (vga->crt[0x12] & 0x400) 591 nv->screen |= 0x02; 592 if (vga->crt[0x10] & 0x400) 593 nv->screen |= 0x04; 594 if (vga->crt[0x15] & 0x400) 595 nv->screen |= 0x08; 596 if (vga->crt[0x13] & 0x800) 597 nv->screen |= 0x20; 598 599 nv->horiz = 0; 600 if (vga->crt[0] & 0x100) 601 nv->horiz = 0x01; 602 if(vga->crt[0x01] & 0x100) 603 nv->horiz |= 0x02; 604 if(vga->crt[0x02] & 0x100) 605 nv->horiz |= 0x04; 606 if(vga->crt[0x04] & 0x100) 607 nv->horiz |= 0x08; 608 609 nv->extra = 0; 610 if (vga->crt[0x06] & 0x800) 611 nv->extra |= 0x01; 612 if (vga->crt[0x12] & 0x800) 613 nv->extra |= 0x04; 614 if (vga->crt[0x10] & 0x800) 615 nv->extra |= 0x10; 616 if (vga->crt[0x15] & 0x800) 617 nv->extra |= 0x40; 618 619 nv->interlace = 0xFF; 620 if (nv->twoheads) { 621 nv->head |= 0x00001000; 622 nv->head2 |= ~0x00001000; 623 nv->crtcowner = 0; 624 if((nv->did & 0x0ff0) == 0x0110) 625 nv->dither &= ~0x00010000; 626 else 627 nv->dither &= ~1; 628 } 629 nv->cursorconfig = 0x00000100 | 0x02000000; 630 631 nv->timingH = 0; 632 nv->timingV = 0; 633 nv->displayV = vga->crt[0x12] + 1; 634 635 ctlr->flag |= Finit; 636 } 637 638 639 static void 640 load(Vga* vga, Ctlr* ctlr) 641 { 642 Nvidia *nv; 643 int i, regions; 644 ulong tmp; 645 646 nv = vga->private; 647 648 /* 649 * Unlock 650 */ 651 vgaxo(Crtx, 0x1F, 0x57); 652 653 nv->pmc[0x0140/4] = 0; 654 nv->pmc[0x0200/4] = 0xFFFF00FF; 655 nv->pmc[0x0200/4] = 0xFFFFFFFF; 656 657 nv->ptimer[0x0200] = 8; 658 nv->ptimer[0x0210] = 3; 659 nv->ptimer[0x0140] = 0; 660 nv->ptimer[0x0100] = 0xFFFFFFFF; 661 662 if (nv->arch == 4) 663 nv->pfb[0x00000200/4] = nv->config; 664 else if((nv->arch < 40) || ((nv->did & 0xfff0) == 0x0040)){ 665 for(i = 0; i < 8; i++){ 666 nv->pfb[(0x0240 + (i * 0x10))/4] = 0; 667 nv->pfb[(0x0244 + (i * 0x10))/4] = vga->vmz - 1;; 668 } 669 } 670 else{ 671 if(((nv->did & 0xfff0) == 0x0090) 672 || ((nv->did & 0xfff0) == 0x01D0) 673 || ((nv->did & 0xfff0) == 0x0290) 674 || ((nv->did & 0xfff0) == 0x0390)) 675 regions = 15; 676 else 677 regions = 12; 678 679 for(i = 0; i < regions; i++){ 680 nv->pfb[(0x0600 + (i * 0x10))/4] = 0; 681 nv->pfb[(0x0604 + (i * 0x10))/4] = vga->vmz - 1; 682 } 683 } 684 685 if (nv->arch >= 40) { 686 nv->pramin[0] = 0x80000010; 687 nv->pramin[0x0001] = 0x00101202; 688 nv->pramin[0x0002] = 0x80000011; 689 nv->pramin[0x0003] = 0x00101204; 690 nv->pramin[0x0004] = 0x80000012; 691 nv->pramin[0x0005] = 0x00101206; 692 nv->pramin[0x0006] = 0x80000013; 693 nv->pramin[0x0007] = 0x00101208; 694 nv->pramin[0x0008] = 0x80000014; 695 nv->pramin[0x0009] = 0x0010120A; 696 nv->pramin[0x000A] = 0x80000015; 697 nv->pramin[0x000B] = 0x0010120C; 698 nv->pramin[0x000C] = 0x80000016; 699 nv->pramin[0x000D] = 0x0010120E; 700 nv->pramin[0x000E] = 0x80000017; 701 nv->pramin[0x000F] = 0x00101210; 702 nv->pramin[0x0800] = 0x00003000; 703 nv->pramin[0x0801] = vga->vmz - 1; 704 nv->pramin[0x0802] = 0x00000002; 705 nv->pramin[0x0808] = 0x02080062; 706 nv->pramin[0x0809] = 0; 707 nv->pramin[0x080A] = 0x00001200; 708 nv->pramin[0x080B] = 0x00001200; 709 nv->pramin[0x080C] = 0; 710 nv->pramin[0x080D] = 0; 711 nv->pramin[0x0810] = 0x02080043; 712 nv->pramin[0x0811] = 0; 713 nv->pramin[0x0812] = 0; 714 nv->pramin[0x0813] = 0; 715 nv->pramin[0x0814] = 0; 716 nv->pramin[0x0815] = 0; 717 nv->pramin[0x0818] = 0x02080044; 718 nv->pramin[0x0819] = 0x02000000; 719 nv->pramin[0x081A] = 0; 720 nv->pramin[0x081B] = 0; 721 nv->pramin[0x081C] = 0; 722 nv->pramin[0x081D] = 0; 723 nv->pramin[0x0820] = 0x02080019; 724 nv->pramin[0x0821] = 0; 725 nv->pramin[0x0822] = 0; 726 nv->pramin[0x0823] = 0; 727 nv->pramin[0x0824] = 0; 728 nv->pramin[0x0825] = 0; 729 nv->pramin[0x0828] = 0x020A005C; 730 nv->pramin[0x0829] = 0; 731 nv->pramin[0x082A] = 0; 732 nv->pramin[0x082B] = 0; 733 nv->pramin[0x082C] = 0; 734 nv->pramin[0x082D] = 0; 735 nv->pramin[0x0830] = 0x0208009F; 736 nv->pramin[0x0831] = 0; 737 nv->pramin[0x0832] = 0x00001200; 738 nv->pramin[0x0833] = 0x00001200; 739 nv->pramin[0x0834] = 0; 740 nv->pramin[0x0835] = 0; 741 nv->pramin[0x0838] = 0x0208004A; 742 nv->pramin[0x0839] = 0x02000000; 743 nv->pramin[0x083A] = 0; 744 nv->pramin[0x083B] = 0; 745 nv->pramin[0x083C] = 0; 746 nv->pramin[0x083D] = 0; 747 nv->pramin[0x0840] = 0x02080077; 748 nv->pramin[0x0841] = 0; 749 nv->pramin[0x0842] = 0x00001200; 750 nv->pramin[0x0843] = 0x00001200; 751 nv->pramin[0x0844] = 0; 752 nv->pramin[0x0845] = 0; 753 nv->pramin[0x084C] = 0x00003002; 754 nv->pramin[0x084D] = 0x00007FFF; 755 nv->pramin[0x084E] = (vga->vmz - 128*1024) | 2; 756 } else { 757 nv->pramin[0x0000] = 0x80000010; 758 nv->pramin[0x0001] = 0x80011201; 759 nv->pramin[0x0002] = 0x80000011; 760 nv->pramin[0x0003] = 0x80011202; 761 nv->pramin[0x0004] = 0x80000012; 762 nv->pramin[0x0005] = 0x80011203; 763 nv->pramin[0x0006] = 0x80000013; 764 nv->pramin[0x0007] = 0x80011204; 765 nv->pramin[0x0008] = 0x80000014; 766 nv->pramin[0x0009] = 0x80011205; 767 nv->pramin[0x000A] = 0x80000015; 768 nv->pramin[0x000B] = 0x80011206; 769 nv->pramin[0x000C] = 0x80000016; 770 nv->pramin[0x000D] = 0x80011207; 771 nv->pramin[0x000E] = 0x80000017; 772 nv->pramin[0x000F] = 0x80011208; 773 nv->pramin[0x0800] = 0x00003000; 774 nv->pramin[0x0801] = vga->vmz - 1; 775 nv->pramin[0x0802] = 0x00000002; 776 nv->pramin[0x0803] = 0x00000002; 777 if (nv->arch >= 10) 778 nv->pramin[0x0804] = 0x01008062; 779 else 780 nv->pramin[0x0804] = 0x01008042; 781 nv->pramin[0x0805] = 0; 782 nv->pramin[0x0806] = 0x12001200; 783 nv->pramin[0x0807] = 0; 784 nv->pramin[0x0808] = 0x01008043; 785 nv->pramin[0x0809] = 0; 786 nv->pramin[0x080A] = 0; 787 nv->pramin[0x080B] = 0; 788 nv->pramin[0x080C] = 0x01008044; 789 nv->pramin[0x080D] = 0x00000002; 790 nv->pramin[0x080E] = 0; 791 nv->pramin[0x080F] = 0; 792 nv->pramin[0x0810] = 0x01008019; 793 nv->pramin[0x0811] = 0; 794 nv->pramin[0x0812] = 0; 795 nv->pramin[0x0813] = 0; 796 nv->pramin[0x0814] = 0x0100A05C; 797 nv->pramin[0x0815] = 0; 798 nv->pramin[0x0816] = 0; 799 nv->pramin[0x0817] = 0; 800 nv->pramin[0x0818] = 0x0100805F; 801 nv->pramin[0x0819] = 0; 802 nv->pramin[0x081A] = 0x12001200; 803 nv->pramin[0x081B] = 0; 804 nv->pramin[0x081C] = 0x0100804A; 805 nv->pramin[0x081D] = 0x00000002; 806 nv->pramin[0x081E] = 0; 807 nv->pramin[0x081F] = 0; 808 nv->pramin[0x0820] = 0x01018077; 809 nv->pramin[0x0821] = 0; 810 nv->pramin[0x0822] = 0x01201200; 811 nv->pramin[0x0823] = 0; 812 nv->pramin[0x0824] = 0x00003002; 813 nv->pramin[0x0825] = 0x00007FFF; 814 nv->pramin[0x0826] = (vga->vmz - 128*1024) | 2; 815 nv->pramin[0x0827] = 0x00000002; 816 } 817 if (nv->arch < 10) { 818 if((nv->did & 0x0fff) == 0x0020) { 819 nv->pramin[0x0824] |= 0x00020000; 820 nv->pramin[0x0826] += nv->pci->mem[1].bar; 821 } 822 nv->pgraph[0x0080/4] = 0x000001FF; 823 nv->pgraph[0x0080/4] = 0x1230C000; 824 nv->pgraph[0x0084/4] = 0x72111101; 825 nv->pgraph[0x0088/4] = 0x11D5F071; 826 nv->pgraph[0x008C/4] = 0x0004FF31; 827 nv->pgraph[0x008C/4] = 0x4004FF31; 828 829 nv->pgraph[0x0140/4] = 0; 830 nv->pgraph[0x0100/4] = 0xFFFFFFFF; 831 nv->pgraph[0x0170/4] = 0x10010100; 832 nv->pgraph[0x0710/4] = 0xFFFFFFFF; 833 nv->pgraph[0x0720/4] = 1; 834 835 nv->pgraph[0x0810/4] = 0; 836 nv->pgraph[0x0608/4] = 0xFFFFFFFF; 837 } else { 838 nv->pgraph[0x0080/4] = 0xFFFFFFFF; 839 nv->pgraph[0x0080/4] = 0; 840 841 nv->pgraph[0x0140/4] = 0; 842 nv->pgraph[0x0100/4] = 0xFFFFFFFF; 843 nv->pgraph[0x0144/4] = 0x10010100; 844 nv->pgraph[0x0714/4] = 0xFFFFFFFF; 845 nv->pgraph[0x0720/4] = 1; 846 nv->pgraph[0x0710/4] &= 0x0007ff00; 847 nv->pgraph[0x0710/4] |= 0x00020100; 848 849 if (nv->arch == 10) { 850 nv->pgraph[0x0084/4] = 0x00118700; 851 nv->pgraph[0x0088/4] = 0x24E00810; 852 nv->pgraph[0x008C/4] = 0x55DE0030; 853 854 for(i = 0; i < 32; i++) 855 nv->pgraph[0x0B00/4 + i] = nv->pfb[0x0240/4 + i]; 856 857 nv->pgraph[0x640/4] = 0; 858 nv->pgraph[0x644/4] = 0; 859 nv->pgraph[0x684/4] = vga->vmz - 1; 860 nv->pgraph[0x688/4] = vga->vmz - 1; 861 862 nv->pgraph[0x0810/4] = 0; 863 nv->pgraph[0x0608/4] = 0xFFFFFFFF; 864 } else { 865 if (nv->arch >= 40) { 866 nv->pgraph[0x0084/4] = 0x401287c0; 867 nv->pgraph[0x008C/4] = 0x60de8051; 868 nv->pgraph[0x0090/4] = 0x00008000; 869 nv->pgraph[0x0610/4] = 0x00be3c5f; 870 871 872 tmp = nv->pgraph[0x1540] & 0xff; 873 for(i = 0; tmp && !(tmp & 1); tmp >>= 1, i++) 874 ; 875 nv->pgraph[0x5000] = i; 876 877 if ((nv->did & 0xfff0) == 0x0040) { 878 nv->pgraph[0x09b0/4] = 0x83280fff; 879 nv->pgraph[0x09b4/4] = 0x000000a0; 880 } else { 881 nv->pgraph[0x0820/4] = 0x83280eff; 882 nv->pgraph[0x0824/4] = 0x000000a0; 883 } 884 885 switch(nv->did & 0xfff0) { 886 case 0x0040: 887 nv->pgraph[0x09b8/4] = 0x0078e366; 888 nv->pgraph[0x09bc/4] = 0x0000014c; 889 nv->pfb[0x033C/4] &= 0xffff7fff; 890 break; 891 case 0x00C0: 892 case 0x0120: 893 nv->pgraph[0x0828/4] = 0x007596ff; 894 nv->pgraph[0x082C/4] = 0x00000108; 895 break; 896 case 0x0160: 897 case 0x01D0: 898 case 0x0240: 899 nv->pmc[0x1700/4] = nv->pfb[0x020C/4]; 900 nv->pmc[0x1704/4] = 0; 901 nv->pmc[0x1708/4] = 0; 902 nv->pmc[0x170C/4] = nv->pfb[0x020C/4]; 903 nv->pgraph[0x0860/4] = 0; 904 nv->pgraph[0x0864/4] = 0; 905 nv->pramdac[0x0608/4] |= 0x00100000; 906 break; 907 case 0x0140: 908 nv->pgraph[0x0828/4] = 0x0072cb77; 909 nv->pgraph[0x082C/4] = 0x00000108; 910 break; 911 case 0x0220: 912 nv->pgraph[0x0860/4] = 0; 913 nv->pgraph[0x0864/4] = 0; 914 nv->pramdac[0x0608/4] |= 0x00100000; 915 break; 916 case 0x0090: 917 case 0x0290: 918 case 0x0390: 919 nv->pgraph[0x0608/4] |= 0x00100000; 920 nv->pgraph[0x0828/4] = 0x07830610; 921 nv->pgraph[0x082C/4] = 0x0000016A; 922 break; 923 default: 924 break; 925 } 926 927 nv->pgraph[0x0b38/4] = 0x2ffff800; 928 nv->pgraph[0x0b3c/4] = 0x00006000; 929 nv->pgraph[0x032C/4] = 0x01000000; 930 nv->pgraph[0x0220/4] = 0x00001200; 931 } else if (nv->arch == 30) { 932 nv->pgraph[0x0084/4] = 0x40108700; 933 nv->pgraph[0x0890/4] = 0x00140000; 934 nv->pgraph[0x008C/4] = 0xf00e0431; 935 nv->pgraph[0x0090/4] = 0x00008000; 936 nv->pgraph[0x0610/4] = 0xf04b1f36; 937 nv->pgraph[0x0B80/4] = 0x1002d888; 938 nv->pgraph[0x0B88/4] = 0x62ff007f; 939 } else { 940 nv->pgraph[0x0084/4] = 0x00118700; 941 nv->pgraph[0x008C/4] = 0xF20E0431; 942 nv->pgraph[0x0090/4] = 0; 943 nv->pgraph[0x009C/4] = 0x00000040; 944 945 if((nv->did & 0x0ff0) >= 0x0250) { 946 nv->pgraph[0x0890/4] = 0x00080000; 947 nv->pgraph[0x0610/4] = 0x304B1FB6; 948 nv->pgraph[0x0B80/4] = 0x18B82880; 949 nv->pgraph[0x0B84/4] = 0x44000000; 950 nv->pgraph[0x0098/4] = 0x40000080; 951 nv->pgraph[0x0B88/4] = 0x000000ff; 952 } else { 953 nv->pgraph[0x0880/4] = 0x00080000; 954 nv->pgraph[0x0094/4] = 0x00000005; 955 nv->pgraph[0x0B80/4] = 0x45CAA208; 956 nv->pgraph[0x0B84/4] = 0x24000000; 957 nv->pgraph[0x0098/4] = 0x00000040; 958 nv->pgraph[0x0750/4] = 0x00E00038; 959 nv->pgraph[0x0754/4] = 0x00000030; 960 nv->pgraph[0x0750/4] = 0x00E10038; 961 nv->pgraph[0x0754/4] = 0x00000030; 962 } 963 } 964 965 if((nv->arch < 40) || ((nv->did & 0xfff0) == 0x0040)){ 966 for(i = 0; i < 32; i++) { 967 nv->pgraph[(0x0900/4) + i] = nv->pfb[(0x0240/4) + i]; 968 nv->pgraph[(0x6900/4) + i] = nv->pfb[(0x0240/4) + i]; 969 } 970 } 971 else{ 972 if(((nv->did & 0xfff0) == 0x0090) 973 || ((nv->did & 0xfff0) == 0x01D0) 974 || ((nv->did & 0xfff0) == 0x0290) 975 || ((nv->did & 0xfff0) == 0x0390)){ 976 for(i = 0; i < 60; i++) { 977 nv->pgraph[(0x0D00/4) + i] = nv->pfb[(0x0600/4) + i]; 978 nv->pgraph[(0x6900/4) + i] = nv->pfb[(0x0600/4) + i]; 979 } 980 } 981 else{ 982 for(i = 0; i < 48; i++) { 983 nv->pgraph[(0x0900/4) + i] = nv->pfb[(0x0600/4) + i]; 984 if(((nv->did & 0xfff0) != 0x0160) 985 && ((nv->did & 0xfff0) != 0x0220) 986 && ((nv->did & 0xfff0) != 0x0240)) 987 nv->pgraph[(0x6900/4) + i] = nv->pfb[(0x0600/4) + i]; 988 } 989 } 990 } 991 992 if(nv->arch >= 40) { 993 if((nv->did & 0xfff0) == 0x0040) { 994 nv->pgraph[0x09A4/4] = nv->pfb[0x0200/4]; 995 nv->pgraph[0x09A8/4] = nv->pfb[0x0204/4]; 996 nv->pgraph[0x69A4/4] = nv->pfb[0x0200/4]; 997 nv->pgraph[0x69A8/4] = nv->pfb[0x0204/4]; 998 999 nv->pgraph[0x0820/4] = 0; 1000 nv->pgraph[0x0824/4] = 0; 1001 nv->pgraph[0x0864/4] = vga->vmz - 1; 1002 nv->pgraph[0x0868/4] = vga->vmz - 1; 1003 } else { 1004 nv->pgraph[0x09F0/4] = nv->pfb[0x0200/4]; 1005 nv->pgraph[0x09F4/4] = nv->pfb[0x0204/4]; 1006 nv->pgraph[0x69F0/4] = nv->pfb[0x0200/4]; 1007 nv->pgraph[0x69F4/4] = nv->pfb[0x0204/4]; 1008 1009 nv->pgraph[0x0840/4] = 0; 1010 nv->pgraph[0x0844/4] = 0; 1011 nv->pgraph[0x08a0/4] = vga->vmz - 1; 1012 nv->pgraph[0x08a4/4] = vga->vmz - 1; 1013 } 1014 } else { 1015 nv->pgraph[0x09A4/4] = nv->pfb[0x0200/4]; 1016 nv->pgraph[0x09A8/4] = nv->pfb[0x0204/4]; 1017 nv->pgraph[0x0750/4] = 0x00EA0000; 1018 nv->pgraph[0x0754/4] = nv->pfb[0x0200/4]; 1019 nv->pgraph[0x0750/4] = 0x00EA0004; 1020 nv->pgraph[0x0754/4] = nv->pfb[0x0204/4]; 1021 1022 nv->pgraph[0x0820/4] = 0; 1023 nv->pgraph[0x0824/4] = 0; 1024 nv->pgraph[0x0864/4] = vga->vmz - 1; 1025 nv->pgraph[0x0868/4] = vga->vmz - 1; 1026 } 1027 1028 nv->pgraph[0x0B20/4] = 0; 1029 nv->pgraph[0x0B04/4] = 0xFFFFFFFF; 1030 } 1031 } 1032 1033 nv->pgraph[0x053C/4] = 0; 1034 nv->pgraph[0x0540/4] = 0; 1035 nv->pgraph[0x0544/4] = 0x00007FFF; 1036 nv->pgraph[0x0548/4] = 0x00007FFF; 1037 1038 nv->pfifo[0x0140] = 0; 1039 nv->pfifo[0x0141] = 0x00000001; 1040 nv->pfifo[0x0480] = 0; 1041 nv->pfifo[0x0494] = 0; 1042 if (nv->arch >= 40) 1043 nv->pfifo[0x0481] = 0x00010000; 1044 else 1045 nv->pfifo[0x0481] = 0x00000100; 1046 nv->pfifo[0x0490] = 0; 1047 nv->pfifo[0x0491] = 0; 1048 if (nv->arch >= 40) 1049 nv->pfifo[0x048B] = 0x00001213; 1050 else 1051 nv->pfifo[0x048B] = 0x00001209; 1052 nv->pfifo[0x0400] = 0; 1053 nv->pfifo[0x0414] = 0; 1054 nv->pfifo[0x0084] = 0x03000100; 1055 nv->pfifo[0x0085] = 0x00000110; 1056 nv->pfifo[0x0086] = 0x00000112; 1057 nv->pfifo[0x0143] = 0x0000FFFF; 1058 nv->pfifo[0x0496] = 0x0000FFFF; 1059 nv->pfifo[0x0050] = 0; 1060 nv->pfifo[0x0040] = 0xFFFFFFFF; 1061 nv->pfifo[0x0415] = 0x00000001; 1062 nv->pfifo[0x048C] = 0; 1063 nv->pfifo[0x04A0] = 0; 1064 nv->pfifo[0x0489] = 0x000F0078; 1065 nv->pfifo[0x0488] = 0x00000001; 1066 nv->pfifo[0x0480] = 0x00000001; 1067 nv->pfifo[0x0494] = 0x00000001; 1068 nv->pfifo[0x0495] = 0x00000001; 1069 nv->pfifo[0x0140] = 0x00000001; 1070 1071 if (nv->arch >= 10) { 1072 if (nv->twoheads) { 1073 nv->pcrtc[0x0860/4] = nv->head; 1074 nv->pcrtc[0x2860/4] = nv->head2; 1075 } 1076 nv->pramdac[0x0404/4] |= (1 << 25); 1077 1078 nv->pmc[0x8704/4] = 1; 1079 nv->pmc[0x8140/4] = 0; 1080 nv->pmc[0x8920/4] = 0; 1081 nv->pmc[0x8924/4] = 0; 1082 nv->pmc[0x8908/4] = vga->vmz - 1; 1083 nv->pmc[0x890C/4] = vga->vmz - 1; 1084 nv->pmc[0x1588/4] = 0; 1085 1086 nv->pcrtc[0x0810/4] = nv->cursorconfig; 1087 nv->pcrtc[0x0830/4] = nv->displayV - 3; 1088 nv->pcrtc[0x0834/4] = nv->displayV - 1; 1089 1090 if (nv->islcd) { 1091 if((nv->did & 0x0ff0) == 0x0110) 1092 nv->pramdac[0x0528/4] = nv->dither; 1093 else if (nv->twoheads) 1094 nv->pramdac[0x083C/4] = nv->dither; 1095 vgaxo(Crtx, 0x53, nv->timingH); 1096 vgaxo(Crtx, 0x54, nv->timingV); 1097 vgaxo(Crtx, 0x21, 0xFA); 1098 } 1099 vgaxo(Crtx, 0x41, nv->extra); 1100 } 1101 1102 vgaxo(Crtx, 0x19, nv->repaint0); 1103 vgaxo(Crtx, 0x1A, nv->repaint1); 1104 vgaxo(Crtx, 0x25, nv->screen); 1105 vgaxo(Crtx, 0x28, nv->pixel); 1106 vgaxo(Crtx, 0x2D, nv->horiz); 1107 vgaxo(Crtx, 0x30, nv->cursor0); 1108 vgaxo(Crtx, 0x31, nv->cursor1); 1109 vgaxo(Crtx, 0x2F, nv->cursor2); 1110 vgaxo(Crtx, 0x39, nv->interlace); 1111 1112 if (nv->islcd) { 1113 nv->pramdac[0x00000848/4] = nv->scale; 1114 nv->pramdac[0x00000828/4] = nv->crtcsync; 1115 } else { 1116 nv->pramdac[0x0000050C/4] = nv->pllsel; 1117 nv->pramdac[0x00000508/4] = nv->vpll; 1118 if (nv->twoheads) 1119 nv->pramdac[0x00000520/4] = nv->vpll2; 1120 if (nv->twostagepll) { 1121 nv->pramdac[0x00000578/4] = nv->vpllB; 1122 nv->pramdac[0x0000057C/4] = nv->vpll2B; 1123 } 1124 } 1125 nv->pramdac[0x00000600/4] = nv->general; 1126 1127 nv->pcrtc[0x0140/4] = 0; 1128 nv->pcrtc[0x0100/4] = 1; 1129 1130 ctlr->flag |= Fload; 1131 } 1132 1133 1134 static void 1135 dump(Vga* vga, Ctlr* ctlr) 1136 { 1137 Nvidia *nv; 1138 int m, n, p, f; 1139 double trouble; 1140 1141 if((nv = vga->private) == 0) 1142 return; 1143 1144 p = (nv->vpll >> 16); 1145 n = (nv->vpll >> 8) & 0xFF; 1146 m = nv->vpll & 0xFF; 1147 trouble = nv->crystalfreq; 1148 trouble = trouble * n / (m<<p); 1149 f = trouble+0.5; 1150 printitem(ctlr->name, "dclk m n p"); 1151 Bprint(&stdout, " %d %d - %d %d\n", f, m, n, p); 1152 printitem(ctlr->name, "CrystalFreq"); 1153 Bprint(&stdout, " %d Hz\n", nv->crystalfreq); 1154 printitem(ctlr->name, "arch"); 1155 Bprint(&stdout, " %d\n", nv->arch); 1156 printitem(ctlr->name, "did"); 1157 Bprint(&stdout, " %.4ux\n", nv->did); 1158 printitem(ctlr->name, "repaint0"); 1159 Bprint(&stdout, " %ux\n", nv->repaint0); 1160 printitem(ctlr->name, "repaint1"); 1161 Bprint(&stdout, " %ux\n", nv->repaint1); 1162 printitem(ctlr->name, "screen"); 1163 Bprint(&stdout, " %ux\n", nv->screen); 1164 printitem(ctlr->name, "pixel"); 1165 Bprint(&stdout, " %ux\n", nv->pixel); 1166 printitem(ctlr->name, "horiz"); 1167 Bprint(&stdout, " %ux\n", nv->horiz); 1168 printitem(ctlr->name, "cursor0"); 1169 Bprint(&stdout, " %ux\n", nv->cursor0); 1170 printitem(ctlr->name, "cursor1"); 1171 Bprint(&stdout, " %ux\n", nv->cursor1); 1172 printitem(ctlr->name, "cursor2"); 1173 Bprint(&stdout, " %ux\n", nv->cursor2); 1174 printitem(ctlr->name, "interlace"); 1175 Bprint(&stdout, " %ux\n", nv->interlace); 1176 printitem(ctlr->name, "extra"); 1177 Bprint(&stdout, " %ux\n", nv->extra); 1178 printitem(ctlr->name, "crtcowner"); 1179 Bprint(&stdout, " %ux\n", nv->crtcowner); 1180 printitem(ctlr->name, "timingH"); 1181 Bprint(&stdout, " %ux\n", nv->timingH); 1182 printitem(ctlr->name, "timingV"); 1183 Bprint(&stdout, " %ux\n", nv->timingV); 1184 printitem(ctlr->name, "vpll"); 1185 Bprint(&stdout, " %lux\n", nv->vpll); 1186 printitem(ctlr->name, "vpllB"); 1187 Bprint(&stdout, " %lux\n", nv->vpllB); 1188 printitem(ctlr->name, "vpll2"); 1189 Bprint(&stdout, " %lux\n", nv->vpll2); 1190 printitem(ctlr->name, "vpll2B"); 1191 Bprint(&stdout, " %lux\n", nv->vpll2B); 1192 printitem(ctlr->name, "pllsel"); 1193 Bprint(&stdout, " %lux\n", nv->pllsel); 1194 printitem(ctlr->name, "general"); 1195 Bprint(&stdout, " %lux\n", nv->general); 1196 printitem(ctlr->name, "scale"); 1197 Bprint(&stdout, " %lux\n", nv->scale); 1198 printitem(ctlr->name, "config"); 1199 Bprint(&stdout, " %lux\n", nv->config); 1200 printitem(ctlr->name, "head"); 1201 Bprint(&stdout, " %lux\n", nv->head); 1202 printitem(ctlr->name, "head2"); 1203 Bprint(&stdout, " %lux\n", nv->head2); 1204 printitem(ctlr->name, "cursorconfig"); 1205 Bprint(&stdout, " %lux\n", nv->cursorconfig); 1206 printitem(ctlr->name, "dither"); 1207 Bprint(&stdout, " %lux\n", nv->dither); 1208 printitem(ctlr->name, "crtcsync"); 1209 Bprint(&stdout, " %lux\n", nv->crtcsync); 1210 printitem(ctlr->name, "islcd"); 1211 Bprint(&stdout, " %d\n", nv->islcd); 1212 printitem(ctlr->name, "twoheads"); 1213 Bprint(&stdout, " %d\n", nv->twoheads); 1214 printitem(ctlr->name, "twostagepll"); 1215 Bprint(&stdout, " %d\n", nv->twostagepll); 1216 printitem(ctlr->name, "crtcnumber"); 1217 Bprint(&stdout, " %d\n", nv->crtcnumber); 1218 1219 printitem(ctlr->name, "fpwidth"); 1220 Bprint(&stdout, " %d\n", nv->fpwidth); 1221 printitem(ctlr->name, "fpheight"); 1222 Bprint(&stdout, " %d\n", nv->fpheight); 1223 1224 } 1225 1226 1227 Ctlr nvidia = { 1228 "nvidia", /* name */ 1229 snarf, /* snarf */ 1230 options, /* options */ 1231 init, /* init */ 1232 load, /* load */ 1233 dump, /* dump */ 1234 }; 1235 1236 Ctlr nvidiahwgc = { 1237 "nvidiahwgc", /* name */ 1238 0, /* snarf */ 1239 0, /* options */ 1240 0, /* init */ 1241 0, /* load */ 1242 0, /* dump */ 1243 }; 1244