1 2 /* Portions of this file derived from work with the following copyright */ 3 4 /***************************************************************************\ 5 |* *| 6 |* Copyright 2003 NVIDIA, Corporation. All rights reserved. *| 7 |* *| 8 |* NOTICE TO USER: The source code is copyrighted under U.S. and *| 9 |* international laws. Users and possessors of this source code are *| 10 |* hereby granted a nonexclusive, royalty-free copyright license to *| 11 |* use this code in individual and commercial software. *| 12 |* *| 13 |* Any use of this source code must include, in the user documenta- *| 14 |* tion and internal comments to the code, notices to the end user *| 15 |* as follows: *| 16 |* *| 17 |* Copyright 2003 NVIDIA, Corporation. All rights reserved. *| 18 |* *| 19 |* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| 20 |* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| 21 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| 22 |* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| 23 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| 24 |* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| 25 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| 26 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| 27 |* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| 28 |* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| 29 |* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| 30 |* *| 31 |* U.S. Government End Users. This source code is a "commercial *| 32 |* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| 33 |* consisting of "commercial computer software" and "commercial *| 34 |* computer software documentation," as such terms are used in *| 35 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| 36 |* ment only as a commercial end item. Consistent with 48 C.F.R. *| 37 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| 38 |* all U.S. Government End Users acquire the source code with only *| 39 |* those rights set forth herein. *| 40 |* *| 41 \***************************************************************************/ 42 43 #include <u.h> 44 #include <libc.h> 45 #include <bio.h> 46 47 #include "pci.h" 48 #include "vga.h" 49 50 typedef struct Nvidia Nvidia; 51 struct Nvidia { 52 Pcidev* pci; 53 int did; /* not always == pci->did */ 54 55 int arch; 56 int crystalfreq; 57 58 ulong* mmio; 59 ulong* pfb; /* mmio pointers */ 60 ulong* pramdac; 61 ulong* pextdev; 62 ulong* pmc; 63 ulong* ptimer; 64 ulong* pfifo; 65 ulong* pramin; 66 ulong* pgraph; 67 ulong* fifo; 68 ulong* pcrtc; 69 70 ushort repaint0; 71 ushort repaint1; 72 ushort screen; 73 ushort pixel; 74 ushort horiz; 75 ushort cursor0; 76 ushort cursor1; 77 ushort cursor2; 78 ushort interlace; 79 ushort extra; 80 ushort crtcowner; 81 ushort timingH; 82 ushort timingV; 83 84 ulong vpll; 85 ulong vpllB; 86 ulong vpll2; 87 ulong vpll2B; 88 ulong pllsel; 89 ulong general; 90 ulong scale; 91 ulong config; 92 ulong head; 93 ulong head2; 94 ulong cursorconfig; 95 ulong dither; 96 ulong crtcsync; 97 ulong displayV; 98 99 int islcd; 100 int fpwidth; 101 int fpheight; 102 int twoheads; 103 int twostagepll; 104 int crtcnumber; 105 }; 106 107 static void 108 getpcixdid(Nvidia* nv) 109 { 110 ulong pcicmd, pciid; 111 ushort vid, did; 112 113 pcicmd = pcicfgr32(nv->pci, PciPCR); 114 pcicfgw32(nv->pci, PciPCR, pcicmd | 0x02); 115 pciid = nv->mmio[0x1800/4]; 116 pcicfgw32(nv->pci, PciPCR, pcicmd); 117 118 vid = pciid >> 16; 119 did = (pciid & 0xFFFF); 120 if (did == 0x10DE) 121 did = vid; 122 else if (vid == 0xDE10) 123 did = ((pciid << 8) & 0xFF00) | ((pciid >> 8) & 0x00FF); 124 125 nv->did = did; 126 } 127 128 static void 129 snarf(Vga* vga, Ctlr* ctlr) 130 { 131 Nvidia *nv; 132 Pcidev *p; 133 ulong *mmio, tmp; 134 int implementation; 135 136 if(vga->private == nil){ 137 vga->private = alloc(sizeof(Nvidia)); 138 nv = vga->private; 139 140 p = nil; 141 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 142 if((p->ccru>>8) == 3) 143 break; 144 } 145 if(p == nil) 146 error("%s: not found\n", ctlr->name); 147 148 vgactlw("type", ctlr->name); 149 150 mmio = segattach(0, "nvidiammio", 0, p->mem[0].size); 151 if(mmio == (void*)-1) 152 error("%s: segattach nvidiammio, size %d: %r\n", 153 ctlr->name, p->mem[0].size); 154 155 nv->pci = p; 156 nv->mmio = mmio; 157 158 nv->pfb = mmio+0x00100000/4; 159 nv->pramdac = mmio+0x00680000/4; 160 nv->pextdev = mmio+0x00101000/4; 161 nv->pmc = mmio+0x00000000/4; 162 nv->ptimer = mmio+0x00009000/4; 163 nv->pfifo = mmio+0x00002000/4; 164 nv->pramin = mmio+0x00710000/4; 165 nv->pgraph = mmio+0x00400000/4; 166 nv->fifo = mmio+0x00800000/4; 167 nv->pcrtc= mmio+0x00600000/4; 168 169 nv->did = p->did; 170 if ((nv->did & 0xfff0) == 0x00f0) 171 getpcixdid(nv); 172 173 switch (nv->did & 0x0ff0) { 174 case 0x0020: 175 case 0x00A0: 176 nv->arch = 4; 177 break; 178 case 0x0100: /* GeForce 256 */ 179 case 0x0110: /* GeForce2 MX */ 180 case 0x0150: /* GeForce2 */ 181 case 0x0170: /* GeForce4 MX */ 182 case 0x0180: /* GeForce4 MX (8x AGP) */ 183 case 0x01A0: /* nForce */ 184 case 0x01F0: /* nForce2 */ 185 nv->arch = 10; 186 break; 187 case 0x0200: /* GeForce3 */ 188 case 0x0250: /* GeForce4 Ti */ 189 case 0x0280: /* GeForce4 Ti (8x AGP) */ 190 nv->arch = 20; 191 break; 192 case 0x0300: /* GeForceFX 5800 */ 193 case 0x0310: /* GeForceFX 5600 */ 194 case 0x0320: /* GeForceFX 5200 */ 195 case 0x0330: /* GeForceFX 5900 */ 196 case 0x0340: /* GeForceFX 5700 */ 197 nv->arch = 30; 198 break; 199 case 0x0040: 200 case 0x00C0: 201 case 0x0120: 202 case 0x0130: 203 case 0x0140: /* GeForce 6600 */ 204 case 0x0160: 205 case 0x01D0: 206 case 0x0090: 207 case 0x0210: 208 nv->arch = 40; 209 break; 210 default: 211 error("%s: DID %4.4uX unsupported\n", ctlr->name, nv->did); 212 break; 213 } 214 } 215 nv = vga->private; 216 implementation = nv->did & 0x0ff0; 217 218 /* 219 * Unlock 220 */ 221 vgaxo(Crtx, 0x1F, 0x57); 222 223 if (nv->pextdev[0x00000000] & 0x00000040) 224 nv->crystalfreq = RefFreq; 225 else 226 nv->crystalfreq = 13500000; 227 228 if ((implementation == 0x0170) || 229 (implementation == 0x0180) || 230 (implementation == 0x01F0) || 231 (implementation >= 0x0250)) 232 if(nv->pextdev[0x00000000] & (1 << 22)) 233 nv->crystalfreq = 27000000; 234 235 nv->twoheads = (nv->arch >= 10) && 236 (implementation != 0x0100) && 237 (implementation != 0x0150) && 238 (implementation != 0x01A0) && 239 (implementation != 0x0200); 240 241 nv->twostagepll = (implementation == 0x0310) || 242 (implementation == 0x0340) || 243 (nv->arch >= 40); 244 245 if (nv->twoheads && (implementation != 0x0110)) 246 if(nv->pextdev[0x00000000] & (1 << 22)) 247 nv->crystalfreq = 27000000; 248 249 /* laptop chips */ 250 switch (nv->did & 0xffff) { 251 case 0x0112: 252 case 0x0174: 253 case 0x0175: 254 case 0x0176: 255 case 0x0177: 256 case 0x0179: 257 case 0x017C: 258 case 0x017D: 259 case 0x0186: 260 case 0x0187: 261 case 0x0189: /* 0x0189 not in nwaples's driver */ 262 case 0x018D: 263 case 0x0286: 264 case 0x028C: 265 case 0x0316: 266 case 0x0317: 267 case 0x031A: 268 case 0x031B: 269 case 0x031C: 270 case 0x031D: 271 case 0x031E: 272 case 0x031F: 273 case 0x0324: 274 case 0x0325: 275 case 0x0328: 276 case 0x0329: 277 case 0x032C: 278 case 0x032D: 279 case 0x0347: 280 case 0x0348: 281 case 0x0349: 282 case 0x034B: 283 case 0x034C: 284 case 0x0160: 285 case 0x0166: 286 case 0x00C8: 287 case 0x00CC: 288 case 0x0144: 289 case 0x0146: 290 case 0x0148: 291 nv->islcd = 1; 292 break; 293 default: 294 break; 295 } 296 297 if (nv->arch == 4) { 298 tmp = nv->pfb[0x00000000]; 299 if (tmp & 0x0100) { 300 vga->vmz = ((tmp >> 12) & 0x0F) * 1024 + 1024 * 2; 301 } else { 302 tmp &= 0x03; 303 if (tmp) 304 vga->vmz = (1024*1024*2) << tmp; 305 else 306 vga->vmz = 1024*1024*32; 307 } 308 } else if (implementation == 0x01a0) { 309 p = nil; 310 tmp = MKBUS(BusPCI, 0, 0, 1); 311 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 312 if(p->tbdf == tmp) 313 break; 314 } 315 tmp = pcicfgr32(p, 0x7C); 316 vga->vmz = (((tmp >> 6) & 31) + 1) * 1024 * 1024; 317 } else if (implementation == 0x01f0) { 318 p = nil; 319 tmp = MKBUS(BusPCI, 0, 0, 1); 320 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 321 if(p->tbdf == tmp) 322 break; 323 } 324 tmp = pcicfgr32(p, 0x84); 325 vga->vmz = (((tmp >> 4) & 127) + 1) * 1024 * 1024; 326 } else { 327 tmp = (nv->pfb[0x0000020C/4] >> 20) & 0xFFF; 328 if (tmp == 0) 329 tmp = 16; 330 vga->vmz = 1024*1024*tmp; 331 } 332 333 nv->repaint0 = vgaxi(Crtx, 0x19); 334 nv->repaint1 = vgaxi(Crtx, 0x1A); 335 nv->screen = vgaxi(Crtx, 0x25); 336 nv->pixel = vgaxi(Crtx, 0x28); 337 nv->horiz = vgaxi(Crtx, 0x2D); 338 nv->cursor0 = vgaxi(Crtx, 0x30); 339 nv->cursor1 = vgaxi(Crtx, 0x31); 340 nv->cursor2 = vgaxi(Crtx, 0x2F); 341 nv->interlace = vgaxi(Crtx, 0x39); 342 343 nv->vpll = nv->pramdac[0x00000508/4]; 344 if (nv->twoheads) 345 nv->vpll2 = nv->pramdac[0x00000520/4]; 346 if (nv->twostagepll) { 347 nv->vpllB = nv->pramdac[0x00000578/4]; 348 nv->vpll2B = nv->pramdac[0x0000057C/4]; 349 } 350 nv->pllsel = nv->pramdac[0x0000050C/4]; 351 nv->general = nv->pramdac[0x00000600/4]; 352 nv->scale = nv->pramdac[0x00000848/4]; 353 nv->config = nv->pfb[0x00000200/4]; 354 355 if (nv->pixel & 0x80){ 356 nv->islcd = 1; 357 } 358 359 if (nv->arch >= 10) { 360 if (nv->twoheads) { 361 nv->head = nv->pcrtc[0x0860/4]; 362 nv->head2 = nv->pcrtc[0x2860/4]; 363 nv->crtcowner = vgaxi(Crtx, 0x44); 364 } 365 nv->extra = vgaxi(Crtx, 0x41); 366 nv->cursorconfig = nv->pcrtc[0x0810/4]; 367 if (implementation == 0x0110) 368 nv->dither = nv->pramdac[0x0528/4]; 369 else if (nv->twoheads) 370 nv->dither = nv->pramdac[0x083C/4]; 371 } 372 373 /* 374 * DFP. 375 */ 376 if (nv->islcd) { 377 nv->fpwidth = nv->pramdac[0x0820/4] + 1; 378 nv->fpheight = nv->pramdac[0x0800/4] + 1; 379 nv->crtcsync = nv->pramdac[0x0828/4]; 380 } 381 382 nv->crtcnumber = 0; 383 384 ctlr->flag |= Fsnarf; 385 } 386 387 388 static void 389 options(Vga*, Ctlr* ctlr) 390 { 391 ctlr->flag |= Hlinear|Foptions; 392 } 393 394 395 static void 396 clock(Vga* vga, Ctlr* ctlr) 397 { 398 int m, n, p, f, d; 399 Nvidia *nv; 400 double trouble; 401 int fmin, mmin, nmin, crystalfreq; 402 nv = vga->private; 403 404 if(vga->f[0] == 0) 405 vga->f[0] = vga->mode->frequency; 406 407 vga->d[0] = vga->f[0]+1; 408 409 vga->n[1] = 255; 410 if (nv->twostagepll) { 411 vga->p[1] = 6; 412 vga->m[1] = 13; 413 vga->f[1] = 400000000 << 2; 414 crystalfreq = nv->crystalfreq << 2; 415 fmin = 100000000 << 2; 416 mmin = 1; 417 nmin = 5; 418 nv->vpllB = 0x80000401; 419 } else { 420 vga->p[1] = 4; 421 if (nv->crystalfreq == 13500000) 422 vga->m[1] = 13; 423 else 424 vga->m[1] = 14; 425 vga->f[1] = 350000000; 426 crystalfreq = nv->crystalfreq; 427 fmin = 128000000; 428 mmin = 7; 429 nmin = 0; 430 } 431 432 for (p=0; p <= vga->p[1]; p++){ 433 f = vga->f[0] << p; 434 if ((f >= fmin) && (f <= vga->f[1])) { 435 for (m=mmin; m <= vga->m[1]; m++){ 436 trouble = (double) crystalfreq / (double) (m << p); 437 n = (vga->f[0] / trouble)+0.5; 438 f = n*trouble + 0.5; 439 d = vga->f[0] - f; 440 if (d < 0) 441 d = -d; 442 if ((n & ~0xFF) && (n >= nmin)) 443 d = vga->d[0] + 1; 444 if (d <= vga->d[0]){ 445 vga->n[0] = n; 446 vga->m[0] = m; 447 vga->p[0] = p; 448 vga->d[0] = d; 449 } 450 } 451 } 452 } 453 if (vga->d[0] > vga->f[0]) 454 error("%s: vclk %lud out of range\n", ctlr->name, vga->f[0]); 455 } 456 457 458 static void 459 init(Vga* vga, Ctlr* ctlr) 460 { 461 Mode *mode; 462 Nvidia *nv; 463 char *p, *val; 464 int tmp, pixeldepth; 465 ulong cursorstart; 466 467 mode = vga->mode; 468 if(mode->z == 24) 469 error("%s: 24-bit colour not supported, use 32-bit\n", ctlr->name); 470 471 nv = vga->private; 472 473 if(vga->linear && (ctlr->flag & Hlinear)) 474 ctlr->flag |= Ulinear; 475 476 clock(vga, ctlr); 477 478 if(val = dbattr(vga->mode->attr, "lcd")){ 479 if((nv->islcd = strtol(val, &p, 0)) == 0 && p == val) 480 error("%s: invalid 'lcd' attr\n", ctlr->name); 481 } 482 483 if(nv->arch == 4) { 484 nv->cursor0 = 0x00; 485 nv->cursor1 = 0xBC; 486 nv->cursor2 = 0; 487 nv->config = 0x00001114; 488 } else if(nv->arch >= 10) { 489 cursorstart = vga->vmz - 96 * 1024; 490 nv->cursor0 = 0x80 | (cursorstart >> 17); 491 nv->cursor1 = (cursorstart >> 11) << 2; 492 nv->cursor2 = cursorstart >> 24; 493 nv->config = nv->pfb[0x200/4]; 494 } 495 496 nv->vpll = (vga->p[0] << 16) | (vga->n[0] << 8) | vga->m[0]; 497 nv->pllsel = 0x10000700; 498 if (mode->z == 16) 499 nv->general = 0x00001100; 500 else 501 nv->general = 0x00000100; 502 //if (mode->z != 8) 503 // nv->general |= 0x00000030; 504 505 if (mode->x < 1280) 506 nv->repaint1 = 0x04; 507 else 508 nv->repaint1 = 0; 509 510 vga->attribute[0x10] &= ~0x40; 511 vga->attribute[0x11] = Pblack; 512 vga->crt[0x14] = 0x00; 513 514 /* set vert blanking to cover full overscan */ 515 516 tmp = vga->crt[0x12]; 517 vga->crt[0x15] = tmp; 518 if(tmp & 0x100) 519 vga->crt[0x07] |= 0x08; 520 else 521 vga->crt[0x07] &= ~0x08; 522 if(tmp & 0x200) 523 vga->crt[0x09] |= 0x20; 524 else 525 vga->crt[0x09] &= ~0x20; 526 527 vga->crt[0x16] = vga->crt[0x06] + 1; 528 529 /* set horiz blanking to cover full overscan */ 530 531 vga->crt[0x02] = vga->crt[0x01]; 532 tmp = vga->crt[0x00] + 4; 533 vga->crt[0x03] = 0x80 | (tmp & 0x1F); 534 if (tmp & 0x20) 535 vga->crt[0x05] |= 0x80; 536 else 537 vga->crt[0x05] &= ~0x80; 538 if (tmp & 0x40) 539 nv->screen = 0x10; 540 else 541 nv->screen = 0x00; 542 543 /* overflow bits */ 544 545 if (nv->islcd){ 546 tmp = vga->crt[0x06] - 3; 547 vga->crt[0x10] = tmp; 548 if(tmp & 0x100) 549 vga->crt[0x07] |= 0x04; 550 else 551 vga->crt[0x07] &= ~0x04; 552 if(tmp & 0x200) 553 vga->crt[0x07] |= 0x80; 554 else 555 vga->crt[0x07] &= ~0x80; 556 557 vga->crt[0x11] = 0x20 | ((vga->crt[0x06] - 2) & 0x0F); 558 559 tmp = vga->crt[0x10]; 560 vga->crt[0x15] = tmp; 561 if(tmp & 0x100) 562 vga->crt[0x07] |= 0x08; 563 else 564 vga->crt[0x07] &= ~0x08; 565 if(tmp & 0x200) 566 vga->crt[0x09] |= 0x20; 567 else 568 vga->crt[0x09] &= ~0x20; 569 570 vga->crt[0x04] = vga->crt[0x00] - 5; 571 572 vga->crt[0x05] &= ~0x1F; 573 vga->crt[0x05] |= (0x1F & (vga->crt[0x00] - 2)); 574 } 575 576 nv->repaint0 = (vga->crt[0x13] & 0x0700) >> 3; 577 578 pixeldepth = (mode->z +1)/8; 579 if (pixeldepth > 3) 580 nv->pixel = 3; 581 else 582 nv->pixel = pixeldepth; 583 584 nv->scale &= 0xFFF000FF; 585 if(nv->islcd){ 586 nv->pixel |= 0x80; 587 nv->scale |= 0x100; 588 } 589 590 if (vga->crt[0x06] & 0x400) 591 nv->screen |= 0x01; 592 if (vga->crt[0x12] & 0x400) 593 nv->screen |= 0x02; 594 if (vga->crt[0x10] & 0x400) 595 nv->screen |= 0x04; 596 if (vga->crt[0x15] & 0x400) 597 nv->screen |= 0x08; 598 if (vga->crt[0x13] & 0x800) 599 nv->screen |= 0x20; 600 601 nv->horiz = 0x00; 602 if (vga->crt[0x00] & 0x100) 603 nv->horiz = 0x01; 604 if(vga->crt[0x01] & 0x100) 605 nv->horiz |= 0x02; 606 if(vga->crt[0x02] & 0x100) 607 nv->horiz |= 0x04; 608 if(vga->crt[0x04] & 0x100) 609 nv->horiz |= 0x08; 610 611 nv->extra = 0x00; 612 if (vga->crt[0x06] & 0x800) 613 nv->extra |= 0x01; 614 if (vga->crt[0x12] & 0x800) 615 nv->extra |= 0x04; 616 if (vga->crt[0x10] & 0x800) 617 nv->extra |= 0x10; 618 if (vga->crt[0x15] & 0x800) 619 nv->extra |= 0x40; 620 621 nv->interlace = 0xFF; 622 if (nv->twoheads) { 623 nv->head |= 0x00001000; 624 nv->head2 |= ~0x00001000; 625 nv->crtcowner = 0; 626 if((nv->did & 0x0ff0) == 0x0110) 627 nv->dither &= ~0x00010000; 628 else 629 nv->dither &= ~1; 630 } 631 nv->cursorconfig = 0x00000100 | 0x02000000; 632 633 nv->timingH = 0; 634 nv->timingV = 0; 635 nv->displayV = vga->crt[0x12] + 1; 636 637 ctlr->flag |= Finit; 638 } 639 640 641 static void 642 load(Vga* vga, Ctlr* ctlr) 643 { 644 Nvidia *nv; 645 int i, regions; 646 ulong tmp; 647 648 nv = vga->private; 649 650 /* 651 * Unlock 652 */ 653 vgaxo(Crtx, 0x1F, 0x57); 654 655 nv->pmc[0x0140/4] = 0x00000000; 656 nv->pmc[0x0200/4] = 0xFFFF00FF; 657 nv->pmc[0x0200/4] = 0xFFFFFFFF; 658 659 nv->ptimer[0x0200] = 0x00000008; 660 nv->ptimer[0x0210] = 0x00000003; 661 nv->ptimer[0x0140] = 0x00000000; 662 nv->ptimer[0x0100] = 0xFFFFFFFF; 663 664 if (nv->arch == 4) 665 nv->pfb[0x00000200/4] = nv->config; 666 else if((nv->arch < 40) || ((nv->did & 0xfff0) == 0x0040)){ 667 for(i = 0; i < 8; i++){ 668 nv->pfb[(0x0240 + (i * 0x10))/4] = 0; 669 nv->pfb[(0x0244 + (i * 0x10))/4] = vga->vmz - 1;; 670 } 671 } 672 else{ 673 if(((nv->did & 0xfff0) == 0x0090) 674 || ((nv->did & 0xfff0) == 0x01D0) 675 || ((nv->did & 0xfff0) == 0x0290) 676 || ((nv->did & 0xfff0) == 0x0390)) 677 regions = 15; 678 else 679 regions = 12; 680 681 for(i = 0; i < regions; i++){ 682 nv->pfb[(0x0600 + (i * 0x10))/4] = 0; 683 nv->pfb[(0x0604 + (i * 0x10))/4] = vga->vmz - 1; 684 } 685 } 686 687 if (nv->arch >= 40) { 688 nv->pramin[0x0000] = 0x80000010; 689 nv->pramin[0x0001] = 0x00101202; 690 nv->pramin[0x0002] = 0x80000011; 691 nv->pramin[0x0003] = 0x00101204; 692 nv->pramin[0x0004] = 0x80000012; 693 nv->pramin[0x0005] = 0x00101206; 694 nv->pramin[0x0006] = 0x80000013; 695 nv->pramin[0x0007] = 0x00101208; 696 nv->pramin[0x0008] = 0x80000014; 697 nv->pramin[0x0009] = 0x0010120A; 698 nv->pramin[0x000A] = 0x80000015; 699 nv->pramin[0x000B] = 0x0010120C; 700 nv->pramin[0x000C] = 0x80000016; 701 nv->pramin[0x000D] = 0x0010120E; 702 nv->pramin[0x000E] = 0x80000017; 703 nv->pramin[0x000F] = 0x00101210; 704 nv->pramin[0x0800] = 0x00003000; 705 nv->pramin[0x0801] = vga->vmz - 1; 706 nv->pramin[0x0802] = 0x00000002; 707 nv->pramin[0x0808] = 0x02080062; 708 nv->pramin[0x0809] = 0x00000000; 709 nv->pramin[0x080A] = 0x00001200; 710 nv->pramin[0x080B] = 0x00001200; 711 nv->pramin[0x080C] = 0x00000000; 712 nv->pramin[0x080D] = 0x00000000; 713 nv->pramin[0x0810] = 0x02080043; 714 nv->pramin[0x0811] = 0x00000000; 715 nv->pramin[0x0812] = 0x00000000; 716 nv->pramin[0x0813] = 0x00000000; 717 nv->pramin[0x0814] = 0x00000000; 718 nv->pramin[0x0815] = 0x00000000; 719 nv->pramin[0x0818] = 0x02080044; 720 nv->pramin[0x0819] = 0x02000000; 721 nv->pramin[0x081A] = 0x00000000; 722 nv->pramin[0x081B] = 0x00000000; 723 nv->pramin[0x081C] = 0x00000000; 724 nv->pramin[0x081D] = 0x00000000; 725 nv->pramin[0x0820] = 0x02080019; 726 nv->pramin[0x0821] = 0x00000000; 727 nv->pramin[0x0822] = 0x00000000; 728 nv->pramin[0x0823] = 0x00000000; 729 nv->pramin[0x0824] = 0x00000000; 730 nv->pramin[0x0825] = 0x00000000; 731 nv->pramin[0x0828] = 0x020A005C; 732 nv->pramin[0x0829] = 0x00000000; 733 nv->pramin[0x082A] = 0x00000000; 734 nv->pramin[0x082B] = 0x00000000; 735 nv->pramin[0x082C] = 0x00000000; 736 nv->pramin[0x082D] = 0x00000000; 737 nv->pramin[0x0830] = 0x0208009F; 738 nv->pramin[0x0831] = 0x00000000; 739 nv->pramin[0x0832] = 0x00001200; 740 nv->pramin[0x0833] = 0x00001200; 741 nv->pramin[0x0834] = 0x00000000; 742 nv->pramin[0x0835] = 0x00000000; 743 nv->pramin[0x0838] = 0x0208004A; 744 nv->pramin[0x0839] = 0x02000000; 745 nv->pramin[0x083A] = 0x00000000; 746 nv->pramin[0x083B] = 0x00000000; 747 nv->pramin[0x083C] = 0x00000000; 748 nv->pramin[0x083D] = 0x00000000; 749 nv->pramin[0x0840] = 0x02080077; 750 nv->pramin[0x0841] = 0x00000000; 751 nv->pramin[0x0842] = 0x00001200; 752 nv->pramin[0x0843] = 0x00001200; 753 nv->pramin[0x0844] = 0x00000000; 754 nv->pramin[0x0845] = 0x00000000; 755 nv->pramin[0x084C] = 0x00003002; 756 nv->pramin[0x084D] = 0x00007FFF; 757 nv->pramin[0x084E] = (vga->vmz - 128 * 1024) | 0x00000002; 758 } else { 759 nv->pramin[0x0000] = 0x80000010; 760 nv->pramin[0x0001] = 0x80011201; 761 nv->pramin[0x0002] = 0x80000011; 762 nv->pramin[0x0003] = 0x80011202; 763 nv->pramin[0x0004] = 0x80000012; 764 nv->pramin[0x0005] = 0x80011203; 765 nv->pramin[0x0006] = 0x80000013; 766 nv->pramin[0x0007] = 0x80011204; 767 nv->pramin[0x0008] = 0x80000014; 768 nv->pramin[0x0009] = 0x80011205; 769 nv->pramin[0x000A] = 0x80000015; 770 nv->pramin[0x000B] = 0x80011206; 771 nv->pramin[0x000C] = 0x80000016; 772 nv->pramin[0x000D] = 0x80011207; 773 nv->pramin[0x000E] = 0x80000017; 774 nv->pramin[0x000F] = 0x80011208; 775 nv->pramin[0x0800] = 0x00003000; 776 nv->pramin[0x0801] = vga->vmz - 1; 777 nv->pramin[0x0802] = 0x00000002; 778 nv->pramin[0x0803] = 0x00000002; 779 if (nv->arch >= 10) 780 nv->pramin[0x0804] = 0x01008062; 781 else 782 nv->pramin[0x0804] = 0x01008042; 783 nv->pramin[0x0805] = 0x00000000; 784 nv->pramin[0x0806] = 0x12001200; 785 nv->pramin[0x0807] = 0x00000000; 786 nv->pramin[0x0808] = 0x01008043; 787 nv->pramin[0x0809] = 0x00000000; 788 nv->pramin[0x080A] = 0x00000000; 789 nv->pramin[0x080B] = 0x00000000; 790 nv->pramin[0x080C] = 0x01008044; 791 nv->pramin[0x080D] = 0x00000002; 792 nv->pramin[0x080E] = 0x00000000; 793 nv->pramin[0x080F] = 0x00000000; 794 nv->pramin[0x0810] = 0x01008019; 795 nv->pramin[0x0811] = 0x00000000; 796 nv->pramin[0x0812] = 0x00000000; 797 nv->pramin[0x0813] = 0x00000000; 798 nv->pramin[0x0814] = 0x0100A05C; 799 nv->pramin[0x0815] = 0x00000000; 800 nv->pramin[0x0816] = 0x00000000; 801 nv->pramin[0x0817] = 0x00000000; 802 nv->pramin[0x0818] = 0x0100805F; 803 nv->pramin[0x0819] = 0x00000000; 804 nv->pramin[0x081A] = 0x12001200; 805 nv->pramin[0x081B] = 0x00000000; 806 nv->pramin[0x081C] = 0x0100804A; 807 nv->pramin[0x081D] = 0x00000002; 808 nv->pramin[0x081E] = 0x00000000; 809 nv->pramin[0x081F] = 0x00000000; 810 nv->pramin[0x0820] = 0x01018077; 811 nv->pramin[0x0821] = 0x00000000; 812 nv->pramin[0x0822] = 0x01201200; 813 nv->pramin[0x0823] = 0x00000000; 814 nv->pramin[0x0824] = 0x00003002; 815 nv->pramin[0x0825] = 0x00007FFF; 816 nv->pramin[0x0826] = (vga->vmz - 128 * 1024) | 0x00000002; 817 nv->pramin[0x0827] = 0x00000002; 818 } 819 if (nv->arch < 10) { 820 if((nv->did & 0x0fff) == 0x0020) { 821 nv->pramin[0x0824] |= 0x00020000; 822 nv->pramin[0x0826] += nv->pci->mem[1].bar; 823 } 824 nv->pgraph[0x0080/4] = 0x000001FF; 825 nv->pgraph[0x0080/4] = 0x1230C000; 826 nv->pgraph[0x0084/4] = 0x72111101; 827 nv->pgraph[0x0088/4] = 0x11D5F071; 828 nv->pgraph[0x008C/4] = 0x0004FF31; 829 nv->pgraph[0x008C/4] = 0x4004FF31; 830 831 nv->pgraph[0x0140/4] = 0x00000000; 832 nv->pgraph[0x0100/4] = 0xFFFFFFFF; 833 nv->pgraph[0x0170/4] = 0x10010100; 834 nv->pgraph[0x0710/4] = 0xFFFFFFFF; 835 nv->pgraph[0x0720/4] = 0x00000001; 836 837 nv->pgraph[0x0810/4] = 0x00000000; 838 nv->pgraph[0x0608/4] = 0xFFFFFFFF; 839 } else { 840 nv->pgraph[0x0080/4] = 0xFFFFFFFF; 841 nv->pgraph[0x0080/4] = 0x00000000; 842 843 nv->pgraph[0x0140/4] = 0x00000000; 844 nv->pgraph[0x0100/4] = 0xFFFFFFFF; 845 nv->pgraph[0x0144/4] = 0x10010100; 846 nv->pgraph[0x0714/4] = 0xFFFFFFFF; 847 nv->pgraph[0x0720/4] = 0x00000001; 848 nv->pgraph[0x0710/4] &= 0x0007ff00; 849 nv->pgraph[0x0710/4] |= 0x00020100; 850 851 if (nv->arch == 10) { 852 nv->pgraph[0x0084/4] = 0x00118700; 853 nv->pgraph[0x0088/4] = 0x24E00810; 854 nv->pgraph[0x008C/4] = 0x55DE0030; 855 856 for(i = 0; i < 32; i++) 857 nv->pgraph[(0x0B00/4) + i] = nv->pfb[(0x0240/4) + i]; 858 859 nv->pgraph[0x640/4] = 0; 860 nv->pgraph[0x644/4] = 0; 861 nv->pgraph[0x684/4] = vga->vmz - 1; 862 nv->pgraph[0x688/4] = vga->vmz - 1; 863 864 nv->pgraph[0x0810/4] = 0x00000000; 865 nv->pgraph[0x0608/4] = 0xFFFFFFFF; 866 } else { 867 if (nv->arch >= 40) { 868 nv->pgraph[0x0084/4] = 0x401287c0; 869 nv->pgraph[0x008C/4] = 0x60de8051; 870 nv->pgraph[0x0090/4] = 0x00008000; 871 nv->pgraph[0x0610/4] = 0x00be3c5f; 872 873 874 tmp = nv->pgraph[0x1540] & 0xff; 875 for(i = 0; tmp && !(tmp & 1); tmp >>= 1, i++) 876 ; 877 nv->pgraph[0x5000] = i; 878 879 if ((nv->did & 0xfff0) == 0x0040) { 880 nv->pgraph[0x09b0/4] = 0x83280fff; 881 nv->pgraph[0x09b4/4] = 0x000000a0; 882 } else { 883 nv->pgraph[0x0820/4] = 0x83280eff; 884 nv->pgraph[0x0824/4] = 0x000000a0; 885 } 886 887 switch(nv->did & 0xfff0) { 888 case 0x0040: 889 nv->pgraph[0x09b8/4] = 0x0078e366; 890 nv->pgraph[0x09bc/4] = 0x0000014c; 891 nv->pfb[0x033C/4] &= 0xffff7fff; 892 break; 893 case 0x00C0: 894 case 0x0120: 895 nv->pgraph[0x0828/4] = 0x007596ff; 896 nv->pgraph[0x082C/4] = 0x00000108; 897 break; 898 case 0x0160: 899 case 0x01D0: 900 case 0x0240: 901 nv->pmc[0x1700/4] = nv->pfb[0x020C/4]; 902 nv->pmc[0x1704/4] = 0; 903 nv->pmc[0x1708/4] = 0; 904 nv->pmc[0x170C/4] = nv->pfb[0x020C/4]; 905 nv->pgraph[0x0860/4] = 0; 906 nv->pgraph[0x0864/4] = 0; 907 nv->pramdac[0x0608/4] |= 0x00100000; 908 break; 909 case 0x0140: 910 nv->pgraph[0x0828/4] = 0x0072cb77; 911 nv->pgraph[0x082C/4] = 0x00000108; 912 break; 913 case 0x0220: 914 nv->pgraph[0x0860/4] = 0; 915 nv->pgraph[0x0864/4] = 0; 916 nv->pramdac[0x0608/4] |= 0x00100000; 917 break; 918 case 0x0090: 919 case 0x0290: 920 case 0x0390: 921 nv->pgraph[0x0608/4] |= 0x00100000; 922 nv->pgraph[0x0828/4] = 0x07830610; 923 nv->pgraph[0x082C/4] = 0x0000016A; 924 break; 925 default: 926 break; 927 } 928 929 nv->pgraph[0x0b38/4] = 0x2ffff800; 930 nv->pgraph[0x0b3c/4] = 0x00006000; 931 nv->pgraph[0x032C/4] = 0x01000000; 932 nv->pgraph[0x0220/4] = 0x00001200; 933 } else if (nv->arch == 30) { 934 nv->pgraph[0x0084/4] = 0x40108700; 935 nv->pgraph[0x0890/4] = 0x00140000; 936 nv->pgraph[0x008C/4] = 0xf00e0431; 937 nv->pgraph[0x0090/4] = 0x00008000; 938 nv->pgraph[0x0610/4] = 0xf04b1f36; 939 nv->pgraph[0x0B80/4] = 0x1002d888; 940 nv->pgraph[0x0B88/4] = 0x62ff007f; 941 } else { 942 nv->pgraph[0x0084/4] = 0x00118700; 943 nv->pgraph[0x008C/4] = 0xF20E0431; 944 nv->pgraph[0x0090/4] = 0x00000000; 945 nv->pgraph[0x009C/4] = 0x00000040; 946 947 if((nv->did & 0x0ff0) >= 0x0250) { 948 nv->pgraph[0x0890/4] = 0x00080000; 949 nv->pgraph[0x0610/4] = 0x304B1FB6; 950 nv->pgraph[0x0B80/4] = 0x18B82880; 951 nv->pgraph[0x0B84/4] = 0x44000000; 952 nv->pgraph[0x0098/4] = 0x40000080; 953 nv->pgraph[0x0B88/4] = 0x000000ff; 954 } else { 955 nv->pgraph[0x0880/4] = 0x00080000; 956 nv->pgraph[0x0094/4] = 0x00000005; 957 nv->pgraph[0x0B80/4] = 0x45CAA208; 958 nv->pgraph[0x0B84/4] = 0x24000000; 959 nv->pgraph[0x0098/4] = 0x00000040; 960 nv->pgraph[0x0750/4] = 0x00E00038; 961 nv->pgraph[0x0754/4] = 0x00000030; 962 nv->pgraph[0x0750/4] = 0x00E10038; 963 nv->pgraph[0x0754/4] = 0x00000030; 964 } 965 } 966 967 if((nv->arch < 40) || ((nv->did & 0xfff0) == 0x0040)){ 968 for(i = 0; i < 32; i++) { 969 nv->pgraph[(0x0900/4) + i] = nv->pfb[(0x0240/4) + i]; 970 nv->pgraph[(0x6900/4) + i] = nv->pfb[(0x0240/4) + i]; 971 } 972 } 973 else{ 974 if(((nv->did & 0xfff0) == 0x0090) 975 || ((nv->did & 0xfff0) == 0x01D0) 976 || ((nv->did & 0xfff0) == 0x0290) 977 || ((nv->did & 0xfff0) == 0x0390)){ 978 for(i = 0; i < 60; i++) { 979 nv->pgraph[(0x0D00/4) + i] = nv->pfb[(0x0600/4) + i]; 980 nv->pgraph[(0x6900/4) + i] = nv->pfb[(0x0600/4) + i]; 981 } 982 } 983 else{ 984 for(i = 0; i < 48; i++) { 985 nv->pgraph[(0x0900/4) + i] = nv->pfb[(0x0600/4) + i]; 986 if(((nv->did & 0xfff0) != 0x0160) 987 && ((nv->did & 0xfff0) != 0x0220) 988 && ((nv->did & 0xfff0) != 0x0240)) 989 nv->pgraph[(0x6900/4) + i] = nv->pfb[(0x0600/4) + i]; 990 } 991 } 992 } 993 994 if(nv->arch >= 40) { 995 if((nv->did & 0xfff0) == 0x0040) { 996 nv->pgraph[0x09A4/4] = nv->pfb[0x0200/4]; 997 nv->pgraph[0x09A8/4] = nv->pfb[0x0204/4]; 998 nv->pgraph[0x69A4/4] = nv->pfb[0x0200/4]; 999 nv->pgraph[0x69A8/4] = nv->pfb[0x0204/4]; 1000 1001 nv->pgraph[0x0820/4] = 0; 1002 nv->pgraph[0x0824/4] = 0; 1003 nv->pgraph[0x0864/4] = vga->vmz - 1; 1004 nv->pgraph[0x0868/4] = vga->vmz - 1; 1005 } else { 1006 nv->pgraph[0x09F0/4] = nv->pfb[0x0200/4]; 1007 nv->pgraph[0x09F4/4] = nv->pfb[0x0204/4]; 1008 nv->pgraph[0x69F0/4] = nv->pfb[0x0200/4]; 1009 nv->pgraph[0x69F4/4] = nv->pfb[0x0204/4]; 1010 1011 nv->pgraph[0x0840/4] = 0; 1012 nv->pgraph[0x0844/4] = 0; 1013 nv->pgraph[0x08a0/4] = vga->vmz - 1; 1014 nv->pgraph[0x08a4/4] = vga->vmz - 1; 1015 } 1016 } else { 1017 nv->pgraph[0x09A4/4] = nv->pfb[0x0200/4]; 1018 nv->pgraph[0x09A8/4] = nv->pfb[0x0204/4]; 1019 nv->pgraph[0x0750/4] = 0x00EA0000; 1020 nv->pgraph[0x0754/4] = nv->pfb[0x0200/4]; 1021 nv->pgraph[0x0750/4] = 0x00EA0004; 1022 nv->pgraph[0x0754/4] = nv->pfb[0x0204/4]; 1023 1024 nv->pgraph[0x0820/4] = 0; 1025 nv->pgraph[0x0824/4] = 0; 1026 nv->pgraph[0x0864/4] = vga->vmz - 1; 1027 nv->pgraph[0x0868/4] = vga->vmz - 1; 1028 } 1029 1030 nv->pgraph[0x0B20/4] = 0x00000000; 1031 nv->pgraph[0x0B04/4] = 0xFFFFFFFF; 1032 } 1033 } 1034 1035 nv->pgraph[0x053C/4] = 0; 1036 nv->pgraph[0x0540/4] = 0; 1037 nv->pgraph[0x0544/4] = 0x00007FFF; 1038 nv->pgraph[0x0548/4] = 0x00007FFF; 1039 1040 nv->pfifo[0x0140] = 0x00000000; 1041 nv->pfifo[0x0141] = 0x00000001; 1042 nv->pfifo[0x0480] = 0x00000000; 1043 nv->pfifo[0x0494] = 0x00000000; 1044 if (nv->arch >= 40) 1045 nv->pfifo[0x0481] = 0x00010000; 1046 else 1047 nv->pfifo[0x0481] = 0x00000100; 1048 nv->pfifo[0x0490] = 0x00000000; 1049 nv->pfifo[0x0491] = 0x00000000; 1050 if (nv->arch >= 40) 1051 nv->pfifo[0x048B] = 0x00001213; 1052 else 1053 nv->pfifo[0x048B] = 0x00001209; 1054 nv->pfifo[0x0400] = 0x00000000; 1055 nv->pfifo[0x0414] = 0x00000000; 1056 nv->pfifo[0x0084] = 0x03000100; 1057 nv->pfifo[0x0085] = 0x00000110; 1058 nv->pfifo[0x0086] = 0x00000112; 1059 nv->pfifo[0x0143] = 0x0000FFFF; 1060 nv->pfifo[0x0496] = 0x0000FFFF; 1061 nv->pfifo[0x0050] = 0x00000000; 1062 nv->pfifo[0x0040] = 0xFFFFFFFF; 1063 nv->pfifo[0x0415] = 0x00000001; 1064 nv->pfifo[0x048C] = 0x00000000; 1065 nv->pfifo[0x04A0] = 0x00000000; 1066 nv->pfifo[0x0489] = 0x000F0078; 1067 nv->pfifo[0x0488] = 0x00000001; 1068 nv->pfifo[0x0480] = 0x00000001; 1069 nv->pfifo[0x0494] = 0x00000001; 1070 nv->pfifo[0x0495] = 0x00000001; 1071 nv->pfifo[0x0140] = 0x00000001; 1072 1073 if (nv->arch >= 10) { 1074 if (nv->twoheads) { 1075 nv->pcrtc[0x0860/4] = nv->head; 1076 nv->pcrtc[0x2860/4] = nv->head2; 1077 } 1078 nv->pramdac[0x0404/4] |= (1 << 25); 1079 1080 nv->pmc[0x8704/4] = 1; 1081 nv->pmc[0x8140/4] = 0; 1082 nv->pmc[0x8920/4] = 0; 1083 nv->pmc[0x8924/4] = 0; 1084 nv->pmc[0x8908/4] = vga->vmz - 1; 1085 nv->pmc[0x890C/4] = vga->vmz - 1; 1086 nv->pmc[0x1588/4] = 0; 1087 1088 nv->pcrtc[0x0810/4] = nv->cursorconfig; 1089 nv->pcrtc[0x0830/4] = nv->displayV - 3; 1090 nv->pcrtc[0x0834/4] = nv->displayV - 1; 1091 1092 if (nv->islcd) { 1093 if((nv->did & 0x0ff0) == 0x0110) 1094 nv->pramdac[0x0528/4] = nv->dither; 1095 else if (nv->twoheads) 1096 nv->pramdac[0x083C/4] = nv->dither; 1097 vgaxo(Crtx, 0x53, nv->timingH); 1098 vgaxo(Crtx, 0x54, nv->timingV); 1099 vgaxo(Crtx, 0x21, 0xFA); 1100 } 1101 vgaxo(Crtx, 0x41, nv->extra); 1102 } 1103 1104 vgaxo(Crtx, 0x19, nv->repaint0); 1105 vgaxo(Crtx, 0x1A, nv->repaint1); 1106 vgaxo(Crtx, 0x25, nv->screen); 1107 vgaxo(Crtx, 0x28, nv->pixel); 1108 vgaxo(Crtx, 0x2D, nv->horiz); 1109 vgaxo(Crtx, 0x30, nv->cursor0); 1110 vgaxo(Crtx, 0x31, nv->cursor1); 1111 vgaxo(Crtx, 0x2F, nv->cursor2); 1112 vgaxo(Crtx, 0x39, nv->interlace); 1113 1114 if (nv->islcd) { 1115 nv->pramdac[0x00000848/4] = nv->scale; 1116 nv->pramdac[0x00000828/4] = nv->crtcsync; 1117 } else { 1118 nv->pramdac[0x0000050C/4] = nv->pllsel; 1119 nv->pramdac[0x00000508/4] = nv->vpll; 1120 if (nv->twoheads) 1121 nv->pramdac[0x00000520/4] = nv->vpll2; 1122 if (nv->twostagepll) { 1123 nv->pramdac[0x00000578/4] = nv->vpllB; 1124 nv->pramdac[0x0000057C/4] = nv->vpll2B; 1125 } 1126 } 1127 nv->pramdac[0x00000600/4] = nv->general; 1128 1129 nv->pcrtc[0x0140/4] = 0; 1130 nv->pcrtc[0x0100/4] = 1; 1131 1132 ctlr->flag |= Fload; 1133 } 1134 1135 1136 static void 1137 dump(Vga* vga, Ctlr* ctlr) 1138 { 1139 Nvidia *nv; 1140 int m, n, p, f; 1141 double trouble; 1142 1143 if((nv = vga->private) == 0) 1144 return; 1145 1146 p = (nv->vpll >> 16); 1147 n = (nv->vpll >> 8) & 0xFF; 1148 m = nv->vpll & 0xFF; 1149 trouble = nv->crystalfreq; 1150 trouble = trouble * n / (m<<p); 1151 f = trouble+0.5; 1152 printitem(ctlr->name, "dclk m n p"); 1153 Bprint(&stdout, " %d %d - %d %d\n", f, m, n, p); 1154 printitem(ctlr->name, "CrystalFreq"); 1155 Bprint(&stdout, " %d Hz\n", nv->crystalfreq); 1156 printitem(ctlr->name, "arch"); 1157 Bprint(&stdout, " %d\n", nv->arch); 1158 printitem(ctlr->name, "did"); 1159 Bprint(&stdout, " %.4ux\n", nv->did); 1160 printitem(ctlr->name, "repaint0"); 1161 Bprint(&stdout, " %ux\n", nv->repaint0); 1162 printitem(ctlr->name, "repaint1"); 1163 Bprint(&stdout, " %ux\n", nv->repaint1); 1164 printitem(ctlr->name, "screen"); 1165 Bprint(&stdout, " %ux\n", nv->screen); 1166 printitem(ctlr->name, "pixel"); 1167 Bprint(&stdout, " %ux\n", nv->pixel); 1168 printitem(ctlr->name, "horiz"); 1169 Bprint(&stdout, " %ux\n", nv->horiz); 1170 printitem(ctlr->name, "cursor0"); 1171 Bprint(&stdout, " %ux\n", nv->cursor0); 1172 printitem(ctlr->name, "cursor1"); 1173 Bprint(&stdout, " %ux\n", nv->cursor1); 1174 printitem(ctlr->name, "cursor2"); 1175 Bprint(&stdout, " %ux\n", nv->cursor2); 1176 printitem(ctlr->name, "interlace"); 1177 Bprint(&stdout, " %ux\n", nv->interlace); 1178 printitem(ctlr->name, "extra"); 1179 Bprint(&stdout, " %ux\n", nv->extra); 1180 printitem(ctlr->name, "crtcowner"); 1181 Bprint(&stdout, " %ux\n", nv->crtcowner); 1182 printitem(ctlr->name, "timingH"); 1183 Bprint(&stdout, " %ux\n", nv->timingH); 1184 printitem(ctlr->name, "timingV"); 1185 Bprint(&stdout, " %ux\n", nv->timingV); 1186 printitem(ctlr->name, "vpll"); 1187 Bprint(&stdout, " %lux\n", nv->vpll); 1188 printitem(ctlr->name, "vpllB"); 1189 Bprint(&stdout, " %lux\n", nv->vpllB); 1190 printitem(ctlr->name, "vpll2"); 1191 Bprint(&stdout, " %lux\n", nv->vpll2); 1192 printitem(ctlr->name, "vpll2B"); 1193 Bprint(&stdout, " %lux\n", nv->vpll2B); 1194 printitem(ctlr->name, "pllsel"); 1195 Bprint(&stdout, " %lux\n", nv->pllsel); 1196 printitem(ctlr->name, "general"); 1197 Bprint(&stdout, " %lux\n", nv->general); 1198 printitem(ctlr->name, "scale"); 1199 Bprint(&stdout, " %lux\n", nv->scale); 1200 printitem(ctlr->name, "config"); 1201 Bprint(&stdout, " %lux\n", nv->config); 1202 printitem(ctlr->name, "head"); 1203 Bprint(&stdout, " %lux\n", nv->head); 1204 printitem(ctlr->name, "head2"); 1205 Bprint(&stdout, " %lux\n", nv->head2); 1206 printitem(ctlr->name, "cursorconfig"); 1207 Bprint(&stdout, " %lux\n", nv->cursorconfig); 1208 printitem(ctlr->name, "dither"); 1209 Bprint(&stdout, " %lux\n", nv->dither); 1210 printitem(ctlr->name, "crtcsync"); 1211 Bprint(&stdout, " %lux\n", nv->crtcsync); 1212 printitem(ctlr->name, "islcd"); 1213 Bprint(&stdout, " %d\n", nv->islcd); 1214 printitem(ctlr->name, "twoheads"); 1215 Bprint(&stdout, " %d\n", nv->twoheads); 1216 printitem(ctlr->name, "twostagepll"); 1217 Bprint(&stdout, " %d\n", nv->twostagepll); 1218 printitem(ctlr->name, "crtcnumber"); 1219 Bprint(&stdout, " %d\n", nv->crtcnumber); 1220 1221 printitem(ctlr->name, "fpwidth"); 1222 Bprint(&stdout, " %d\n", nv->fpwidth); 1223 printitem(ctlr->name, "fpheight"); 1224 Bprint(&stdout, " %d\n", nv->fpheight); 1225 1226 } 1227 1228 1229 Ctlr nvidia = { 1230 "nvidia", /* name */ 1231 snarf, /* snarf */ 1232 options, /* options */ 1233 init, /* init */ 1234 load, /* load */ 1235 dump, /* dump */ 1236 }; 1237 1238 Ctlr nvidiahwgc = { 1239 "nvidiahwgc", /* name */ 1240 0, /* snarf */ 1241 0, /* options */ 1242 0, /* init */ 1243 0, /* load */ 1244 0, /* dump */ 1245 }; 1246