1 /* Portions of this file derived from work with the following copyright */ 2 3 /***************************************************************************\ 4 |* *| 5 |* Copyright 2003 NVIDIA, Corporation. All rights reserved. *| 6 |* *| 7 |* NOTICE TO USER: The source code is copyrighted under U.S. and *| 8 |* international laws. Users and possessors of this source code are *| 9 |* hereby granted a nonexclusive, royalty-free copyright license to *| 10 |* use this code in individual and commercial software. *| 11 |* *| 12 |* Any use of this source code must include, in the user documenta- *| 13 |* tion and internal comments to the code, notices to the end user *| 14 |* as follows: *| 15 |* *| 16 |* Copyright 2003 NVIDIA, Corporation. All rights reserved. *| 17 |* *| 18 |* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| 19 |* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| 20 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| 21 |* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| 22 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| 23 |* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| 24 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| 25 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| 26 |* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| 27 |* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| 28 |* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| 29 |* *| 30 |* U.S. Government End Users. This source code is a "commercial *| 31 |* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| 32 |* consisting of "commercial computer software" and "commercial *| 33 |* computer software documentation," as such terms are used in *| 34 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| 35 |* ment only as a commercial end item. Consistent with 48 C.F.R. *| 36 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| 37 |* all U.S. Government End Users acquire the source code with only *| 38 |* those rights set forth herein. *| 39 |* *| 40 \***************************************************************************/ 41 42 #include <u.h> 43 #include <libc.h> 44 #include <bio.h> 45 46 #include "pci.h" 47 #include "vga.h" 48 49 typedef struct Nvidia Nvidia; 50 struct Nvidia { 51 Pcidev* pci; 52 int did; /* not always == pci->did */ 53 54 int arch; 55 int crystalfreq; 56 57 ulong* mmio; 58 ulong* pfb; /* mmio pointers */ 59 ulong* pramdac; 60 ulong* pextdev; 61 ulong* pmc; 62 ulong* ptimer; 63 ulong* pfifo; 64 ulong* pramin; 65 ulong* pgraph; 66 ulong* fifo; 67 ulong* pcrtc; 68 69 ushort repaint0; 70 ushort repaint1; 71 ushort screen; 72 ushort pixel; 73 ushort horiz; 74 ushort cursor0; 75 ushort cursor1; 76 ushort cursor2; 77 ushort interlace; 78 ushort extra; 79 ushort crtcowner; 80 ushort timingH; 81 ushort timingV; 82 83 ulong vpll; 84 ulong vpllB; 85 ulong vpll2; 86 ulong vpll2B; 87 ulong pllsel; 88 ulong general; 89 ulong scale; 90 ulong config; 91 ulong head; 92 ulong head2; 93 ulong cursorconfig; 94 ulong dither; 95 ulong crtcsync; 96 ulong displayV; 97 98 int islcd; 99 int fpwidth; 100 int fpheight; 101 int twoheads; 102 int twostagepll; 103 int crtcnumber; 104 }; 105 106 static void 107 getpcixdid(Nvidia* nv) 108 { 109 ulong pcicmd, pciid; 110 ushort vid, did; 111 112 pcicmd = pcicfgr32(nv->pci, PciPCR); 113 pcicfgw32(nv->pci, PciPCR, pcicmd | 0x02); 114 pciid = nv->mmio[0x1800/4]; 115 pcicfgw32(nv->pci, PciPCR, pcicmd); 116 117 vid = pciid >> 16; 118 did = (pciid & 0xFFFF); 119 if (did == 0x10DE) 120 did = vid; 121 else if (vid == 0xDE10) 122 did = ((pciid << 8) & 0xFF00) | ((pciid >> 8) & 0x00FF); 123 124 nv->did = did; 125 } 126 127 static void 128 snarf(Vga* vga, Ctlr* ctlr) 129 { 130 Nvidia *nv; 131 Pcidev *p; 132 ulong *mmio, tmp; 133 int implementation; 134 135 if(vga->private == nil){ 136 vga->private = alloc(sizeof(Nvidia)); 137 nv = vga->private; 138 139 p = nil; 140 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 141 if((p->ccru>>8) == 3) 142 break; 143 } 144 if(p == nil) 145 error("%s: not found\n", ctlr->name); 146 147 vgactlw("type", ctlr->name); 148 149 mmio = segattach(0, "nvidiammio", 0, p->mem[0].size); 150 if(mmio == (void*)-1) 151 error("%s: segattach nvidiammio, size %d: %r\n", 152 ctlr->name, p->mem[0].size); 153 154 nv->pci = p; 155 nv->mmio = mmio; 156 157 nv->pfb = mmio+0x00100000/4; 158 nv->pramdac = mmio+0x00680000/4; 159 nv->pextdev = mmio+0x00101000/4; 160 nv->pmc = mmio; 161 nv->ptimer = mmio+0x00009000/4; 162 nv->pfifo = mmio+0x00002000/4; 163 nv->pramin = mmio+0x00710000/4; 164 nv->pgraph = mmio+0x00400000/4; 165 nv->fifo = mmio+0x00800000/4; 166 nv->pcrtc= mmio+0x00600000/4; 167 168 nv->did = p->did; 169 if ((nv->did & 0xfff0) == 0x00f0) 170 getpcixdid(nv); 171 172 switch (nv->did & 0x0ff0) { 173 case 0x0020: 174 case 0x00A0: 175 nv->arch = 4; 176 break; 177 case 0x0100: /* GeForce 256 */ 178 case 0x0110: /* GeForce2 MX */ 179 case 0x0150: /* GeForce2 */ 180 case 0x0170: /* GeForce4 MX */ 181 case 0x0180: /* GeForce4 MX (8x AGP) */ 182 case 0x01A0: /* nForce */ 183 case 0x01F0: /* nForce2 */ 184 nv->arch = 10; 185 break; 186 case 0x0200: /* GeForce3 */ 187 case 0x0250: /* GeForce4 Ti */ 188 case 0x0280: /* GeForce4 Ti (8x AGP) */ 189 nv->arch = 20; 190 break; 191 case 0x0300: /* GeForceFX 5800 */ 192 case 0x0310: /* GeForceFX 5600 */ 193 case 0x0320: /* GeForceFX 5200 */ 194 case 0x0330: /* GeForceFX 5900 */ 195 case 0x0340: /* GeForceFX 5700 */ 196 nv->arch = 30; 197 break; 198 case 0x0040: 199 case 0x0090: 200 case 0x00C0: 201 case 0x0120: 202 case 0x0130: 203 case 0x0140: /* GeForce 6600 */ 204 case 0x0160: 205 case 0x01D0: 206 case 0x0210: 207 case 0x0290: /* nvidia 7950 */ 208 case 0x0390: 209 nv->arch = 40; 210 break; 211 default: 212 error("%s: DID %#4.4ux - %#ux unsupported\n", 213 ctlr->name, nv->did, (nv->did & 0x0ff0)); 214 break; 215 } 216 } 217 nv = vga->private; 218 implementation = nv->did & 0x0ff0; 219 220 /* 221 * Unlock 222 */ 223 vgaxo(Crtx, 0x1F, 0x57); 224 225 if (nv->pextdev[0] & 0x40) 226 nv->crystalfreq = RefFreq; 227 else 228 nv->crystalfreq = 13500000; 229 230 if ((implementation == 0x0170) || 231 (implementation == 0x0180) || 232 (implementation == 0x01F0) || 233 (implementation >= 0x0250)) 234 if(nv->pextdev[0] & (1 << 22)) 235 nv->crystalfreq = 27000000; 236 237 nv->twoheads = (nv->arch >= 10) && 238 (implementation != 0x0100) && 239 (implementation != 0x0150) && 240 (implementation != 0x01A0) && 241 (implementation != 0x0200); 242 243 nv->twostagepll = (implementation == 0x0310) || 244 (implementation == 0x0340) || (nv->arch >= 40); 245 246 if (nv->twoheads && (implementation != 0x0110)) 247 if(nv->pextdev[0] & (1 << 22)) 248 nv->crystalfreq = 27000000; 249 250 /* laptop chips */ 251 switch (nv->did & 0xffff) { 252 case 0x0112: 253 case 0x0174: 254 case 0x0175: 255 case 0x0176: 256 case 0x0177: 257 case 0x0179: 258 case 0x017C: 259 case 0x017D: 260 case 0x0186: 261 case 0x0187: 262 case 0x0189: /* 0x0189 not in nwaples's driver */ 263 case 0x018D: 264 case 0x0286: 265 case 0x028C: 266 case 0x0316: 267 case 0x0317: 268 case 0x031A: 269 case 0x031B: 270 case 0x031C: 271 case 0x031D: 272 case 0x031E: 273 case 0x031F: 274 case 0x0324: 275 case 0x0325: 276 case 0x0328: 277 case 0x0329: 278 case 0x032C: 279 case 0x032D: 280 case 0x0347: 281 case 0x0348: 282 case 0x0349: 283 case 0x034B: 284 case 0x034C: 285 case 0x0160: 286 case 0x0166: 287 case 0x00C8: 288 case 0x00CC: 289 case 0x0144: 290 case 0x0146: 291 case 0x0148: 292 case 0x01D7: 293 nv->islcd = 1; 294 break; 295 default: 296 break; 297 } 298 299 if (nv->arch == 4) { 300 tmp = nv->pfb[0]; 301 if (tmp & 0x0100) 302 vga->vmz = ((tmp >> 12) & 0x0F)*1024 + 2*1024; 303 else { 304 tmp &= 0x03; 305 if (tmp) 306 vga->vmz = (1024*1024*2) << tmp; 307 else 308 vga->vmz = 1024*1024*32; 309 } 310 } else if (implementation == 0x01a0) { 311 p = nil; 312 tmp = MKBUS(BusPCI, 0, 0, 1); 313 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 314 if(p->tbdf == tmp) 315 break; 316 } 317 tmp = pcicfgr32(p, 0x7C); 318 vga->vmz = (((tmp >> 6) & 31) + 1) * 1024 * 1024; 319 } else if (implementation == 0x01f0) { 320 p = nil; 321 tmp = MKBUS(BusPCI, 0, 0, 1); 322 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 323 if(p->tbdf == tmp) 324 break; 325 } 326 tmp = pcicfgr32(p, 0x84); 327 vga->vmz = (((tmp >> 4) & 127) + 1) * 1024*1024; 328 } else { 329 tmp = (nv->pfb[0x0000020C/4] >> 20) & 0xFFF; 330 if (tmp == 0) 331 tmp = 16; 332 vga->vmz = 1024*1024*tmp; 333 } 334 335 nv->repaint0 = vgaxi(Crtx, 0x19); 336 nv->repaint1 = vgaxi(Crtx, 0x1A); 337 nv->screen = vgaxi(Crtx, 0x25); 338 nv->pixel = vgaxi(Crtx, 0x28); 339 nv->horiz = vgaxi(Crtx, 0x2D); 340 nv->cursor0 = vgaxi(Crtx, 0x30); 341 nv->cursor1 = vgaxi(Crtx, 0x31); 342 nv->cursor2 = vgaxi(Crtx, 0x2F); 343 nv->interlace = vgaxi(Crtx, 0x39); 344 345 nv->vpll = nv->pramdac[0x508/4]; 346 if (nv->twoheads) 347 nv->vpll2 = nv->pramdac[0x520/4]; 348 if (nv->twostagepll) { 349 nv->vpllB = nv->pramdac[0x578/4]; 350 nv->vpll2B = nv->pramdac[0x57C/4]; 351 } 352 nv->pllsel = nv->pramdac[0x50C/4]; 353 nv->general = nv->pramdac[0x600/4]; 354 nv->scale = nv->pramdac[0x848/4]; 355 nv->config = nv->pfb[0x200/4]; 356 357 if (nv->pixel & 0x80) 358 nv->islcd = 1; 359 360 if (nv->arch >= 10) { 361 if (nv->twoheads) { 362 nv->head = nv->pcrtc[0x0860/4]; 363 nv->head2 = nv->pcrtc[0x2860/4]; 364 nv->crtcowner = vgaxi(Crtx, 0x44); 365 } 366 nv->extra = vgaxi(Crtx, 0x41); 367 nv->cursorconfig = nv->pcrtc[0x0810/4]; 368 if (implementation == 0x0110) 369 nv->dither = nv->pramdac[0x0528/4]; 370 else if (nv->twoheads) 371 nv->dither = nv->pramdac[0x083C/4]; 372 if(nv->islcd){ 373 nv->timingH = vgaxi(Crtx, 0x53); 374 nv->timingV = vgaxi(Crtx, 0x54); 375 } 376 } 377 378 /* 379 * DFP. 380 */ 381 if (nv->islcd) { 382 nv->fpwidth = nv->pramdac[0x0820/4] + 1; 383 nv->fpheight = nv->pramdac[0x0800/4] + 1; 384 nv->crtcsync = nv->pramdac[0x0828/4]; 385 } 386 387 nv->crtcnumber = 0; 388 389 ctlr->flag |= Fsnarf; 390 } 391 392 393 static void 394 options(Vga*, Ctlr* ctlr) 395 { 396 ctlr->flag |= Hlinear|Foptions; 397 } 398 399 400 static void 401 clock(Vga* vga, Ctlr* ctlr) 402 { 403 int m, n, p, f, d; 404 Nvidia *nv; 405 double trouble; 406 int fmin, mmin, nmin, crystalfreq; 407 nv = vga->private; 408 409 if(vga->f[0] == 0) 410 vga->f[0] = vga->mode->frequency; 411 412 vga->d[0] = vga->f[0]+1; 413 414 vga->n[1] = 255; 415 if (nv->twostagepll) { 416 vga->p[1] = 6; 417 vga->m[1] = 13; 418 vga->f[1] = 400000000 << 2; 419 crystalfreq = nv->crystalfreq << 2; 420 fmin = 100000000 << 2; 421 mmin = 1; 422 nmin = 5; 423 nv->vpllB = 0x80000401; 424 } else { 425 vga->p[1] = 4; 426 if (nv->crystalfreq == 13500000) 427 vga->m[1] = 13; 428 else 429 vga->m[1] = 14; 430 vga->f[1] = 350000000; 431 crystalfreq = nv->crystalfreq; 432 fmin = 128000000; 433 mmin = 7; 434 nmin = 0; 435 } 436 437 for (p=0; p <= vga->p[1]; p++){ 438 f = vga->f[0] << p; 439 if ((f >= fmin) && (f <= vga->f[1])) { 440 for (m=mmin; m <= vga->m[1]; m++){ 441 trouble = (double) crystalfreq / (double) (m << p); 442 n = (vga->f[0] / trouble)+0.5; 443 f = n*trouble + 0.5; 444 d = vga->f[0] - f; 445 if (d < 0) 446 d = -d; 447 if ((n & ~0xFF) && (n >= nmin)) 448 d = vga->d[0] + 1; 449 if (d <= vga->d[0]){ 450 vga->n[0] = n; 451 vga->m[0] = m; 452 vga->p[0] = p; 453 vga->d[0] = d; 454 } 455 } 456 } 457 } 458 if (vga->d[0] > vga->f[0]) 459 error("%s: vclk %lud out of range\n", ctlr->name, vga->f[0]); 460 } 461 462 463 static void 464 init(Vga* vga, Ctlr* ctlr) 465 { 466 Mode *mode; 467 Nvidia *nv; 468 char *p, *val; 469 int tmp, pixeldepth; 470 ulong cursorstart; 471 472 mode = vga->mode; 473 if(mode->z == 24) 474 error("%s: 24-bit colour not supported, use 32-bit\n", ctlr->name); 475 476 nv = vga->private; 477 478 if(vga->linear && (ctlr->flag & Hlinear)) 479 ctlr->flag |= Ulinear; 480 481 clock(vga, ctlr); 482 483 if(val = dbattr(vga->mode->attr, "lcd")){ 484 if((nv->islcd = strtol(val, &p, 0)) == 0 && p == val) 485 error("%s: invalid 'lcd' attr\n", ctlr->name); 486 } 487 488 if(nv->arch == 4) { 489 nv->cursor0 = 0; 490 nv->cursor1 = 0xBC; 491 nv->cursor2 = 0; 492 nv->config = 0x00001114; 493 } else if(nv->arch >= 10) { 494 cursorstart = vga->vmz - 96 * 1024; 495 nv->cursor0 = 0x80 | (cursorstart >> 17); 496 nv->cursor1 = (cursorstart >> 11) << 2; 497 nv->cursor2 = cursorstart >> 24; 498 nv->config = nv->pfb[0x200/4]; 499 } 500 501 nv->vpll = (vga->p[0] << 16) | (vga->n[0] << 8) | vga->m[0]; 502 nv->pllsel = 0x10000700; 503 if (mode->z == 16) 504 nv->general = 0x00001100; 505 else 506 nv->general = 0x00000100; 507 if (0 && mode->z != 8) 508 nv->general |= 0x00000030; 509 510 if (mode->x < 1280) 511 nv->repaint1 = 0x04; 512 else 513 nv->repaint1 = 0; 514 515 vga->attribute[0x10] &= ~0x40; 516 vga->attribute[0x11] = Pblack; 517 vga->crt[0x14] = 0; 518 519 if(1 && vga->f[0] != VgaFreq0 && vga->f[1] != VgaFreq1) 520 vga->misc |= 0x08; 521 522 /* set vert blanking to cover full overscan */ 523 524 tmp = vga->crt[0x12]; 525 vga->crt[0x15] = tmp; 526 if(tmp & 0x100) 527 vga->crt[0x07] |= 0x08; 528 else 529 vga->crt[0x07] &= ~0x08; 530 if(tmp & 0x200) 531 vga->crt[0x09] |= 0x20; 532 else 533 vga->crt[0x09] &= ~0x20; 534 535 vga->crt[0x16] = vga->crt[0x06] + 1; 536 537 /* set horiz blanking to cover full overscan */ 538 539 vga->crt[0x02] = vga->crt[0x01]; 540 tmp = vga->crt[0] + 4; 541 vga->crt[0x03] = 0x80 | (tmp & 0x1F); 542 if (tmp & 0x20) 543 vga->crt[0x05] |= 0x80; 544 else 545 vga->crt[0x05] &= ~0x80; 546 if (tmp & 0x40) 547 nv->screen = 0x10; 548 else 549 nv->screen = 0; 550 551 /* overflow bits */ 552 553 if (nv->islcd){ 554 tmp = vga->crt[0x06] - 3; 555 vga->crt[0x10] = tmp; 556 if(tmp & 0x100) 557 vga->crt[0x07] |= 0x04; 558 else 559 vga->crt[0x07] &= ~0x04; 560 if(tmp & 0x200) 561 vga->crt[0x07] |= 0x80; 562 else 563 vga->crt[0x07] &= ~0x80; 564 565 vga->crt[0x11] = 0x20 | ((vga->crt[0x06] - 2) & 0x0F); 566 567 tmp = vga->crt[0x10]; 568 vga->crt[0x15] = tmp; 569 if(tmp & 0x100) 570 vga->crt[0x07] |= 0x08; 571 else 572 vga->crt[0x07] &= ~0x08; 573 if(tmp & 0x200) 574 vga->crt[0x09] |= 0x20; 575 else 576 vga->crt[0x09] &= ~0x20; 577 578 vga->crt[0x04] = vga->crt[0] - 5; 579 580 vga->crt[0x05] &= ~0x1F; 581 vga->crt[0x05] |= (0x1F & (vga->crt[0] - 2)); 582 } 583 584 nv->repaint0 = (vga->crt[0x13] & 0x0700) >> 3; 585 586 pixeldepth = (mode->z +1)/8; 587 if (pixeldepth > 3) 588 nv->pixel = 3; 589 else 590 nv->pixel = pixeldepth; 591 592 nv->scale &= 0xFFF000FF; 593 if(nv->islcd){ 594 nv->pixel |= 0x80; 595 nv->scale |= 0x100; 596 } 597 598 if (vga->crt[0x06] & 0x400) 599 nv->screen |= 0x01; 600 if (vga->crt[0x12] & 0x400) 601 nv->screen |= 0x02; 602 if (vga->crt[0x10] & 0x400) 603 nv->screen |= 0x04; 604 if (vga->crt[0x15] & 0x400) 605 nv->screen |= 0x08; 606 if (vga->crt[0x13] & 0x800) 607 nv->screen |= 0x20; 608 609 nv->horiz = 0; 610 if (vga->crt[0] & 0x100) 611 nv->horiz = 0x01; 612 if(vga->crt[0x01] & 0x100) 613 nv->horiz |= 0x02; 614 if(vga->crt[0x02] & 0x100) 615 nv->horiz |= 0x04; 616 if(vga->crt[0x04] & 0x100) 617 nv->horiz |= 0x08; 618 619 nv->extra = 0; 620 if (vga->crt[0x06] & 0x800) 621 nv->extra |= 0x01; 622 if (vga->crt[0x12] & 0x800) 623 nv->extra |= 0x04; 624 if (vga->crt[0x10] & 0x800) 625 nv->extra |= 0x10; 626 if (vga->crt[0x15] & 0x800) 627 nv->extra |= 0x40; 628 629 nv->interlace = 0xFF; 630 if (nv->twoheads) { 631 nv->head |= 0x00001000; 632 nv->head2 &= ~0x00001000; 633 nv->crtcowner = 0; 634 if((nv->did & 0x0ff0) == 0x0110) 635 nv->dither &= ~0x00010000; 636 else 637 nv->dither &= ~1; 638 } 639 nv->cursorconfig = 0x00000100 | 0x02000000; 640 641 nv->timingH = 0; 642 nv->timingV = 0; 643 nv->displayV = vga->crt[0x12] + 1; 644 645 ctlr->flag |= Finit; 646 } 647 648 649 static void 650 load(Vga* vga, Ctlr* ctlr) 651 { 652 Nvidia *nv; 653 int i, regions; 654 ulong tmp; 655 656 nv = vga->private; 657 658 /* 659 * Unlock 660 */ 661 vgaxo(Crtx, 0x1F, 0x57); 662 663 nv->pmc[0x0140/4] = 0; 664 nv->pmc[0x0200/4] = 0xFFFF00FF; 665 nv->pmc[0x0200/4] = 0xFFFFFFFF; 666 667 nv->ptimer[0x0200] = 8; 668 nv->ptimer[0x0210] = 3; 669 nv->ptimer[0x0140] = 0; 670 nv->ptimer[0x0100] = 0xFFFFFFFF; 671 672 if (nv->arch == 4) 673 nv->pfb[0x00000200/4] = nv->config; 674 else if((nv->arch < 40) || ((nv->did & 0xfff0) == 0x0040)){ 675 for(i = 0; i < 8; i++){ 676 nv->pfb[(0x0240 + (i * 0x10))/4] = 0; 677 nv->pfb[(0x0244 + (i * 0x10))/4] = vga->vmz - 1;; 678 } 679 } 680 else{ 681 if(((nv->did & 0xfff0) == 0x0090) 682 || ((nv->did & 0xfff0) == 0x01D0) 683 || ((nv->did & 0xfff0) == 0x0290) 684 || ((nv->did & 0xfff0) == 0x0390)) 685 regions = 15; 686 else 687 regions = 12; 688 689 for(i = 0; i < regions; i++){ 690 nv->pfb[(0x0600 + (i * 0x10))/4] = 0; 691 nv->pfb[(0x0604 + (i * 0x10))/4] = vga->vmz - 1; 692 } 693 } 694 695 if (nv->arch >= 40) { 696 nv->pramin[0] = 0x80000010; 697 nv->pramin[0x0001] = 0x00101202; 698 nv->pramin[0x0002] = 0x80000011; 699 nv->pramin[0x0003] = 0x00101204; 700 nv->pramin[0x0004] = 0x80000012; 701 nv->pramin[0x0005] = 0x00101206; 702 nv->pramin[0x0006] = 0x80000013; 703 nv->pramin[0x0007] = 0x00101208; 704 nv->pramin[0x0008] = 0x80000014; 705 nv->pramin[0x0009] = 0x0010120A; 706 nv->pramin[0x000A] = 0x80000015; 707 nv->pramin[0x000B] = 0x0010120C; 708 nv->pramin[0x000C] = 0x80000016; 709 nv->pramin[0x000D] = 0x0010120E; 710 nv->pramin[0x000E] = 0x80000017; 711 nv->pramin[0x000F] = 0x00101210; 712 nv->pramin[0x0800] = 0x00003000; 713 nv->pramin[0x0801] = vga->vmz - 1; 714 nv->pramin[0x0802] = 0x00000002; 715 nv->pramin[0x0808] = 0x02080062; 716 nv->pramin[0x0809] = 0; 717 nv->pramin[0x080A] = 0x00001200; 718 nv->pramin[0x080B] = 0x00001200; 719 nv->pramin[0x080C] = 0; 720 nv->pramin[0x080D] = 0; 721 nv->pramin[0x0810] = 0x02080043; 722 nv->pramin[0x0811] = 0; 723 nv->pramin[0x0812] = 0; 724 nv->pramin[0x0813] = 0; 725 nv->pramin[0x0814] = 0; 726 nv->pramin[0x0815] = 0; 727 nv->pramin[0x0818] = 0x02080044; 728 nv->pramin[0x0819] = 0x02000000; 729 nv->pramin[0x081A] = 0; 730 nv->pramin[0x081B] = 0; 731 nv->pramin[0x081C] = 0; 732 nv->pramin[0x081D] = 0; 733 nv->pramin[0x0820] = 0x02080019; 734 nv->pramin[0x0821] = 0; 735 nv->pramin[0x0822] = 0; 736 nv->pramin[0x0823] = 0; 737 nv->pramin[0x0824] = 0; 738 nv->pramin[0x0825] = 0; 739 nv->pramin[0x0828] = 0x020A005C; 740 nv->pramin[0x0829] = 0; 741 nv->pramin[0x082A] = 0; 742 nv->pramin[0x082B] = 0; 743 nv->pramin[0x082C] = 0; 744 nv->pramin[0x082D] = 0; 745 nv->pramin[0x0830] = 0x0208009F; 746 nv->pramin[0x0831] = 0; 747 nv->pramin[0x0832] = 0x00001200; 748 nv->pramin[0x0833] = 0x00001200; 749 nv->pramin[0x0834] = 0; 750 nv->pramin[0x0835] = 0; 751 nv->pramin[0x0838] = 0x0208004A; 752 nv->pramin[0x0839] = 0x02000000; 753 nv->pramin[0x083A] = 0; 754 nv->pramin[0x083B] = 0; 755 nv->pramin[0x083C] = 0; 756 nv->pramin[0x083D] = 0; 757 nv->pramin[0x0840] = 0x02080077; 758 nv->pramin[0x0841] = 0; 759 nv->pramin[0x0842] = 0x00001200; 760 nv->pramin[0x0843] = 0x00001200; 761 nv->pramin[0x0844] = 0; 762 nv->pramin[0x0845] = 0; 763 nv->pramin[0x084C] = 0x00003002; 764 nv->pramin[0x084D] = 0x00007FFF; 765 nv->pramin[0x084E] = (vga->vmz - 128*1024) | 2; 766 } else { 767 nv->pramin[0x0000] = 0x80000010; 768 nv->pramin[0x0001] = 0x80011201; 769 nv->pramin[0x0002] = 0x80000011; 770 nv->pramin[0x0003] = 0x80011202; 771 nv->pramin[0x0004] = 0x80000012; 772 nv->pramin[0x0005] = 0x80011203; 773 nv->pramin[0x0006] = 0x80000013; 774 nv->pramin[0x0007] = 0x80011204; 775 nv->pramin[0x0008] = 0x80000014; 776 nv->pramin[0x0009] = 0x80011205; 777 nv->pramin[0x000A] = 0x80000015; 778 nv->pramin[0x000B] = 0x80011206; 779 nv->pramin[0x000C] = 0x80000016; 780 nv->pramin[0x000D] = 0x80011207; 781 nv->pramin[0x000E] = 0x80000017; 782 nv->pramin[0x000F] = 0x80011208; 783 nv->pramin[0x0800] = 0x00003000; 784 nv->pramin[0x0801] = vga->vmz - 1; 785 nv->pramin[0x0802] = 0x00000002; 786 nv->pramin[0x0803] = 0x00000002; 787 if (nv->arch >= 10) 788 nv->pramin[0x0804] = 0x01008062; 789 else 790 nv->pramin[0x0804] = 0x01008042; 791 nv->pramin[0x0805] = 0; 792 nv->pramin[0x0806] = 0x12001200; 793 nv->pramin[0x0807] = 0; 794 nv->pramin[0x0808] = 0x01008043; 795 nv->pramin[0x0809] = 0; 796 nv->pramin[0x080A] = 0; 797 nv->pramin[0x080B] = 0; 798 nv->pramin[0x080C] = 0x01008044; 799 nv->pramin[0x080D] = 0x00000002; 800 nv->pramin[0x080E] = 0; 801 nv->pramin[0x080F] = 0; 802 nv->pramin[0x0810] = 0x01008019; 803 nv->pramin[0x0811] = 0; 804 nv->pramin[0x0812] = 0; 805 nv->pramin[0x0813] = 0; 806 nv->pramin[0x0814] = 0x0100A05C; 807 nv->pramin[0x0815] = 0; 808 nv->pramin[0x0816] = 0; 809 nv->pramin[0x0817] = 0; 810 nv->pramin[0x0818] = 0x0100805F; 811 nv->pramin[0x0819] = 0; 812 nv->pramin[0x081A] = 0x12001200; 813 nv->pramin[0x081B] = 0; 814 nv->pramin[0x081C] = 0x0100804A; 815 nv->pramin[0x081D] = 0x00000002; 816 nv->pramin[0x081E] = 0; 817 nv->pramin[0x081F] = 0; 818 nv->pramin[0x0820] = 0x01018077; 819 nv->pramin[0x0821] = 0; 820 nv->pramin[0x0822] = 0x01201200; 821 nv->pramin[0x0823] = 0; 822 nv->pramin[0x0824] = 0x00003002; 823 nv->pramin[0x0825] = 0x00007FFF; 824 nv->pramin[0x0826] = (vga->vmz - 128*1024) | 2; 825 nv->pramin[0x0827] = 0x00000002; 826 } 827 if (nv->arch < 10) { 828 if((nv->did & 0x0fff) == 0x0020) { 829 nv->pramin[0x0824] |= 0x00020000; 830 nv->pramin[0x0826] += nv->pci->mem[1].bar; 831 } 832 nv->pgraph[0x0080/4] = 0x000001FF; 833 nv->pgraph[0x0080/4] = 0x1230C000; 834 nv->pgraph[0x0084/4] = 0x72111101; 835 nv->pgraph[0x0088/4] = 0x11D5F071; 836 nv->pgraph[0x008C/4] = 0x0004FF31; 837 nv->pgraph[0x008C/4] = 0x4004FF31; 838 839 nv->pgraph[0x0140/4] = 0; 840 nv->pgraph[0x0100/4] = 0xFFFFFFFF; 841 nv->pgraph[0x0170/4] = 0x10010100; 842 nv->pgraph[0x0710/4] = 0xFFFFFFFF; 843 nv->pgraph[0x0720/4] = 1; 844 845 nv->pgraph[0x0810/4] = 0; 846 nv->pgraph[0x0608/4] = 0xFFFFFFFF; 847 } else { 848 nv->pgraph[0x0080/4] = 0xFFFFFFFF; 849 nv->pgraph[0x0080/4] = 0; 850 851 nv->pgraph[0x0140/4] = 0; 852 nv->pgraph[0x0100/4] = 0xFFFFFFFF; 853 nv->pgraph[0x0144/4] = 0x10010100; 854 nv->pgraph[0x0714/4] = 0xFFFFFFFF; 855 nv->pgraph[0x0720/4] = 1; 856 nv->pgraph[0x0710/4] &= 0x0007ff00; 857 nv->pgraph[0x0710/4] |= 0x00020100; 858 859 if (nv->arch == 10) { 860 nv->pgraph[0x0084/4] = 0x00118700; 861 nv->pgraph[0x0088/4] = 0x24E00810; 862 nv->pgraph[0x008C/4] = 0x55DE0030; 863 864 for(i = 0; i < 32; i++) 865 nv->pgraph[0x0B00/4 + i] = nv->pfb[0x0240/4 + i]; 866 867 nv->pgraph[0x640/4] = 0; 868 nv->pgraph[0x644/4] = 0; 869 nv->pgraph[0x684/4] = vga->vmz - 1; 870 nv->pgraph[0x688/4] = vga->vmz - 1; 871 872 nv->pgraph[0x0810/4] = 0; 873 nv->pgraph[0x0608/4] = 0xFFFFFFFF; 874 } else { 875 if (nv->arch >= 40) { 876 nv->pgraph[0x0084/4] = 0x401287c0; 877 nv->pgraph[0x008C/4] = 0x60de8051; 878 nv->pgraph[0x0090/4] = 0x00008000; 879 nv->pgraph[0x0610/4] = 0x00be3c5f; 880 881 882 tmp = nv->pmc[0x1540/4] & 0xff; 883 for(i = 0; tmp && !(tmp & 1); tmp >>= 1, i++) 884 ; 885 nv->pgraph[0x5000/4] = i; 886 887 if ((nv->did & 0xfff0) == 0x0040) { 888 nv->pgraph[0x09b0/4] = 0x83280fff; 889 nv->pgraph[0x09b4/4] = 0x000000a0; 890 } else { 891 nv->pgraph[0x0820/4] = 0x83280eff; 892 nv->pgraph[0x0824/4] = 0x000000a0; 893 } 894 895 switch(nv->did & 0xfff0) { 896 case 0x0040: 897 nv->pgraph[0x09b8/4] = 0x0078e366; 898 nv->pgraph[0x09bc/4] = 0x0000014c; 899 nv->pfb[0x033C/4] &= 0xffff7fff; 900 break; 901 case 0x00C0: 902 case 0x0120: 903 nv->pgraph[0x0828/4] = 0x007596ff; 904 nv->pgraph[0x082C/4] = 0x00000108; 905 break; 906 case 0x0160: 907 case 0x01D0: 908 case 0x0240: 909 nv->pmc[0x1700/4] = nv->pfb[0x020C/4]; 910 nv->pmc[0x1704/4] = 0; 911 nv->pmc[0x1708/4] = 0; 912 nv->pmc[0x170C/4] = nv->pfb[0x020C/4]; 913 nv->pgraph[0x0860/4] = 0; 914 nv->pgraph[0x0864/4] = 0; 915 nv->pramdac[0x0608/4] |= 0x00100000; 916 break; 917 case 0x0140: 918 nv->pgraph[0x0828/4] = 0x0072cb77; 919 nv->pgraph[0x082C/4] = 0x00000108; 920 break; 921 case 0x0220: 922 nv->pgraph[0x0860/4] = 0; 923 nv->pgraph[0x0864/4] = 0; 924 nv->pramdac[0x0608/4] |= 0x00100000; 925 break; 926 case 0x0090: 927 case 0x0290: 928 case 0x0390: 929 nv->pgraph[0x0608/4] |= 0x00100000; 930 nv->pgraph[0x0828/4] = 0x07830610; 931 nv->pgraph[0x082C/4] = 0x0000016A; 932 break; 933 default: 934 break; 935 } 936 937 nv->pgraph[0x0b38/4] = 0x2ffff800; 938 nv->pgraph[0x0b3c/4] = 0x00006000; 939 nv->pgraph[0x032C/4] = 0x01000000; 940 nv->pgraph[0x0220/4] = 0x00001200; 941 } else if (nv->arch == 30) { 942 nv->pgraph[0x0084/4] = 0x40108700; 943 nv->pgraph[0x0890/4] = 0x00140000; 944 nv->pgraph[0x008C/4] = 0xf00e0431; 945 nv->pgraph[0x0090/4] = 0x00008000; 946 nv->pgraph[0x0610/4] = 0xf04b1f36; 947 nv->pgraph[0x0B80/4] = 0x1002d888; 948 nv->pgraph[0x0B88/4] = 0x62ff007f; 949 } else { 950 nv->pgraph[0x0084/4] = 0x00118700; 951 nv->pgraph[0x008C/4] = 0xF20E0431; 952 nv->pgraph[0x0090/4] = 0; 953 nv->pgraph[0x009C/4] = 0x00000040; 954 955 if((nv->did & 0x0ff0) >= 0x0250) { 956 nv->pgraph[0x0890/4] = 0x00080000; 957 nv->pgraph[0x0610/4] = 0x304B1FB6; 958 nv->pgraph[0x0B80/4] = 0x18B82880; 959 nv->pgraph[0x0B84/4] = 0x44000000; 960 nv->pgraph[0x0098/4] = 0x40000080; 961 nv->pgraph[0x0B88/4] = 0x000000ff; 962 } else { 963 nv->pgraph[0x0880/4] = 0x00080000; 964 nv->pgraph[0x0094/4] = 0x00000005; 965 nv->pgraph[0x0B80/4] = 0x45CAA208; 966 nv->pgraph[0x0B84/4] = 0x24000000; 967 nv->pgraph[0x0098/4] = 0x00000040; 968 nv->pgraph[0x0750/4] = 0x00E00038; 969 nv->pgraph[0x0754/4] = 0x00000030; 970 nv->pgraph[0x0750/4] = 0x00E10038; 971 nv->pgraph[0x0754/4] = 0x00000030; 972 } 973 } 974 975 if((nv->arch < 40) || ((nv->did & 0xfff0) == 0x0040)){ 976 for(i = 0; i < 32; i++) { 977 nv->pgraph[(0x0900/4) + i] = nv->pfb[(0x0240/4) + i]; 978 nv->pgraph[(0x6900/4) + i] = nv->pfb[(0x0240/4) + i]; 979 } 980 } 981 else{ 982 if(((nv->did & 0xfff0) == 0x0090) 983 || ((nv->did & 0xfff0) == 0x01D0) 984 || ((nv->did & 0xfff0) == 0x0290) 985 || ((nv->did & 0xfff0) == 0x0390)){ 986 for(i = 0; i < 60; i++) { 987 nv->pgraph[(0x0D00/4) + i] = nv->pfb[(0x0600/4) + i]; 988 nv->pgraph[(0x6900/4) + i] = nv->pfb[(0x0600/4) + i]; 989 } 990 } 991 else{ 992 for(i = 0; i < 48; i++) { 993 nv->pgraph[(0x0900/4) + i] = nv->pfb[(0x0600/4) + i]; 994 if(((nv->did & 0xfff0) != 0x0160) 995 && ((nv->did & 0xfff0) != 0x0220) 996 && ((nv->did & 0xfff0) != 0x0240)) 997 nv->pgraph[(0x6900/4) + i] = nv->pfb[(0x0600/4) + i]; 998 } 999 } 1000 } 1001 1002 if(nv->arch >= 40) { 1003 if((nv->did & 0xfff0) == 0x0040) { 1004 nv->pgraph[0x09A4/4] = nv->pfb[0x0200/4]; 1005 nv->pgraph[0x09A8/4] = nv->pfb[0x0204/4]; 1006 nv->pgraph[0x69A4/4] = nv->pfb[0x0200/4]; 1007 nv->pgraph[0x69A8/4] = nv->pfb[0x0204/4]; 1008 1009 nv->pgraph[0x0820/4] = 0; 1010 nv->pgraph[0x0824/4] = 0; 1011 nv->pgraph[0x0864/4] = vga->vmz - 1; 1012 nv->pgraph[0x0868/4] = vga->vmz - 1; 1013 } else { 1014 nv->pgraph[0x09F0/4] = nv->pfb[0x0200/4]; 1015 nv->pgraph[0x09F4/4] = nv->pfb[0x0204/4]; 1016 nv->pgraph[0x69F0/4] = nv->pfb[0x0200/4]; 1017 nv->pgraph[0x69F4/4] = nv->pfb[0x0204/4]; 1018 1019 nv->pgraph[0x0840/4] = 0; 1020 nv->pgraph[0x0844/4] = 0; 1021 nv->pgraph[0x08a0/4] = vga->vmz - 1; 1022 nv->pgraph[0x08a4/4] = vga->vmz - 1; 1023 } 1024 } else { 1025 nv->pgraph[0x09A4/4] = nv->pfb[0x0200/4]; 1026 nv->pgraph[0x09A8/4] = nv->pfb[0x0204/4]; 1027 nv->pgraph[0x0750/4] = 0x00EA0000; 1028 nv->pgraph[0x0754/4] = nv->pfb[0x0200/4]; 1029 nv->pgraph[0x0750/4] = 0x00EA0004; 1030 nv->pgraph[0x0754/4] = nv->pfb[0x0204/4]; 1031 1032 nv->pgraph[0x0820/4] = 0; 1033 nv->pgraph[0x0824/4] = 0; 1034 nv->pgraph[0x0864/4] = vga->vmz - 1; 1035 nv->pgraph[0x0868/4] = vga->vmz - 1; 1036 } 1037 1038 nv->pgraph[0x0B20/4] = 0; 1039 nv->pgraph[0x0B04/4] = 0xFFFFFFFF; 1040 } 1041 } 1042 1043 nv->pgraph[0x053C/4] = 0; 1044 nv->pgraph[0x0540/4] = 0; 1045 nv->pgraph[0x0544/4] = 0x00007FFF; 1046 nv->pgraph[0x0548/4] = 0x00007FFF; 1047 1048 nv->pfifo[0x0140] = 0; 1049 nv->pfifo[0x0141] = 0x00000001; 1050 nv->pfifo[0x0480] = 0; 1051 nv->pfifo[0x0494] = 0; 1052 if (nv->arch >= 40) 1053 nv->pfifo[0x0481] = 0x00010000; 1054 else 1055 nv->pfifo[0x0481] = 0x00000100; 1056 nv->pfifo[0x0490] = 0; 1057 nv->pfifo[0x0491] = 0; 1058 if (nv->arch >= 40) 1059 nv->pfifo[0x048B] = 0x00001213; 1060 else 1061 nv->pfifo[0x048B] = 0x00001209; 1062 nv->pfifo[0x0400] = 0; 1063 nv->pfifo[0x0414] = 0; 1064 nv->pfifo[0x0084] = 0x03000100; 1065 nv->pfifo[0x0085] = 0x00000110; 1066 nv->pfifo[0x0086] = 0x00000112; 1067 nv->pfifo[0x0143] = 0x0000FFFF; 1068 nv->pfifo[0x0496] = 0x0000FFFF; 1069 nv->pfifo[0x0050] = 0; 1070 nv->pfifo[0x0040] = 0xFFFFFFFF; 1071 nv->pfifo[0x0415] = 0x00000001; 1072 nv->pfifo[0x048C] = 0; 1073 nv->pfifo[0x04A0] = 0; 1074 nv->pfifo[0x0489] = 0x000F0078; 1075 nv->pfifo[0x0488] = 0x00000001; 1076 nv->pfifo[0x0480] = 0x00000001; 1077 nv->pfifo[0x0494] = 0x00000001; 1078 nv->pfifo[0x0495] = 0x00000001; 1079 nv->pfifo[0x0140] = 0x00000001; 1080 1081 if (nv->arch >= 10) { 1082 if (nv->twoheads) { 1083 nv->pcrtc[0x0860/4] = nv->head; 1084 nv->pcrtc[0x2860/4] = nv->head2; 1085 } 1086 nv->pramdac[0x0404/4] |= (1 << 25); 1087 1088 nv->pmc[0x8704/4] = 1; 1089 nv->pmc[0x8140/4] = 0; 1090 nv->pmc[0x8920/4] = 0; 1091 nv->pmc[0x8924/4] = 0; 1092 nv->pmc[0x8908/4] = vga->vmz - 1; 1093 nv->pmc[0x890C/4] = vga->vmz - 1; 1094 nv->pmc[0x1588/4] = 0; 1095 1096 nv->pcrtc[0x0810/4] = nv->cursorconfig; 1097 nv->pcrtc[0x0830/4] = nv->displayV - 3; 1098 nv->pcrtc[0x0834/4] = nv->displayV - 1; 1099 1100 if (nv->islcd) { 1101 if((nv->did & 0x0ff0) == 0x0110) 1102 nv->pramdac[0x0528/4] = nv->dither; 1103 else if (nv->twoheads) 1104 nv->pramdac[0x083C/4] = nv->dither; 1105 vgaxo(Crtx, 0x53, nv->timingH); 1106 vgaxo(Crtx, 0x54, nv->timingV); 1107 vgaxo(Crtx, 0x21, 0xFA); 1108 } 1109 vgaxo(Crtx, 0x41, nv->extra); 1110 } 1111 1112 vgaxo(Crtx, 0x19, nv->repaint0); 1113 vgaxo(Crtx, 0x1A, nv->repaint1); 1114 vgaxo(Crtx, 0x25, nv->screen); 1115 vgaxo(Crtx, 0x28, nv->pixel); 1116 vgaxo(Crtx, 0x2D, nv->horiz); 1117 vgaxo(Crtx, 0x30, nv->cursor0); 1118 vgaxo(Crtx, 0x31, nv->cursor1); 1119 vgaxo(Crtx, 0x2F, nv->cursor2); 1120 vgaxo(Crtx, 0x39, nv->interlace); 1121 1122 if (nv->islcd) { 1123 nv->pramdac[0x00000848/4] = nv->scale; 1124 nv->pramdac[0x00000828/4] = nv->crtcsync; 1125 } else { 1126 nv->pramdac[0x50C/4] = nv->pllsel; 1127 nv->pramdac[0x508/4] = nv->vpll; 1128 if (nv->twoheads) 1129 nv->pramdac[0x520/4] = nv->vpll2; 1130 if (nv->twostagepll) { 1131 nv->pramdac[0x578/4] = nv->vpllB; 1132 nv->pramdac[0x57C/4] = nv->vpll2B; 1133 } 1134 } 1135 nv->pramdac[0x00000600/4] = nv->general; 1136 1137 nv->pcrtc[0x0140/4] = 0; 1138 nv->pcrtc[0x0100/4] = 1; 1139 1140 ctlr->flag |= Fload; 1141 } 1142 1143 1144 static void 1145 dump(Vga* vga, Ctlr* ctlr) 1146 { 1147 Nvidia *nv; 1148 int m, n, p, f; 1149 double trouble; 1150 1151 if((nv = vga->private) == 0) 1152 return; 1153 1154 p = (nv->vpll >> 16); 1155 n = (nv->vpll >> 8) & 0xFF; 1156 m = nv->vpll & 0xFF; 1157 trouble = nv->crystalfreq; 1158 trouble = trouble * n / (m<<p); 1159 f = trouble+0.5; 1160 printitem(ctlr->name, "dclk m n p"); 1161 Bprint(&stdout, " %d %d - %d %d\n", f, m, n, p); 1162 printitem(ctlr->name, "CrystalFreq"); 1163 Bprint(&stdout, " %d Hz\n", nv->crystalfreq); 1164 printitem(ctlr->name, "arch"); 1165 Bprint(&stdout, " %d\n", nv->arch); 1166 printitem(ctlr->name, "did"); 1167 Bprint(&stdout, " %.4ux\n", nv->did); 1168 printitem(ctlr->name, "repaint0"); 1169 Bprint(&stdout, " %ux\n", nv->repaint0); 1170 printitem(ctlr->name, "repaint1"); 1171 Bprint(&stdout, " %ux\n", nv->repaint1); 1172 printitem(ctlr->name, "screen"); 1173 Bprint(&stdout, " %ux\n", nv->screen); 1174 printitem(ctlr->name, "pixel"); 1175 Bprint(&stdout, " %ux\n", nv->pixel); 1176 printitem(ctlr->name, "horiz"); 1177 Bprint(&stdout, " %ux\n", nv->horiz); 1178 printitem(ctlr->name, "cursor0"); 1179 Bprint(&stdout, " %ux\n", nv->cursor0); 1180 printitem(ctlr->name, "cursor1"); 1181 Bprint(&stdout, " %ux\n", nv->cursor1); 1182 printitem(ctlr->name, "cursor2"); 1183 Bprint(&stdout, " %ux\n", nv->cursor2); 1184 printitem(ctlr->name, "interlace"); 1185 Bprint(&stdout, " %ux\n", nv->interlace); 1186 printitem(ctlr->name, "extra"); 1187 Bprint(&stdout, " %ux\n", nv->extra); 1188 printitem(ctlr->name, "crtcowner"); 1189 Bprint(&stdout, " %ux\n", nv->crtcowner); 1190 printitem(ctlr->name, "timingH"); 1191 Bprint(&stdout, " %ux\n", nv->timingH); 1192 printitem(ctlr->name, "timingV"); 1193 Bprint(&stdout, " %ux\n", nv->timingV); 1194 printitem(ctlr->name, "vpll"); 1195 Bprint(&stdout, " %lux\n", nv->vpll); 1196 printitem(ctlr->name, "vpllB"); 1197 Bprint(&stdout, " %lux\n", nv->vpllB); 1198 printitem(ctlr->name, "vpll2"); 1199 Bprint(&stdout, " %lux\n", nv->vpll2); 1200 printitem(ctlr->name, "vpll2B"); 1201 Bprint(&stdout, " %lux\n", nv->vpll2B); 1202 printitem(ctlr->name, "pllsel"); 1203 Bprint(&stdout, " %lux\n", nv->pllsel); 1204 printitem(ctlr->name, "general"); 1205 Bprint(&stdout, " %lux\n", nv->general); 1206 printitem(ctlr->name, "scale"); 1207 Bprint(&stdout, " %lux\n", nv->scale); 1208 printitem(ctlr->name, "config"); 1209 Bprint(&stdout, " %lux\n", nv->config); 1210 printitem(ctlr->name, "head"); 1211 Bprint(&stdout, " %lux\n", nv->head); 1212 printitem(ctlr->name, "head2"); 1213 Bprint(&stdout, " %lux\n", nv->head2); 1214 printitem(ctlr->name, "cursorconfig"); 1215 Bprint(&stdout, " %lux\n", nv->cursorconfig); 1216 printitem(ctlr->name, "dither"); 1217 Bprint(&stdout, " %lux\n", nv->dither); 1218 printitem(ctlr->name, "crtcsync"); 1219 Bprint(&stdout, " %lux\n", nv->crtcsync); 1220 printitem(ctlr->name, "islcd"); 1221 Bprint(&stdout, " %d\n", nv->islcd); 1222 printitem(ctlr->name, "twoheads"); 1223 Bprint(&stdout, " %d\n", nv->twoheads); 1224 printitem(ctlr->name, "twostagepll"); 1225 Bprint(&stdout, " %d\n", nv->twostagepll); 1226 printitem(ctlr->name, "crtcnumber"); 1227 Bprint(&stdout, " %d\n", nv->crtcnumber); 1228 1229 printitem(ctlr->name, "fpwidth"); 1230 Bprint(&stdout, " %d\n", nv->fpwidth); 1231 printitem(ctlr->name, "fpheight"); 1232 Bprint(&stdout, " %d\n", nv->fpheight); 1233 1234 } 1235 1236 1237 Ctlr nvidia = { 1238 "nvidia", /* name */ 1239 snarf, /* snarf */ 1240 options, /* options */ 1241 init, /* init */ 1242 load, /* load */ 1243 dump, /* dump */ 1244 }; 1245 1246 Ctlr nvidiahwgc = { 1247 "nvidiahwgc", /* name */ 1248 0, /* snarf */ 1249 0, /* options */ 1250 0, /* init */ 1251 0, /* load */ 1252 0, /* dump */ 1253 }; 1254