1 2 /* Portions of this file derived from work with the following copyright */ 3 4 /***************************************************************************\ 5 |* *| 6 |* Copyright 2003 NVIDIA, Corporation. All rights reserved. *| 7 |* *| 8 |* NOTICE TO USER: The source code is copyrighted under U.S. and *| 9 |* international laws. Users and possessors of this source code are *| 10 |* hereby granted a nonexclusive, royalty-free copyright license to *| 11 |* use this code in individual and commercial software. *| 12 |* *| 13 |* Any use of this source code must include, in the user documenta- *| 14 |* tion and internal comments to the code, notices to the end user *| 15 |* as follows: *| 16 |* *| 17 |* Copyright 2003 NVIDIA, Corporation. All rights reserved. *| 18 |* *| 19 |* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| 20 |* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| 21 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| 22 |* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| 23 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| 24 |* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| 25 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| 26 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| 27 |* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| 28 |* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| 29 |* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| 30 |* *| 31 |* U.S. Government End Users. This source code is a "commercial *| 32 |* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| 33 |* consisting of "commercial computer software" and "commercial *| 34 |* computer software documentation," as such terms are used in *| 35 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| 36 |* ment only as a commercial end item. Consistent with 48 C.F.R. *| 37 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| 38 |* all U.S. Government End Users acquire the source code with only *| 39 |* those rights set forth herein. *| 40 |* *| 41 \***************************************************************************/ 42 43 #include <u.h> 44 #include <libc.h> 45 #include <bio.h> 46 47 #include "pci.h" 48 #include "vga.h" 49 50 typedef struct Nvidia Nvidia; 51 struct Nvidia { 52 Pcidev* pci; 53 int did; /* not always == pci->did */ 54 55 int arch; 56 int crystalfreq; 57 58 ulong* mmio; 59 ulong* pfb; /* mmio pointers */ 60 ulong* pramdac; 61 ulong* pextdev; 62 ulong* pmc; 63 ulong* ptimer; 64 ulong* pfifo; 65 ulong* pramin; 66 ulong* pgraph; 67 ulong* fifo; 68 ulong* pcrtc; 69 70 ushort repaint0; 71 ushort repaint1; 72 ushort screen; 73 ushort pixel; 74 ushort horiz; 75 ushort cursor0; 76 ushort cursor1; 77 ushort cursor2; 78 ushort interlace; 79 ushort extra; 80 ushort crtcowner; 81 ushort timingH; 82 ushort timingV; 83 84 ulong vpll; 85 ulong vpllB; 86 ulong vpll2; 87 ulong vpll2B; 88 ulong pllsel; 89 ulong general; 90 ulong scale; 91 ulong config; 92 ulong head; 93 ulong head2; 94 ulong cursorconfig; 95 ulong dither; 96 ulong crtcsync; 97 ulong displayV; 98 99 int islcd; 100 int fpwidth; 101 int fpheight; 102 int twoheads; 103 int twostagepll; 104 int crtcnumber; 105 }; 106 107 static void 108 getpcixdid(Nvidia* nv) 109 { 110 ulong pcicmd, pciid; 111 ushort vid, did; 112 113 pcicmd = pcicfgr32(nv->pci, PciPCR); 114 pcicfgw32(nv->pci, PciPCR, pcicmd | 0x02); 115 pciid = nv->mmio[0x1800/4]; 116 pcicfgw32(nv->pci, PciPCR, pcicmd); 117 118 vid = pciid >> 16; 119 did = (pciid & 0xFFFF); 120 if (did == 0x10DE) 121 did = vid; 122 else if (vid == 0xDE10) 123 did = ((pciid << 8) & 0xFF00) | ((pciid >> 8) & 0x00FF); 124 125 nv->did = did; 126 } 127 128 static void 129 snarf(Vga* vga, Ctlr* ctlr) 130 { 131 Nvidia *nv; 132 Pcidev *p; 133 ulong m, *mmio, tmp; 134 int implementation; 135 136 if(vga->private == nil){ 137 vga->private = alloc(sizeof(Nvidia)); 138 nv = vga->private; 139 140 p = nil; 141 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 142 if((p->ccru>>8) == 3) 143 break; 144 } 145 if(p == nil) 146 error("%s: not found\n", ctlr->name); 147 148 nv->did = p->did; 149 if ((nv->did & 0xfff0) == 0x00f0) 150 getpcixdid(nv); 151 152 switch (nv->did & 0x0ff0) { 153 case 0x0020: 154 case 0x00A0: 155 nv->arch = 4; 156 break; 157 case 0x0100: /* GeForce 256 */ 158 case 0x0110: /* GeForce2 MX */ 159 case 0x0150: /* GeForce2 */ 160 case 0x0170: /* GeForce4 MX */ 161 case 0x0180: /* GeForce4 MX (8x AGP) */ 162 case 0x01A0: /* nForce */ 163 case 0x01F0: /* nForce2 */ 164 nv->arch = 10; 165 break; 166 case 0x0200: /* GeForce3 */ 167 case 0x0250: /* GeForce4 Ti */ 168 case 0x0280: /* GeForce4 Ti (8x AGP) */ 169 nv->arch = 20; 170 break; 171 case 0x0300: /* GeForceFX 5800 */ 172 case 0x0310: /* GeForceFX 5600 */ 173 case 0x0320: /* GeForceFX 5200 */ 174 case 0x0330: /* GeForceFX 5900 */ 175 case 0x0340: /* GeForceFX 5700 */ 176 nv->arch = 30; 177 break; 178 case 0x0040: 179 case 0x00C0: 180 case 0x0120: 181 case 0x0130: 182 case 0x0140: 183 case 0x0160: 184 case 0x01D0: 185 case 0x0090: 186 case 0x0210: 187 nv->arch = 40; 188 break; 189 default: 190 error("%s: DID %4.4uX unsupported\n", ctlr->name, nv->did); 191 break; 192 } 193 vgactlw("type", ctlr->name); 194 195 if((m = segattach(0, "nvidiammio", 0, p->mem[0].size)) == -1) 196 error("%s: segattach nvidiammio, size %d: %r\n", 197 ctlr->name, p->mem[0].size); 198 199 nv->pci = p; 200 nv->mmio = (ulong*)m; 201 202 mmio = (ulong*)m; 203 nv->pfb = mmio+0x00100000/4; 204 nv->pramdac = mmio+0x00680000/4; 205 nv->pextdev = mmio+0x00101000/4; 206 nv->pmc = mmio+0x00000000/4; 207 nv->ptimer = mmio+0x00009000/4; 208 nv->pfifo = mmio+0x00002000/4; 209 nv->pramin = mmio+0x00710000/4; 210 nv->pgraph = mmio+0x00400000/4; 211 nv->fifo = mmio+0x00800000/4; 212 nv->pcrtc= mmio+0x00600000/4; 213 } 214 nv = vga->private; 215 implementation = nv->did & 0x0ff0; 216 217 /* 218 * Unlock 219 */ 220 vgaxo(Crtx, 0x1F, 0x57); 221 222 if (nv->pextdev[0x00000000] & 0x00000040) 223 nv->crystalfreq = RefFreq; 224 else 225 nv->crystalfreq = 13500000; 226 227 if ((implementation == 0x0170) || 228 (implementation == 0x0180) || 229 (implementation == 0x01F0) || 230 (implementation >= 0x0250)) 231 if(nv->pextdev[0x00000000] & (1 << 22)) 232 nv->crystalfreq = 27000000; 233 234 nv->twoheads = (nv->arch >= 10) && 235 (implementation != 0x0100) && 236 (implementation != 0x0150) && 237 (implementation != 0x01A0) && 238 (implementation != 0x0200); 239 240 nv->twostagepll = (implementation == 0x0310) || 241 (implementation == 0x0340) || 242 (nv->arch >= 40); 243 244 if (nv->twoheads && (implementation != 0x0110)) 245 if(nv->pextdev[0x00000000] & (1 << 22)) 246 nv->crystalfreq = 27000000; 247 248 /* laptop chips */ 249 switch (nv->did & 0xffff) { 250 case 0x0112: 251 case 0x0174: 252 case 0x0175: 253 case 0x0176: 254 case 0x0177: 255 case 0x0179: 256 case 0x017C: 257 case 0x017D: 258 case 0x0186: 259 case 0x0187: 260 case 0x0189: /* 0x0189 not in nwaples's driver */ 261 case 0x018D: 262 case 0x0286: 263 case 0x028C: 264 case 0x0316: 265 case 0x0317: 266 case 0x031A: 267 case 0x031B: 268 case 0x031C: 269 case 0x031D: 270 case 0x031E: 271 case 0x031F: 272 case 0x0324: 273 case 0x0325: 274 case 0x0328: 275 case 0x0329: 276 case 0x032C: 277 case 0x032D: 278 case 0x0347: 279 case 0x0348: 280 case 0x0349: 281 case 0x034B: 282 case 0x034C: 283 case 0x0160: 284 case 0x0166: 285 case 0x00C8: 286 case 0x00CC: 287 case 0x0144: 288 case 0x0146: 289 case 0x0148: 290 nv->islcd = 1; 291 break; 292 default: 293 break; 294 } 295 296 if (nv->arch == 4) { 297 tmp = nv->pfb[0x00000000]; 298 if (tmp & 0x0100) { 299 vga->vmz = ((tmp >> 12) & 0x0F) * 1024 + 1024 * 2; 300 } else { 301 tmp &= 0x03; 302 if (tmp) 303 vga->vmz = (1024*1024*2) << tmp; 304 else 305 vga->vmz = 1024*1024*32; 306 } 307 } else if (implementation == 0x01a0) { 308 p = nil; 309 tmp = MKBUS(BusPCI, 0, 0, 1); 310 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 311 if(p->tbdf == tmp) 312 break; 313 } 314 tmp = pcicfgr32(p, 0x7C); 315 vga->vmz = (((tmp >> 6) & 31) + 1) * 1024 * 1024; 316 } else if (implementation == 0x01f0) { 317 p = nil; 318 tmp = MKBUS(BusPCI, 0, 0, 1); 319 while((p = pcimatch(p, 0x10DE, 0)) != nil){ 320 if(p->tbdf == tmp) 321 break; 322 } 323 tmp = pcicfgr32(p, 0x84); 324 vga->vmz = (((tmp >> 4) & 127) + 1) * 1024 * 1024; 325 } else { 326 tmp = (nv->pfb[0x0000020C/4] >> 20) & 0xFFF; 327 if (tmp == 0) 328 tmp = 16; 329 vga->vmz = 1024*1024*tmp; 330 } 331 332 nv->repaint0 = vgaxi(Crtx, 0x19); 333 nv->repaint1 = vgaxi(Crtx, 0x1A); 334 nv->screen = vgaxi(Crtx, 0x25); 335 nv->pixel = vgaxi(Crtx, 0x28); 336 nv->horiz = vgaxi(Crtx, 0x2D); 337 nv->cursor0 = vgaxi(Crtx, 0x30); 338 nv->cursor1 = vgaxi(Crtx, 0x31); 339 nv->cursor2 = vgaxi(Crtx, 0x2F); 340 nv->interlace = vgaxi(Crtx, 0x39); 341 342 nv->vpll = nv->pramdac[0x00000508/4]; 343 if (nv->twoheads) 344 nv->vpll2 = nv->pramdac[0x00000520/4]; 345 if (nv->twostagepll) { 346 nv->vpllB = nv->pramdac[0x00000578/4]; 347 nv->vpll2B = nv->pramdac[0x0000057C/4]; 348 } 349 nv->pllsel = nv->pramdac[0x0000050C/4]; 350 nv->general = nv->pramdac[0x00000600/4]; 351 nv->scale = nv->pramdac[0x00000848/4]; 352 nv->config = nv->pfb[0x00000200/4]; 353 354 if (nv->pixel & 0x80){ 355 nv->islcd = 1; 356 } 357 358 if (nv->arch >= 10) { 359 if (nv->twoheads) { 360 nv->head = nv->pcrtc[0x0860/4]; 361 nv->head2 = nv->pcrtc[0x2860/4]; 362 nv->crtcowner = vgaxi(Crtx, 0x44); 363 } 364 nv->extra = vgaxi(Crtx, 0x41); 365 nv->cursorconfig = nv->pcrtc[0x0810/4]; 366 if (implementation == 0x0110) 367 nv->dither = nv->pramdac[0x0528/4]; 368 else if (nv->twoheads) 369 nv->dither = nv->pramdac[0x083C/4]; 370 } 371 372 /* 373 * DFP. 374 */ 375 if (nv->islcd) { 376 nv->fpwidth = nv->pramdac[0x0820/4] + 1; 377 nv->fpheight = nv->pramdac[0x0800/4] + 1; 378 nv->crtcsync = nv->pramdac[0x0828/4]; 379 } 380 381 nv->crtcnumber = 0; 382 383 ctlr->flag |= Fsnarf; 384 } 385 386 387 static void 388 options(Vga*, Ctlr* ctlr) 389 { 390 ctlr->flag |= Hlinear|Foptions; 391 } 392 393 394 static void 395 clock(Vga* vga, Ctlr* ctlr) 396 { 397 int m, n, p, f, d; 398 Nvidia *nv; 399 double trouble; 400 int fmin, mmin, nmin, crystalfreq; 401 nv = vga->private; 402 403 if(vga->f[0] == 0) 404 vga->f[0] = vga->mode->frequency; 405 406 vga->d[0] = vga->f[0]+1; 407 408 vga->n[1] = 255; 409 if (nv->twostagepll) { 410 vga->p[1] = 6; 411 vga->m[1] = 13; 412 vga->f[1] = 400000000 << 2; 413 crystalfreq = nv->crystalfreq << 2; 414 fmin = 100000000 << 2; 415 mmin = 1; 416 nmin = 5; 417 nv->vpllB = 0x80000401; 418 } else { 419 vga->p[1] = 4; 420 if (nv->crystalfreq == 13500000) 421 vga->m[1] = 13; 422 else 423 vga->m[1] = 14; 424 vga->f[1] = 350000000; 425 crystalfreq = nv->crystalfreq; 426 fmin = 128000000; 427 mmin = 7; 428 nmin = 0; 429 } 430 431 for (p=0; p <= vga->p[1]; p++){ 432 f = vga->f[0] << p; 433 if ((f >= fmin) && (f <= vga->f[1])) { 434 for (m=mmin; m <= vga->m[1]; m++){ 435 trouble = (double) crystalfreq / (double) (m << p); 436 n = (vga->f[0] / trouble)+0.5; 437 f = n*trouble + 0.5; 438 d = vga->f[0] - f; 439 if (d < 0) 440 d = -d; 441 if ((n & ~0xFF) && (n >= nmin)) 442 d = vga->d[0] + 1; 443 if (d <= vga->d[0]){ 444 vga->n[0] = n; 445 vga->m[0] = m; 446 vga->p[0] = p; 447 vga->d[0] = d; 448 } 449 } 450 } 451 } 452 if (vga->d[0] > vga->f[0]) 453 error("%s: vclk %lud out of range\n", ctlr->name, vga->f[0]); 454 } 455 456 457 static void 458 init(Vga* vga, Ctlr* ctlr) 459 { 460 Mode *mode; 461 Nvidia *nv; 462 char *p, *val; 463 int tmp, pixeldepth; 464 ulong cursorstart; 465 466 mode = vga->mode; 467 if(mode->z == 24) 468 error("%s: 24-bit colour not supported, use 32-bit\n", ctlr->name); 469 470 nv = vga->private; 471 472 if(vga->linear && (ctlr->flag & Hlinear)) 473 ctlr->flag |= Ulinear; 474 475 clock(vga, ctlr); 476 477 if(val = dbattr(vga->mode->attr, "lcd")){ 478 if((nv->islcd = strtol(val, &p, 0)) == 0 && p == val) 479 error("%s: invalid 'lcd' attr\n", ctlr->name); 480 } 481 482 if(nv->arch == 4) { 483 nv->cursor0 = 0x00; 484 nv->cursor1 = 0xBC; 485 nv->cursor2 = 0; 486 nv->config = 0x00001114; 487 } else if(nv->arch >= 10) { 488 cursorstart = vga->vmz - 96 * 1024; 489 nv->cursor0 = 0x80 | (cursorstart >> 17); 490 nv->cursor1 = (cursorstart >> 11) << 2; 491 nv->cursor2 = cursorstart >> 24; 492 nv->config = nv->pfb[0x200/4]; 493 } 494 495 nv->vpll = (vga->p[0] << 16) | (vga->n[0] << 8) | vga->m[0]; 496 nv->pllsel = 0x10000700; 497 if (mode->z == 16) 498 nv->general = 0x00001100; 499 else 500 nv->general = 0x00000100; 501 //if (mode->z != 8) 502 // nv->general |= 0x00000030; 503 504 if (mode->x < 1280) 505 nv->repaint1 = 0x04; 506 else 507 nv->repaint1 = 0; 508 509 vga->attribute[0x10] &= ~0x40; 510 vga->attribute[0x11] = Pblack; 511 vga->crt[0x14] = 0x00; 512 513 /* set vert blanking to cover full overscan */ 514 515 tmp = vga->crt[0x12]; 516 vga->crt[0x15] = tmp; 517 if(tmp & 0x100) 518 vga->crt[0x07] |= 0x08; 519 else 520 vga->crt[0x07] &= ~0x08; 521 if(tmp & 0x200) 522 vga->crt[0x09] |= 0x20; 523 else 524 vga->crt[0x09] &= ~0x20; 525 526 vga->crt[0x16] = vga->crt[0x06] + 1; 527 528 /* set horiz blanking to cover full overscan */ 529 530 vga->crt[0x02] = vga->crt[0x01]; 531 tmp = vga->crt[0x00] + 4; 532 vga->crt[0x03] = 0x80 | (tmp & 0x1F); 533 if (tmp & 0x20) 534 vga->crt[0x05] |= 0x80; 535 else 536 vga->crt[0x05] &= ~0x80; 537 if (tmp & 0x40) 538 nv->screen = 0x10; 539 else 540 nv->screen = 0x00; 541 542 /* overflow bits */ 543 544 if (nv->islcd){ 545 tmp = vga->crt[0x06] - 3; 546 vga->crt[0x10] = tmp; 547 if(tmp & 0x100) 548 vga->crt[0x07] |= 0x04; 549 else 550 vga->crt[0x07] &= ~0x04; 551 if(tmp & 0x200) 552 vga->crt[0x07] |= 0x80; 553 else 554 vga->crt[0x07] &= ~0x80; 555 556 vga->crt[0x11] = 0x20 | ((vga->crt[0x06] - 2) & 0x0F); 557 558 tmp = vga->crt[0x10]; 559 vga->crt[0x15] = tmp; 560 if(tmp & 0x100) 561 vga->crt[0x07] |= 0x08; 562 else 563 vga->crt[0x07] &= ~0x08; 564 if(tmp & 0x200) 565 vga->crt[0x09] |= 0x20; 566 else 567 vga->crt[0x09] &= ~0x20; 568 569 vga->crt[0x04] = vga->crt[0x00] - 5; 570 571 vga->crt[0x05] &= ~0x1F; 572 vga->crt[0x05] |= (0x1F & (vga->crt[0x00] - 2)); 573 } 574 575 nv->repaint0 = (vga->crt[0x13] & 0x0700) >> 3; 576 577 pixeldepth = (mode->z +1)/8; 578 if (pixeldepth > 3) 579 nv->pixel = 3; 580 else 581 nv->pixel = pixeldepth; 582 583 nv->scale &= 0xFFF000FF; 584 if(nv->islcd){ 585 nv->pixel |= 0x80; 586 nv->scale |= 0x100; 587 } 588 589 if (vga->crt[0x06] & 0x400) 590 nv->screen |= 0x01; 591 if (vga->crt[0x12] & 0x400) 592 nv->screen |= 0x02; 593 if (vga->crt[0x10] & 0x400) 594 nv->screen |= 0x04; 595 if (vga->crt[0x15] & 0x400) 596 nv->screen |= 0x08; 597 if (vga->crt[0x13] & 0x800) 598 nv->screen |= 0x20; 599 600 nv->horiz = 0x00; 601 if (vga->crt[0x00] & 0x100) 602 nv->horiz = 0x01; 603 if(vga->crt[0x01] & 0x100) 604 nv->horiz |= 0x02; 605 if(vga->crt[0x02] & 0x100) 606 nv->horiz |= 0x04; 607 if(vga->crt[0x04] & 0x100) 608 nv->horiz |= 0x08; 609 610 nv->extra = 0x00; 611 if (vga->crt[0x06] & 0x800) 612 nv->extra |= 0x01; 613 if (vga->crt[0x12] & 0x800) 614 nv->extra |= 0x04; 615 if (vga->crt[0x10] & 0x800) 616 nv->extra |= 0x10; 617 if (vga->crt[0x15] & 0x800) 618 nv->extra |= 0x40; 619 620 nv->interlace = 0xFF; 621 if (nv->twoheads) { 622 nv->head |= 0x00001000; 623 nv->head2 |= ~0x00001000; 624 nv->crtcowner = 0; 625 if((nv->did & 0x0ff0) == 0x0110) 626 nv->dither &= ~0x00010000; 627 else 628 nv->dither &= ~1; 629 } 630 nv->cursorconfig = 0x00000100 | 0x02000000; 631 632 nv->timingH = 0; 633 nv->timingV = 0; 634 nv->displayV = vga->crt[0x12] + 1; 635 636 ctlr->flag |= Finit; 637 } 638 639 640 static void 641 load(Vga* vga, Ctlr* ctlr) 642 { 643 Nvidia *nv; 644 int i; 645 646 nv = vga->private; 647 648 /* 649 * Unlock 650 */ 651 vgaxo(Crtx, 0x1F, 0x57); 652 653 nv->pmc[0x0140/4] = 0x00000000; 654 nv->pmc[0x0200/4] = 0xFFFF00FF; 655 nv->pmc[0x0200/4] = 0xFFFFFFFF; 656 657 nv->ptimer[0x0200] = 0x00000008; 658 nv->ptimer[0x0210] = 0x00000003; 659 nv->ptimer[0x0140] = 0x00000000; 660 nv->ptimer[0x0100] = 0xFFFFFFFF; 661 662 if (nv->arch == 4) 663 nv->pfb[0x00000200/4] = nv->config; 664 else { 665 for(i=0; i<8; i++) { 666 nv->pfb[0x240/4+(i * 4)] = 0; 667 nv->pfb[0x244/4+(i * 4)] = vga->vmz - 1; 668 } 669 } 670 671 if (nv->arch >= 40) { 672 nv->pramin[0x0000] = 0x80000010; 673 nv->pramin[0x0001] = 0x00101202; 674 nv->pramin[0x0002] = 0x80000011; 675 nv->pramin[0x0003] = 0x00101204; 676 nv->pramin[0x0004] = 0x80000012; 677 nv->pramin[0x0005] = 0x00101206; 678 nv->pramin[0x0006] = 0x80000013; 679 nv->pramin[0x0007] = 0x00101208; 680 nv->pramin[0x0008] = 0x80000014; 681 nv->pramin[0x0009] = 0x0010120A; 682 nv->pramin[0x000A] = 0x80000015; 683 nv->pramin[0x000B] = 0x0010120C; 684 nv->pramin[0x000C] = 0x80000016; 685 nv->pramin[0x000D] = 0x0010120E; 686 nv->pramin[0x000E] = 0x80000017; 687 nv->pramin[0x000F] = 0x00101210; 688 nv->pramin[0x0800] = 0x00003000; 689 nv->pramin[0x0801] = vga->vmz - 1; 690 nv->pramin[0x0802] = 0x00000002; 691 nv->pramin[0x0808] = 0x02080062; 692 nv->pramin[0x0809] = 0x00000000; 693 nv->pramin[0x080A] = 0x00001200; 694 nv->pramin[0x080B] = 0x00001200; 695 nv->pramin[0x080C] = 0x00000000; 696 nv->pramin[0x080D] = 0x00000000; 697 nv->pramin[0x0810] = 0x02080043; 698 nv->pramin[0x0811] = 0x00000000; 699 nv->pramin[0x0812] = 0x00000000; 700 nv->pramin[0x0813] = 0x00000000; 701 nv->pramin[0x0814] = 0x00000000; 702 nv->pramin[0x0815] = 0x00000000; 703 nv->pramin[0x0818] = 0x02080044; 704 nv->pramin[0x0819] = 0x02000000; 705 nv->pramin[0x081A] = 0x00000000; 706 nv->pramin[0x081B] = 0x00000000; 707 nv->pramin[0x081C] = 0x00000000; 708 nv->pramin[0x081D] = 0x00000000; 709 nv->pramin[0x0820] = 0x02080019; 710 nv->pramin[0x0821] = 0x00000000; 711 nv->pramin[0x0822] = 0x00000000; 712 nv->pramin[0x0823] = 0x00000000; 713 nv->pramin[0x0824] = 0x00000000; 714 nv->pramin[0x0825] = 0x00000000; 715 nv->pramin[0x0828] = 0x020A005C; 716 nv->pramin[0x0829] = 0x00000000; 717 nv->pramin[0x082A] = 0x00000000; 718 nv->pramin[0x082B] = 0x00000000; 719 nv->pramin[0x082C] = 0x00000000; 720 nv->pramin[0x082D] = 0x00000000; 721 nv->pramin[0x0830] = 0x0208009F; 722 nv->pramin[0x0831] = 0x00000000; 723 nv->pramin[0x0832] = 0x00001200; 724 nv->pramin[0x0833] = 0x00001200; 725 nv->pramin[0x0834] = 0x00000000; 726 nv->pramin[0x0835] = 0x00000000; 727 nv->pramin[0x0838] = 0x0208004A; 728 nv->pramin[0x0839] = 0x02000000; 729 nv->pramin[0x083A] = 0x00000000; 730 nv->pramin[0x083B] = 0x00000000; 731 nv->pramin[0x083C] = 0x00000000; 732 nv->pramin[0x083D] = 0x00000000; 733 nv->pramin[0x0840] = 0x02080077; 734 nv->pramin[0x0841] = 0x00000000; 735 nv->pramin[0x0842] = 0x00001200; 736 nv->pramin[0x0843] = 0x00001200; 737 nv->pramin[0x0844] = 0x00000000; 738 nv->pramin[0x0845] = 0x00000000; 739 nv->pramin[0x084C] = 0x00003002; 740 nv->pramin[0x084D] = 0x00007FFF; 741 nv->pramin[0x084E] = (vga->vmz - 128 * 1024) | 0x00000002; 742 } else { 743 nv->pramin[0x0000] = 0x80000010; 744 nv->pramin[0x0001] = 0x80011201; 745 nv->pramin[0x0002] = 0x80000011; 746 nv->pramin[0x0003] = 0x80011202; 747 nv->pramin[0x0004] = 0x80000012; 748 nv->pramin[0x0005] = 0x80011203; 749 nv->pramin[0x0006] = 0x80000013; 750 nv->pramin[0x0007] = 0x80011204; 751 nv->pramin[0x0008] = 0x80000014; 752 nv->pramin[0x0009] = 0x80011205; 753 nv->pramin[0x000A] = 0x80000015; 754 nv->pramin[0x000B] = 0x80011206; 755 nv->pramin[0x000C] = 0x80000016; 756 nv->pramin[0x000D] = 0x80011207; 757 nv->pramin[0x000E] = 0x80000017; 758 nv->pramin[0x000F] = 0x80011208; 759 nv->pramin[0x0800] = 0x00003000; 760 nv->pramin[0x0801] = vga->vmz - 1; 761 nv->pramin[0x0802] = 0x00000002; 762 nv->pramin[0x0803] = 0x00000002; 763 if (nv->arch >= 10) 764 nv->pramin[0x0804] = 0x01008062; 765 else 766 nv->pramin[0x0804] = 0x01008042; 767 nv->pramin[0x0805] = 0x00000000; 768 nv->pramin[0x0806] = 0x12001200; 769 nv->pramin[0x0807] = 0x00000000; 770 nv->pramin[0x0808] = 0x01008043; 771 nv->pramin[0x0809] = 0x00000000; 772 nv->pramin[0x080A] = 0x00000000; 773 nv->pramin[0x080B] = 0x00000000; 774 nv->pramin[0x080C] = 0x01008044; 775 nv->pramin[0x080D] = 0x00000002; 776 nv->pramin[0x080E] = 0x00000000; 777 nv->pramin[0x080F] = 0x00000000; 778 nv->pramin[0x0810] = 0x01008019; 779 nv->pramin[0x0811] = 0x00000000; 780 nv->pramin[0x0812] = 0x00000000; 781 nv->pramin[0x0813] = 0x00000000; 782 nv->pramin[0x0814] = 0x0100A05C; 783 nv->pramin[0x0815] = 0x00000000; 784 nv->pramin[0x0816] = 0x00000000; 785 nv->pramin[0x0817] = 0x00000000; 786 nv->pramin[0x0818] = 0x0100805F; 787 nv->pramin[0x0819] = 0x00000000; 788 nv->pramin[0x081A] = 0x12001200; 789 nv->pramin[0x081B] = 0x00000000; 790 nv->pramin[0x081C] = 0x0100804A; 791 nv->pramin[0x081D] = 0x00000002; 792 nv->pramin[0x081E] = 0x00000000; 793 nv->pramin[0x081F] = 0x00000000; 794 nv->pramin[0x0820] = 0x01018077; 795 nv->pramin[0x0821] = 0x00000000; 796 nv->pramin[0x0822] = 0x01201200; 797 nv->pramin[0x0823] = 0x00000000; 798 nv->pramin[0x0824] = 0x00003002; 799 nv->pramin[0x0825] = 0x00007FFF; 800 nv->pramin[0x0826] = (vga->vmz - 128 * 1024) | 0x00000002; 801 nv->pramin[0x0827] = 0x00000002; 802 } 803 if (nv->arch < 10) { 804 if((nv->did & 0x0fff) == 0x0020) { 805 nv->pramin[0x0824] |= 0x00020000; 806 nv->pramin[0x0826] += nv->pci->mem[1].bar; 807 } 808 nv->pgraph[0x0080/4] = 0x000001FF; 809 nv->pgraph[0x0080/4] = 0x1230C000; 810 nv->pgraph[0x0084/4] = 0x72111101; 811 nv->pgraph[0x0088/4] = 0x11D5F071; 812 nv->pgraph[0x008C/4] = 0x0004FF31; 813 nv->pgraph[0x008C/4] = 0x4004FF31; 814 815 nv->pgraph[0x0140/4] = 0x00000000; 816 nv->pgraph[0x0100/4] = 0xFFFFFFFF; 817 nv->pgraph[0x0170/4] = 0x10010100; 818 nv->pgraph[0x0710/4] = 0xFFFFFFFF; 819 nv->pgraph[0x0720/4] = 0x00000001; 820 821 nv->pgraph[0x0810/4] = 0x00000000; 822 nv->pgraph[0x0608/4] = 0xFFFFFFFF; 823 } else { 824 nv->pgraph[0x0080/4] = 0xFFFFFFFF; 825 nv->pgraph[0x0080/4] = 0x00000000; 826 827 nv->pgraph[0x0140/4] = 0x00000000; 828 nv->pgraph[0x0100/4] = 0xFFFFFFFF; 829 nv->pgraph[0x0144/4] = 0x10010100; 830 nv->pgraph[0x0714/4] = 0xFFFFFFFF; 831 nv->pgraph[0x0720/4] = 0x00000001; 832 nv->pgraph[0x0710/4] &= 0x0007ff00; 833 nv->pgraph[0x0710/4] |= 0x00020100; 834 835 if (nv->arch == 10) { 836 nv->pgraph[0x0084/4] = 0x00118700; 837 nv->pgraph[0x0088/4] = 0x24E00810; 838 nv->pgraph[0x008C/4] = 0x55DE0030; 839 840 for(i = 0; i < 32; i++) 841 nv->pgraph[(0x0B00/4) + i] = nv->pfb[(0x0240/4) + i]; 842 843 nv->pgraph[0x640/4] = 0; 844 nv->pgraph[0x644/4] = 0; 845 nv->pgraph[0x684/4] = vga->vmz - 1; 846 nv->pgraph[0x688/4] = vga->vmz - 1; 847 848 nv->pgraph[0x0810/4] = 0x00000000; 849 nv->pgraph[0x0608/4] = 0xFFFFFFFF; 850 } else { 851 if (nv->arch >= 40) { 852 nv->pgraph[0x0084/4] = 0x401287c0; 853 nv->pgraph[0x008C/4] = 0x60de8051; 854 nv->pgraph[0x0090/4] = 0x00008000; 855 nv->pgraph[0x0610/4] = 0x00be3c5f; 856 857 if ((nv->did & 0xfff0) == 0x0040) { 858 nv->pgraph[0x09b0/4] = 0x83280fff; 859 nv->pgraph[0x09b4/4] = 0x000000a0; 860 } else { 861 nv->pgraph[0x0820/4] = 0x83280eff; 862 nv->pgraph[0x0824/4] = 0x000000a0; 863 } 864 865 switch(nv->did & 0xfff0) { 866 case 0x0040: 867 nv->pgraph[0x09b8/4] = 0x0078e366; 868 nv->pgraph[0x09bc/4] = 0x0000014c; 869 nv->pfb[0x033C/4] &= 0xffff7fff; 870 break; 871 case 0x00C0: 872 nv->pgraph[0x0828/4] = 0x007596ff; 873 nv->pgraph[0x082C/4] = 0x00000108; 874 break; 875 case 0x0160: 876 nv->pmc[0x1700/4] = nv->pfb[0x020C/4]; 877 nv->pmc[0x1704/4] = 0; 878 nv->pmc[0x1708/4] = 0; 879 nv->pmc[0x170C/4] = nv->pfb[0x020C/4]; 880 nv->pgraph[0x0860/4] = 0; 881 nv->pgraph[0x0864/4] = 0; 882 nv->pramdac[0x0608/4] |= 0x00100000; 883 break; 884 case 0x0140: 885 nv->pgraph[0x0828/4] = 0x0072cb77; 886 nv->pgraph[0x082C/4] = 0x00000108; 887 break; 888 default: 889 break; 890 }; 891 892 nv->pgraph[0x0b38/4] = 0x2ffff800; 893 nv->pgraph[0x0b3c/4] = 0x00006000; 894 nv->pgraph[0x032C/4] = 0x01000000; 895 nv->pgraph[0x0220/4] = 0x00001200; 896 } else if (nv->arch == 30) { 897 nv->pgraph[0x0084/4] = 0x40108700; 898 nv->pgraph[0x0890/4] = 0x00140000; 899 nv->pgraph[0x008C/4] = 0xf00e0431; 900 nv->pgraph[0x0090/4] = 0x00008000; 901 nv->pgraph[0x0610/4] = 0xf04b1f36; 902 nv->pgraph[0x0B80/4] = 0x1002d888; 903 nv->pgraph[0x0B88/4] = 0x62ff007f; 904 } else { 905 nv->pgraph[0x0084/4] = 0x00118700; 906 nv->pgraph[0x008C/4] = 0xF20E0431; 907 nv->pgraph[0x0090/4] = 0x00000000; 908 nv->pgraph[0x009C/4] = 0x00000040; 909 910 if((nv->did & 0x0ff0) >= 0x0250) { 911 nv->pgraph[0x0890/4] = 0x00080000; 912 nv->pgraph[0x0610/4] = 0x304B1FB6; 913 nv->pgraph[0x0B80/4] = 0x18B82880; 914 nv->pgraph[0x0B84/4] = 0x44000000; 915 nv->pgraph[0x0098/4] = 0x40000080; 916 nv->pgraph[0x0B88/4] = 0x000000ff; 917 } else { 918 nv->pgraph[0x0880/4] = 0x00080000; 919 nv->pgraph[0x0094/4] = 0x00000005; 920 nv->pgraph[0x0B80/4] = 0x45CAA208; 921 nv->pgraph[0x0B84/4] = 0x24000000; 922 nv->pgraph[0x0098/4] = 0x00000040; 923 nv->pgraph[0x0750/4] = 0x00E00038; 924 nv->pgraph[0x0754/4] = 0x00000030; 925 nv->pgraph[0x0750/4] = 0x00E10038; 926 nv->pgraph[0x0754/4] = 0x00000030; 927 } 928 } 929 930 for(i = 0; i < 32; i++) 931 nv->pgraph[(0x0900/4) + i] = nv->pfb[(0x0240/4) + i]; 932 933 if(nv->arch >= 40) { 934 if((nv->did & 0xfff0) == 0x0040) { 935 nv->pgraph[0x09A4/4] = nv->pfb[0x0200/4]; 936 nv->pgraph[0x09A8/4] = nv->pfb[0x0204/4]; 937 nv->pgraph[0x69A4/4] = nv->pfb[0x0200/4]; 938 nv->pgraph[0x69A8/4] = nv->pfb[0x0204/4]; 939 940 nv->pgraph[0x0820/4] = 0; 941 nv->pgraph[0x0824/4] = 0; 942 nv->pgraph[0x0864/4] = vga->vmz - 1; 943 nv->pgraph[0x0868/4] = vga->vmz - 1; 944 } else { 945 nv->pgraph[0x09F0/4] = nv->pfb[0x0200/4]; 946 nv->pgraph[0x09F4/4] = nv->pfb[0x0204/4]; 947 nv->pgraph[0x69F0/4] = nv->pfb[0x0200/4]; 948 nv->pgraph[0x69F4/4] = nv->pfb[0x0204/4]; 949 950 nv->pgraph[0x0840/4] = 0; 951 nv->pgraph[0x0844/4] = 0; 952 nv->pgraph[0x08a0/4] = vga->vmz - 1; 953 nv->pgraph[0x08a4/4] = vga->vmz - 1; 954 } 955 } else { 956 nv->pgraph[0x09A4/4] = nv->pfb[0x0200/4]; 957 nv->pgraph[0x09A8/4] = nv->pfb[0x0204/4]; 958 nv->pgraph[0x0750/4] = 0x00EA0000; 959 nv->pgraph[0x0754/4] = nv->pfb[0x0200/4]; 960 nv->pgraph[0x0750/4] = 0x00EA0004; 961 nv->pgraph[0x0754/4] = nv->pfb[0x0204/4]; 962 963 nv->pgraph[0x0820/4] = 0; 964 nv->pgraph[0x0824/4] = 0; 965 nv->pgraph[0x0864/4] = vga->vmz - 1; 966 nv->pgraph[0x0868/4] = vga->vmz - 1; 967 } 968 969 nv->pgraph[0x0B20/4] = 0x00000000; 970 nv->pgraph[0x0B04/4] = 0xFFFFFFFF; 971 } 972 } 973 974 nv->pgraph[0x053C/4] = 0; 975 nv->pgraph[0x0540/4] = 0; 976 nv->pgraph[0x0544/4] = 0x00007FFF; 977 nv->pgraph[0x0548/4] = 0x00007FFF; 978 979 nv->pfifo[0x0140] = 0x00000000; 980 nv->pfifo[0x0141] = 0x00000001; 981 nv->pfifo[0x0480] = 0x00000000; 982 nv->pfifo[0x0494] = 0x00000000; 983 if (nv->arch >= 40) 984 nv->pfifo[0x0481] = 0x00010000; 985 else 986 nv->pfifo[0x0481] = 0x00000100; 987 nv->pfifo[0x0490] = 0x00000000; 988 nv->pfifo[0x0491] = 0x00000000; 989 if (nv->arch >= 40) 990 nv->pfifo[0x048B] = 0x00001213; 991 else 992 nv->pfifo[0x048B] = 0x00001209; 993 nv->pfifo[0x0400] = 0x00000000; 994 nv->pfifo[0x0414] = 0x00000000; 995 nv->pfifo[0x0084] = 0x03000100; 996 nv->pfifo[0x0085] = 0x00000110; 997 nv->pfifo[0x0086] = 0x00000112; 998 nv->pfifo[0x0143] = 0x0000FFFF; 999 nv->pfifo[0x0496] = 0x0000FFFF; 1000 nv->pfifo[0x0050] = 0x00000000; 1001 nv->pfifo[0x0040] = 0xFFFFFFFF; 1002 nv->pfifo[0x0415] = 0x00000001; 1003 nv->pfifo[0x048C] = 0x00000000; 1004 nv->pfifo[0x04A0] = 0x00000000; 1005 nv->pfifo[0x0489] = 0x000F0078; 1006 nv->pfifo[0x0488] = 0x00000001; 1007 nv->pfifo[0x0480] = 0x00000001; 1008 nv->pfifo[0x0494] = 0x00000001; 1009 nv->pfifo[0x0495] = 0x00000001; 1010 nv->pfifo[0x0140] = 0x00000001; 1011 1012 if (nv->arch >= 10) { 1013 if (nv->twoheads) { 1014 nv->pcrtc[0x0860/4] = nv->head; 1015 nv->pcrtc[0x2860/4] = nv->head2; 1016 } 1017 nv->pramdac[0x0404/4] |= (1 << 25); 1018 1019 nv->pmc[0x8704/4] = 1; 1020 nv->pmc[0x8140/4] = 0; 1021 nv->pmc[0x8920/4] = 0; 1022 nv->pmc[0x8924/4] = 0; 1023 nv->pmc[0x8908/4] = vga->vmz - 1; 1024 nv->pmc[0x890C/4] = vga->vmz - 1; 1025 nv->pmc[0x1588/4] = 0; 1026 1027 nv->pcrtc[0x0810/4] = nv->cursorconfig; 1028 nv->pcrtc[0x0830/4] = nv->displayV - 3; 1029 nv->pcrtc[0x0834/4] = nv->displayV - 1; 1030 1031 if (nv->islcd) { 1032 if((nv->did & 0x0ff0) == 0x0110) 1033 nv->pramdac[0x0528/4] = nv->dither; 1034 else if (nv->twoheads) 1035 nv->pramdac[0x083C/4] = nv->dither; 1036 vgaxo(Crtx, 0x53, nv->timingH); 1037 vgaxo(Crtx, 0x54, nv->timingV); 1038 vgaxo(Crtx, 0x21, 0xFA); 1039 } 1040 vgaxo(Crtx, 0x41, nv->extra); 1041 } 1042 1043 vgaxo(Crtx, 0x19, nv->repaint0); 1044 vgaxo(Crtx, 0x1A, nv->repaint1); 1045 vgaxo(Crtx, 0x25, nv->screen); 1046 vgaxo(Crtx, 0x28, nv->pixel); 1047 vgaxo(Crtx, 0x2D, nv->horiz); 1048 vgaxo(Crtx, 0x30, nv->cursor0); 1049 vgaxo(Crtx, 0x31, nv->cursor1); 1050 vgaxo(Crtx, 0x2F, nv->cursor2); 1051 vgaxo(Crtx, 0x39, nv->interlace); 1052 1053 if (nv->islcd) { 1054 nv->pramdac[0x00000848/4] = nv->scale; 1055 nv->pramdac[0x00000828/4] = nv->crtcsync; 1056 } else { 1057 nv->pramdac[0x0000050C/4] = nv->pllsel; 1058 nv->pramdac[0x00000508/4] = nv->vpll; 1059 if (nv->twoheads) 1060 nv->pramdac[0x00000520/4] = nv->vpll2; 1061 if (nv->twostagepll) { 1062 nv->pramdac[0x00000578/4] = nv->vpllB; 1063 nv->pramdac[0x0000057C/4] = nv->vpll2B; 1064 } 1065 } 1066 nv->pramdac[0x00000600/4] = nv->general; 1067 1068 nv->pcrtc[0x0140/4] = 0; 1069 nv->pcrtc[0x0100/4] = 1; 1070 1071 ctlr->flag |= Fload; 1072 } 1073 1074 1075 static void 1076 dump(Vga* vga, Ctlr* ctlr) 1077 { 1078 Nvidia *nv; 1079 int m, n, p, f; 1080 double trouble; 1081 1082 if((nv = vga->private) == 0) 1083 return; 1084 1085 p = (nv->vpll >> 16); 1086 n = (nv->vpll >> 8) & 0xFF; 1087 m = nv->vpll & 0xFF; 1088 trouble = nv->crystalfreq; 1089 trouble = trouble * n / (m<<p); 1090 f = trouble+0.5; 1091 printitem(ctlr->name, "dclk m n p"); 1092 Bprint(&stdout, " %d %d - %d %d\n", f, m, n, p); 1093 printitem(ctlr->name, "CrystalFreq"); 1094 Bprint(&stdout, " %d Hz\n", nv->crystalfreq); 1095 printitem(ctlr->name, "arch"); 1096 Bprint(&stdout, " %d\n", nv->arch); 1097 printitem(ctlr->name, "did"); 1098 Bprint(&stdout, " %.4ux\n", nv->did); 1099 printitem(ctlr->name, "repaint0"); 1100 Bprint(&stdout, " %ux\n", nv->repaint0); 1101 printitem(ctlr->name, "repaint1"); 1102 Bprint(&stdout, " %ux\n", nv->repaint1); 1103 printitem(ctlr->name, "screen"); 1104 Bprint(&stdout, " %ux\n", nv->screen); 1105 printitem(ctlr->name, "pixel"); 1106 Bprint(&stdout, " %ux\n", nv->pixel); 1107 printitem(ctlr->name, "horiz"); 1108 Bprint(&stdout, " %ux\n", nv->horiz); 1109 printitem(ctlr->name, "cursor0"); 1110 Bprint(&stdout, " %ux\n", nv->cursor0); 1111 printitem(ctlr->name, "cursor1"); 1112 Bprint(&stdout, " %ux\n", nv->cursor1); 1113 printitem(ctlr->name, "cursor2"); 1114 Bprint(&stdout, " %ux\n", nv->cursor2); 1115 printitem(ctlr->name, "interlace"); 1116 Bprint(&stdout, " %ux\n", nv->interlace); 1117 printitem(ctlr->name, "extra"); 1118 Bprint(&stdout, " %ux\n", nv->extra); 1119 printitem(ctlr->name, "crtcowner"); 1120 Bprint(&stdout, " %ux\n", nv->crtcowner); 1121 printitem(ctlr->name, "timingH"); 1122 Bprint(&stdout, " %ux\n", nv->timingH); 1123 printitem(ctlr->name, "timingV"); 1124 Bprint(&stdout, " %ux\n", nv->timingV); 1125 printitem(ctlr->name, "vpll"); 1126 Bprint(&stdout, " %lux\n", nv->vpll); 1127 printitem(ctlr->name, "vpllB"); 1128 Bprint(&stdout, " %lux\n", nv->vpllB); 1129 printitem(ctlr->name, "vpll2"); 1130 Bprint(&stdout, " %lux\n", nv->vpll2); 1131 printitem(ctlr->name, "vpll2B"); 1132 Bprint(&stdout, " %lux\n", nv->vpll2B); 1133 printitem(ctlr->name, "pllsel"); 1134 Bprint(&stdout, " %lux\n", nv->pllsel); 1135 printitem(ctlr->name, "general"); 1136 Bprint(&stdout, " %lux\n", nv->general); 1137 printitem(ctlr->name, "scale"); 1138 Bprint(&stdout, " %lux\n", nv->scale); 1139 printitem(ctlr->name, "config"); 1140 Bprint(&stdout, " %lux\n", nv->config); 1141 printitem(ctlr->name, "head"); 1142 Bprint(&stdout, " %lux\n", nv->head); 1143 printitem(ctlr->name, "head2"); 1144 Bprint(&stdout, " %lux\n", nv->head2); 1145 printitem(ctlr->name, "cursorconfig"); 1146 Bprint(&stdout, " %lux\n", nv->cursorconfig); 1147 printitem(ctlr->name, "dither"); 1148 Bprint(&stdout, " %lux\n", nv->dither); 1149 printitem(ctlr->name, "crtcsync"); 1150 Bprint(&stdout, " %lux\n", nv->crtcsync); 1151 printitem(ctlr->name, "islcd"); 1152 Bprint(&stdout, " %d\n", nv->islcd); 1153 printitem(ctlr->name, "twoheads"); 1154 Bprint(&stdout, " %d\n", nv->twoheads); 1155 printitem(ctlr->name, "twostagepll"); 1156 Bprint(&stdout, " %d\n", nv->twostagepll); 1157 printitem(ctlr->name, "crtcnumber"); 1158 Bprint(&stdout, " %d\n", nv->crtcnumber); 1159 1160 printitem(ctlr->name, "fpwidth"); 1161 Bprint(&stdout, " %d\n", nv->fpwidth); 1162 printitem(ctlr->name, "fpheight"); 1163 Bprint(&stdout, " %d\n", nv->fpheight); 1164 1165 } 1166 1167 1168 Ctlr nvidia = { 1169 "nvidia", /* name */ 1170 snarf, /* snarf */ 1171 options, /* options */ 1172 init, /* init */ 1173 load, /* load */ 1174 dump, /* dump */ 1175 }; 1176 1177 Ctlr nvidiahwgc = { 1178 "nvidiahwgc", /* name */ 1179 0, /* snarf */ 1180 0, /* options */ 1181 0, /* init */ 1182 0, /* load */ 1183 0, /* dump */ 1184 }; 1185