1 /* 2 * mips definition 3 */ 4 #include <u.h> 5 #include <bio.h> 6 #include "/mips/include/ureg.h" 7 #include <mach.h> 8 9 10 #define USER_REG(x) (0x1000-4-0xA0+(ulong)(x)) 11 #define FP_REG(x) (0x0000+4+(x)) 12 #define SCALLOFF (0x0000+4+132) 13 14 #define REGOFF(x) (USER_REG(&((struct Ureg *) 0)->x)) 15 16 #define SP REGOFF(sp) 17 #define PC REGOFF(pc) 18 #define R1 REGOFF(r1) 19 #define R31 REGOFF(r31) 20 21 #define MINREG 1 22 #define MAXREG 64 23 24 Reglist mipsreglist[] = { 25 {"STATUS", REGOFF(status), RINT|RRDONLY, 'X'}, 26 {"CAUSE", REGOFF(cause), RINT|RRDONLY, 'X'}, 27 {"BADVADDR", REGOFF(badvaddr), RINT|RRDONLY, 'X'}, 28 {"TLBVIRT", REGOFF(tlbvirt), RINT|RRDONLY, 'X'}, 29 {"HI", REGOFF(hi), RINT|RRDONLY, 'X'}, 30 {"LO", REGOFF(lo), RINT|RRDONLY, 'X'}, 31 #define FW 5 /* first register we may write */ 32 {"PC", PC, RINT, 'X'}, 33 {"SP", SP, RINT, 'X'}, 34 {"R31", R31, RINT, 'X'}, 35 {"R30", REGOFF(r30), RINT, 'X'}, 36 {"R28", REGOFF(r28), RINT, 'X'}, 37 {"R27", REGOFF(r27), RINT, 'X'}, 38 {"R26", REGOFF(r26), RINT, 'X'}, 39 {"R25", REGOFF(r25), RINT, 'X'}, 40 {"R24", REGOFF(r24), RINT, 'X'}, 41 {"R23", REGOFF(r23), RINT, 'X'}, 42 {"R22", REGOFF(r22), RINT, 'X'}, 43 {"R21", REGOFF(r21), RINT, 'X'}, 44 {"R20", REGOFF(r20), RINT, 'X'}, 45 {"R19", REGOFF(r19), RINT, 'X'}, 46 {"R18", REGOFF(r18), RINT, 'X'}, 47 {"R17", REGOFF(r17), RINT, 'X'}, 48 {"R16", REGOFF(r16), RINT, 'X'}, 49 {"R15", REGOFF(r15), RINT, 'X'}, 50 {"R14", REGOFF(r14), RINT, 'X'}, 51 {"R13", REGOFF(r13), RINT, 'X'}, 52 {"R12", REGOFF(r12), RINT, 'X'}, 53 {"R11", REGOFF(r11), RINT, 'X'}, 54 {"R10", REGOFF(r10), RINT, 'X'}, 55 {"R9", REGOFF(r9), RINT, 'X'}, 56 {"R8", REGOFF(r8), RINT, 'X'}, 57 {"R7", REGOFF(r7), RINT, 'X'}, 58 {"R6", REGOFF(r6), RINT, 'X'}, 59 {"R5", REGOFF(r5), RINT, 'X'}, 60 {"R4", REGOFF(r4), RINT, 'X'}, 61 {"R3", REGOFF(r3), RINT, 'X'}, 62 {"R2", REGOFF(r2), RINT, 'X'}, 63 {"R1", REGOFF(r1), RINT, 'X'}, 64 {"F0", FP_REG(0x00), RFLT, 'F'}, 65 {"F1", FP_REG(0x04), RFLT, 'f'}, 66 {"F2", FP_REG(0x08), RFLT, 'F'}, 67 {"F3", FP_REG(0x0C), RFLT, 'f'}, 68 {"F4", FP_REG(0x10), RFLT, 'F'}, 69 {"F5", FP_REG(0x14), RFLT, 'f'}, 70 {"F6", FP_REG(0x18), RFLT, 'F'}, 71 {"F7", FP_REG(0x1C), RFLT, 'f'}, 72 {"F8", FP_REG(0x20), RFLT, 'F'}, 73 {"F9", FP_REG(0x24), RFLT, 'f'}, 74 {"F10", FP_REG(0x28), RFLT, 'F'}, 75 {"F11", FP_REG(0x2C), RFLT, 'f'}, 76 {"F12", FP_REG(0x30), RFLT, 'F'}, 77 {"F13", FP_REG(0x34), RFLT, 'f'}, 78 {"F14", FP_REG(0x38), RFLT, 'F'}, 79 {"F15", FP_REG(0x3C), RFLT, 'f'}, 80 {"F16", FP_REG(0x40), RFLT, 'F'}, 81 {"F17", FP_REG(0x44), RFLT, 'f'}, 82 {"F18", FP_REG(0x48), RFLT, 'F'}, 83 {"F19", FP_REG(0x4C), RFLT, 'f'}, 84 {"F20", FP_REG(0x50), RFLT, 'F'}, 85 {"F21", FP_REG(0x54), RFLT, 'f'}, 86 {"F22", FP_REG(0x58), RFLT, 'F'}, 87 {"F23", FP_REG(0x5C), RFLT, 'f'}, 88 {"F24", FP_REG(0x60), RFLT, 'F'}, 89 {"F25", FP_REG(0x64), RFLT, 'f'}, 90 {"F26", FP_REG(0x68), RFLT, 'F'}, 91 {"F27", FP_REG(0x6C), RFLT, 'f'}, 92 {"F28", FP_REG(0x70), RFLT, 'F'}, 93 {"F29", FP_REG(0x74), RFLT, 'f'}, 94 {"F30", FP_REG(0x78), RFLT, 'F'}, 95 {"F31", FP_REG(0x7C), RFLT, 'f'}, 96 {"FPCR", FP_REG(0x80), RFLT, 'X'}, 97 { 0 } 98 }; 99 100 /* the machine description */ 101 Mach mmips = 102 { 103 "mips", 104 MMIPS, /* machine type */ 105 mipsreglist, /* register set */ 106 MINREG, /* minimum register */ 107 MAXREG, /* maximum register */ 108 "PC", 109 "SP", 110 "R31", 111 R1, /* return reg */ 112 0x1000, /* page size */ 113 0xC0000000, /* kernel base */ 114 0x40000000, /* kernel text mask */ 115 0, /* offset of ksp in /proc/proc */ 116 0, /* correction to ksp value */ 117 4, /* offset of kpc in /proc/proc */ 118 0, /* correction to kpc value */ 119 SCALLOFF, /* offset to sys call # in ublk */ 120 4, /* quantization of pc */ 121 "setR30", /* static base register name */ 122 0, /* value */ 123 4, /* szaddr */ 124 4, /* szreg */ 125 4, /* szfloat */ 126 8, /* szdouble */ 127 }; 128