1 #include "l.h" 2 3 #define X 99 4 5 Optab optab[] = 6 { 7 { ATEXT, C_LEXT, C_NONE, C_LCON, 0, 0, 0 }, 8 { ATEXT, C_LEXT, C_REG, C_LCON, 0, 0, 0 }, 9 10 { AMOVW, C_REG, C_NONE, C_REG, 14, 8, 0 }, 11 { AMOVV, C_REG, C_NONE, C_REG, 1, 4, 0 }, 12 { AMOVB, C_REG, C_NONE, C_REG, 12, 8, 0 }, 13 { AMOVBU, C_REG, C_NONE, C_REG, 13, 4, 0 }, 14 { AMOVWU, C_REG, C_NONE, C_REG, 14, 8, 0 }, 15 16 { ASUB, C_REG, C_REG, C_REG, 2, 4, 0 }, 17 { AADD, C_REG, C_REG, C_REG, 2, 4, 0 }, 18 { AAND, C_REG, C_REG, C_REG, 2, 4, 0 }, 19 { ASUB, C_REG, C_NONE, C_REG, 2, 4, 0 }, 20 { AADD, C_REG, C_NONE, C_REG, 2, 4, 0 }, 21 { AAND, C_REG, C_NONE, C_REG, 2, 4, 0 }, 22 23 { ASLL, C_REG, C_NONE, C_REG, 9, 4, 0 }, 24 { ASLL, C_REG, C_REG, C_REG, 9, 4, 0 }, 25 26 { AADDF, C_FREG, C_NONE, C_FREG, 32, 4, 0 }, 27 { AADDF, C_FREG, C_REG, C_FREG, 32, 4, 0 }, 28 { ACMPEQF, C_FREG, C_REG, C_NONE, 32, 4, 0 }, 29 { AABSF, C_FREG, C_NONE, C_FREG, 33, 4, 0 }, 30 { AMOVF, C_FREG, C_NONE, C_FREG, 33, 4, 0 }, 31 { AMOVD, C_FREG, C_NONE, C_FREG, 33, 4, 0 }, 32 33 { AMOVW, C_REG, C_NONE, C_SEXT, 7, 4, REGSB }, 34 { AMOVV, C_REG, C_NONE, C_SEXT, 7, 4, REGSB }, 35 { AMOVB, C_REG, C_NONE, C_SEXT, 7, 4, REGSB }, 36 { AMOVBU, C_REG, C_NONE, C_SEXT, 7, 4, REGSB }, 37 { AMOVWL, C_REG, C_NONE, C_SEXT, 7, 4, REGSB }, 38 { AMOVW, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP }, 39 { AMOVV, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP }, 40 { AMOVB, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP }, 41 { AMOVBU, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP }, 42 { AMOVWL, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP }, 43 { AMOVW, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO }, 44 { AMOVV, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO }, 45 { AMOVB, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO }, 46 { AMOVBU, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO }, 47 { AMOVWL, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO }, 48 49 { AMOVW, C_SEXT, C_NONE, C_REG, 8, 4, REGSB }, 50 { AMOVV, C_SEXT, C_NONE, C_REG, 8, 4, REGSB }, 51 { AMOVB, C_SEXT, C_NONE, C_REG, 8, 4, REGSB }, 52 { AMOVBU, C_SEXT, C_NONE, C_REG, 8, 4, REGSB }, 53 { AMOVWL, C_SEXT, C_NONE, C_REG, 8, 4, REGSB }, 54 { AMOVW, C_SAUTO,C_NONE, C_REG, 8, 4, REGSP }, 55 { AMOVV, C_SAUTO,C_NONE, C_REG, 8, 4, REGSP }, 56 { AMOVB, C_SAUTO,C_NONE, C_REG, 8, 4, REGSP }, 57 { AMOVBU, C_SAUTO,C_NONE, C_REG, 8, 4, REGSP }, 58 { AMOVWL, C_SAUTO,C_NONE, C_REG, 8, 4, REGSP }, 59 { AMOVW, C_SOREG,C_NONE, C_REG, 8, 4, REGZERO }, 60 { AMOVV, C_SOREG,C_NONE, C_REG, 8, 4, REGZERO }, 61 { AMOVB, C_SOREG,C_NONE, C_REG, 8, 4, REGZERO }, 62 { AMOVBU, C_SOREG,C_NONE, C_REG, 8, 4, REGZERO }, 63 { AMOVWL, C_SOREG,C_NONE, C_REG, 8, 4, REGZERO }, 64 65 { AMOVW, C_REG, C_NONE, C_LEXT, 35, 16, REGSB }, 66 { AMOVV, C_REG, C_NONE, C_LEXT, 35, 16, REGSB }, 67 { AMOVB, C_REG, C_NONE, C_LEXT, 35, 16, REGSB }, 68 { AMOVBU, C_REG, C_NONE, C_LEXT, 35, 16, REGSB }, 69 { AMOVW, C_REG, C_NONE, C_LAUTO, 35, 16, REGSP }, 70 { AMOVV, C_REG, C_NONE, C_LAUTO, 35, 16, REGSP }, 71 { AMOVB, C_REG, C_NONE, C_LAUTO, 35, 16, REGSP }, 72 { AMOVBU, C_REG, C_NONE, C_LAUTO, 35, 16, REGSP }, 73 { AMOVW, C_REG, C_NONE, C_LOREG, 35, 16, REGZERO }, 74 { AMOVV, C_REG, C_NONE, C_LOREG, 35, 16, REGZERO }, 75 { AMOVB, C_REG, C_NONE, C_LOREG, 35, 16, REGZERO }, 76 { AMOVBU, C_REG, C_NONE, C_LOREG, 35, 16, REGZERO }, 77 78 { AMOVW, C_LEXT, C_NONE, C_REG, 36, 16, REGSB }, 79 { AMOVV, C_LEXT, C_NONE, C_REG, 36, 16, REGSB }, 80 { AMOVB, C_LEXT, C_NONE, C_REG, 36, 16, REGSB }, 81 { AMOVBU, C_LEXT, C_NONE, C_REG, 36, 16, REGSB }, 82 { AMOVW, C_LAUTO,C_NONE, C_REG, 36, 16, REGSP }, 83 { AMOVV, C_LAUTO,C_NONE, C_REG, 36, 16, REGSP }, 84 { AMOVB, C_LAUTO,C_NONE, C_REG, 36, 16, REGSP }, 85 { AMOVBU, C_LAUTO,C_NONE, C_REG, 36, 16, REGSP }, 86 { AMOVW, C_LOREG,C_NONE, C_REG, 36, 16, REGZERO }, 87 { AMOVV, C_LOREG,C_NONE, C_REG, 36, 16, REGZERO }, 88 { AMOVB, C_LOREG,C_NONE, C_REG, 36, 16, REGZERO }, 89 { AMOVBU, C_LOREG,C_NONE, C_REG, 36, 16, REGZERO }, 90 91 { AMOVW, C_SECON,C_NONE, C_REG, 3, 4, REGSB }, 92 { AMOVV, C_SECON,C_NONE, C_REG, 3, 4, REGSB }, 93 { AMOVW, C_SACON,C_NONE, C_REG, 3, 4, REGSP }, 94 { AMOVV, C_SACON,C_NONE, C_REG, 3, 4, REGSP }, 95 { AMOVW, C_LECON,C_NONE, C_REG, 26, 12, REGSB }, 96 { AMOVV, C_LECON,C_NONE, C_REG, 26, 12, REGSB }, 97 { AMOVW, C_LACON,C_NONE, C_REG, 26, 12, REGSP }, 98 { AMOVV, C_LACON,C_NONE, C_REG, 26, 12, REGSP }, 99 { AMOVW, C_ADDCON,C_NONE,C_REG, 3, 4, REGZERO }, 100 { AMOVV, C_ADDCON,C_NONE,C_REG, 3, 4, REGZERO }, 101 { AMOVW, C_ANDCON,C_NONE,C_REG, 3, 4, REGZERO }, 102 { AMOVV, C_ANDCON,C_NONE,C_REG, 3, 4, REGZERO }, 103 104 { AMOVW, C_UCON, C_NONE, C_REG, 24, 4, 0 }, 105 { AMOVV, C_UCON, C_NONE, C_REG, 24, 4, 0 }, 106 { AMOVW, C_LCON, C_NONE, C_REG, 19, 8, 0 }, 107 { AMOVV, C_LCON, C_NONE, C_REG, 19, 8, 0 }, 108 109 { AMOVW, C_HI, C_NONE, C_REG, 20, 4, 0 }, 110 { AMOVV, C_HI, C_NONE, C_REG, 20, 4, 0 }, 111 { AMOVW, C_LO, C_NONE, C_REG, 20, 4, 0 }, 112 { AMOVV, C_LO, C_NONE, C_REG, 20, 4, 0 }, 113 { AMOVW, C_REG, C_NONE, C_HI, 21, 4, 0 }, 114 { AMOVV, C_REG, C_NONE, C_HI, 21, 4, 0 }, 115 { AMOVW, C_REG, C_NONE, C_LO, 21, 4, 0 }, 116 { AMOVV, C_REG, C_NONE, C_LO, 21, 4, 0 }, 117 118 { AMUL, C_REG, C_REG, C_NONE, 22, 4, 0 }, 119 120 { AADD, C_ADD0CON,C_REG,C_REG, 4, 4, 0 }, 121 { AADD, C_ADD0CON,C_NONE,C_REG, 4, 4, 0 }, 122 { AADD, C_ANDCON,C_REG, C_REG, 10, 8, 0 }, 123 { AADD, C_ANDCON,C_NONE,C_REG, 10, 8, 0 }, 124 125 { AAND, C_AND0CON,C_REG,C_REG, 4, 4, 0 }, 126 { AAND, C_AND0CON,C_NONE,C_REG, 4, 4, 0 }, 127 { AAND, C_ADDCON,C_REG, C_REG, 10, 8, 0 }, 128 { AAND, C_ADDCON,C_NONE,C_REG, 10, 8, 0 }, 129 130 { AADD, C_UCON, C_REG, C_REG, 25, 8, 0 }, 131 { AADD, C_UCON, C_NONE, C_REG, 25, 8, 0 }, 132 { AAND, C_UCON, C_REG, C_REG, 25, 8, 0 }, 133 { AAND, C_UCON, C_NONE, C_REG, 25, 8, 0 }, 134 135 { AADD, C_LCON, C_NONE, C_REG, 23, 12, 0 }, 136 { AAND, C_LCON, C_NONE, C_REG, 23, 12, 0 }, 137 { AADD, C_LCON, C_REG, C_REG, 23, 12, 0 }, 138 { AAND, C_LCON, C_REG, C_REG, 23, 12, 0 }, 139 140 { ASLL, C_SCON, C_REG, C_REG, 16, 4, 0 }, 141 { ASLL, C_SCON, C_NONE, C_REG, 16, 4, 0 }, 142 143 { ASYSCALL, C_NONE, C_NONE, C_NONE, 5, 4, 0 }, 144 145 { ABEQ, C_REG, C_REG, C_SBRA, 6, 4, 0 }, 146 { ABEQ, C_REG, C_NONE, C_SBRA, 6, 4, 0 }, 147 { ABLEZ, C_REG, C_NONE, C_SBRA, 6, 4, 0 }, 148 { ABFPT, C_NONE, C_NONE, C_SBRA, 6, 4, 0 }, 149 150 { AJMP, C_NONE, C_NONE, C_LBRA, 11, 4, 0 }, 151 { AJAL, C_NONE, C_NONE, C_LBRA, 11, 4, 0 }, 152 153 { AJMP, C_NONE, C_NONE, C_ZOREG, 18, 4, REGZERO }, 154 { AJAL, C_NONE, C_NONE, C_ZOREG, 18, 4, REGLINK }, 155 156 { AMOVW, C_SEXT, C_NONE, C_FREG, 27, 4, REGSB }, 157 { AMOVF, C_SEXT, C_NONE, C_FREG, 27, 4, REGSB }, 158 { AMOVD, C_SEXT, C_NONE, C_FREG, 27, 4, REGSB }, 159 { AMOVW, C_SAUTO,C_NONE, C_FREG, 27, 4, REGSP }, 160 { AMOVF, C_SAUTO,C_NONE, C_FREG, 27, 4, REGSP }, 161 { AMOVD, C_SAUTO,C_NONE, C_FREG, 27, 4, REGSP }, 162 { AMOVW, C_SOREG,C_NONE, C_FREG, 27, 4, REGZERO }, 163 { AMOVF, C_SOREG,C_NONE, C_FREG, 27, 4, REGZERO }, 164 { AMOVD, C_SOREG,C_NONE, C_FREG, 27, 4, REGZERO }, 165 166 { AMOVW, C_LEXT, C_NONE, C_FREG, 27, 16, REGSB }, 167 { AMOVF, C_LEXT, C_NONE, C_FREG, 27, 16, REGSB }, 168 { AMOVD, C_LEXT, C_NONE, C_FREG, 27, 16, REGSB }, 169 { AMOVW, C_LAUTO,C_NONE, C_FREG, 27, 16, REGSP }, 170 { AMOVF, C_LAUTO,C_NONE, C_FREG, 27, 16, REGSP }, 171 { AMOVD, C_LAUTO,C_NONE, C_FREG, 27, 16, REGSP }, 172 { AMOVW, C_LOREG,C_NONE, C_FREG, 27, 16, REGZERO }, 173 { AMOVF, C_LOREG,C_NONE, C_FREG, 27, 16, REGZERO }, 174 { AMOVD, C_LOREG,C_NONE, C_FREG, 27, 16, REGZERO }, 175 176 { AMOVW, C_FREG, C_NONE, C_SEXT, 28, 4, REGSB }, 177 { AMOVF, C_FREG, C_NONE, C_SEXT, 28, 4, REGSB }, 178 { AMOVD, C_FREG, C_NONE, C_SEXT, 28, 4, REGSB }, 179 { AMOVW, C_FREG, C_NONE, C_SAUTO, 28, 4, REGSP }, 180 { AMOVF, C_FREG, C_NONE, C_SAUTO, 28, 4, REGSP }, 181 { AMOVD, C_FREG, C_NONE, C_SAUTO, 28, 4, REGSP }, 182 { AMOVW, C_FREG, C_NONE, C_SOREG, 28, 4, REGZERO }, 183 { AMOVF, C_FREG, C_NONE, C_SOREG, 28, 4, REGZERO }, 184 { AMOVD, C_FREG, C_NONE, C_SOREG, 28, 4, REGZERO }, 185 186 { AMOVW, C_FREG, C_NONE, C_LEXT, 28, 16, REGSB }, 187 { AMOVF, C_FREG, C_NONE, C_LEXT, 28, 16, REGSB }, 188 { AMOVD, C_FREG, C_NONE, C_LEXT, 28, 16, REGSB }, 189 { AMOVW, C_FREG, C_NONE, C_LAUTO, 28, 16, REGSP }, 190 { AMOVF, C_FREG, C_NONE, C_LAUTO, 28, 16, REGSP }, 191 { AMOVD, C_FREG, C_NONE, C_LAUTO, 28, 16, REGSP }, 192 { AMOVW, C_FREG, C_NONE, C_LOREG, 28, 16, REGZERO }, 193 { AMOVF, C_FREG, C_NONE, C_LOREG, 28, 16, REGZERO }, 194 { AMOVD, C_FREG, C_NONE, C_LOREG, 28, 16, REGZERO }, 195 196 { AMOVW, C_REG, C_NONE, C_FREG, 30, 4, 0 }, 197 { AMOVW, C_FREG, C_NONE, C_REG, 31, 4, 0 }, 198 { AMOVV, C_REG, C_NONE, C_FREG, 47, 4, 0 }, 199 { AMOVV, C_FREG, C_NONE, C_REG, 48, 4, 0 }, 200 201 { AMOVW, C_ADDCON,C_NONE,C_FREG, 34, 8, 0 }, 202 { AMOVW, C_ANDCON,C_NONE,C_FREG, 34, 8, 0 }, 203 { AMOVW, C_UCON, C_NONE, C_FREG, 35, 8, 0 }, 204 { AMOVW, C_LCON, C_NONE, C_FREG, 36, 12, 0 }, 205 206 { AMOVW, C_REG, C_NONE, C_MREG, 37, 4, 0 }, 207 { AMOVV, C_REG, C_NONE, C_MREG, 37, 4, 0 }, 208 { AMOVW, C_MREG, C_NONE, C_REG, 38, 4, 0 }, 209 { AMOVV, C_MREG, C_NONE, C_REG, 38, 4, 0 }, 210 211 { ARFE, C_NONE, C_NONE, C_ZOREG, 39, 8, 0 }, 212 { AWORD, C_NONE, C_NONE, C_LCON, 40, 4, 0 }, 213 214 { AMOVW, C_REG, C_NONE, C_FCREG, 41, 8, 0 }, 215 { AMOVV, C_REG, C_NONE, C_FCREG, 41, 8, 0 }, 216 { AMOVW, C_FCREG,C_NONE, C_REG, 42, 4, 0 }, 217 { AMOVV, C_FCREG,C_NONE, C_REG, 42, 4, 0 }, 218 219 { ABREAK, C_REG, C_NONE, C_SEXT, 7, 4, REGSB }, /* really CACHE instruction */ 220 { ABREAK, C_REG, C_NONE, C_SAUTO, 7, 4, REGSP }, 221 { ABREAK, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO }, 222 { ABREAK, C_NONE, C_NONE, C_NONE, 5, 4, 0 }, 223 224 { ACASE, C_REG, C_NONE, C_NONE, 45, 28, 0 }, 225 { ABCASE, C_LCON, C_NONE, C_LBRA, 46, 4, 0 }, 226 227 { AXXX, C_NONE, C_NONE, C_NONE, 0, 4, 0 }, 228 }; 229