xref: /plan9-contrib/sys/man/2/ainc (revision 424ff5fba102a9afd75c96acb80f750c1c923dbf)
AINC 2
NAME
ainc, adec, cas32, cas, casp, casl, cas64, mfence - atomic operations
SYNOPSIS
#include <u.h>

#include <libc.h>

 int ainc(long *p)

int adec(long *p)

int cas(uint *p, int ov, int nv)

int casp(void **p, void *ov, void *nv)

int casl(ulong *p, ulong ov, ulong nv)

int cas32(u32int *p, u32int ov, u32int nv)

int cas64(u64int *p, u64int ov, u64int nv)

void mfence(void)

DESCRIPTION
These functions provide access to atomic operations, useful for synchronization.

Ainc and adec atomically increment and decrement (respectively) the integer pointed to by p , and return the resulting value after the operation. On architectures with a weak memory model, both operations are implemented with a barrier to memory reordering. In other words, all loads and stores which precede the increment / decrement in program order will be observed before it, and the increment / decrement will be observed before any loads and stores which follow it in program order.

Cas performs a compare and swap on the word pointed to by p , provided that the value is still ov (the old value), so that the new value is nv . Functions cas32 , cas64 , casp , and casul do the same for 32-bit values, 64-bit values, pointers, and unsigned long integers.

Mfence sets a memory fence so that all outstanding memory operations are performed before returning from it.

SOURCE
/sys/src/libc/386/atom.s

/sys/src/libc/amd64/atom.s

SEE ALSO
incref (2).
BUGS
Some of them may not be implemented for some architectures.