1 /* $OpenBSD: uhci.c,v 1.132 2014/10/30 23:50:25 mpi Exp $ */ 2 /* $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/malloc.h> 39 #include <sys/device.h> 40 #include <sys/queue.h> 41 #include <sys/timeout.h> 42 #include <sys/pool.h> 43 44 #include <machine/bus.h> 45 #include <machine/endian.h> 46 47 #include <dev/usb/usb.h> 48 #include <dev/usb/usbdi.h> 49 #include <dev/usb/usbdivar.h> 50 #include <dev/usb/usb_mem.h> 51 52 #include <dev/usb/uhcireg.h> 53 #include <dev/usb/uhcivar.h> 54 55 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 56 /*#define UHCI_CTL_LOOP */ 57 58 struct cfdriver uhci_cd = { 59 NULL, "uhci", DV_DULL 60 }; 61 62 #ifdef UHCI_DEBUG 63 struct uhci_softc *thesc; 64 #define DPRINTF(x) if (uhcidebug) printf x 65 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 66 int uhcidebug = 0; 67 int uhcinoloop = 0; 68 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 69 #else 70 #define DPRINTF(x) 71 #define DPRINTFN(n,x) 72 #endif 73 74 struct pool *uhcixfer; 75 76 struct uhci_pipe { 77 struct usbd_pipe pipe; 78 int nexttoggle; 79 80 union { 81 /* Control pipe */ 82 struct { 83 struct uhci_soft_qh *sqh; 84 struct usb_dma reqdma; 85 struct uhci_soft_td *setup, *stat; 86 u_int length; 87 } ctl; 88 /* Interrupt pipe */ 89 struct { 90 int npoll; 91 int isread; 92 struct uhci_soft_qh **qhs; 93 } intr; 94 /* Bulk pipe */ 95 struct { 96 struct uhci_soft_qh *sqh; 97 u_int length; 98 int isread; 99 } bulk; 100 /* Iso pipe */ 101 struct iso { 102 struct uhci_soft_td **stds; 103 int next, inuse; 104 } iso; 105 } u; 106 }; 107 108 void uhci_globalreset(struct uhci_softc *); 109 usbd_status uhci_portreset(struct uhci_softc *, int); 110 void uhci_reset(struct uhci_softc *); 111 usbd_status uhci_run(struct uhci_softc *, int run); 112 struct uhci_soft_td *uhci_alloc_std(struct uhci_softc *); 113 void uhci_free_std(struct uhci_softc *, struct uhci_soft_td *); 114 struct uhci_soft_qh *uhci_alloc_sqh(struct uhci_softc *); 115 void uhci_free_sqh(struct uhci_softc *, struct uhci_soft_qh *); 116 117 void uhci_free_std_chain(struct uhci_softc *, 118 struct uhci_soft_td *, struct uhci_soft_td *); 119 usbd_status uhci_alloc_std_chain(struct uhci_softc *, u_int, 120 struct usbd_xfer *, struct uhci_soft_td **, 121 struct uhci_soft_td **); 122 void uhci_poll_hub(void *); 123 void uhci_waitintr(struct uhci_softc *, struct usbd_xfer *); 124 void uhci_check_intr(struct uhci_softc *, struct usbd_xfer *); 125 void uhci_idone(struct usbd_xfer *); 126 127 void uhci_abort_xfer(struct usbd_xfer *, usbd_status status); 128 129 void uhci_timeout(void *); 130 void uhci_timeout_task(void *); 131 void uhci_add_ls_ctrl(struct uhci_softc *, struct uhci_soft_qh *); 132 void uhci_add_hs_ctrl(struct uhci_softc *, struct uhci_soft_qh *); 133 void uhci_add_bulk(struct uhci_softc *, struct uhci_soft_qh *); 134 void uhci_remove_ls_ctrl(struct uhci_softc *, struct uhci_soft_qh *); 135 void uhci_remove_hs_ctrl(struct uhci_softc *, struct uhci_soft_qh *); 136 void uhci_remove_bulk(struct uhci_softc *,struct uhci_soft_qh *); 137 void uhci_add_loop(struct uhci_softc *sc); 138 void uhci_rem_loop(struct uhci_softc *sc); 139 140 usbd_status uhci_setup_isoc(struct usbd_pipe *pipe); 141 void uhci_device_isoc_enter(struct usbd_xfer *); 142 143 struct usbd_xfer *uhci_allocx(struct usbd_bus *); 144 void uhci_freex(struct usbd_bus *, struct usbd_xfer *); 145 146 usbd_status uhci_device_ctrl_transfer(struct usbd_xfer *); 147 usbd_status uhci_device_ctrl_start(struct usbd_xfer *); 148 void uhci_device_ctrl_abort(struct usbd_xfer *); 149 void uhci_device_ctrl_close(struct usbd_pipe *); 150 void uhci_device_ctrl_done(struct usbd_xfer *); 151 152 usbd_status uhci_device_intr_transfer(struct usbd_xfer *); 153 usbd_status uhci_device_intr_start(struct usbd_xfer *); 154 void uhci_device_intr_abort(struct usbd_xfer *); 155 void uhci_device_intr_close(struct usbd_pipe *); 156 void uhci_device_intr_done(struct usbd_xfer *); 157 158 usbd_status uhci_device_bulk_transfer(struct usbd_xfer *); 159 usbd_status uhci_device_bulk_start(struct usbd_xfer *); 160 void uhci_device_bulk_abort(struct usbd_xfer *); 161 void uhci_device_bulk_close(struct usbd_pipe *); 162 void uhci_device_bulk_done(struct usbd_xfer *); 163 164 usbd_status uhci_device_isoc_transfer(struct usbd_xfer *); 165 usbd_status uhci_device_isoc_start(struct usbd_xfer *); 166 void uhci_device_isoc_abort(struct usbd_xfer *); 167 void uhci_device_isoc_close(struct usbd_pipe *); 168 void uhci_device_isoc_done(struct usbd_xfer *); 169 170 usbd_status uhci_root_ctrl_transfer(struct usbd_xfer *); 171 usbd_status uhci_root_ctrl_start(struct usbd_xfer *); 172 void uhci_root_ctrl_abort(struct usbd_xfer *); 173 void uhci_root_ctrl_close(struct usbd_pipe *); 174 void uhci_root_ctrl_done(struct usbd_xfer *); 175 176 usbd_status uhci_root_intr_transfer(struct usbd_xfer *); 177 usbd_status uhci_root_intr_start(struct usbd_xfer *); 178 void uhci_root_intr_abort(struct usbd_xfer *); 179 void uhci_root_intr_close(struct usbd_pipe *); 180 void uhci_root_intr_done(struct usbd_xfer *); 181 182 usbd_status uhci_open(struct usbd_pipe *); 183 void uhci_poll(struct usbd_bus *); 184 void uhci_softintr(void *); 185 186 usbd_status uhci_device_request(struct usbd_xfer *xfer); 187 188 void uhci_add_intr(struct uhci_softc *, struct uhci_soft_qh *); 189 void uhci_remove_intr(struct uhci_softc *, struct uhci_soft_qh *); 190 usbd_status uhci_device_setintr(struct uhci_softc *sc, 191 struct uhci_pipe *pipe, int ival); 192 193 void uhci_device_clear_toggle(struct usbd_pipe *pipe); 194 195 __inline__ struct uhci_soft_qh *uhci_find_prev_qh(struct uhci_soft_qh *, 196 struct uhci_soft_qh *); 197 198 #ifdef UHCI_DEBUG 199 void uhci_dump_all(struct uhci_softc *); 200 void uhci_dumpregs(struct uhci_softc *); 201 void uhci_dump_qhs(struct uhci_soft_qh *); 202 void uhci_dump_qh(struct uhci_soft_qh *); 203 void uhci_dump_tds(struct uhci_soft_td *); 204 void uhci_dump_td(struct uhci_soft_td *); 205 void uhci_dump_xfer(struct uhci_xfer *); 206 void uhci_dump(void); 207 #endif 208 209 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 210 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 211 #define UWRITE1(sc, r, x) \ 212 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 213 } while (/*CONSTCOND*/0) 214 #define UWRITE2(sc, r, x) \ 215 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 216 } while (/*CONSTCOND*/0) 217 #define UWRITE4(sc, r, x) \ 218 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 219 } while (/*CONSTCOND*/0) 220 221 __unused static __inline u_int8_t 222 UREAD1(struct uhci_softc *sc, bus_size_t r) 223 { 224 UBARR(sc); 225 return bus_space_read_1(sc->iot, sc->ioh, r); 226 } 227 228 __unused static __inline u_int16_t 229 UREAD2(struct uhci_softc *sc, bus_size_t r) 230 { 231 UBARR(sc); 232 return bus_space_read_2(sc->iot, sc->ioh, r); 233 } 234 235 __unused static __inline u_int32_t 236 UREAD4(struct uhci_softc *sc, bus_size_t r) 237 { 238 UBARR(sc); 239 return bus_space_read_4(sc->iot, sc->ioh, r); 240 } 241 242 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 243 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 244 245 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 246 247 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 248 249 #define UHCI_INTR_ENDPT 1 250 251 struct usbd_bus_methods uhci_bus_methods = { 252 .open_pipe = uhci_open, 253 .dev_setaddr = usbd_set_address, 254 .soft_intr = uhci_softintr, 255 .do_poll = uhci_poll, 256 .allocx = uhci_allocx, 257 .freex = uhci_freex, 258 }; 259 260 struct usbd_pipe_methods uhci_root_ctrl_methods = { 261 .transfer = uhci_root_ctrl_transfer, 262 .start = uhci_root_ctrl_start, 263 .abort = uhci_root_ctrl_abort, 264 .close = uhci_root_ctrl_close, 265 .done = uhci_root_ctrl_done, 266 }; 267 268 struct usbd_pipe_methods uhci_root_intr_methods = { 269 .transfer = uhci_root_intr_transfer, 270 .start = uhci_root_intr_start, 271 .abort = uhci_root_intr_abort, 272 .close = uhci_root_intr_close, 273 .done = uhci_root_intr_done, 274 }; 275 276 struct usbd_pipe_methods uhci_device_ctrl_methods = { 277 .transfer = uhci_device_ctrl_transfer, 278 .start = uhci_device_ctrl_start, 279 .abort = uhci_device_ctrl_abort, 280 .close = uhci_device_ctrl_close, 281 .done = uhci_device_ctrl_done, 282 }; 283 284 struct usbd_pipe_methods uhci_device_intr_methods = { 285 .transfer = uhci_device_intr_transfer, 286 .start = uhci_device_intr_start, 287 .abort = uhci_device_intr_abort, 288 .close = uhci_device_intr_close, 289 .cleartoggle = uhci_device_clear_toggle, 290 .done = uhci_device_intr_done, 291 }; 292 293 struct usbd_pipe_methods uhci_device_bulk_methods = { 294 .transfer = uhci_device_bulk_transfer, 295 .start = uhci_device_bulk_start, 296 .abort = uhci_device_bulk_abort, 297 .close = uhci_device_bulk_close, 298 .cleartoggle = uhci_device_clear_toggle, 299 .done = uhci_device_bulk_done, 300 }; 301 302 struct usbd_pipe_methods uhci_device_isoc_methods = { 303 .transfer = uhci_device_isoc_transfer, 304 .start = uhci_device_isoc_start, 305 .abort = uhci_device_isoc_abort, 306 .close = uhci_device_isoc_close, 307 .done = uhci_device_isoc_done, 308 }; 309 310 #define uhci_add_intr_list(sc, ex) \ 311 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext) 312 #define uhci_del_intr_list(ex) \ 313 do { \ 314 LIST_REMOVE((ex), inext); \ 315 (ex)->inext.le_prev = NULL; \ 316 } while (0) 317 #define uhci_active_intr_list(ex) ((ex)->inext.le_prev != NULL) 318 319 __inline__ struct uhci_soft_qh * 320 uhci_find_prev_qh(struct uhci_soft_qh *pqh, struct uhci_soft_qh *sqh) 321 { 322 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 323 324 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 325 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 326 if (letoh32(pqh->qh.qh_hlink) & UHCI_PTR_T) { 327 printf("uhci_find_prev_qh: QH not found\n"); 328 return (NULL); 329 } 330 #endif 331 } 332 return (pqh); 333 } 334 335 void 336 uhci_globalreset(struct uhci_softc *sc) 337 { 338 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 339 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 340 UHCICMD(sc, 0); /* do nothing */ 341 } 342 343 usbd_status 344 uhci_init(struct uhci_softc *sc) 345 { 346 usbd_status err; 347 int i, j; 348 struct uhci_soft_qh *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 349 struct uhci_soft_td *std; 350 351 DPRINTFN(1,("uhci_init: start\n")); 352 353 #ifdef UHCI_DEBUG 354 thesc = sc; 355 356 if (uhcidebug > 2) 357 uhci_dumpregs(sc); 358 #endif 359 360 /* Save SOF over HC reset. */ 361 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 362 363 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 364 uhci_globalreset(sc); /* reset the controller */ 365 uhci_reset(sc); 366 367 if (uhcixfer == NULL) { 368 uhcixfer = malloc(sizeof(struct pool), M_DEVBUF, M_NOWAIT); 369 if (uhcixfer == NULL) { 370 printf("%s: unable to allocate pool descriptor\n", 371 sc->sc_bus.bdev.dv_xname); 372 return (ENOMEM); 373 } 374 pool_init(uhcixfer, sizeof(struct uhci_xfer), 0, 0, 0, 375 "uhcixfer", NULL); 376 pool_setipl(uhcixfer, IPL_SOFTUSB); 377 } 378 379 /* Restore saved SOF. */ 380 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 381 382 /* Allocate and initialize real frame array. */ 383 err = usb_allocmem(&sc->sc_bus, 384 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 385 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 386 if (err) 387 return (err); 388 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 389 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 390 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 391 392 /* 393 * Allocate a TD, inactive, that hangs from the last QH. 394 * This is to avoid a bug in the PIIX that makes it run berserk 395 * otherwise. 396 */ 397 std = uhci_alloc_std(sc); 398 if (std == NULL) 399 return (USBD_NOMEM); 400 std->link.std = NULL; 401 std->td.td_link = htole32(UHCI_PTR_T); 402 std->td.td_status = htole32(0); /* inactive */ 403 std->td.td_token = htole32(0); 404 std->td.td_buffer = htole32(0); 405 406 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 407 lsqh = uhci_alloc_sqh(sc); 408 if (lsqh == NULL) 409 return (USBD_NOMEM); 410 lsqh->hlink = NULL; 411 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 412 lsqh->elink = std; 413 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 414 sc->sc_last_qh = lsqh; 415 416 /* Allocate the dummy QH where bulk traffic will be queued. */ 417 bsqh = uhci_alloc_sqh(sc); 418 if (bsqh == NULL) 419 return (USBD_NOMEM); 420 bsqh->hlink = lsqh; 421 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 422 bsqh->elink = NULL; 423 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 424 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 425 426 /* Allocate dummy QH where high speed control traffic will be queued. */ 427 chsqh = uhci_alloc_sqh(sc); 428 if (chsqh == NULL) 429 return (USBD_NOMEM); 430 chsqh->hlink = bsqh; 431 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 432 chsqh->elink = NULL; 433 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 434 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 435 436 /* Allocate dummy QH where control traffic will be queued. */ 437 clsqh = uhci_alloc_sqh(sc); 438 if (clsqh == NULL) 439 return (USBD_NOMEM); 440 clsqh->hlink = chsqh; 441 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 442 clsqh->elink = NULL; 443 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 444 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 445 446 /* 447 * Make all (virtual) frame list pointers point to the interrupt 448 * queue heads and the interrupt queue heads at the control 449 * queue head and point the physical frame list to the virtual. 450 */ 451 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 452 std = uhci_alloc_std(sc); 453 sqh = uhci_alloc_sqh(sc); 454 if (std == NULL || sqh == NULL) 455 return (USBD_NOMEM); 456 std->link.sqh = sqh; 457 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 458 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 459 std->td.td_token = htole32(0); 460 std->td.td_buffer = htole32(0); 461 sqh->hlink = clsqh; 462 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 463 sqh->elink = NULL; 464 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 465 sc->sc_vframes[i].htd = std; 466 sc->sc_vframes[i].etd = std; 467 sc->sc_vframes[i].hqh = sqh; 468 sc->sc_vframes[i].eqh = sqh; 469 for (j = i; 470 j < UHCI_FRAMELIST_COUNT; 471 j += UHCI_VFRAMELIST_COUNT) 472 sc->sc_pframes[j] = htole32(std->physaddr); 473 } 474 475 LIST_INIT(&sc->sc_intrhead); 476 477 timeout_set(&sc->sc_root_intr, uhci_poll_hub, sc); 478 479 /* Set up the bus struct. */ 480 sc->sc_bus.methods = &uhci_bus_methods; 481 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 482 483 sc->sc_suspend = DVACT_RESUME; 484 485 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 486 487 DPRINTFN(1,("uhci_init: enabling\n")); 488 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 489 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 490 491 return (uhci_run(sc, 1)); /* and here we go... */ 492 } 493 494 int 495 uhci_activate(struct device *self, int act) 496 { 497 struct uhci_softc *sc = (struct uhci_softc *)self; 498 int cmd, rv = 0; 499 500 switch (act) { 501 case DVACT_SUSPEND: 502 #ifdef UHCI_DEBUG 503 if (uhcidebug > 2) 504 uhci_dumpregs(sc); 505 #endif 506 rv = config_activate_children(self, act); 507 sc->sc_bus.use_polling++; 508 uhci_run(sc, 0); /* stop the controller */ 509 510 /* save some state if BIOS doesn't */ 511 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 512 513 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 514 515 cmd = UREAD2(sc, UHCI_CMD); 516 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 517 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 518 sc->sc_suspend = act; 519 sc->sc_bus.use_polling--; 520 DPRINTF(("uhci_activate: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 521 break; 522 case DVACT_POWERDOWN: 523 rv = config_activate_children(self, act); 524 uhci_run(sc, 0); /* stop the controller */ 525 break; 526 case DVACT_RESUME: 527 #ifdef DIAGNOSTIC 528 if (sc->sc_suspend == DVACT_RESUME) 529 printf("uhci_powerhook: weird, resume without suspend.\n"); 530 #endif 531 sc->sc_bus.use_polling++; 532 sc->sc_suspend = act; 533 cmd = UREAD2(sc, UHCI_CMD); 534 if (cmd & UHCI_CMD_RS) 535 uhci_run(sc, 0); /* in case BIOS has started it */ 536 537 /* restore saved state */ 538 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 539 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 540 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 541 542 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 543 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 544 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 545 UHCICMD(sc, UHCI_CMD_MAXP); 546 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 547 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 548 uhci_run(sc, 1); /* and start traffic again */ 549 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 550 sc->sc_bus.use_polling--; 551 #ifdef UHCI_DEBUG 552 if (uhcidebug > 2) 553 uhci_dumpregs(sc); 554 #endif 555 rv = config_activate_children(self, act); 556 break; 557 default: 558 rv = config_activate_children(self, act); 559 break; 560 } 561 return (rv); 562 } 563 564 int 565 uhci_detach(struct device *self, int flags) 566 { 567 #ifdef DIAGNOSTIC 568 struct uhci_softc *sc = (struct uhci_softc *)self; 569 #endif 570 int rv; 571 572 rv = config_detach_children(self, flags); 573 if (rv != 0) 574 return (rv); 575 576 KASSERT(sc->sc_intrxfer == NULL); 577 578 /* XXX free other data structures XXX */ 579 580 return (rv); 581 } 582 583 struct usbd_xfer * 584 uhci_allocx(struct usbd_bus *bus) 585 { 586 struct uhci_xfer *ux; 587 588 ux = pool_get(uhcixfer, PR_NOWAIT | PR_ZERO); 589 #ifdef DIAGNOSTIC 590 if (ux != NULL) 591 ux->isdone = 1; 592 #endif 593 return ((struct usbd_xfer *)ux); 594 } 595 596 void 597 uhci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 598 { 599 struct uhci_xfer *ux = (struct uhci_xfer*)xfer; 600 601 #ifdef DIAGNOSTIC 602 if (!ux->isdone) { 603 printf("%s: !isdone\n", __func__); 604 return; 605 } 606 #endif 607 pool_put(uhcixfer, ux); 608 } 609 610 #ifdef UHCI_DEBUG 611 void 612 uhci_dumpregs(struct uhci_softc *sc) 613 { 614 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 615 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 616 sc->sc_bus.bdev.dv_xname, 617 UREAD2(sc, UHCI_CMD), 618 UREAD2(sc, UHCI_STS), 619 UREAD2(sc, UHCI_INTR), 620 UREAD2(sc, UHCI_FRNUM), 621 UREAD4(sc, UHCI_FLBASEADDR), 622 UREAD1(sc, UHCI_SOF), 623 UREAD2(sc, UHCI_PORTSC1), 624 UREAD2(sc, UHCI_PORTSC2))); 625 } 626 627 void 628 uhci_dump_td(struct uhci_soft_td *p) 629 { 630 char sbuf[128], sbuf2[128]; 631 632 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 633 "token=0x%08lx buffer=0x%08lx\n", 634 p, (long)p->physaddr, 635 (long)letoh32(p->td.td_link), 636 (long)letoh32(p->td.td_status), 637 (long)letoh32(p->td.td_token), 638 (long)letoh32(p->td.td_buffer))); 639 640 bitmask_snprintf((u_int32_t)letoh32(p->td.td_link), "\20\1T\2Q\3VF", 641 sbuf, sizeof(sbuf)); 642 bitmask_snprintf((u_int32_t)letoh32(p->td.td_status), 643 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 644 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 645 sbuf2, sizeof(sbuf2)); 646 647 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 648 "D=%d,maxlen=%d\n", sbuf, sbuf2, 649 UHCI_TD_GET_ERRCNT(letoh32(p->td.td_status)), 650 UHCI_TD_GET_ACTLEN(letoh32(p->td.td_status)), 651 UHCI_TD_GET_PID(letoh32(p->td.td_token)), 652 UHCI_TD_GET_DEVADDR(letoh32(p->td.td_token)), 653 UHCI_TD_GET_ENDPT(letoh32(p->td.td_token)), 654 UHCI_TD_GET_DT(letoh32(p->td.td_token)), 655 UHCI_TD_GET_MAXLEN(letoh32(p->td.td_token)))); 656 } 657 658 void 659 uhci_dump_qh(struct uhci_soft_qh *sqh) 660 { 661 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 662 (int)sqh->physaddr, letoh32(sqh->qh.qh_hlink), 663 letoh32(sqh->qh.qh_elink))); 664 } 665 666 667 void 668 uhci_dump(void) 669 { 670 uhci_dump_all(thesc); 671 } 672 673 void 674 uhci_dump_all(struct uhci_softc *sc) 675 { 676 uhci_dumpregs(sc); 677 printf("intrs=%d\n", sc->sc_bus.no_intrs); 678 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 679 uhci_dump_qh(sc->sc_lctl_start); 680 } 681 682 683 void 684 uhci_dump_qhs(struct uhci_soft_qh *sqh) 685 { 686 uhci_dump_qh(sqh); 687 688 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 689 * Traverses sideways first, then down. 690 * 691 * QH1 692 * QH2 693 * No QH 694 * TD2.1 695 * TD2.2 696 * TD1.1 697 * etc. 698 * 699 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 700 */ 701 702 703 if (sqh->hlink != NULL && !(letoh32(sqh->qh.qh_hlink) & UHCI_PTR_T)) 704 uhci_dump_qhs(sqh->hlink); 705 else 706 DPRINTF(("No QH\n")); 707 708 if (sqh->elink != NULL && !(letoh32(sqh->qh.qh_elink) & UHCI_PTR_T)) 709 uhci_dump_tds(sqh->elink); 710 else 711 DPRINTF(("No TD\n")); 712 } 713 714 void 715 uhci_dump_tds(struct uhci_soft_td *std) 716 { 717 struct uhci_soft_td *td; 718 719 for(td = std; td != NULL; td = td->link.std) { 720 uhci_dump_td(td); 721 722 /* Check whether the link pointer in this TD marks 723 * the link pointer as end of queue. This avoids 724 * printing the free list in case the queue/TD has 725 * already been moved there (seatbelt). 726 */ 727 if (letoh32(td->td.td_link) & UHCI_PTR_T || 728 letoh32(td->td.td_link) == 0) 729 break; 730 } 731 } 732 733 void 734 uhci_dump_xfer(struct uhci_xfer *ex) 735 { 736 struct usbd_pipe *pipe; 737 usb_endpoint_descriptor_t *ed; 738 struct usbd_device *dev; 739 740 #ifdef DIAGNOSTIC 741 #define DONE ex->isdone 742 #else 743 #define DONE 0 744 #endif 745 if (ex == NULL) { 746 printf("ex NULL\n"); 747 return; 748 } 749 pipe = ex->xfer.pipe; 750 if (pipe == NULL) { 751 printf("ex %p: done=%d pipe=NULL\n", 752 ex, DONE); 753 return; 754 } 755 if (pipe->endpoint == NULL) { 756 printf("ex %p: done=%d pipe=%p pipe->endpoint=NULL\n", 757 ex, DONE, pipe); 758 return; 759 } 760 if (pipe->device == NULL) { 761 printf("ex %p: done=%d pipe=%p pipe->device=NULL\n", 762 ex, DONE, pipe); 763 return; 764 } 765 ed = pipe->endpoint->edesc; 766 dev = pipe->device; 767 printf("ex %p: done=%d dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 768 ex, DONE, dev, 769 UGETW(dev->ddesc.idVendor), 770 UGETW(dev->ddesc.idProduct), 771 dev->address, pipe, 772 ed->bEndpointAddress, ed->bmAttributes); 773 #undef DONE 774 } 775 776 void uhci_dump_xfers(struct uhci_softc *sc); 777 void 778 uhci_dump_xfers(struct uhci_softc *sc) 779 { 780 struct uhci_xfer *ex; 781 782 printf("ex list:\n"); 783 for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = LIST_NEXT(ex, inext)) 784 uhci_dump_xfer(ex); 785 } 786 787 void exdump(void); 788 void exdump(void) { uhci_dump_xfers(thesc); } 789 790 #endif 791 792 /* 793 * This routine is executed periodically and simulates interrupts 794 * from the root controller interrupt pipe for port status change. 795 */ 796 void 797 uhci_poll_hub(void *addr) 798 { 799 struct uhci_softc *sc = addr; 800 struct usbd_xfer *xfer; 801 int s; 802 u_char *p; 803 804 if (sc->sc_bus.dying) 805 return; 806 807 xfer = sc->sc_intrxfer; 808 if (xfer == NULL) 809 return; 810 811 p = KERNADDR(&xfer->dmabuf, 0); 812 p[0] = 0; 813 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 814 p[0] |= 1<<1; 815 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 816 p[0] |= 1<<2; 817 if (p[0] == 0) { 818 /* No change, try again in a while */ 819 timeout_add_msec(&sc->sc_root_intr, 255); 820 return; 821 } 822 823 xfer->actlen = xfer->length; 824 xfer->status = USBD_NORMAL_COMPLETION; 825 826 s = splusb(); 827 xfer->device->bus->intr_context++; 828 usb_transfer_complete(xfer); 829 xfer->device->bus->intr_context--; 830 splx(s); 831 } 832 833 void 834 uhci_root_ctrl_done(struct usbd_xfer *xfer) 835 { 836 } 837 838 /* 839 * Let the last QH loop back to the high speed control transfer QH. 840 * This is what intel calls "bandwidth reclamation" and improves 841 * USB performance a lot for some devices. 842 * If we are already looping, just count it. 843 */ 844 void 845 uhci_add_loop(struct uhci_softc *sc) { 846 #ifdef UHCI_DEBUG 847 if (uhcinoloop) 848 return; 849 #endif 850 if (++sc->sc_loops == 1) { 851 DPRINTFN(5,("uhci_add_loop\n")); 852 /* Note, we don't loop back the soft pointer. */ 853 sc->sc_last_qh->qh.qh_hlink = 854 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 855 } 856 } 857 858 void 859 uhci_rem_loop(struct uhci_softc *sc) { 860 #ifdef UHCI_DEBUG 861 if (uhcinoloop) 862 return; 863 #endif 864 if (--sc->sc_loops == 0) { 865 DPRINTFN(5,("uhci_rem_loop\n")); 866 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 867 } 868 } 869 870 /* Add high speed control QH, called at splusb(). */ 871 void 872 uhci_add_hs_ctrl(struct uhci_softc *sc, struct uhci_soft_qh *sqh) 873 { 874 struct uhci_soft_qh *eqh; 875 876 SPLUSBCHECK; 877 878 DPRINTFN(10, ("uhci_add_hs_ctrl: sqh=%p\n", sqh)); 879 eqh = sc->sc_hctl_end; 880 sqh->hlink = eqh->hlink; 881 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 882 eqh->hlink = sqh; 883 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 884 sc->sc_hctl_end = sqh; 885 #ifdef UHCI_CTL_LOOP 886 uhci_add_loop(sc); 887 #endif 888 } 889 890 /* Remove high speed control QH, called at splusb(). */ 891 void 892 uhci_remove_hs_ctrl(struct uhci_softc *sc, struct uhci_soft_qh *sqh) 893 { 894 struct uhci_soft_qh *pqh; 895 896 SPLUSBCHECK; 897 898 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 899 #ifdef UHCI_CTL_LOOP 900 uhci_rem_loop(sc); 901 #endif 902 /* 903 * The T bit should be set in the elink of the QH so that the HC 904 * doesn't follow the pointer. This condition may fail if the 905 * the transferred packet was short so that the QH still points 906 * at the last used TD. 907 * In this case we set the T bit and wait a little for the HC 908 * to stop looking at the TD. 909 */ 910 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 911 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 912 delay(UHCI_QH_REMOVE_DELAY); 913 } 914 915 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 916 pqh->hlink = sqh->hlink; 917 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 918 delay(UHCI_QH_REMOVE_DELAY); 919 if (sc->sc_hctl_end == sqh) 920 sc->sc_hctl_end = pqh; 921 } 922 923 /* Add low speed control QH, called at splusb(). */ 924 void 925 uhci_add_ls_ctrl(struct uhci_softc *sc, struct uhci_soft_qh *sqh) 926 { 927 struct uhci_soft_qh *eqh; 928 929 SPLUSBCHECK; 930 931 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 932 eqh = sc->sc_lctl_end; 933 sqh->hlink = eqh->hlink; 934 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 935 eqh->hlink = sqh; 936 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 937 sc->sc_lctl_end = sqh; 938 } 939 940 /* Remove low speed control QH, called at splusb(). */ 941 void 942 uhci_remove_ls_ctrl(struct uhci_softc *sc, struct uhci_soft_qh *sqh) 943 { 944 struct uhci_soft_qh *pqh; 945 946 SPLUSBCHECK; 947 948 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 949 /* See comment in uhci_remove_hs_ctrl() */ 950 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 951 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 952 delay(UHCI_QH_REMOVE_DELAY); 953 } 954 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 955 pqh->hlink = sqh->hlink; 956 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 957 delay(UHCI_QH_REMOVE_DELAY); 958 if (sc->sc_lctl_end == sqh) 959 sc->sc_lctl_end = pqh; 960 } 961 962 /* Add bulk QH, called at splusb(). */ 963 void 964 uhci_add_bulk(struct uhci_softc *sc, struct uhci_soft_qh *sqh) 965 { 966 struct uhci_soft_qh *eqh; 967 968 SPLUSBCHECK; 969 970 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 971 eqh = sc->sc_bulk_end; 972 sqh->hlink = eqh->hlink; 973 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 974 eqh->hlink = sqh; 975 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 976 sc->sc_bulk_end = sqh; 977 uhci_add_loop(sc); 978 } 979 980 /* Remove bulk QH, called at splusb(). */ 981 void 982 uhci_remove_bulk(struct uhci_softc *sc, struct uhci_soft_qh *sqh) 983 { 984 struct uhci_soft_qh *pqh; 985 986 SPLUSBCHECK; 987 988 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 989 uhci_rem_loop(sc); 990 /* See comment in uhci_remove_hs_ctrl() */ 991 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 992 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 993 delay(UHCI_QH_REMOVE_DELAY); 994 } 995 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 996 pqh->hlink = sqh->hlink; 997 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 998 delay(UHCI_QH_REMOVE_DELAY); 999 if (sc->sc_bulk_end == sqh) 1000 sc->sc_bulk_end = pqh; 1001 } 1002 1003 int uhci_intr1(struct uhci_softc *); 1004 1005 int 1006 uhci_intr(void *arg) 1007 { 1008 struct uhci_softc *sc = arg; 1009 1010 if (sc->sc_bus.dying) 1011 return (0); 1012 if (sc->sc_bus.use_polling) 1013 return (0); 1014 return (uhci_intr1(sc)); 1015 } 1016 1017 int 1018 uhci_intr1(struct uhci_softc *sc) 1019 { 1020 int status; 1021 int ack; 1022 1023 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1024 if (status == 0) /* The interrupt was not for us. */ 1025 return (0); 1026 if (status == 0xffffffff) { 1027 sc->sc_bus.dying = 1; 1028 return (0); 1029 } 1030 1031 #ifdef UHCI_DEBUG 1032 if (uhcidebug > 15) { 1033 DPRINTF(("%s: uhci_intr1\n", sc->sc_bus.bdev.dv_xname)); 1034 uhci_dumpregs(sc); 1035 } 1036 #endif 1037 1038 if (sc->sc_suspend != DVACT_RESUME) { 1039 printf("%s: interrupt while not operating ignored\n", 1040 sc->sc_bus.bdev.dv_xname); 1041 return (0); 1042 } 1043 1044 ack = 0; 1045 if (status & UHCI_STS_USBINT) 1046 ack |= UHCI_STS_USBINT; 1047 if (status & UHCI_STS_USBEI) 1048 ack |= UHCI_STS_USBEI; 1049 if (status & UHCI_STS_RD) { 1050 ack |= UHCI_STS_RD; 1051 #ifdef UHCI_DEBUG 1052 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 1053 #endif 1054 } 1055 if (status & UHCI_STS_HSE) { 1056 ack |= UHCI_STS_HSE; 1057 printf("%s: host system error\n", sc->sc_bus.bdev.dv_xname); 1058 } 1059 if (status & UHCI_STS_HCPE) { 1060 ack |= UHCI_STS_HCPE; 1061 printf("%s: host controller process error\n", 1062 sc->sc_bus.bdev.dv_xname); 1063 } 1064 if (status & UHCI_STS_HCH) { 1065 /* no acknowledge needed */ 1066 if (!sc->sc_bus.dying) { 1067 printf("%s: host controller halted\n", 1068 sc->sc_bus.bdev.dv_xname); 1069 #ifdef UHCI_DEBUG 1070 uhci_dump_all(sc); 1071 #endif 1072 } 1073 sc->sc_bus.dying = 1; 1074 } 1075 1076 if (!ack) 1077 return (0); /* nothing to acknowledge */ 1078 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1079 1080 sc->sc_bus.no_intrs++; 1081 usb_schedsoftintr(&sc->sc_bus); 1082 1083 DPRINTFN(15, ("%s: uhci_intr1: exit\n", sc->sc_bus.bdev.dv_xname)); 1084 1085 return (1); 1086 } 1087 1088 void 1089 uhci_softintr(void *v) 1090 { 1091 struct uhci_softc *sc = v; 1092 struct uhci_xfer *ux, *nextex; 1093 1094 DPRINTFN(10,("%s: uhci_softintr (%d)\n", sc->sc_bus.bdev.dv_xname, 1095 sc->sc_bus.intr_context)); 1096 1097 if (sc->sc_bus.dying) 1098 return; 1099 1100 sc->sc_bus.intr_context++; 1101 1102 /* 1103 * Interrupts on UHCI really suck. When the host controller 1104 * interrupts because a transfer is completed there is no 1105 * way of knowing which transfer it was. You can scan down 1106 * the TDs and QHs of the previous frame to limit the search, 1107 * but that assumes that the interrupt was not delayed by more 1108 * than 1 ms, which may not always be true (e.g. after debug 1109 * output on a slow console). 1110 * We scan all interrupt descriptors to see if any have 1111 * completed. 1112 */ 1113 for (ux = LIST_FIRST(&sc->sc_intrhead); ux; ux = nextex) { 1114 nextex = LIST_NEXT(ux, inext); 1115 uhci_check_intr(sc, &ux->xfer); 1116 } 1117 1118 if (sc->sc_softwake) { 1119 sc->sc_softwake = 0; 1120 wakeup(&sc->sc_softwake); 1121 } 1122 1123 sc->sc_bus.intr_context--; 1124 } 1125 1126 void 1127 uhci_check_intr(struct uhci_softc *sc, struct usbd_xfer *xfer) 1128 { 1129 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 1130 struct uhci_soft_td *std, *lstd; 1131 u_int32_t status; 1132 1133 DPRINTFN(15, ("%s: ux=%p\n", __func__, ux)); 1134 #ifdef DIAGNOSTIC 1135 if (ux == NULL) { 1136 printf("%s: no ux? %p\n", __func__, ux); 1137 return; 1138 } 1139 #endif 1140 if (xfer->status == USBD_CANCELLED || xfer->status == USBD_TIMEOUT) { 1141 DPRINTF(("%s: aborted xfer=%p\n", __func__, xfer)); 1142 return; 1143 } 1144 1145 if (ux->stdstart == NULL) 1146 return; 1147 lstd = ux->stdend; 1148 #ifdef DIAGNOSTIC 1149 if (lstd == NULL) { 1150 printf("%s: std==0\n", __func__); 1151 return; 1152 } 1153 #endif 1154 /* 1155 * If the last TD is still active we need to check whether there 1156 * is an error somewhere in the middle, or whether there was a 1157 * short packet (SPD and not ACTIVE). 1158 */ 1159 if (letoh32(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1160 DPRINTFN(12, ("%s: active ux=%p\n", __func__, ux)); 1161 for (std = ux->stdstart; std != lstd; std = std->link.std) { 1162 status = letoh32(std->td.td_status); 1163 /* If there's an active TD the xfer isn't done. */ 1164 if (status & UHCI_TD_ACTIVE) 1165 break; 1166 /* Any kind of error makes the xfer done. */ 1167 if (status & UHCI_TD_STALLED) 1168 goto done; 1169 /* We want short packets, and it is short: it's done */ 1170 if ((status & UHCI_TD_SPD) && 1171 UHCI_TD_GET_ACTLEN(status) < 1172 UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token))) 1173 goto done; 1174 } 1175 DPRINTFN(12, ("%s: ux=%p std=%p still active\n", __func__, 1176 ux, ux->stdstart)); 1177 return; 1178 } 1179 done: 1180 DPRINTFN(12, ("uhci_check_intr: ux=%p done\n", ux)); 1181 timeout_del(&xfer->timeout_handle); 1182 usb_rem_task(xfer->pipe->device, &xfer->abort_task); 1183 uhci_idone(xfer); 1184 } 1185 1186 /* Called at splusb() */ 1187 void 1188 uhci_idone(struct usbd_xfer *xfer) 1189 { 1190 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 1191 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1192 struct uhci_soft_td *std; 1193 u_int32_t status = 0, nstatus; 1194 int actlen; 1195 1196 DPRINTFN(12, ("uhci_idone: ux=%p\n", ux)); 1197 #ifdef DIAGNOSTIC 1198 { 1199 int s = splhigh(); 1200 if (ux->isdone) { 1201 splx(s); 1202 #ifdef UHCI_DEBUG 1203 printf("uhci_idone: ux is done!\n "); 1204 uhci_dump_xfer(ux); 1205 #else 1206 printf("uhci_idone: ux=%p is done!\n", ux); 1207 #endif 1208 return; 1209 } 1210 ux->isdone = 1; 1211 splx(s); 1212 } 1213 #endif 1214 1215 if (xfer->nframes != 0) { 1216 /* Isoc transfer, do things differently. */ 1217 struct uhci_soft_td **stds = upipe->u.iso.stds; 1218 int i, n, nframes, len; 1219 1220 DPRINTFN(5,("uhci_idone: ux=%p isoc ready\n", ux)); 1221 1222 nframes = xfer->nframes; 1223 actlen = 0; 1224 n = ux->curframe; 1225 for (i = 0; i < nframes; i++) { 1226 std = stds[n]; 1227 #ifdef UHCI_DEBUG 1228 if (uhcidebug > 5) { 1229 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1230 uhci_dump_td(std); 1231 } 1232 #endif 1233 if (++n >= UHCI_VFRAMELIST_COUNT) 1234 n = 0; 1235 status = letoh32(std->td.td_status); 1236 len = UHCI_TD_GET_ACTLEN(status); 1237 xfer->frlengths[i] = len; 1238 actlen += len; 1239 } 1240 upipe->u.iso.inuse -= nframes; 1241 xfer->actlen = actlen; 1242 xfer->status = USBD_NORMAL_COMPLETION; 1243 goto end; 1244 } 1245 1246 #ifdef UHCI_DEBUG 1247 DPRINTFN(10, ("uhci_idone: ux=%p, xfer=%p, pipe=%p ready\n", 1248 ux, xfer, upipe)); 1249 if (uhcidebug > 10) 1250 uhci_dump_tds(ux->stdstart); 1251 #endif 1252 1253 /* The transfer is done, compute actual length and status. */ 1254 actlen = 0; 1255 for (std = ux->stdstart; std != NULL; std = std->link.std) { 1256 nstatus = letoh32(std->td.td_status); 1257 if (nstatus & UHCI_TD_ACTIVE) 1258 break; 1259 1260 status = nstatus; 1261 if (UHCI_TD_GET_PID(letoh32(std->td.td_token)) != 1262 UHCI_TD_PID_SETUP) 1263 actlen += UHCI_TD_GET_ACTLEN(status); 1264 else { 1265 /* 1266 * UHCI will report CRCTO in addition to a STALL or NAK 1267 * for a SETUP transaction. See section 3.2.2, "TD 1268 * CONTROL AND STATUS". 1269 */ 1270 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1271 status &= ~UHCI_TD_CRCTO; 1272 } 1273 } 1274 /* If there are left over TDs we need to update the toggle. */ 1275 if (std != NULL) 1276 upipe->nexttoggle = UHCI_TD_GET_DT(letoh32(std->td.td_token)); 1277 1278 status &= UHCI_TD_ERROR; 1279 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1280 actlen, status)); 1281 xfer->actlen = actlen; 1282 if (status != 0) { 1283 #ifdef UHCI_DEBUG 1284 char sbuf[128]; 1285 1286 bitmask_snprintf((u_int32_t)status, 1287 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1288 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1289 sbuf, sizeof(sbuf)); 1290 1291 DPRINTFN((status == UHCI_TD_STALLED)*10, 1292 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1293 "status 0x%s\n", 1294 xfer->device->address, 1295 xfer->pipe->endpoint->edesc->bEndpointAddress, 1296 sbuf)); 1297 #endif 1298 1299 if (status == UHCI_TD_STALLED) 1300 xfer->status = USBD_STALLED; 1301 else 1302 xfer->status = USBD_IOERROR; /* more info XXX */ 1303 } else { 1304 xfer->status = USBD_NORMAL_COMPLETION; 1305 } 1306 1307 end: 1308 usb_transfer_complete(xfer); 1309 DPRINTFN(12, ("uhci_idone: ux=%p done\n", ux)); 1310 } 1311 1312 void 1313 uhci_timeout(void *addr) 1314 { 1315 struct usbd_xfer *xfer = addr; 1316 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 1317 1318 if (sc->sc_bus.dying) { 1319 uhci_timeout_task(addr); 1320 return; 1321 } 1322 1323 usb_init_task(&xfer->abort_task, uhci_timeout_task, addr, 1324 USB_TASK_TYPE_ABORT); 1325 usb_add_task(xfer->device, &xfer->abort_task); 1326 } 1327 1328 void 1329 uhci_timeout_task(void *addr) 1330 { 1331 struct usbd_xfer *xfer = addr; 1332 int s; 1333 1334 DPRINTF(("%s: xfer=%p\n", __func__, xfer)); 1335 1336 s = splusb(); 1337 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1338 splx(s); 1339 } 1340 1341 /* 1342 * Wait here until controller claims to have an interrupt. 1343 * Then call uhci_intr and return. Use timeout to avoid waiting 1344 * too long. 1345 * Only used during boot when interrupts are not enabled yet. 1346 */ 1347 void 1348 uhci_waitintr(struct uhci_softc *sc, struct usbd_xfer *xfer) 1349 { 1350 int timo; 1351 u_int32_t intrs; 1352 1353 xfer->status = USBD_IN_PROGRESS; 1354 for (timo = xfer->timeout; timo >= 0; timo--) { 1355 usb_delay_ms(&sc->sc_bus, 1); 1356 if (sc->sc_bus.dying) 1357 break; 1358 intrs = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1359 DPRINTFN(15,("uhci_waitintr: 0x%04x\n", intrs)); 1360 if (intrs) { 1361 uhci_intr1(sc); 1362 if (xfer->status != USBD_IN_PROGRESS) 1363 return; 1364 } 1365 } 1366 1367 /* Timeout */ 1368 DPRINTF(("uhci_waitintr: timeout\n")); 1369 xfer->status = USBD_TIMEOUT; 1370 usb_transfer_complete(xfer); 1371 } 1372 1373 void 1374 uhci_poll(struct usbd_bus *bus) 1375 { 1376 struct uhci_softc *sc = (struct uhci_softc *)bus; 1377 1378 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) 1379 uhci_intr1(sc); 1380 } 1381 1382 void 1383 uhci_reset(struct uhci_softc *sc) 1384 { 1385 int n; 1386 1387 UHCICMD(sc, UHCI_CMD_HCRESET); 1388 /* The reset bit goes low when the controller is done. */ 1389 for (n = 0; n < UHCI_RESET_TIMEOUT && 1390 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1391 usb_delay_ms(&sc->sc_bus, 1); 1392 if (n >= UHCI_RESET_TIMEOUT) 1393 printf("%s: controller did not reset\n", 1394 sc->sc_bus.bdev.dv_xname); 1395 } 1396 1397 usbd_status 1398 uhci_run(struct uhci_softc *sc, int run) 1399 { 1400 int s, n, running; 1401 u_int16_t cmd; 1402 1403 run = run != 0; 1404 s = splhardusb(); 1405 DPRINTF(("uhci_run: setting run=%d\n", run)); 1406 cmd = UREAD2(sc, UHCI_CMD); 1407 if (run) 1408 cmd |= UHCI_CMD_RS; 1409 else 1410 cmd &= ~UHCI_CMD_RS; 1411 UHCICMD(sc, cmd); 1412 for(n = 0; n < 10; n++) { 1413 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1414 /* return when we've entered the state we want */ 1415 if (run == running) { 1416 splx(s); 1417 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1418 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1419 return (USBD_NORMAL_COMPLETION); 1420 } 1421 usb_delay_ms(&sc->sc_bus, 1); 1422 } 1423 splx(s); 1424 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname, 1425 run ? "start" : "stop"); 1426 return (USBD_IOERROR); 1427 } 1428 1429 /* 1430 * Memory management routines. 1431 * uhci_alloc_std allocates TDs 1432 * uhci_alloc_sqh allocates QHs 1433 * These two routines do their own free list management, 1434 * partly for speed, partly because allocating DMAable memory 1435 * has page size granularaity so much memory would be wasted if 1436 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1437 */ 1438 1439 struct uhci_soft_td * 1440 uhci_alloc_std(struct uhci_softc *sc) 1441 { 1442 struct uhci_soft_td *std = NULL; 1443 usbd_status err; 1444 int i, offs; 1445 struct usb_dma dma; 1446 int s; 1447 1448 s = splusb(); 1449 if (sc->sc_freetds == NULL) { 1450 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1451 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1452 UHCI_TD_ALIGN, &dma); 1453 if (err) 1454 goto out; 1455 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1456 offs = i * UHCI_STD_SIZE; 1457 std = KERNADDR(&dma, offs); 1458 std->physaddr = DMAADDR(&dma, offs); 1459 std->link.std = sc->sc_freetds; 1460 sc->sc_freetds = std; 1461 } 1462 } 1463 1464 std = sc->sc_freetds; 1465 sc->sc_freetds = std->link.std; 1466 memset(&std->td, 0, sizeof(struct uhci_td)); 1467 1468 out: 1469 splx(s); 1470 return (std); 1471 } 1472 1473 void 1474 uhci_free_std(struct uhci_softc *sc, struct uhci_soft_td *std) 1475 { 1476 int s; 1477 1478 #ifdef DIAGNOSTIC 1479 #define TD_IS_FREE 0x12345678 1480 if (letoh32(std->td.td_token) == TD_IS_FREE) { 1481 printf("uhci_free_std: freeing free TD %p\n", std); 1482 return; 1483 } 1484 std->td.td_token = htole32(TD_IS_FREE); 1485 #endif 1486 1487 s = splusb(); 1488 std->link.std = sc->sc_freetds; 1489 sc->sc_freetds = std; 1490 splx(s); 1491 } 1492 1493 struct uhci_soft_qh * 1494 uhci_alloc_sqh(struct uhci_softc *sc) 1495 { 1496 struct uhci_soft_qh *sqh = NULL; 1497 usbd_status err; 1498 int i, offs; 1499 struct usb_dma dma; 1500 int s; 1501 1502 s = splusb(); 1503 if (sc->sc_freeqhs == NULL) { 1504 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1505 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1506 UHCI_QH_ALIGN, &dma); 1507 if (err) 1508 goto out; 1509 for (i = 0; i < UHCI_SQH_CHUNK; i++) { 1510 offs = i * UHCI_SQH_SIZE; 1511 sqh = KERNADDR(&dma, offs); 1512 sqh->physaddr = DMAADDR(&dma, offs); 1513 sqh->hlink = sc->sc_freeqhs; 1514 sc->sc_freeqhs = sqh; 1515 } 1516 } 1517 sqh = sc->sc_freeqhs; 1518 sc->sc_freeqhs = sqh->hlink; 1519 memset(&sqh->qh, 0, sizeof(struct uhci_qh)); 1520 1521 out: 1522 splx(s); 1523 return (sqh); 1524 } 1525 1526 void 1527 uhci_free_sqh(struct uhci_softc *sc, struct uhci_soft_qh *sqh) 1528 { 1529 sqh->hlink = sc->sc_freeqhs; 1530 sc->sc_freeqhs = sqh; 1531 } 1532 1533 void 1534 uhci_free_std_chain(struct uhci_softc *sc, struct uhci_soft_td *std, 1535 struct uhci_soft_td *stdend) 1536 { 1537 struct uhci_soft_td *p; 1538 1539 for (; std != stdend; std = p) { 1540 p = std->link.std; 1541 uhci_free_std(sc, std); 1542 } 1543 } 1544 1545 usbd_status 1546 uhci_alloc_std_chain(struct uhci_softc *sc, u_int len, struct usbd_xfer *xfer, 1547 struct uhci_soft_td **sp, struct uhci_soft_td **ep) 1548 { 1549 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1550 struct uhci_soft_td *p, *lastp; 1551 uhci_physaddr_t lastlink; 1552 int i, ntd, l, tog, mps; 1553 u_int32_t status; 1554 u_int16_t flags = xfer->flags; 1555 int rd = usbd_xfer_isread(xfer); 1556 struct usb_dma *dma = &xfer->dmabuf; 1557 int addr = xfer->device->address; 1558 int endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 1559 1560 DPRINTFN(8, ("%s: addr=%d endpt=%d len=%u speed=%d flags=0x%x\n", 1561 __func__, addr, UE_GET_ADDR(endpt), len, xfer->device->speed, 1562 flags)); 1563 1564 mps = UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 1565 if (mps == 0) { 1566 printf("uhci_alloc_std_chain: mps=0\n"); 1567 return (USBD_INVAL); 1568 } 1569 ntd = (len + mps - 1) / mps; 1570 if (len == 0) 1571 flags |= USBD_FORCE_SHORT_XFER; 1572 if ((flags & USBD_FORCE_SHORT_XFER) && len % mps == 0) 1573 ntd++; 1574 DPRINTFN(10, ("%s: mps=%d ntd=%d\n", __func__, mps, ntd)); 1575 tog = upipe->nexttoggle; 1576 if (ntd % 2 == 0) 1577 tog ^= 1; 1578 upipe->nexttoggle = tog ^ 1; 1579 lastp = NULL; 1580 lastlink = UHCI_PTR_T; 1581 ntd--; 1582 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1583 if (xfer->pipe->device->speed == USB_SPEED_LOW) 1584 status |= UHCI_TD_LS; 1585 if (flags & USBD_SHORT_XFER_OK) 1586 status |= UHCI_TD_SPD; 1587 for (i = ntd; i >= 0; i--) { 1588 p = uhci_alloc_std(sc); 1589 if (p == NULL) { 1590 uhci_free_std_chain(sc, lastp, NULL); 1591 return (USBD_NOMEM); 1592 } 1593 p->link.std = lastp; 1594 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1595 lastp = p; 1596 lastlink = p->physaddr; 1597 p->td.td_status = htole32(status); 1598 if (i == ntd) { 1599 /* last TD */ 1600 l = len % mps; 1601 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1602 l = mps; 1603 *ep = p; 1604 } else 1605 l = mps; 1606 p->td.td_token = 1607 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1608 UHCI_TD_OUT(l, endpt, addr, tog)); 1609 p->td.td_buffer = htole32(DMAADDR(dma, i * mps)); 1610 tog ^= 1; 1611 } 1612 *sp = lastp; 1613 DPRINTFN(10, ("%s: nexttog=%d\n", __func__, upipe->nexttoggle)); 1614 return (USBD_NORMAL_COMPLETION); 1615 } 1616 1617 void 1618 uhci_device_clear_toggle(struct usbd_pipe *pipe) 1619 { 1620 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1621 upipe->nexttoggle = 0; 1622 } 1623 1624 usbd_status 1625 uhci_device_bulk_transfer(struct usbd_xfer *xfer) 1626 { 1627 usbd_status err; 1628 1629 /* Insert last in queue. */ 1630 err = usb_insert_transfer(xfer); 1631 if (err) 1632 return (err); 1633 1634 /* 1635 * Pipe isn't running (otherwise err would be USBD_INPROG), 1636 * so start it first. 1637 */ 1638 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1639 } 1640 1641 usbd_status 1642 uhci_device_bulk_start(struct usbd_xfer *xfer) 1643 { 1644 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 1645 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1646 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 1647 struct uhci_soft_td *data, *dataend; 1648 struct uhci_soft_qh *sqh; 1649 usbd_status err; 1650 u_int len; 1651 int endpt; 1652 int s; 1653 1654 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%u flags=%d ux=%p\n", 1655 xfer, xfer->length, xfer->flags, ux)); 1656 1657 if (sc->sc_bus.dying) 1658 return (USBD_IOERROR); 1659 1660 #ifdef DIAGNOSTIC 1661 if (xfer->rqflags & URQ_REQUEST) 1662 panic("uhci_device_bulk_start: a request"); 1663 #endif 1664 1665 len = xfer->length; 1666 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 1667 sqh = upipe->u.bulk.sqh; 1668 1669 err = uhci_alloc_std_chain(sc, len, xfer, &data, &dataend); 1670 if (err) 1671 return (err); 1672 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1673 1674 #ifdef UHCI_DEBUG 1675 if (uhcidebug > 8) { 1676 DPRINTF(("uhci_device_bulk_start: data(1)\n")); 1677 uhci_dump_tds(data); 1678 } 1679 #endif 1680 1681 /* Set up interrupt info. */ 1682 ux->stdstart = data; 1683 ux->stdend = dataend; 1684 #ifdef DIAGNOSTIC 1685 if (!ux->isdone) { 1686 printf("uhci_device_bulk_start: not done, ux=%p\n", ux); 1687 } 1688 ux->isdone = 0; 1689 #endif 1690 1691 sqh->elink = data; 1692 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1693 1694 s = splusb(); 1695 uhci_add_bulk(sc, sqh); 1696 uhci_add_intr_list(sc, ux); 1697 1698 if (xfer->timeout && !sc->sc_bus.use_polling) { 1699 timeout_del(&xfer->timeout_handle); 1700 timeout_set(&xfer->timeout_handle, uhci_timeout, xfer); 1701 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 1702 } 1703 xfer->status = USBD_IN_PROGRESS; 1704 splx(s); 1705 1706 #ifdef UHCI_DEBUG 1707 if (uhcidebug > 10) { 1708 DPRINTF(("uhci_device_bulk_start: data(2)\n")); 1709 uhci_dump_tds(data); 1710 } 1711 #endif 1712 1713 if (sc->sc_bus.use_polling) 1714 uhci_waitintr(sc, xfer); 1715 1716 return (USBD_IN_PROGRESS); 1717 } 1718 1719 /* Abort a device bulk request. */ 1720 void 1721 uhci_device_bulk_abort(struct usbd_xfer *xfer) 1722 { 1723 DPRINTF(("uhci_device_bulk_abort:\n")); 1724 uhci_abort_xfer(xfer, USBD_CANCELLED); 1725 } 1726 1727 /* 1728 * Abort a device request. 1729 * If this routine is called at splusb() it guarantees that the request 1730 * will be removed from the hardware scheduling and that the callback 1731 * for it will be called with USBD_CANCELLED status. 1732 * It's impossible to guarantee that the requested transfer will not 1733 * have happened since the hardware runs concurrently. 1734 * If the transaction has already happened we rely on the ordinary 1735 * interrupt processing to process it. 1736 */ 1737 void 1738 uhci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 1739 { 1740 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 1741 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 1742 struct uhci_soft_td *std; 1743 int s; 1744 1745 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 1746 1747 if (sc->sc_bus.dying) { 1748 /* If we're dying, just do the software part. */ 1749 s = splusb(); 1750 xfer->status = status; /* make software ignore it */ 1751 timeout_del(&xfer->timeout_handle); 1752 usb_rem_task(xfer->device, &xfer->abort_task); 1753 #ifdef DIAGNOSTIC 1754 ux->isdone = 1; 1755 #endif 1756 usb_transfer_complete(xfer); 1757 splx(s); 1758 return; 1759 } 1760 1761 if (xfer->device->bus->intr_context || !curproc) 1762 panic("uhci_abort_xfer: not in process context"); 1763 1764 /* 1765 * Step 1: Make interrupt routine and hardware ignore xfer. 1766 */ 1767 s = splusb(); 1768 xfer->status = status; /* make software ignore it */ 1769 timeout_del(&xfer->timeout_handle); 1770 usb_rem_task(xfer->device, &xfer->abort_task); 1771 DPRINTFN(1,("uhci_abort_xfer: stop ux=%p\n", ux)); 1772 for (std = ux->stdstart; std != NULL; std = std->link.std) 1773 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1774 splx(s); 1775 1776 /* 1777 * Step 2: Wait until we know hardware has finished any possible 1778 * use of the xfer. Also make sure the soft interrupt routine 1779 * has run. 1780 */ 1781 usb_delay_ms(&sc->sc_bus, 2); /* Hardware finishes in 1ms */ 1782 s = splusb(); 1783 sc->sc_softwake = 1; 1784 usb_schedsoftintr(&sc->sc_bus); 1785 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 1786 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 1787 splx(s); 1788 1789 /* 1790 * Step 3: Execute callback. 1791 */ 1792 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 1793 s = splusb(); 1794 #ifdef DIAGNOSTIC 1795 ux->isdone = 1; 1796 #endif 1797 usb_transfer_complete(xfer); 1798 splx(s); 1799 } 1800 1801 /* Close a device bulk pipe. */ 1802 void 1803 uhci_device_bulk_close(struct usbd_pipe *pipe) 1804 { 1805 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus; 1806 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1807 1808 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1809 pipe->endpoint->savedtoggle = upipe->nexttoggle; 1810 } 1811 1812 usbd_status 1813 uhci_device_ctrl_transfer(struct usbd_xfer *xfer) 1814 { 1815 usbd_status err; 1816 1817 /* Insert last in queue. */ 1818 err = usb_insert_transfer(xfer); 1819 if (err) 1820 return (err); 1821 1822 /* 1823 * Pipe isn't running (otherwise err would be USBD_INPROG), 1824 * so start it first. 1825 */ 1826 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1827 } 1828 1829 usbd_status 1830 uhci_device_ctrl_start(struct usbd_xfer *xfer) 1831 { 1832 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 1833 usbd_status err; 1834 1835 if (sc->sc_bus.dying) 1836 return (USBD_IOERROR); 1837 1838 #ifdef DIAGNOSTIC 1839 if (!(xfer->rqflags & URQ_REQUEST)) 1840 panic("uhci_device_ctrl_transfer: not a request"); 1841 #endif 1842 1843 err = uhci_device_request(xfer); 1844 if (err) 1845 return (err); 1846 1847 if (sc->sc_bus.use_polling) 1848 uhci_waitintr(sc, xfer); 1849 1850 return (USBD_IN_PROGRESS); 1851 } 1852 1853 usbd_status 1854 uhci_device_intr_transfer(struct usbd_xfer *xfer) 1855 { 1856 usbd_status err; 1857 1858 /* Insert last in queue. */ 1859 err = usb_insert_transfer(xfer); 1860 if (err) 1861 return (err); 1862 1863 /* 1864 * Pipe isn't running (otherwise err would be USBD_INPROG), 1865 * so start it first. 1866 */ 1867 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1868 } 1869 1870 usbd_status 1871 uhci_device_intr_start(struct usbd_xfer *xfer) 1872 { 1873 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 1874 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1875 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 1876 struct uhci_soft_td *data, *dataend; 1877 struct uhci_soft_qh *sqh; 1878 usbd_status err; 1879 int endpt; 1880 int i, s; 1881 1882 if (sc->sc_bus.dying) 1883 return (USBD_IOERROR); 1884 1885 DPRINTFN(3,("uhci_device_intr_start: xfer=%p len=%u flags=%d\n", 1886 xfer, xfer->length, xfer->flags)); 1887 1888 #ifdef DIAGNOSTIC 1889 if (xfer->rqflags & URQ_REQUEST) 1890 panic("uhci_device_intr_start: a request"); 1891 #endif 1892 1893 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 1894 1895 upipe->u.intr.isread = usbd_xfer_isread(xfer); 1896 1897 err = uhci_alloc_std_chain(sc, xfer->length, xfer, &data, &dataend); 1898 1899 if (err) 1900 return (err); 1901 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1902 1903 #ifdef UHCI_DEBUG 1904 if (uhcidebug > 10) { 1905 DPRINTF(("uhci_device_intr_start: data(1)\n")); 1906 uhci_dump_tds(data); 1907 uhci_dump_qh(upipe->u.intr.qhs[0]); 1908 } 1909 #endif 1910 1911 s = splusb(); 1912 /* Set up interrupt info. */ 1913 ux->stdstart = data; 1914 ux->stdend = dataend; 1915 #ifdef DIAGNOSTIC 1916 if (!ux->isdone) { 1917 printf("uhci_device_intr_transfer: not done, ux=%p\n", ux); 1918 } 1919 ux->isdone = 0; 1920 #endif 1921 1922 DPRINTFN(10,("uhci_device_intr_start: qhs[0]=%p\n", 1923 upipe->u.intr.qhs[0])); 1924 for (i = 0; i < upipe->u.intr.npoll; i++) { 1925 sqh = upipe->u.intr.qhs[i]; 1926 sqh->elink = data; 1927 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1928 } 1929 uhci_add_intr_list(sc, ux); 1930 xfer->status = USBD_IN_PROGRESS; 1931 splx(s); 1932 1933 #ifdef UHCI_DEBUG 1934 if (uhcidebug > 10) { 1935 DPRINTF(("uhci_device_intr_start: data(2)\n")); 1936 uhci_dump_tds(data); 1937 uhci_dump_qh(upipe->u.intr.qhs[0]); 1938 } 1939 #endif 1940 1941 if (sc->sc_bus.use_polling) 1942 uhci_waitintr(sc, xfer); 1943 1944 return (USBD_IN_PROGRESS); 1945 } 1946 1947 /* Abort a device control request. */ 1948 void 1949 uhci_device_ctrl_abort(struct usbd_xfer *xfer) 1950 { 1951 DPRINTF(("uhci_device_ctrl_abort:\n")); 1952 uhci_abort_xfer(xfer, USBD_CANCELLED); 1953 } 1954 1955 /* Close a device control pipe. */ 1956 void 1957 uhci_device_ctrl_close(struct usbd_pipe *pipe) 1958 { 1959 } 1960 1961 void 1962 uhci_device_intr_abort(struct usbd_xfer *xfer) 1963 { 1964 KASSERT(!xfer->pipe->repeat || xfer->pipe->intrxfer == xfer); 1965 1966 uhci_abort_xfer(xfer, USBD_CANCELLED); 1967 } 1968 1969 /* Close a device interrupt pipe. */ 1970 void 1971 uhci_device_intr_close(struct usbd_pipe *pipe) 1972 { 1973 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1974 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus; 1975 int i, npoll; 1976 int s; 1977 1978 /* Unlink descriptors from controller data structures. */ 1979 npoll = upipe->u.intr.npoll; 1980 s = splusb(); 1981 for (i = 0; i < npoll; i++) 1982 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 1983 splx(s); 1984 1985 /* 1986 * We now have to wait for any activity on the physical 1987 * descriptors to stop. 1988 */ 1989 usb_delay_ms(&sc->sc_bus, 2); 1990 1991 for(i = 0; i < npoll; i++) 1992 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 1993 free(upipe->u.intr.qhs, M_USBHC, 0); 1994 1995 /* XXX free other resources */ 1996 } 1997 1998 usbd_status 1999 uhci_device_request(struct usbd_xfer *xfer) 2000 { 2001 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 2002 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2003 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 2004 usb_device_request_t *req = &xfer->request; 2005 int addr = xfer->device->address; 2006 int endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2007 struct uhci_soft_td *setup, *data, *stat, *next, *dataend; 2008 struct uhci_soft_qh *sqh; 2009 u_int len; 2010 u_int32_t ls; 2011 usbd_status err; 2012 int s; 2013 2014 DPRINTFN(3,("uhci_device_request type=0x%02x, request=0x%02x, " 2015 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n", 2016 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2017 UGETW(req->wIndex), UGETW(req->wLength), 2018 addr, endpt)); 2019 2020 ls = xfer->device->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2021 len = UGETW(req->wLength); 2022 2023 setup = upipe->u.ctl.setup; 2024 stat = upipe->u.ctl.stat; 2025 sqh = upipe->u.ctl.sqh; 2026 2027 /* Set up data transaction */ 2028 if (len != 0) { 2029 upipe->nexttoggle = 1; 2030 err = uhci_alloc_std_chain(sc, len, xfer, &data, &dataend); 2031 if (err) 2032 return (err); 2033 next = data; 2034 dataend->link.std = stat; 2035 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2036 } else { 2037 next = stat; 2038 } 2039 upipe->u.ctl.length = len; 2040 2041 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2042 2043 setup->link.std = next; 2044 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2045 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2046 UHCI_TD_ACTIVE); 2047 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2048 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2049 2050 stat->link.std = NULL; 2051 stat->td.td_link = htole32(UHCI_PTR_T); 2052 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2053 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2054 stat->td.td_token = htole32(usbd_xfer_isread(xfer) ? 2055 UHCI_TD_OUT(0, endpt, addr, 1) : UHCI_TD_IN (0, endpt, addr, 1)); 2056 stat->td.td_buffer = htole32(0); 2057 2058 #ifdef UHCI_DEBUG 2059 if (uhcidebug > 10) { 2060 DPRINTF(("uhci_device_request: before transfer\n")); 2061 uhci_dump_tds(setup); 2062 } 2063 #endif 2064 2065 /* Set up interrupt info. */ 2066 ux->stdstart = setup; 2067 ux->stdend = stat; 2068 #ifdef DIAGNOSTIC 2069 if (!ux->isdone) { 2070 printf("%s: not done, ux=%p\n", __func__, ux); 2071 } 2072 ux->isdone = 0; 2073 #endif 2074 2075 sqh->elink = setup; 2076 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2077 2078 s = splusb(); 2079 if (xfer->device->speed == USB_SPEED_LOW) 2080 uhci_add_ls_ctrl(sc, sqh); 2081 else 2082 uhci_add_hs_ctrl(sc, sqh); 2083 uhci_add_intr_list(sc, ux); 2084 #ifdef UHCI_DEBUG 2085 if (uhcidebug > 12) { 2086 struct uhci_soft_td *std; 2087 struct uhci_soft_qh *xqh; 2088 struct uhci_soft_qh *sxqh; 2089 int maxqh = 0; 2090 uhci_physaddr_t link; 2091 DPRINTF(("uhci_device_request: follow from [0]\n")); 2092 for (std = sc->sc_vframes[0].htd, link = 0; 2093 (link & UHCI_PTR_QH) == 0; 2094 std = std->link.std) { 2095 link = letoh32(std->td.td_link); 2096 uhci_dump_td(std); 2097 } 2098 sxqh = (struct uhci_soft_qh *)std; 2099 uhci_dump_qh(sxqh); 2100 for (xqh = sxqh; 2101 xqh != NULL; 2102 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2103 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2104 uhci_dump_qh(xqh); 2105 } 2106 DPRINTF(("Enqueued QH:\n")); 2107 uhci_dump_qh(sqh); 2108 uhci_dump_tds(sqh->elink); 2109 } 2110 #endif 2111 if (xfer->timeout && !sc->sc_bus.use_polling) { 2112 timeout_del(&xfer->timeout_handle); 2113 timeout_set(&xfer->timeout_handle, uhci_timeout, xfer); 2114 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 2115 } 2116 xfer->status = USBD_IN_PROGRESS; 2117 splx(s); 2118 2119 return (USBD_NORMAL_COMPLETION); 2120 } 2121 2122 usbd_status 2123 uhci_device_isoc_transfer(struct usbd_xfer *xfer) 2124 { 2125 usbd_status err; 2126 2127 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2128 2129 /* Put it on our queue, */ 2130 err = usb_insert_transfer(xfer); 2131 2132 /* bail out on error, */ 2133 if (err && err != USBD_IN_PROGRESS) 2134 return (err); 2135 2136 /* XXX should check inuse here */ 2137 2138 /* insert into schedule, */ 2139 uhci_device_isoc_enter(xfer); 2140 2141 /* and start if the pipe wasn't running */ 2142 if (!err) 2143 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2144 2145 return (err); 2146 } 2147 2148 void 2149 uhci_device_isoc_enter(struct usbd_xfer *xfer) 2150 { 2151 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 2152 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2153 struct iso *iso = &upipe->u.iso; 2154 struct uhci_soft_td *std; 2155 u_int32_t buf, len, status; 2156 int s, i, next, nframes; 2157 2158 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2159 "nframes=%d\n", 2160 iso->inuse, iso->next, xfer, xfer->nframes)); 2161 2162 if (sc->sc_bus.dying) 2163 return; 2164 2165 if (xfer->status == USBD_IN_PROGRESS) { 2166 /* This request has already been entered into the frame list */ 2167 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2168 /* XXX */ 2169 } 2170 2171 #ifdef DIAGNOSTIC 2172 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2173 printf("uhci_device_isoc_enter: overflow!\n"); 2174 #endif 2175 2176 next = iso->next; 2177 if (next == -1) { 2178 /* Not in use yet, schedule it a few frames ahead. */ 2179 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2180 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2181 } 2182 2183 xfer->status = USBD_IN_PROGRESS; 2184 ((struct uhci_xfer *)xfer)->curframe = next; 2185 2186 buf = DMAADDR(&xfer->dmabuf, 0); 2187 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2188 UHCI_TD_ACTIVE | 2189 UHCI_TD_IOS); 2190 nframes = xfer->nframes; 2191 s = splusb(); 2192 for (i = 0; i < nframes; i++) { 2193 std = iso->stds[next]; 2194 if (++next >= UHCI_VFRAMELIST_COUNT) 2195 next = 0; 2196 len = xfer->frlengths[i]; 2197 std->td.td_buffer = htole32(buf); 2198 if (i == nframes - 1) 2199 status |= UHCI_TD_IOC; 2200 std->td.td_status = htole32(status); 2201 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2202 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2203 #ifdef UHCI_DEBUG 2204 if (uhcidebug > 5) { 2205 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2206 uhci_dump_td(std); 2207 } 2208 #endif 2209 buf += len; 2210 } 2211 iso->next = next; 2212 iso->inuse += xfer->nframes; 2213 2214 splx(s); 2215 } 2216 2217 usbd_status 2218 uhci_device_isoc_start(struct usbd_xfer *xfer) 2219 { 2220 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 2221 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2222 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 2223 struct uhci_soft_td *end; 2224 int s, i; 2225 2226 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2227 2228 if (sc->sc_bus.dying) 2229 return (USBD_IOERROR); 2230 2231 #ifdef DIAGNOSTIC 2232 if (xfer->status != USBD_IN_PROGRESS) 2233 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2234 #endif 2235 2236 /* Find the last TD */ 2237 i = ux->curframe + xfer->nframes; 2238 if (i >= UHCI_VFRAMELIST_COUNT) 2239 i -= UHCI_VFRAMELIST_COUNT; 2240 end = upipe->u.iso.stds[i]; 2241 2242 #ifdef DIAGNOSTIC 2243 if (end == NULL) { 2244 printf("uhci_device_isoc_start: end == NULL\n"); 2245 return (USBD_INVAL); 2246 } 2247 #endif 2248 2249 s = splusb(); 2250 2251 /* Set up interrupt info. */ 2252 ux->stdstart = end; 2253 ux->stdend = end; 2254 #ifdef DIAGNOSTIC 2255 if (!ux->isdone) 2256 printf("%s: not done, ux=%p\n", __func__, ux); 2257 ux->isdone = 0; 2258 #endif 2259 uhci_add_intr_list(sc, ux); 2260 2261 splx(s); 2262 2263 if (sc->sc_bus.use_polling) { 2264 DPRINTF(("Starting uhci isoc xfer with polling. Bad idea?\n")); 2265 uhci_waitintr(sc, xfer); 2266 } 2267 2268 return (USBD_IN_PROGRESS); 2269 } 2270 2271 void 2272 uhci_device_isoc_abort(struct usbd_xfer *xfer) 2273 { 2274 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 2275 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2276 struct uhci_soft_td **stds = upipe->u.iso.stds; 2277 struct uhci_soft_td *std; 2278 int i, n, s, nframes, maxlen, len; 2279 2280 s = splusb(); 2281 2282 /* Transfer is already done. */ 2283 if (xfer->status != USBD_NOT_STARTED && 2284 xfer->status != USBD_IN_PROGRESS) { 2285 splx(s); 2286 return; 2287 } 2288 2289 /* Give xfer the requested abort code. */ 2290 xfer->status = USBD_CANCELLED; 2291 2292 /* make hardware ignore it, */ 2293 nframes = xfer->nframes; 2294 n = ux->curframe; 2295 maxlen = 0; 2296 for (i = 0; i < nframes; i++) { 2297 std = stds[n]; 2298 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2299 len = UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token)); 2300 if (len > maxlen) 2301 maxlen = len; 2302 if (++n >= UHCI_VFRAMELIST_COUNT) 2303 n = 0; 2304 } 2305 2306 /* and wait until we are sure the hardware has finished. */ 2307 delay(maxlen); 2308 2309 #ifdef DIAGNOSTIC 2310 ux->isdone = 1; 2311 #endif 2312 /* Run callback and remove from interrupt list. */ 2313 usb_transfer_complete(xfer); 2314 2315 splx(s); 2316 } 2317 2318 void 2319 uhci_device_isoc_close(struct usbd_pipe *pipe) 2320 { 2321 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus; 2322 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2323 struct uhci_soft_td *std, *vstd; 2324 struct iso *iso; 2325 int i, s; 2326 2327 /* 2328 * Make sure all TDs are marked as inactive. 2329 * Wait for completion. 2330 * Unschedule. 2331 * Deallocate. 2332 */ 2333 iso = &upipe->u.iso; 2334 2335 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2336 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2337 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2338 2339 s = splusb(); 2340 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2341 std = iso->stds[i]; 2342 for (vstd = sc->sc_vframes[i].htd; 2343 vstd != NULL && vstd->link.std != std; 2344 vstd = vstd->link.std) 2345 ; 2346 if (vstd == NULL) { 2347 /*panic*/ 2348 printf("uhci_device_isoc_close: %p not found\n", std); 2349 splx(s); 2350 return; 2351 } 2352 vstd->link = std->link; 2353 vstd->td.td_link = std->td.td_link; 2354 uhci_free_std(sc, std); 2355 } 2356 splx(s); 2357 2358 free(iso->stds, M_USBHC, 0); 2359 } 2360 2361 usbd_status 2362 uhci_setup_isoc(struct usbd_pipe *pipe) 2363 { 2364 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus; 2365 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2366 int addr = pipe->device->address; 2367 int endpt = pipe->endpoint->edesc->bEndpointAddress; 2368 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2369 struct uhci_soft_td *std, *vstd; 2370 u_int32_t token; 2371 struct iso *iso; 2372 int i, s; 2373 2374 iso = &upipe->u.iso; 2375 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * 2376 sizeof (struct uhci_soft_td *), 2377 M_USBHC, M_WAITOK); 2378 2379 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2380 UHCI_TD_OUT(0, endpt, addr, 0); 2381 2382 /* Allocate the TDs and mark as inactive; */ 2383 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2384 std = uhci_alloc_std(sc); 2385 if (std == 0) 2386 goto bad; 2387 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2388 std->td.td_token = htole32(token); 2389 iso->stds[i] = std; 2390 } 2391 2392 /* Insert TDs into schedule. */ 2393 s = splusb(); 2394 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2395 std = iso->stds[i]; 2396 vstd = sc->sc_vframes[i].htd; 2397 std->link = vstd->link; 2398 std->td.td_link = vstd->td.td_link; 2399 vstd->link.std = std; 2400 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2401 } 2402 splx(s); 2403 2404 iso->next = -1; 2405 iso->inuse = 0; 2406 2407 return (USBD_NORMAL_COMPLETION); 2408 2409 bad: 2410 while (--i >= 0) 2411 uhci_free_std(sc, iso->stds[i]); 2412 free(iso->stds, M_USBHC, 0); 2413 return (USBD_NOMEM); 2414 } 2415 2416 void 2417 uhci_device_isoc_done(struct usbd_xfer *xfer) 2418 { 2419 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 2420 2421 DPRINTFN(4, ("uhci_device_isoc_done: length=%d\n", xfer->actlen)); 2422 2423 if (!uhci_active_intr_list(ux)) 2424 return; 2425 2426 #ifdef DIAGNOSTIC 2427 if (ux->stdend == NULL) { 2428 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2429 #ifdef UHCI_DEBUG 2430 uhci_dump_xfer(ux); 2431 #endif 2432 return; 2433 } 2434 #endif 2435 2436 /* Turn off the interrupt since it is active even if the TD is not. */ 2437 ux->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2438 2439 uhci_del_intr_list(ux); /* remove from active list */ 2440 } 2441 2442 void 2443 uhci_device_intr_done(struct usbd_xfer *xfer) 2444 { 2445 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 2446 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2447 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 2448 struct uhci_soft_qh *sqh; 2449 int i, npoll; 2450 2451 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2452 2453 npoll = upipe->u.intr.npoll; 2454 for(i = 0; i < npoll; i++) { 2455 sqh = upipe->u.intr.qhs[i]; 2456 sqh->elink = NULL; 2457 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2458 } 2459 uhci_free_std_chain(sc, ux->stdstart, NULL); 2460 2461 /* XXX Wasteful. */ 2462 if (xfer->pipe->repeat) { 2463 struct uhci_soft_td *data, *dataend; 2464 2465 DPRINTFN(5,("uhci_device_intr_done: requeuing\n")); 2466 2467 /* This alloc cannot fail since we freed the chain above. */ 2468 uhci_alloc_std_chain(sc, xfer->length, xfer, &data, &dataend); 2469 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2470 2471 #ifdef UHCI_DEBUG 2472 if (uhcidebug > 10) { 2473 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2474 uhci_dump_tds(data); 2475 uhci_dump_qh(upipe->u.intr.qhs[0]); 2476 } 2477 #endif 2478 2479 ux->stdstart = data; 2480 ux->stdend = dataend; 2481 #ifdef DIAGNOSTIC 2482 if (!ux->isdone) { 2483 printf("%s: not done, ux=%p\n", __func__, ux); 2484 } 2485 ux->isdone = 0; 2486 #endif 2487 for (i = 0; i < npoll; i++) { 2488 sqh = upipe->u.intr.qhs[i]; 2489 sqh->elink = data; 2490 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2491 } 2492 xfer->status = USBD_IN_PROGRESS; 2493 /* The ux is already on the examined list, just leave it. */ 2494 } else { 2495 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 2496 if (uhci_active_intr_list(ux)) 2497 uhci_del_intr_list(ux); 2498 } 2499 } 2500 2501 /* Deallocate request data structures */ 2502 void 2503 uhci_device_ctrl_done(struct usbd_xfer *xfer) 2504 { 2505 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 2506 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2507 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 2508 2509 #ifdef DIAGNOSTIC 2510 if (!(xfer->rqflags & URQ_REQUEST)) 2511 panic("uhci_device_ctrl_done: not a request"); 2512 #endif 2513 2514 if (!uhci_active_intr_list(ux)) 2515 return; 2516 2517 uhci_del_intr_list(ux); /* remove from active list */ 2518 2519 if (xfer->device->speed == USB_SPEED_LOW) 2520 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 2521 else 2522 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 2523 2524 if (upipe->u.ctl.length != 0) 2525 uhci_free_std_chain(sc, ux->stdstart->link.std, ux->stdend); 2526 2527 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 2528 } 2529 2530 /* Deallocate request data structures */ 2531 void 2532 uhci_device_bulk_done(struct usbd_xfer *xfer) 2533 { 2534 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 2535 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2536 struct uhci_xfer *ux = (struct uhci_xfer *)xfer; 2537 2538 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ux=%p sc=%p upipe=%p\n", 2539 xfer, ux, sc, upipe)); 2540 2541 if (!uhci_active_intr_list(ux)) 2542 return; 2543 2544 uhci_del_intr_list(ux); /* remove from active list */ 2545 2546 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2547 2548 uhci_free_std_chain(sc, ux->stdstart, NULL); 2549 2550 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 2551 } 2552 2553 /* Add interrupt QH, called with vflock. */ 2554 void 2555 uhci_add_intr(struct uhci_softc *sc, struct uhci_soft_qh *sqh) 2556 { 2557 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2558 struct uhci_soft_qh *eqh; 2559 2560 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2561 2562 eqh = vf->eqh; 2563 sqh->hlink = eqh->hlink; 2564 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2565 eqh->hlink = sqh; 2566 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 2567 vf->eqh = sqh; 2568 vf->bandwidth++; 2569 } 2570 2571 /* Remove interrupt QH. */ 2572 void 2573 uhci_remove_intr(struct uhci_softc *sc, struct uhci_soft_qh *sqh) 2574 { 2575 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2576 struct uhci_soft_qh *pqh; 2577 2578 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2579 2580 /* See comment in uhci_remove_ctrl() */ 2581 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 2582 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2583 delay(UHCI_QH_REMOVE_DELAY); 2584 } 2585 2586 pqh = uhci_find_prev_qh(vf->hqh, sqh); 2587 pqh->hlink = sqh->hlink; 2588 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2589 delay(UHCI_QH_REMOVE_DELAY); 2590 if (vf->eqh == sqh) 2591 vf->eqh = pqh; 2592 vf->bandwidth--; 2593 } 2594 2595 usbd_status 2596 uhci_device_setintr(struct uhci_softc *sc, struct uhci_pipe *upipe, int ival) 2597 { 2598 struct uhci_soft_qh *sqh, **qhs; 2599 int i, npoll, s; 2600 u_int bestbw, bw, bestoffs, offs; 2601 2602 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 2603 if (ival == 0) { 2604 printf("uhci_device_setintr: 0 interval\n"); 2605 return (USBD_INVAL); 2606 } 2607 2608 if (ival > UHCI_VFRAMELIST_COUNT) 2609 ival = UHCI_VFRAMELIST_COUNT; 2610 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2611 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 2612 2613 qhs = malloc(npoll * sizeof(struct uhci_soft_qh *), M_USBHC, M_NOWAIT); 2614 if (qhs == NULL) 2615 return (USBD_NOMEM); 2616 2617 /* 2618 * Figure out which offset in the schedule that has most 2619 * bandwidth left over. 2620 */ 2621 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2622 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2623 for (bw = i = 0; i < npoll; i++) 2624 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2625 if (bw < bestbw) { 2626 bestbw = bw; 2627 bestoffs = offs; 2628 } 2629 } 2630 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2631 2632 for(i = 0; i < npoll; i++) { 2633 sqh = uhci_alloc_sqh(sc); 2634 if (sqh == NULL) { 2635 while (i > 0) 2636 uhci_free_sqh(sc, qhs[--i]); 2637 free(qhs, M_USBHC, 0); 2638 return (USBD_NOMEM); 2639 } 2640 sqh->elink = NULL; 2641 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2642 sqh->pos = MOD(i * ival + bestoffs); 2643 qhs[i] = sqh; 2644 } 2645 #undef MOD 2646 2647 upipe->u.intr.npoll = npoll; 2648 upipe->u.intr.qhs = qhs; 2649 2650 s = splusb(); 2651 /* Enter QHs into the controller data structures. */ 2652 for(i = 0; i < npoll; i++) 2653 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 2654 splx(s); 2655 2656 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 2657 return (USBD_NORMAL_COMPLETION); 2658 } 2659 2660 /* Open a new pipe. */ 2661 usbd_status 2662 uhci_open(struct usbd_pipe *pipe) 2663 { 2664 struct uhci_softc *sc = (struct uhci_softc *)pipe->device->bus; 2665 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2666 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2667 usbd_status err; 2668 int ival; 2669 2670 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d\n", 2671 pipe, pipe->device->address, ed->bEndpointAddress)); 2672 2673 upipe->nexttoggle = pipe->endpoint->savedtoggle; 2674 2675 /* Root Hub */ 2676 if (pipe->device->depth == 0) { 2677 switch (ed->bEndpointAddress) { 2678 case USB_CONTROL_ENDPOINT: 2679 pipe->methods = &uhci_root_ctrl_methods; 2680 break; 2681 case UE_DIR_IN | UHCI_INTR_ENDPT: 2682 pipe->methods = &uhci_root_intr_methods; 2683 break; 2684 default: 2685 return (USBD_INVAL); 2686 } 2687 } else { 2688 switch (ed->bmAttributes & UE_XFERTYPE) { 2689 case UE_CONTROL: 2690 pipe->methods = &uhci_device_ctrl_methods; 2691 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2692 if (upipe->u.ctl.sqh == NULL) 2693 goto bad; 2694 upipe->u.ctl.setup = uhci_alloc_std(sc); 2695 if (upipe->u.ctl.setup == NULL) { 2696 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2697 goto bad; 2698 } 2699 upipe->u.ctl.stat = uhci_alloc_std(sc); 2700 if (upipe->u.ctl.stat == NULL) { 2701 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2702 uhci_free_std(sc, upipe->u.ctl.setup); 2703 goto bad; 2704 } 2705 err = usb_allocmem(&sc->sc_bus, 2706 sizeof(usb_device_request_t), 2707 0, &upipe->u.ctl.reqdma); 2708 if (err) { 2709 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2710 uhci_free_std(sc, upipe->u.ctl.setup); 2711 uhci_free_std(sc, upipe->u.ctl.stat); 2712 goto bad; 2713 } 2714 break; 2715 case UE_INTERRUPT: 2716 pipe->methods = &uhci_device_intr_methods; 2717 ival = pipe->interval; 2718 if (ival == USBD_DEFAULT_INTERVAL) 2719 ival = ed->bInterval; 2720 return (uhci_device_setintr(sc, upipe, ival)); 2721 case UE_ISOCHRONOUS: 2722 pipe->methods = &uhci_device_isoc_methods; 2723 return (uhci_setup_isoc(pipe)); 2724 case UE_BULK: 2725 pipe->methods = &uhci_device_bulk_methods; 2726 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2727 if (upipe->u.bulk.sqh == NULL) 2728 goto bad; 2729 break; 2730 } 2731 } 2732 return (USBD_NORMAL_COMPLETION); 2733 2734 bad: 2735 return (USBD_NOMEM); 2736 } 2737 2738 /* 2739 * Data structures and routines to emulate the root hub. 2740 */ 2741 usb_device_descriptor_t uhci_devd = { 2742 USB_DEVICE_DESCRIPTOR_SIZE, 2743 UDESC_DEVICE, /* type */ 2744 {0x00, 0x01}, /* USB version */ 2745 UDCLASS_HUB, /* class */ 2746 UDSUBCLASS_HUB, /* subclass */ 2747 UDPROTO_FSHUB, /* protocol */ 2748 64, /* max packet */ 2749 {0},{0},{0x00,0x01}, /* device id */ 2750 1,2,0, /* string indices */ 2751 1 /* # of configurations */ 2752 }; 2753 2754 usb_config_descriptor_t uhci_confd = { 2755 USB_CONFIG_DESCRIPTOR_SIZE, 2756 UDESC_CONFIG, 2757 {USB_CONFIG_DESCRIPTOR_SIZE + 2758 USB_INTERFACE_DESCRIPTOR_SIZE + 2759 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2760 1, 2761 1, 2762 0, 2763 UC_SELF_POWERED, 2764 0 /* max power */ 2765 }; 2766 2767 usb_interface_descriptor_t uhci_ifcd = { 2768 USB_INTERFACE_DESCRIPTOR_SIZE, 2769 UDESC_INTERFACE, 2770 0, 2771 0, 2772 1, 2773 UICLASS_HUB, 2774 UISUBCLASS_HUB, 2775 UIPROTO_FSHUB, 2776 0 2777 }; 2778 2779 usb_endpoint_descriptor_t uhci_endpd = { 2780 USB_ENDPOINT_DESCRIPTOR_SIZE, 2781 UDESC_ENDPOINT, 2782 UE_DIR_IN | UHCI_INTR_ENDPT, 2783 UE_INTERRUPT, 2784 {8}, 2785 255 2786 }; 2787 2788 usb_hub_descriptor_t uhci_hubd_piix = { 2789 USB_HUB_DESCRIPTOR_SIZE, 2790 UDESC_HUB, 2791 2, 2792 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 2793 50, /* power on to power good */ 2794 0, 2795 { 0x00 }, /* both ports are removable */ 2796 }; 2797 2798 /* 2799 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 2800 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 2801 * should not be used by the USB subsystem. As we cannot issue a 2802 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 2803 * will be enabled as part of the reset. 2804 * 2805 * On the VT83C572, the port cannot be successfully enabled until the 2806 * outstanding "port enable change" and "connection status change" 2807 * events have been reset. 2808 */ 2809 usbd_status 2810 uhci_portreset(struct uhci_softc *sc, int index) 2811 { 2812 int lim, port, x; 2813 2814 if (index == 1) 2815 port = UHCI_PORTSC1; 2816 else if (index == 2) 2817 port = UHCI_PORTSC2; 2818 else 2819 return (USBD_IOERROR); 2820 2821 x = URWMASK(UREAD2(sc, port)); 2822 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2823 2824 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2825 2826 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 2827 index, UREAD2(sc, port))); 2828 2829 x = URWMASK(UREAD2(sc, port)); 2830 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 2831 2832 delay(100); 2833 2834 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 2835 index, UREAD2(sc, port))); 2836 2837 x = URWMASK(UREAD2(sc, port)); 2838 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 2839 2840 for (lim = 10; --lim > 0;) { 2841 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 2842 2843 x = UREAD2(sc, port); 2844 2845 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 2846 index, lim, x)); 2847 2848 if (!(x & UHCI_PORTSC_CCS)) { 2849 /* 2850 * No device is connected (or was disconnected 2851 * during reset). Consider the port reset. 2852 * The delay must be long enough to ensure on 2853 * the initial iteration that the device 2854 * connection will have been registered. 50ms 2855 * appears to be sufficient, but 20ms is not. 2856 */ 2857 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 2858 index, lim)); 2859 break; 2860 } 2861 2862 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 2863 /* 2864 * Port enabled changed and/or connection 2865 * status changed were set. Reset either or 2866 * both raised flags (by writing a 1 to that 2867 * bit), and wait again for state to settle. 2868 */ 2869 UWRITE2(sc, port, URWMASK(x) | 2870 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 2871 continue; 2872 } 2873 2874 if (x & UHCI_PORTSC_PE) 2875 /* Port is enabled */ 2876 break; 2877 2878 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 2879 } 2880 2881 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 2882 index, UREAD2(sc, port))); 2883 2884 if (lim <= 0) { 2885 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 2886 return (USBD_TIMEOUT); 2887 } 2888 2889 sc->sc_isreset = 1; 2890 return (USBD_NORMAL_COMPLETION); 2891 } 2892 2893 /* 2894 * Simulate a hardware hub by handling all the necessary requests. 2895 */ 2896 usbd_status 2897 uhci_root_ctrl_transfer(struct usbd_xfer *xfer) 2898 { 2899 usbd_status err; 2900 2901 /* Insert last in queue. */ 2902 err = usb_insert_transfer(xfer); 2903 if (err) 2904 return (err); 2905 2906 /* 2907 * Pipe isn't running (otherwise err would be USBD_INPROG), 2908 * so start it first. 2909 */ 2910 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2911 } 2912 2913 usbd_status 2914 uhci_root_ctrl_start(struct usbd_xfer *xfer) 2915 { 2916 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 2917 usb_device_request_t *req; 2918 void *buf = NULL; 2919 int port, x; 2920 int s, len, value, index, status, change, l, totlen = 0; 2921 usb_port_status_t ps; 2922 usbd_status err; 2923 2924 if (sc->sc_bus.dying) 2925 return (USBD_IOERROR); 2926 2927 #ifdef DIAGNOSTIC 2928 if (!(xfer->rqflags & URQ_REQUEST)) 2929 panic("uhci_root_ctrl_start: not a request"); 2930 #endif 2931 req = &xfer->request; 2932 2933 DPRINTFN(2,("uhci_root_ctrl_start type=0x%02x request=%02x\n", 2934 req->bmRequestType, req->bRequest)); 2935 2936 len = UGETW(req->wLength); 2937 value = UGETW(req->wValue); 2938 index = UGETW(req->wIndex); 2939 2940 if (len != 0) 2941 buf = KERNADDR(&xfer->dmabuf, 0); 2942 2943 #define C(x,y) ((x) | ((y) << 8)) 2944 switch(C(req->bRequest, req->bmRequestType)) { 2945 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2946 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2947 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2948 /* 2949 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2950 * for the integrated root hub. 2951 */ 2952 break; 2953 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2954 if (len > 0) { 2955 *(u_int8_t *)buf = sc->sc_conf; 2956 totlen = 1; 2957 } 2958 break; 2959 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2960 DPRINTFN(2,("uhci_root_ctrl_start wValue=0x%04x\n", value)); 2961 switch(value >> 8) { 2962 case UDESC_DEVICE: 2963 if ((value & 0xff) != 0) { 2964 err = USBD_IOERROR; 2965 goto ret; 2966 } 2967 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2968 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 2969 memcpy(buf, &uhci_devd, l); 2970 break; 2971 case UDESC_CONFIG: 2972 if ((value & 0xff) != 0) { 2973 err = USBD_IOERROR; 2974 goto ret; 2975 } 2976 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2977 memcpy(buf, &uhci_confd, l); 2978 buf = (char *)buf + l; 2979 len -= l; 2980 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2981 totlen += l; 2982 memcpy(buf, &uhci_ifcd, l); 2983 buf = (char *)buf + l; 2984 len -= l; 2985 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2986 totlen += l; 2987 memcpy(buf, &uhci_endpd, l); 2988 break; 2989 case UDESC_STRING: 2990 if (len == 0) 2991 break; 2992 *(u_int8_t *)buf = 0; 2993 totlen = 1; 2994 switch (value & 0xff) { 2995 case 0: /* Language table */ 2996 totlen = usbd_str(buf, len, "\001"); 2997 break; 2998 case 1: /* Vendor */ 2999 totlen = usbd_str(buf, len, sc->sc_vendor); 3000 break; 3001 case 2: /* Product */ 3002 totlen = usbd_str(buf, len, "UHCI root hub"); 3003 break; 3004 } 3005 break; 3006 default: 3007 err = USBD_IOERROR; 3008 goto ret; 3009 } 3010 break; 3011 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3012 if (len > 0) { 3013 *(u_int8_t *)buf = 0; 3014 totlen = 1; 3015 } 3016 break; 3017 case C(UR_GET_STATUS, UT_READ_DEVICE): 3018 if (len > 1) { 3019 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3020 totlen = 2; 3021 } 3022 break; 3023 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3024 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3025 if (len > 1) { 3026 USETW(((usb_status_t *)buf)->wStatus, 0); 3027 totlen = 2; 3028 } 3029 break; 3030 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3031 if (value >= USB_MAX_DEVICES) { 3032 err = USBD_IOERROR; 3033 goto ret; 3034 } 3035 break; 3036 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3037 if (value != 0 && value != 1) { 3038 err = USBD_IOERROR; 3039 goto ret; 3040 } 3041 sc->sc_conf = value; 3042 break; 3043 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3044 break; 3045 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3046 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3047 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3048 err = USBD_IOERROR; 3049 goto ret; 3050 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3051 break; 3052 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3053 break; 3054 /* Hub requests */ 3055 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3056 break; 3057 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3058 DPRINTFN(3, ("uhci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 3059 "port=%d feature=%d\n", 3060 index, value)); 3061 if (index == 1) 3062 port = UHCI_PORTSC1; 3063 else if (index == 2) 3064 port = UHCI_PORTSC2; 3065 else { 3066 err = USBD_IOERROR; 3067 goto ret; 3068 } 3069 switch(value) { 3070 case UHF_PORT_ENABLE: 3071 x = URWMASK(UREAD2(sc, port)); 3072 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3073 break; 3074 case UHF_PORT_SUSPEND: 3075 x = URWMASK(UREAD2(sc, port)); 3076 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3077 break; 3078 case UHF_PORT_RESET: 3079 x = URWMASK(UREAD2(sc, port)); 3080 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3081 break; 3082 case UHF_C_PORT_CONNECTION: 3083 x = URWMASK(UREAD2(sc, port)); 3084 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3085 break; 3086 case UHF_C_PORT_ENABLE: 3087 x = URWMASK(UREAD2(sc, port)); 3088 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3089 break; 3090 case UHF_C_PORT_OVER_CURRENT: 3091 x = URWMASK(UREAD2(sc, port)); 3092 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3093 break; 3094 case UHF_C_PORT_RESET: 3095 sc->sc_isreset = 0; 3096 err = USBD_NORMAL_COMPLETION; 3097 goto ret; 3098 case UHF_PORT_CONNECTION: 3099 case UHF_PORT_OVER_CURRENT: 3100 case UHF_PORT_POWER: 3101 case UHF_PORT_LOW_SPEED: 3102 case UHF_C_PORT_SUSPEND: 3103 default: 3104 err = USBD_IOERROR; 3105 goto ret; 3106 } 3107 break; 3108 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3109 if (index == 1) 3110 port = UHCI_PORTSC1; 3111 else if (index == 2) 3112 port = UHCI_PORTSC2; 3113 else { 3114 err = USBD_IOERROR; 3115 goto ret; 3116 } 3117 if (len > 0) { 3118 *(u_int8_t *)buf = 3119 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3120 UHCI_PORTSC_LS_SHIFT; 3121 totlen = 1; 3122 } 3123 break; 3124 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3125 if ((value & 0xff) != 0) { 3126 err = USBD_IOERROR; 3127 goto ret; 3128 } 3129 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3130 totlen = l; 3131 memcpy(buf, &uhci_hubd_piix, l); 3132 break; 3133 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3134 if (len != 4) { 3135 err = USBD_IOERROR; 3136 goto ret; 3137 } 3138 memset(buf, 0, len); 3139 totlen = len; 3140 break; 3141 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3142 if (index == 1) 3143 port = UHCI_PORTSC1; 3144 else if (index == 2) 3145 port = UHCI_PORTSC2; 3146 else { 3147 err = USBD_IOERROR; 3148 goto ret; 3149 } 3150 if (len != 4) { 3151 err = USBD_IOERROR; 3152 goto ret; 3153 } 3154 x = UREAD2(sc, port); 3155 status = change = 0; 3156 if (x & UHCI_PORTSC_CCS) 3157 status |= UPS_CURRENT_CONNECT_STATUS; 3158 if (x & UHCI_PORTSC_CSC) 3159 change |= UPS_C_CONNECT_STATUS; 3160 if (x & UHCI_PORTSC_PE) 3161 status |= UPS_PORT_ENABLED; 3162 if (x & UHCI_PORTSC_POEDC) 3163 change |= UPS_C_PORT_ENABLED; 3164 if (x & UHCI_PORTSC_OCI) 3165 status |= UPS_OVERCURRENT_INDICATOR; 3166 if (x & UHCI_PORTSC_OCIC) 3167 change |= UPS_C_OVERCURRENT_INDICATOR; 3168 if (x & UHCI_PORTSC_SUSP) 3169 status |= UPS_SUSPEND; 3170 if (x & UHCI_PORTSC_LSDA) 3171 status |= UPS_LOW_SPEED; 3172 status |= UPS_PORT_POWER; 3173 if (sc->sc_isreset) 3174 change |= UPS_C_PORT_RESET; 3175 USETW(ps.wPortStatus, status); 3176 USETW(ps.wPortChange, change); 3177 l = min(len, sizeof ps); 3178 memcpy(buf, &ps, l); 3179 totlen = l; 3180 break; 3181 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3182 err = USBD_IOERROR; 3183 goto ret; 3184 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3185 break; 3186 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3187 if (index == 1) 3188 port = UHCI_PORTSC1; 3189 else if (index == 2) 3190 port = UHCI_PORTSC2; 3191 else { 3192 err = USBD_IOERROR; 3193 goto ret; 3194 } 3195 switch(value) { 3196 case UHF_PORT_ENABLE: 3197 x = URWMASK(UREAD2(sc, port)); 3198 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3199 break; 3200 case UHF_PORT_SUSPEND: 3201 x = URWMASK(UREAD2(sc, port)); 3202 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3203 break; 3204 case UHF_PORT_RESET: 3205 err = uhci_portreset(sc, index); 3206 goto ret; 3207 case UHF_PORT_POWER: 3208 /* Pretend we turned on power */ 3209 err = USBD_NORMAL_COMPLETION; 3210 goto ret; 3211 case UHF_PORT_DISOWN_TO_1_1: 3212 /* accept, but do nothing */ 3213 err = USBD_NORMAL_COMPLETION; 3214 goto ret; 3215 case UHF_C_PORT_CONNECTION: 3216 case UHF_C_PORT_ENABLE: 3217 case UHF_C_PORT_OVER_CURRENT: 3218 case UHF_PORT_CONNECTION: 3219 case UHF_PORT_OVER_CURRENT: 3220 case UHF_PORT_LOW_SPEED: 3221 case UHF_C_PORT_SUSPEND: 3222 case UHF_C_PORT_RESET: 3223 default: 3224 err = USBD_IOERROR; 3225 goto ret; 3226 } 3227 break; 3228 default: 3229 err = USBD_IOERROR; 3230 goto ret; 3231 } 3232 xfer->actlen = totlen; 3233 err = USBD_NORMAL_COMPLETION; 3234 ret: 3235 xfer->status = err; 3236 s = splusb(); 3237 usb_transfer_complete(xfer); 3238 splx(s); 3239 return (USBD_IN_PROGRESS); 3240 } 3241 3242 /* Abort a root control request. */ 3243 void 3244 uhci_root_ctrl_abort(struct usbd_xfer *xfer) 3245 { 3246 /* Nothing to do, all transfers are synchronous. */ 3247 } 3248 3249 /* Close the root pipe. */ 3250 void 3251 uhci_root_ctrl_close(struct usbd_pipe *pipe) 3252 { 3253 DPRINTF(("uhci_root_ctrl_close\n")); 3254 } 3255 3256 void 3257 uhci_root_intr_abort(struct usbd_xfer *xfer) 3258 { 3259 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 3260 int s; 3261 3262 timeout_del(&sc->sc_root_intr); 3263 sc->sc_intrxfer = NULL; 3264 3265 xfer->status = USBD_CANCELLED; 3266 s = splusb(); 3267 usb_transfer_complete(xfer); 3268 splx(s); 3269 } 3270 3271 usbd_status 3272 uhci_root_intr_transfer(struct usbd_xfer *xfer) 3273 { 3274 usbd_status err; 3275 3276 /* Insert last in queue. */ 3277 err = usb_insert_transfer(xfer); 3278 if (err) 3279 return (err); 3280 3281 /* Pipe isn't running (otherwise err would be USBD_INPROG), 3282 * start first 3283 */ 3284 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3285 } 3286 3287 /* Start a transfer on the root interrupt pipe */ 3288 usbd_status 3289 uhci_root_intr_start(struct usbd_xfer *xfer) 3290 { 3291 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 3292 3293 if (sc->sc_bus.dying) 3294 return (USBD_IOERROR); 3295 3296 sc->sc_intrxfer = xfer; 3297 timeout_add_msec(&sc->sc_root_intr, 255); 3298 3299 return (USBD_IN_PROGRESS); 3300 } 3301 3302 void 3303 uhci_root_intr_close(struct usbd_pipe *pipe) 3304 { 3305 } 3306 3307 void 3308 uhci_root_intr_done(struct usbd_xfer *xfer) 3309 { 3310 struct uhci_softc *sc = (struct uhci_softc *)xfer->device->bus; 3311 3312 if (xfer->pipe->repeat) 3313 timeout_add_msec(&sc->sc_root_intr, 255); 3314 } 3315