1 /* $OpenBSD: uhci.c,v 1.68 2008/06/29 10:04:15 yuo Exp $ */ 2 /* $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * USB Universal Host Controller driver. 37 * Handles e.g. PIIX3 and PIIX4. 38 * 39 * UHCI spec: http://download.intel.com/technology/usb/UHCI11D.pdf 40 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 41 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 42 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/malloc.h> 49 #include <sys/device.h> 50 #include <sys/selinfo.h> 51 #include <sys/proc.h> 52 #include <sys/queue.h> 53 54 #include <machine/bus.h> 55 #include <machine/endian.h> 56 57 #include <dev/usb/usb.h> 58 #include <dev/usb/usbdi.h> 59 #include <dev/usb/usbdivar.h> 60 #include <dev/usb/usb_mem.h> 61 #include <dev/usb/usb_quirks.h> 62 63 #include <dev/usb/uhcireg.h> 64 #include <dev/usb/uhcivar.h> 65 66 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 67 /*#define UHCI_CTL_LOOP */ 68 69 struct cfdriver uhci_cd = { 70 NULL, "uhci", DV_DULL 71 }; 72 73 #ifdef UHCI_DEBUG 74 uhci_softc_t *thesc; 75 #define DPRINTF(x) if (uhcidebug) printf x 76 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 77 int uhcidebug = 0; 78 int uhcinoloop = 0; 79 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 80 #else 81 #define DPRINTF(x) 82 #define DPRINTFN(n,x) 83 #endif 84 85 #define mstohz(ms) ((ms) * hz / 1000) 86 87 /* 88 * The UHCI controller is little endian, so on big endian machines 89 * the data stored in memory needs to be swapped. 90 */ 91 92 struct uhci_pipe { 93 struct usbd_pipe pipe; 94 int nexttoggle; 95 96 u_char aborting; 97 usbd_xfer_handle abortstart, abortend; 98 99 /* Info needed for different pipe kinds. */ 100 union { 101 /* Control pipe */ 102 struct { 103 uhci_soft_qh_t *sqh; 104 usb_dma_t reqdma; 105 uhci_soft_td_t *setup, *stat; 106 u_int length; 107 } ctl; 108 /* Interrupt pipe */ 109 struct { 110 int npoll; 111 int isread; 112 uhci_soft_qh_t **qhs; 113 } intr; 114 /* Bulk pipe */ 115 struct { 116 uhci_soft_qh_t *sqh; 117 u_int length; 118 int isread; 119 } bulk; 120 /* Iso pipe */ 121 struct iso { 122 uhci_soft_td_t **stds; 123 int next, inuse; 124 } iso; 125 } u; 126 }; 127 128 void uhci_globalreset(uhci_softc_t *); 129 usbd_status uhci_portreset(uhci_softc_t*, int); 130 void uhci_reset(uhci_softc_t *); 131 void uhci_shutdown(void *v); 132 void uhci_power(int, void *); 133 usbd_status uhci_run(uhci_softc_t *, int run); 134 uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 135 void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 136 uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 137 void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 138 #if 0 139 void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 140 uhci_intr_info_t *); 141 void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 142 #endif 143 144 void uhci_free_std_chain(uhci_softc_t *, 145 uhci_soft_td_t *, uhci_soft_td_t *); 146 usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 147 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 148 uhci_soft_td_t **, uhci_soft_td_t **); 149 void uhci_poll_hub(void *); 150 void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 151 void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 152 void uhci_idone(uhci_intr_info_t *); 153 154 void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 155 156 void uhci_timeout(void *); 157 void uhci_timeout_task(void *); 158 void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 159 void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 160 void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 161 void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 162 void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 163 void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 164 int uhci_str(usb_string_descriptor_t *, int, char *); 165 void uhci_add_loop(uhci_softc_t *sc); 166 void uhci_rem_loop(uhci_softc_t *sc); 167 168 usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 169 void uhci_device_isoc_enter(usbd_xfer_handle); 170 171 usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 172 void uhci_freem(struct usbd_bus *, usb_dma_t *); 173 174 usbd_xfer_handle uhci_allocx(struct usbd_bus *); 175 void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 176 177 usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 178 usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 179 void uhci_device_ctrl_abort(usbd_xfer_handle); 180 void uhci_device_ctrl_close(usbd_pipe_handle); 181 void uhci_device_ctrl_done(usbd_xfer_handle); 182 183 usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 184 usbd_status uhci_device_intr_start(usbd_xfer_handle); 185 void uhci_device_intr_abort(usbd_xfer_handle); 186 void uhci_device_intr_close(usbd_pipe_handle); 187 void uhci_device_intr_done(usbd_xfer_handle); 188 189 usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 190 usbd_status uhci_device_bulk_start(usbd_xfer_handle); 191 void uhci_device_bulk_abort(usbd_xfer_handle); 192 void uhci_device_bulk_close(usbd_pipe_handle); 193 void uhci_device_bulk_done(usbd_xfer_handle); 194 195 usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 196 usbd_status uhci_device_isoc_start(usbd_xfer_handle); 197 void uhci_device_isoc_abort(usbd_xfer_handle); 198 void uhci_device_isoc_close(usbd_pipe_handle); 199 void uhci_device_isoc_done(usbd_xfer_handle); 200 201 usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 202 usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 203 void uhci_root_ctrl_abort(usbd_xfer_handle); 204 void uhci_root_ctrl_close(usbd_pipe_handle); 205 void uhci_root_ctrl_done(usbd_xfer_handle); 206 207 usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 208 usbd_status uhci_root_intr_start(usbd_xfer_handle); 209 void uhci_root_intr_abort(usbd_xfer_handle); 210 void uhci_root_intr_close(usbd_pipe_handle); 211 void uhci_root_intr_done(usbd_xfer_handle); 212 213 usbd_status uhci_open(usbd_pipe_handle); 214 void uhci_poll(struct usbd_bus *); 215 void uhci_softintr(void *); 216 217 usbd_status uhci_device_request(usbd_xfer_handle xfer); 218 219 void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 220 void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 221 usbd_status uhci_device_setintr(uhci_softc_t *sc, 222 struct uhci_pipe *pipe, int ival); 223 224 void uhci_device_clear_toggle(usbd_pipe_handle pipe); 225 void uhci_noop(usbd_pipe_handle pipe); 226 227 __inline__ uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 228 uhci_soft_qh_t *); 229 230 #ifdef UHCI_DEBUG 231 void uhci_dump_all(uhci_softc_t *); 232 void uhci_dumpregs(uhci_softc_t *); 233 void uhci_dump_qhs(uhci_soft_qh_t *); 234 void uhci_dump_qh(uhci_soft_qh_t *); 235 void uhci_dump_tds(uhci_soft_td_t *); 236 void uhci_dump_td(uhci_soft_td_t *); 237 void uhci_dump_ii(uhci_intr_info_t *ii); 238 void uhci_dump(void); 239 #endif 240 241 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 242 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 243 #define UWRITE1(sc, r, x) \ 244 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 245 } while (/*CONSTCOND*/0) 246 #define UWRITE2(sc, r, x) \ 247 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 248 } while (/*CONSTCOND*/0) 249 #define UWRITE4(sc, r, x) \ 250 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 251 } while (/*CONSTCOND*/0) 252 #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 253 #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 254 #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 255 256 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 257 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 258 259 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 260 261 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 262 263 #define UHCI_INTR_ENDPT 1 264 265 struct usbd_bus_methods uhci_bus_methods = { 266 uhci_open, 267 uhci_softintr, 268 uhci_poll, 269 uhci_allocm, 270 uhci_freem, 271 uhci_allocx, 272 uhci_freex, 273 }; 274 275 struct usbd_pipe_methods uhci_root_ctrl_methods = { 276 uhci_root_ctrl_transfer, 277 uhci_root_ctrl_start, 278 uhci_root_ctrl_abort, 279 uhci_root_ctrl_close, 280 uhci_noop, 281 uhci_root_ctrl_done, 282 }; 283 284 struct usbd_pipe_methods uhci_root_intr_methods = { 285 uhci_root_intr_transfer, 286 uhci_root_intr_start, 287 uhci_root_intr_abort, 288 uhci_root_intr_close, 289 uhci_noop, 290 uhci_root_intr_done, 291 }; 292 293 struct usbd_pipe_methods uhci_device_ctrl_methods = { 294 uhci_device_ctrl_transfer, 295 uhci_device_ctrl_start, 296 uhci_device_ctrl_abort, 297 uhci_device_ctrl_close, 298 uhci_noop, 299 uhci_device_ctrl_done, 300 }; 301 302 struct usbd_pipe_methods uhci_device_intr_methods = { 303 uhci_device_intr_transfer, 304 uhci_device_intr_start, 305 uhci_device_intr_abort, 306 uhci_device_intr_close, 307 uhci_device_clear_toggle, 308 uhci_device_intr_done, 309 }; 310 311 struct usbd_pipe_methods uhci_device_bulk_methods = { 312 uhci_device_bulk_transfer, 313 uhci_device_bulk_start, 314 uhci_device_bulk_abort, 315 uhci_device_bulk_close, 316 uhci_device_clear_toggle, 317 uhci_device_bulk_done, 318 }; 319 320 struct usbd_pipe_methods uhci_device_isoc_methods = { 321 uhci_device_isoc_transfer, 322 uhci_device_isoc_start, 323 uhci_device_isoc_abort, 324 uhci_device_isoc_close, 325 uhci_noop, 326 uhci_device_isoc_done, 327 }; 328 329 #define uhci_add_intr_info(sc, ii) \ 330 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 331 #define uhci_del_intr_info(ii) \ 332 do { \ 333 LIST_REMOVE((ii), list); \ 334 (ii)->list.le_prev = NULL; \ 335 } while (0) 336 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 337 338 __inline__ uhci_soft_qh_t * 339 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 340 { 341 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 342 343 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 344 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 345 if (letoh32(pqh->qh.qh_hlink) & UHCI_PTR_T) { 346 printf("uhci_find_prev_qh: QH not found\n"); 347 return (NULL); 348 } 349 #endif 350 } 351 return (pqh); 352 } 353 354 void 355 uhci_globalreset(uhci_softc_t *sc) 356 { 357 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 358 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 359 UHCICMD(sc, 0); /* do nothing */ 360 } 361 362 usbd_status 363 uhci_init(uhci_softc_t *sc) 364 { 365 usbd_status err; 366 int i, j; 367 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 368 uhci_soft_td_t *std; 369 370 DPRINTFN(1,("uhci_init: start\n")); 371 372 #ifdef UHCI_DEBUG 373 thesc = sc; 374 375 if (uhcidebug > 2) 376 uhci_dumpregs(sc); 377 #endif 378 379 /* Save SOF over HC reset. */ 380 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 381 382 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 383 uhci_globalreset(sc); /* reset the controller */ 384 uhci_reset(sc); 385 386 /* Restore saved SOF. */ 387 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 388 389 /* Allocate and initialize real frame array. */ 390 err = usb_allocmem(&sc->sc_bus, 391 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 392 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 393 if (err) 394 return (err); 395 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 396 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 397 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 398 399 /* 400 * Allocate a TD, inactive, that hangs from the last QH. 401 * This is to avoid a bug in the PIIX that makes it run berserk 402 * otherwise. 403 */ 404 std = uhci_alloc_std(sc); 405 if (std == NULL) 406 return (USBD_NOMEM); 407 std->link.std = NULL; 408 std->td.td_link = htole32(UHCI_PTR_T); 409 std->td.td_status = htole32(0); /* inactive */ 410 std->td.td_token = htole32(0); 411 std->td.td_buffer = htole32(0); 412 413 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 414 lsqh = uhci_alloc_sqh(sc); 415 if (lsqh == NULL) 416 return (USBD_NOMEM); 417 lsqh->hlink = NULL; 418 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 419 lsqh->elink = std; 420 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 421 sc->sc_last_qh = lsqh; 422 423 /* Allocate the dummy QH where bulk traffic will be queued. */ 424 bsqh = uhci_alloc_sqh(sc); 425 if (bsqh == NULL) 426 return (USBD_NOMEM); 427 bsqh->hlink = lsqh; 428 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 429 bsqh->elink = NULL; 430 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 431 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 432 433 /* Allocate dummy QH where high speed control traffic will be queued. */ 434 chsqh = uhci_alloc_sqh(sc); 435 if (chsqh == NULL) 436 return (USBD_NOMEM); 437 chsqh->hlink = bsqh; 438 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 439 chsqh->elink = NULL; 440 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 441 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 442 443 /* Allocate dummy QH where control traffic will be queued. */ 444 clsqh = uhci_alloc_sqh(sc); 445 if (clsqh == NULL) 446 return (USBD_NOMEM); 447 clsqh->hlink = chsqh; 448 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 449 clsqh->elink = NULL; 450 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 451 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 452 453 /* 454 * Make all (virtual) frame list pointers point to the interrupt 455 * queue heads and the interrupt queue heads at the control 456 * queue head and point the physical frame list to the virtual. 457 */ 458 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 459 std = uhci_alloc_std(sc); 460 sqh = uhci_alloc_sqh(sc); 461 if (std == NULL || sqh == NULL) 462 return (USBD_NOMEM); 463 std->link.sqh = sqh; 464 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 465 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 466 std->td.td_token = htole32(0); 467 std->td.td_buffer = htole32(0); 468 sqh->hlink = clsqh; 469 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 470 sqh->elink = NULL; 471 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 472 sc->sc_vframes[i].htd = std; 473 sc->sc_vframes[i].etd = std; 474 sc->sc_vframes[i].hqh = sqh; 475 sc->sc_vframes[i].eqh = sqh; 476 for (j = i; 477 j < UHCI_FRAMELIST_COUNT; 478 j += UHCI_VFRAMELIST_COUNT) 479 sc->sc_pframes[j] = htole32(std->physaddr); 480 } 481 482 LIST_INIT(&sc->sc_intrhead); 483 484 SIMPLEQ_INIT(&sc->sc_free_xfers); 485 486 timeout_set(&sc->sc_poll_handle, NULL, NULL); 487 488 /* Set up the bus struct. */ 489 sc->sc_bus.methods = &uhci_bus_methods; 490 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 491 492 sc->sc_suspend = PWR_RESUME; 493 sc->sc_powerhook = powerhook_establish(uhci_power, sc); 494 sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc); 495 496 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 497 498 DPRINTFN(1,("uhci_init: enabling\n")); 499 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 500 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 501 502 return (uhci_run(sc, 1)); /* and here we go... */ 503 } 504 505 int 506 uhci_activate(struct device *self, enum devact act) 507 { 508 struct uhci_softc *sc = (struct uhci_softc *)self; 509 int rv = 0; 510 511 switch (act) { 512 case DVACT_ACTIVATE: 513 break; 514 515 case DVACT_DEACTIVATE: 516 if (sc->sc_child != NULL) 517 rv = config_deactivate(sc->sc_child); 518 break; 519 } 520 return (rv); 521 } 522 523 int 524 uhci_detach(struct uhci_softc *sc, int flags) 525 { 526 usbd_xfer_handle xfer; 527 int rv = 0; 528 529 if (sc->sc_child != NULL) 530 rv = config_detach(sc->sc_child, flags); 531 532 if (rv != 0) 533 return (rv); 534 535 if (sc->sc_powerhook != NULL) 536 powerhook_disestablish(sc->sc_powerhook); 537 if (sc->sc_shutdownhook != NULL) 538 shutdownhook_disestablish(sc->sc_shutdownhook); 539 540 /* Free all xfers associated with this HC. */ 541 for (;;) { 542 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 543 if (xfer == NULL) 544 break; 545 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 546 free(xfer, M_USB); 547 } 548 549 /* XXX free other data structures XXX */ 550 551 return (rv); 552 } 553 554 usbd_status 555 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 556 { 557 struct uhci_softc *sc = (struct uhci_softc *)bus; 558 u_int32_t n; 559 560 /* 561 * XXX 562 * Since we are allocating a buffer we can assume that we will 563 * need TDs for it. Since we don't want to allocate those from 564 * an interrupt context, we allocate them here and free them again. 565 * This is no guarantee that we'll get the TDs next time... 566 */ 567 n = size / 8; 568 if (n > 16) { 569 u_int32_t i; 570 uhci_soft_td_t **stds; 571 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 572 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 573 M_NOWAIT | M_ZERO); 574 if (stds == NULL) 575 panic("uhci_allocm"); 576 for(i=0; i < n; i++) 577 stds[i] = uhci_alloc_std(sc); 578 for(i=0; i < n; i++) 579 if (stds[i] != NULL) 580 uhci_free_std(sc, stds[i]); 581 free(stds, M_TEMP); 582 } 583 584 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 585 } 586 587 void 588 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 589 { 590 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 591 } 592 593 usbd_xfer_handle 594 uhci_allocx(struct usbd_bus *bus) 595 { 596 struct uhci_softc *sc = (struct uhci_softc *)bus; 597 usbd_xfer_handle xfer; 598 599 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 600 if (xfer != NULL) { 601 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 602 #ifdef DIAGNOSTIC 603 if (xfer->busy_free != XFER_FREE) { 604 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 605 xfer->busy_free); 606 } 607 #endif 608 } else { 609 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 610 } 611 if (xfer != NULL) { 612 memset(xfer, 0, sizeof (struct uhci_xfer)); 613 UXFER(xfer)->iinfo.sc = sc; 614 #ifdef DIAGNOSTIC 615 UXFER(xfer)->iinfo.isdone = 1; 616 xfer->busy_free = XFER_BUSY; 617 #endif 618 } 619 return (xfer); 620 } 621 622 void 623 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 624 { 625 struct uhci_softc *sc = (struct uhci_softc *)bus; 626 627 #ifdef DIAGNOSTIC 628 if (xfer->busy_free != XFER_BUSY) { 629 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 630 xfer->busy_free); 631 return; 632 } 633 xfer->busy_free = XFER_FREE; 634 if (!UXFER(xfer)->iinfo.isdone) { 635 printf("uhci_freex: !isdone\n"); 636 return; 637 } 638 #endif 639 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 640 } 641 642 /* 643 * Shut down the controller when the system is going down. 644 */ 645 void 646 uhci_shutdown(void *v) 647 { 648 uhci_softc_t *sc = v; 649 650 DPRINTF(("uhci_shutdown: stopping the HC\n")); 651 uhci_run(sc, 0); /* stop the controller */ 652 } 653 654 /* 655 * Handle suspend/resume. 656 * 657 * We need to switch to polling mode here, because this routine is 658 * called from an interrupt context. This is all right since we 659 * are almost suspended anyway. 660 */ 661 void 662 uhci_power(int why, void *v) 663 { 664 uhci_softc_t *sc = v; 665 int cmd; 666 int s; 667 668 s = splhardusb(); 669 cmd = UREAD2(sc, UHCI_CMD); 670 671 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n", 672 sc, why, sc->sc_suspend, cmd)); 673 674 switch (why) { 675 case PWR_SUSPEND: 676 case PWR_STANDBY: 677 #ifdef UHCI_DEBUG 678 if (uhcidebug > 2) 679 uhci_dumpregs(sc); 680 #endif 681 if (sc->sc_intr_xfer != NULL) 682 timeout_del(&sc->sc_poll_handle); 683 sc->sc_bus.use_polling++; 684 uhci_run(sc, 0); /* stop the controller */ 685 686 /* save some state if BIOS doesn't */ 687 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 688 689 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 690 691 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 692 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 693 sc->sc_suspend = why; 694 sc->sc_bus.use_polling--; 695 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 696 break; 697 case PWR_RESUME: 698 #ifdef DIAGNOSTIC 699 if (sc->sc_suspend == PWR_RESUME) 700 printf("uhci_power: weird, resume without suspend.\n"); 701 #endif 702 sc->sc_bus.use_polling++; 703 sc->sc_suspend = why; 704 if (cmd & UHCI_CMD_RS) 705 uhci_run(sc, 0); /* in case BIOS has started it */ 706 707 /* restore saved state */ 708 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 709 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 710 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 711 712 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 713 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 714 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 715 UHCICMD(sc, UHCI_CMD_MAXP); 716 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 717 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 718 uhci_run(sc, 1); /* and start traffic again */ 719 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 720 sc->sc_bus.use_polling--; 721 if (sc->sc_intr_xfer != NULL) { 722 timeout_del(&sc->sc_poll_handle); 723 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, 724 sc->sc_intr_xfer); 725 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 726 } 727 #ifdef UHCI_DEBUG 728 if (uhcidebug > 2) 729 uhci_dumpregs(sc); 730 #endif 731 break; 732 } 733 splx(s); 734 } 735 736 #ifdef UHCI_DEBUG 737 void 738 uhci_dumpregs(uhci_softc_t *sc) 739 { 740 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 741 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 742 sc->sc_bus.bdev.dv_xname, 743 UREAD2(sc, UHCI_CMD), 744 UREAD2(sc, UHCI_STS), 745 UREAD2(sc, UHCI_INTR), 746 UREAD2(sc, UHCI_FRNUM), 747 UREAD4(sc, UHCI_FLBASEADDR), 748 UREAD1(sc, UHCI_SOF), 749 UREAD2(sc, UHCI_PORTSC1), 750 UREAD2(sc, UHCI_PORTSC2))); 751 } 752 753 void 754 uhci_dump_td(uhci_soft_td_t *p) 755 { 756 char sbuf[128], sbuf2[128]; 757 758 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 759 "token=0x%08lx buffer=0x%08lx\n", 760 p, (long)p->physaddr, 761 (long)letoh32(p->td.td_link), 762 (long)letoh32(p->td.td_status), 763 (long)letoh32(p->td.td_token), 764 (long)letoh32(p->td.td_buffer))); 765 766 bitmask_snprintf((u_int32_t)letoh32(p->td.td_link), "\20\1T\2Q\3VF", 767 sbuf, sizeof(sbuf)); 768 bitmask_snprintf((u_int32_t)letoh32(p->td.td_status), 769 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 770 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 771 sbuf2, sizeof(sbuf2)); 772 773 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 774 "D=%d,maxlen=%d\n", sbuf, sbuf2, 775 UHCI_TD_GET_ERRCNT(letoh32(p->td.td_status)), 776 UHCI_TD_GET_ACTLEN(letoh32(p->td.td_status)), 777 UHCI_TD_GET_PID(letoh32(p->td.td_token)), 778 UHCI_TD_GET_DEVADDR(letoh32(p->td.td_token)), 779 UHCI_TD_GET_ENDPT(letoh32(p->td.td_token)), 780 UHCI_TD_GET_DT(letoh32(p->td.td_token)), 781 UHCI_TD_GET_MAXLEN(letoh32(p->td.td_token)))); 782 } 783 784 void 785 uhci_dump_qh(uhci_soft_qh_t *sqh) 786 { 787 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 788 (int)sqh->physaddr, letoh32(sqh->qh.qh_hlink), 789 letoh32(sqh->qh.qh_elink))); 790 } 791 792 793 void 794 uhci_dump(void) 795 { 796 uhci_dump_all(thesc); 797 } 798 799 void 800 uhci_dump_all(uhci_softc_t *sc) 801 { 802 uhci_dumpregs(sc); 803 printf("intrs=%d\n", sc->sc_bus.no_intrs); 804 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 805 uhci_dump_qh(sc->sc_lctl_start); 806 } 807 808 809 void 810 uhci_dump_qhs(uhci_soft_qh_t *sqh) 811 { 812 uhci_dump_qh(sqh); 813 814 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 815 * Traverses sideways first, then down. 816 * 817 * QH1 818 * QH2 819 * No QH 820 * TD2.1 821 * TD2.2 822 * TD1.1 823 * etc. 824 * 825 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 826 */ 827 828 829 if (sqh->hlink != NULL && !(letoh32(sqh->qh.qh_hlink) & UHCI_PTR_T)) 830 uhci_dump_qhs(sqh->hlink); 831 else 832 DPRINTF(("No QH\n")); 833 834 if (sqh->elink != NULL && !(letoh32(sqh->qh.qh_elink) & UHCI_PTR_T)) 835 uhci_dump_tds(sqh->elink); 836 else 837 DPRINTF(("No TD\n")); 838 } 839 840 void 841 uhci_dump_tds(uhci_soft_td_t *std) 842 { 843 uhci_soft_td_t *td; 844 845 for(td = std; td != NULL; td = td->link.std) { 846 uhci_dump_td(td); 847 848 /* Check whether the link pointer in this TD marks 849 * the link pointer as end of queue. This avoids 850 * printing the free list in case the queue/TD has 851 * already been moved there (seatbelt). 852 */ 853 if (letoh32(td->td.td_link) & UHCI_PTR_T || 854 letoh32(td->td.td_link) == 0) 855 break; 856 } 857 } 858 859 void 860 uhci_dump_ii(uhci_intr_info_t *ii) 861 { 862 usbd_pipe_handle pipe; 863 usb_endpoint_descriptor_t *ed; 864 usbd_device_handle dev; 865 866 #ifdef DIAGNOSTIC 867 #define DONE ii->isdone 868 #else 869 #define DONE 0 870 #endif 871 if (ii == NULL) { 872 printf("ii NULL\n"); 873 return; 874 } 875 if (ii->xfer == NULL) { 876 printf("ii %p: done=%d xfer=NULL\n", 877 ii, DONE); 878 return; 879 } 880 pipe = ii->xfer->pipe; 881 if (pipe == NULL) { 882 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 883 ii, DONE, ii->xfer); 884 return; 885 } 886 if (pipe->endpoint == NULL) { 887 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 888 ii, DONE, ii->xfer, pipe); 889 return; 890 } 891 if (pipe->device == NULL) { 892 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 893 ii, DONE, ii->xfer, pipe); 894 return; 895 } 896 ed = pipe->endpoint->edesc; 897 dev = pipe->device; 898 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 899 ii, DONE, ii->xfer, dev, 900 UGETW(dev->ddesc.idVendor), 901 UGETW(dev->ddesc.idProduct), 902 dev->address, pipe, 903 ed->bEndpointAddress, ed->bmAttributes); 904 #undef DONE 905 } 906 907 void uhci_dump_iis(struct uhci_softc *sc); 908 void 909 uhci_dump_iis(struct uhci_softc *sc) 910 { 911 uhci_intr_info_t *ii; 912 913 printf("intr_info list:\n"); 914 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 915 uhci_dump_ii(ii); 916 } 917 918 void iidump(void); 919 void iidump(void) { uhci_dump_iis(thesc); } 920 921 #endif 922 923 /* 924 * This routine is executed periodically and simulates interrupts 925 * from the root controller interrupt pipe for port status change. 926 */ 927 void 928 uhci_poll_hub(void *addr) 929 { 930 usbd_xfer_handle xfer = addr; 931 usbd_pipe_handle pipe = xfer->pipe; 932 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 933 int s; 934 u_char *p; 935 936 DPRINTFN(20, ("uhci_poll_hub\n")); 937 938 timeout_del(&sc->sc_poll_handle); 939 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer); 940 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 941 942 p = KERNADDR(&xfer->dmabuf, 0); 943 p[0] = 0; 944 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 945 p[0] |= 1<<1; 946 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 947 p[0] |= 1<<2; 948 if (p[0] == 0) 949 /* No change, try again in a while */ 950 return; 951 952 xfer->actlen = 1; 953 xfer->status = USBD_NORMAL_COMPLETION; 954 s = splusb(); 955 xfer->device->bus->intr_context++; 956 usb_transfer_complete(xfer); 957 xfer->device->bus->intr_context--; 958 splx(s); 959 } 960 961 void 962 uhci_root_intr_done(usbd_xfer_handle xfer) 963 { 964 } 965 966 void 967 uhci_root_ctrl_done(usbd_xfer_handle xfer) 968 { 969 } 970 971 /* 972 * Let the last QH loop back to the high speed control transfer QH. 973 * This is what intel calls "bandwidth reclamation" and improves 974 * USB performance a lot for some devices. 975 * If we are already looping, just count it. 976 */ 977 void 978 uhci_add_loop(uhci_softc_t *sc) { 979 #ifdef UHCI_DEBUG 980 if (uhcinoloop) 981 return; 982 #endif 983 if (++sc->sc_loops == 1) { 984 DPRINTFN(5,("uhci_add_loop\n")); 985 /* Note, we don't loop back the soft pointer. */ 986 sc->sc_last_qh->qh.qh_hlink = 987 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 988 } 989 } 990 991 void 992 uhci_rem_loop(uhci_softc_t *sc) { 993 #ifdef UHCI_DEBUG 994 if (uhcinoloop) 995 return; 996 #endif 997 if (--sc->sc_loops == 0) { 998 DPRINTFN(5,("uhci_rem_loop\n")); 999 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1000 } 1001 } 1002 1003 /* Add high speed control QH, called at splusb(). */ 1004 void 1005 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1006 { 1007 uhci_soft_qh_t *eqh; 1008 1009 SPLUSBCHECK; 1010 1011 DPRINTFN(10, ("uhci_add_hs_ctrl: sqh=%p\n", sqh)); 1012 eqh = sc->sc_hctl_end; 1013 sqh->hlink = eqh->hlink; 1014 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1015 eqh->hlink = sqh; 1016 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1017 sc->sc_hctl_end = sqh; 1018 #ifdef UHCI_CTL_LOOP 1019 uhci_add_loop(sc); 1020 #endif 1021 } 1022 1023 /* Remove high speed control QH, called at splusb(). */ 1024 void 1025 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1026 { 1027 uhci_soft_qh_t *pqh; 1028 1029 SPLUSBCHECK; 1030 1031 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1032 #ifdef UHCI_CTL_LOOP 1033 uhci_rem_loop(sc); 1034 #endif 1035 /* 1036 * The T bit should be set in the elink of the QH so that the HC 1037 * doesn't follow the pointer. This condition may fail if the 1038 * the transferred packet was short so that the QH still points 1039 * at the last used TD. 1040 * In this case we set the T bit and wait a little for the HC 1041 * to stop looking at the TD. 1042 */ 1043 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1044 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1045 delay(UHCI_QH_REMOVE_DELAY); 1046 } 1047 1048 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1049 pqh->hlink = sqh->hlink; 1050 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1051 delay(UHCI_QH_REMOVE_DELAY); 1052 if (sc->sc_hctl_end == sqh) 1053 sc->sc_hctl_end = pqh; 1054 } 1055 1056 /* Add low speed control QH, called at splusb(). */ 1057 void 1058 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1059 { 1060 uhci_soft_qh_t *eqh; 1061 1062 SPLUSBCHECK; 1063 1064 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1065 eqh = sc->sc_lctl_end; 1066 sqh->hlink = eqh->hlink; 1067 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1068 eqh->hlink = sqh; 1069 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1070 sc->sc_lctl_end = sqh; 1071 } 1072 1073 /* Remove low speed control QH, called at splusb(). */ 1074 void 1075 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1076 { 1077 uhci_soft_qh_t *pqh; 1078 1079 SPLUSBCHECK; 1080 1081 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1082 /* See comment in uhci_remove_hs_ctrl() */ 1083 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1084 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1085 delay(UHCI_QH_REMOVE_DELAY); 1086 } 1087 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1088 pqh->hlink = sqh->hlink; 1089 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1090 delay(UHCI_QH_REMOVE_DELAY); 1091 if (sc->sc_lctl_end == sqh) 1092 sc->sc_lctl_end = pqh; 1093 } 1094 1095 /* Add bulk QH, called at splusb(). */ 1096 void 1097 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1098 { 1099 uhci_soft_qh_t *eqh; 1100 1101 SPLUSBCHECK; 1102 1103 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1104 eqh = sc->sc_bulk_end; 1105 sqh->hlink = eqh->hlink; 1106 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1107 eqh->hlink = sqh; 1108 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1109 sc->sc_bulk_end = sqh; 1110 uhci_add_loop(sc); 1111 } 1112 1113 /* Remove bulk QH, called at splusb(). */ 1114 void 1115 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1116 { 1117 uhci_soft_qh_t *pqh; 1118 1119 SPLUSBCHECK; 1120 1121 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1122 uhci_rem_loop(sc); 1123 /* See comment in uhci_remove_hs_ctrl() */ 1124 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1125 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1126 delay(UHCI_QH_REMOVE_DELAY); 1127 } 1128 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1129 pqh->hlink = sqh->hlink; 1130 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1131 delay(UHCI_QH_REMOVE_DELAY); 1132 if (sc->sc_bulk_end == sqh) 1133 sc->sc_bulk_end = pqh; 1134 } 1135 1136 int uhci_intr1(uhci_softc_t *); 1137 1138 int 1139 uhci_intr(void *arg) 1140 { 1141 uhci_softc_t *sc = arg; 1142 1143 if (sc->sc_dying) 1144 return (0); 1145 1146 if (sc->sc_bus.use_polling) { 1147 #ifdef DIAGNOSTIC 1148 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1149 #endif 1150 return (0); 1151 } 1152 return (uhci_intr1(sc)); 1153 } 1154 1155 int 1156 uhci_intr1(uhci_softc_t *sc) 1157 { 1158 int status; 1159 int ack; 1160 1161 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1162 if (status == 0) /* The interrupt was not for us. */ 1163 return (0); 1164 1165 #ifdef UHCI_DEBUG 1166 if (uhcidebug > 15) { 1167 DPRINTF(("%s: uhci_intr1\n", sc->sc_bus.bdev.dv_xname)); 1168 uhci_dumpregs(sc); 1169 } 1170 #endif 1171 1172 if (sc->sc_suspend != PWR_RESUME) { 1173 printf("%s: interrupt while not operating ignored\n", 1174 sc->sc_bus.bdev.dv_xname); 1175 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1176 return (0); 1177 } 1178 1179 ack = 0; 1180 if (status & UHCI_STS_USBINT) 1181 ack |= UHCI_STS_USBINT; 1182 if (status & UHCI_STS_USBEI) 1183 ack |= UHCI_STS_USBEI; 1184 if (status & UHCI_STS_RD) { 1185 ack |= UHCI_STS_RD; 1186 #ifdef UHCI_DEBUG 1187 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 1188 #endif 1189 } 1190 if (status & UHCI_STS_HSE) { 1191 ack |= UHCI_STS_HSE; 1192 printf("%s: host system error\n", sc->sc_bus.bdev.dv_xname); 1193 } 1194 if (status & UHCI_STS_HCPE) { 1195 ack |= UHCI_STS_HCPE; 1196 printf("%s: host controller process error\n", 1197 sc->sc_bus.bdev.dv_xname); 1198 } 1199 if (status & UHCI_STS_HCH) { 1200 /* no acknowledge needed */ 1201 if (!sc->sc_dying) { 1202 printf("%s: host controller halted\n", 1203 sc->sc_bus.bdev.dv_xname); 1204 #ifdef UHCI_DEBUG 1205 uhci_dump_all(sc); 1206 #endif 1207 } 1208 sc->sc_dying = 1; 1209 } 1210 1211 if (!ack) 1212 return (0); /* nothing to acknowledge */ 1213 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1214 1215 sc->sc_bus.no_intrs++; 1216 usb_schedsoftintr(&sc->sc_bus); 1217 1218 DPRINTFN(15, ("%s: uhci_intr1: exit\n", sc->sc_bus.bdev.dv_xname)); 1219 1220 return (1); 1221 } 1222 1223 void 1224 uhci_softintr(void *v) 1225 { 1226 uhci_softc_t *sc = v; 1227 uhci_intr_info_t *ii, *nextii; 1228 1229 DPRINTFN(10,("%s: uhci_softintr (%d)\n", sc->sc_bus.bdev.dv_xname, 1230 sc->sc_bus.intr_context)); 1231 1232 sc->sc_bus.intr_context++; 1233 1234 /* 1235 * Interrupts on UHCI really suck. When the host controller 1236 * interrupts because a transfer is completed there is no 1237 * way of knowing which transfer it was. You can scan down 1238 * the TDs and QHs of the previous frame to limit the search, 1239 * but that assumes that the interrupt was not delayed by more 1240 * than 1 ms, which may not always be true (e.g. after debug 1241 * output on a slow console). 1242 * We scan all interrupt descriptors to see if any have 1243 * completed. 1244 */ 1245 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1246 nextii = LIST_NEXT(ii, list); 1247 uhci_check_intr(sc, ii); 1248 } 1249 1250 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1251 if (sc->sc_softwake) { 1252 sc->sc_softwake = 0; 1253 wakeup(&sc->sc_softwake); 1254 } 1255 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */ 1256 1257 sc->sc_bus.intr_context--; 1258 } 1259 1260 /* Check for an interrupt. */ 1261 void 1262 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1263 { 1264 uhci_soft_td_t *std, *lstd; 1265 u_int32_t status; 1266 1267 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1268 #ifdef DIAGNOSTIC 1269 if (ii == NULL) { 1270 printf("uhci_check_intr: no ii? %p\n", ii); 1271 return; 1272 } 1273 #endif 1274 if (ii->xfer->status == USBD_CANCELLED || 1275 ii->xfer->status == USBD_TIMEOUT) { 1276 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1277 return; 1278 } 1279 1280 if (ii->stdstart == NULL) 1281 return; 1282 lstd = ii->stdend; 1283 #ifdef DIAGNOSTIC 1284 if (lstd == NULL) { 1285 printf("uhci_check_intr: std==0\n"); 1286 return; 1287 } 1288 #endif 1289 /* 1290 * If the last TD is still active we need to check whether there 1291 * is an error somewhere in the middle, or whether there was a 1292 * short packet (SPD and not ACTIVE). 1293 */ 1294 if (letoh32(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1295 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1296 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1297 status = letoh32(std->td.td_status); 1298 /* If there's an active TD the xfer isn't done. */ 1299 if (status & UHCI_TD_ACTIVE) 1300 break; 1301 /* Any kind of error makes the xfer done. */ 1302 if (status & UHCI_TD_STALLED) 1303 goto done; 1304 /* We want short packets, and it is short: it's done */ 1305 if ((status & UHCI_TD_SPD) && 1306 UHCI_TD_GET_ACTLEN(status) < 1307 UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token))) 1308 goto done; 1309 } 1310 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1311 ii, ii->stdstart)); 1312 return; 1313 } 1314 done: 1315 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1316 timeout_del(&ii->xfer->timeout_handle); 1317 uhci_idone(ii); 1318 } 1319 1320 /* Called at splusb() */ 1321 void 1322 uhci_idone(uhci_intr_info_t *ii) 1323 { 1324 usbd_xfer_handle xfer = ii->xfer; 1325 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1326 uhci_soft_td_t *std; 1327 u_int32_t status = 0, nstatus; 1328 int actlen; 1329 1330 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1331 #ifdef DIAGNOSTIC 1332 { 1333 int s = splhigh(); 1334 if (ii->isdone) { 1335 splx(s); 1336 #ifdef UHCI_DEBUG 1337 printf("uhci_idone: ii is done!\n "); 1338 uhci_dump_ii(ii); 1339 #else 1340 printf("uhci_idone: ii=%p is done!\n", ii); 1341 #endif 1342 return; 1343 } 1344 ii->isdone = 1; 1345 splx(s); 1346 } 1347 #endif 1348 1349 if (xfer->nframes != 0) { 1350 /* Isoc transfer, do things differently. */ 1351 uhci_soft_td_t **stds = upipe->u.iso.stds; 1352 int i, n, nframes, len; 1353 1354 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1355 1356 nframes = xfer->nframes; 1357 actlen = 0; 1358 n = UXFER(xfer)->curframe; 1359 for (i = 0; i < nframes; i++) { 1360 std = stds[n]; 1361 #ifdef UHCI_DEBUG 1362 if (uhcidebug > 5) { 1363 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1364 uhci_dump_td(std); 1365 } 1366 #endif 1367 if (++n >= UHCI_VFRAMELIST_COUNT) 1368 n = 0; 1369 status = letoh32(std->td.td_status); 1370 len = UHCI_TD_GET_ACTLEN(status); 1371 xfer->frlengths[i] = len; 1372 actlen += len; 1373 } 1374 upipe->u.iso.inuse -= nframes; 1375 xfer->actlen = actlen; 1376 xfer->status = USBD_NORMAL_COMPLETION; 1377 goto end; 1378 } 1379 1380 #ifdef UHCI_DEBUG 1381 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1382 ii, xfer, upipe)); 1383 if (uhcidebug > 10) 1384 uhci_dump_tds(ii->stdstart); 1385 #endif 1386 1387 /* The transfer is done, compute actual length and status. */ 1388 actlen = 0; 1389 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1390 nstatus = letoh32(std->td.td_status); 1391 if (nstatus & UHCI_TD_ACTIVE) 1392 break; 1393 1394 status = nstatus; 1395 if (UHCI_TD_GET_PID(letoh32(std->td.td_token)) != 1396 UHCI_TD_PID_SETUP) 1397 actlen += UHCI_TD_GET_ACTLEN(status); 1398 else { 1399 /* 1400 * UHCI will report CRCTO in addition to a STALL or NAK 1401 * for a SETUP transaction. See section 3.2.2, "TD 1402 * CONTROL AND STATUS". 1403 */ 1404 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1405 status &= ~UHCI_TD_CRCTO; 1406 } 1407 } 1408 /* If there are left over TDs we need to update the toggle. */ 1409 if (std != NULL) 1410 upipe->nexttoggle = UHCI_TD_GET_DT(letoh32(std->td.td_token)); 1411 1412 status &= UHCI_TD_ERROR; 1413 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1414 actlen, status)); 1415 xfer->actlen = actlen; 1416 if (status != 0) { 1417 #ifdef UHCI_DEBUG 1418 char sbuf[128]; 1419 1420 bitmask_snprintf((u_int32_t)status, 1421 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1422 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1423 sbuf, sizeof(sbuf)); 1424 1425 DPRINTFN((status == UHCI_TD_STALLED)*10, 1426 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1427 "status 0x%s\n", 1428 xfer->pipe->device->address, 1429 xfer->pipe->endpoint->edesc->bEndpointAddress, 1430 sbuf)); 1431 #endif 1432 1433 if (status == UHCI_TD_STALLED) 1434 xfer->status = USBD_STALLED; 1435 else 1436 xfer->status = USBD_IOERROR; /* more info XXX */ 1437 } else { 1438 xfer->status = USBD_NORMAL_COMPLETION; 1439 } 1440 1441 end: 1442 usb_transfer_complete(xfer); 1443 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1444 } 1445 1446 /* 1447 * Called when a request does not complete. 1448 */ 1449 void 1450 uhci_timeout(void *addr) 1451 { 1452 uhci_intr_info_t *ii = addr; 1453 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1454 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1455 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1456 1457 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1458 1459 if (sc->sc_dying) { 1460 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1461 return; 1462 } 1463 1464 /* Execute the abort in a process context. */ 1465 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1466 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task); 1467 } 1468 1469 void 1470 uhci_timeout_task(void *addr) 1471 { 1472 usbd_xfer_handle xfer = addr; 1473 int s; 1474 1475 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1476 1477 s = splusb(); 1478 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1479 splx(s); 1480 } 1481 1482 /* 1483 * Wait here until controller claims to have an interrupt. 1484 * Then call uhci_intr and return. Use timeout to avoid waiting 1485 * too long. 1486 * Only used during boot when interrupts are not enabled yet. 1487 */ 1488 void 1489 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1490 { 1491 int timo = xfer->timeout; 1492 uhci_intr_info_t *ii; 1493 1494 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1495 1496 xfer->status = USBD_IN_PROGRESS; 1497 for (; timo >= 0; timo--) { 1498 usb_delay_ms(&sc->sc_bus, 1); 1499 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1500 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) { 1501 uhci_intr1(sc); 1502 if (xfer->status != USBD_IN_PROGRESS) 1503 return; 1504 } 1505 } 1506 1507 /* Timeout */ 1508 DPRINTF(("uhci_waitintr: timeout\n")); 1509 for (ii = LIST_FIRST(&sc->sc_intrhead); 1510 ii != NULL && ii->xfer != xfer; 1511 ii = LIST_NEXT(ii, list)) 1512 ; 1513 #ifdef DIAGNOSTIC 1514 if (ii == NULL) 1515 panic("uhci_waitintr: lost intr_info"); 1516 #endif 1517 uhci_idone(ii); 1518 } 1519 1520 void 1521 uhci_poll(struct usbd_bus *bus) 1522 { 1523 uhci_softc_t *sc = (uhci_softc_t *)bus; 1524 1525 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) 1526 uhci_intr1(sc); 1527 } 1528 1529 void 1530 uhci_reset(uhci_softc_t *sc) 1531 { 1532 int n; 1533 1534 UHCICMD(sc, UHCI_CMD_HCRESET); 1535 /* The reset bit goes low when the controller is done. */ 1536 for (n = 0; n < UHCI_RESET_TIMEOUT && 1537 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1538 usb_delay_ms(&sc->sc_bus, 1); 1539 if (n >= UHCI_RESET_TIMEOUT) 1540 printf("%s: controller did not reset\n", 1541 sc->sc_bus.bdev.dv_xname); 1542 } 1543 1544 usbd_status 1545 uhci_run(uhci_softc_t *sc, int run) 1546 { 1547 int s, n, running; 1548 u_int16_t cmd; 1549 1550 run = run != 0; 1551 s = splhardusb(); 1552 DPRINTF(("uhci_run: setting run=%d\n", run)); 1553 cmd = UREAD2(sc, UHCI_CMD); 1554 if (run) 1555 cmd |= UHCI_CMD_RS; 1556 else 1557 cmd &= ~UHCI_CMD_RS; 1558 UHCICMD(sc, cmd); 1559 for(n = 0; n < 10; n++) { 1560 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1561 /* return when we've entered the state we want */ 1562 if (run == running) { 1563 splx(s); 1564 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1565 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1566 return (USBD_NORMAL_COMPLETION); 1567 } 1568 usb_delay_ms(&sc->sc_bus, 1); 1569 } 1570 splx(s); 1571 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname, 1572 run ? "start" : "stop"); 1573 return (USBD_IOERROR); 1574 } 1575 1576 /* 1577 * Memory management routines. 1578 * uhci_alloc_std allocates TDs 1579 * uhci_alloc_sqh allocates QHs 1580 * These two routines do their own free list management, 1581 * partly for speed, partly because allocating DMAable memory 1582 * has page size granularaity so much memory would be wasted if 1583 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1584 */ 1585 1586 uhci_soft_td_t * 1587 uhci_alloc_std(uhci_softc_t *sc) 1588 { 1589 uhci_soft_td_t *std; 1590 usbd_status err; 1591 int i, offs; 1592 usb_dma_t dma; 1593 1594 if (sc->sc_freetds == NULL) { 1595 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1596 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1597 UHCI_TD_ALIGN, &dma); 1598 if (err) 1599 return (0); 1600 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1601 offs = i * UHCI_STD_SIZE; 1602 std = KERNADDR(&dma, offs); 1603 std->physaddr = DMAADDR(&dma, offs); 1604 std->link.std = sc->sc_freetds; 1605 sc->sc_freetds = std; 1606 } 1607 } 1608 std = sc->sc_freetds; 1609 sc->sc_freetds = std->link.std; 1610 memset(&std->td, 0, sizeof(uhci_td_t)); 1611 return std; 1612 } 1613 1614 void 1615 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1616 { 1617 #ifdef DIAGNOSTIC 1618 #define TD_IS_FREE 0x12345678 1619 if (letoh32(std->td.td_token) == TD_IS_FREE) { 1620 printf("uhci_free_std: freeing free TD %p\n", std); 1621 return; 1622 } 1623 std->td.td_token = htole32(TD_IS_FREE); 1624 #endif 1625 std->link.std = sc->sc_freetds; 1626 sc->sc_freetds = std; 1627 } 1628 1629 uhci_soft_qh_t * 1630 uhci_alloc_sqh(uhci_softc_t *sc) 1631 { 1632 uhci_soft_qh_t *sqh; 1633 usbd_status err; 1634 int i, offs; 1635 usb_dma_t dma; 1636 1637 if (sc->sc_freeqhs == NULL) { 1638 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1639 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1640 UHCI_QH_ALIGN, &dma); 1641 if (err) 1642 return (0); 1643 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1644 offs = i * UHCI_SQH_SIZE; 1645 sqh = KERNADDR(&dma, offs); 1646 sqh->physaddr = DMAADDR(&dma, offs); 1647 sqh->hlink = sc->sc_freeqhs; 1648 sc->sc_freeqhs = sqh; 1649 } 1650 } 1651 sqh = sc->sc_freeqhs; 1652 sc->sc_freeqhs = sqh->hlink; 1653 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1654 return (sqh); 1655 } 1656 1657 void 1658 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1659 { 1660 sqh->hlink = sc->sc_freeqhs; 1661 sc->sc_freeqhs = sqh; 1662 } 1663 1664 void 1665 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1666 uhci_soft_td_t *stdend) 1667 { 1668 uhci_soft_td_t *p; 1669 1670 for (; std != stdend; std = p) { 1671 p = std->link.std; 1672 uhci_free_std(sc, std); 1673 } 1674 } 1675 1676 usbd_status 1677 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1678 int rd, u_int16_t flags, usb_dma_t *dma, 1679 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1680 { 1681 uhci_soft_td_t *p, *lastp; 1682 uhci_physaddr_t lastlink; 1683 int i, ntd, l, tog, maxp; 1684 u_int32_t status; 1685 int addr = upipe->pipe.device->address; 1686 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1687 1688 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1689 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1690 upipe->pipe.device->speed, flags)); 1691 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1692 if (maxp == 0) { 1693 printf("uhci_alloc_std_chain: maxp=0\n"); 1694 return (USBD_INVAL); 1695 } 1696 ntd = (len + maxp - 1) / maxp; 1697 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1698 ntd++; 1699 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1700 if (ntd == 0) { 1701 *sp = *ep = 0; 1702 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1703 return (USBD_NORMAL_COMPLETION); 1704 } 1705 tog = upipe->nexttoggle; 1706 if (ntd % 2 == 0) 1707 tog ^= 1; 1708 upipe->nexttoggle = tog ^ 1; 1709 lastp = NULL; 1710 lastlink = UHCI_PTR_T; 1711 ntd--; 1712 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1713 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1714 status |= UHCI_TD_LS; 1715 if (flags & USBD_SHORT_XFER_OK) 1716 status |= UHCI_TD_SPD; 1717 for (i = ntd; i >= 0; i--) { 1718 p = uhci_alloc_std(sc); 1719 if (p == NULL) { 1720 uhci_free_std_chain(sc, lastp, NULL); 1721 return (USBD_NOMEM); 1722 } 1723 p->link.std = lastp; 1724 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1725 lastp = p; 1726 lastlink = p->physaddr; 1727 p->td.td_status = htole32(status); 1728 if (i == ntd) { 1729 /* last TD */ 1730 l = len % maxp; 1731 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1732 l = maxp; 1733 *ep = p; 1734 } else 1735 l = maxp; 1736 p->td.td_token = 1737 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1738 UHCI_TD_OUT(l, endpt, addr, tog)); 1739 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1740 tog ^= 1; 1741 } 1742 *sp = lastp; 1743 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1744 upipe->nexttoggle)); 1745 return (USBD_NORMAL_COMPLETION); 1746 } 1747 1748 void 1749 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1750 { 1751 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1752 upipe->nexttoggle = 0; 1753 } 1754 1755 void 1756 uhci_noop(usbd_pipe_handle pipe) 1757 { 1758 } 1759 1760 usbd_status 1761 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1762 { 1763 usbd_status err; 1764 1765 /* Insert last in queue. */ 1766 err = usb_insert_transfer(xfer); 1767 if (err) 1768 return (err); 1769 1770 /* 1771 * Pipe isn't running (otherwise err would be USBD_INPROG), 1772 * so start it first. 1773 */ 1774 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1775 } 1776 1777 usbd_status 1778 uhci_device_bulk_start(usbd_xfer_handle xfer) 1779 { 1780 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1781 usbd_device_handle dev = upipe->pipe.device; 1782 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1783 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1784 uhci_soft_td_t *data, *dataend; 1785 uhci_soft_qh_t *sqh; 1786 usbd_status err; 1787 int len, isread, endpt; 1788 int s; 1789 1790 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 1791 xfer, xfer->length, xfer->flags, ii)); 1792 1793 if (sc->sc_dying) 1794 return (USBD_IOERROR); 1795 1796 #ifdef DIAGNOSTIC 1797 if (xfer->rqflags & URQ_REQUEST) 1798 panic("uhci_device_bulk_start: a request"); 1799 #endif 1800 1801 len = xfer->length; 1802 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1803 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1804 sqh = upipe->u.bulk.sqh; 1805 1806 upipe->u.bulk.isread = isread; 1807 upipe->u.bulk.length = len; 1808 1809 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 1810 &xfer->dmabuf, &data, &dataend); 1811 if (err) 1812 return (err); 1813 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1814 1815 #ifdef UHCI_DEBUG 1816 if (uhcidebug > 8) { 1817 DPRINTF(("uhci_device_bulk_start: data(1)\n")); 1818 uhci_dump_tds(data); 1819 } 1820 #endif 1821 1822 /* Set up interrupt info. */ 1823 ii->xfer = xfer; 1824 ii->stdstart = data; 1825 ii->stdend = dataend; 1826 #ifdef DIAGNOSTIC 1827 if (!ii->isdone) { 1828 printf("uhci_device_bulk_start: not done, ii=%p\n", ii); 1829 } 1830 ii->isdone = 0; 1831 #endif 1832 1833 sqh->elink = data; 1834 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1835 1836 s = splusb(); 1837 uhci_add_bulk(sc, sqh); 1838 uhci_add_intr_info(sc, ii); 1839 1840 if (xfer->timeout && !sc->sc_bus.use_polling) { 1841 timeout_del(&xfer->timeout_handle); 1842 timeout_set(&xfer->timeout_handle, uhci_timeout, ii); 1843 timeout_add(&xfer->timeout_handle, mstohz(xfer->timeout)); 1844 } 1845 xfer->status = USBD_IN_PROGRESS; 1846 splx(s); 1847 1848 #ifdef UHCI_DEBUG 1849 if (uhcidebug > 10) { 1850 DPRINTF(("uhci_device_bulk_start: data(2)\n")); 1851 uhci_dump_tds(data); 1852 } 1853 #endif 1854 1855 if (sc->sc_bus.use_polling) 1856 uhci_waitintr(sc, xfer); 1857 1858 return (USBD_IN_PROGRESS); 1859 } 1860 1861 /* Abort a device bulk request. */ 1862 void 1863 uhci_device_bulk_abort(usbd_xfer_handle xfer) 1864 { 1865 DPRINTF(("uhci_device_bulk_abort:\n")); 1866 uhci_abort_xfer(xfer, USBD_CANCELLED); 1867 } 1868 1869 /* 1870 * Abort a device request. 1871 * If this routine is called at splusb() it guarantees that the request 1872 * will be removed from the hardware scheduling and that the callback 1873 * for it will be called with USBD_CANCELLED status. 1874 * It's impossible to guarantee that the requested transfer will not 1875 * have happened since the hardware runs concurrently. 1876 * If the transaction has already happened we rely on the ordinary 1877 * interrupt processing to process it. 1878 */ 1879 void 1880 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1881 { 1882 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1883 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1884 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1885 uhci_soft_td_t *std; 1886 int s; 1887 1888 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 1889 1890 if (sc->sc_dying) { 1891 /* If we're dying, just do the software part. */ 1892 s = splusb(); 1893 xfer->status = status; /* make software ignore it */ 1894 timeout_del(&xfer->timeout_handle); 1895 usb_transfer_complete(xfer); 1896 splx(s); 1897 return; 1898 } 1899 1900 if (xfer->device->bus->intr_context || !curproc) 1901 panic("uhci_abort_xfer: not in process context"); 1902 1903 /* 1904 * Step 1: Make interrupt routine and hardware ignore xfer. 1905 */ 1906 s = splusb(); 1907 xfer->status = status; /* make software ignore it */ 1908 timeout_del(&xfer->timeout_handle); 1909 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 1910 for (std = ii->stdstart; std != NULL; std = std->link.std) 1911 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1912 splx(s); 1913 1914 /* 1915 * Step 2: Wait until we know hardware has finished any possible 1916 * use of the xfer. Also make sure the soft interrupt routine 1917 * has run. 1918 */ 1919 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 1920 s = splusb(); 1921 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1922 sc->sc_softwake = 1; 1923 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */ 1924 usb_schedsoftintr(&sc->sc_bus); 1925 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1926 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 1927 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 1928 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */ 1929 splx(s); 1930 1931 /* 1932 * Step 3: Execute callback. 1933 */ 1934 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 1935 s = splusb(); 1936 #ifdef DIAGNOSTIC 1937 ii->isdone = 1; 1938 #endif 1939 usb_transfer_complete(xfer); 1940 splx(s); 1941 } 1942 1943 /* Close a device bulk pipe. */ 1944 void 1945 uhci_device_bulk_close(usbd_pipe_handle pipe) 1946 { 1947 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1948 usbd_device_handle dev = upipe->pipe.device; 1949 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1950 1951 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1952 pipe->endpoint->savedtoggle = upipe->nexttoggle; 1953 } 1954 1955 usbd_status 1956 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 1957 { 1958 usbd_status err; 1959 1960 /* Insert last in queue. */ 1961 err = usb_insert_transfer(xfer); 1962 if (err) 1963 return (err); 1964 1965 /* 1966 * Pipe isn't running (otherwise err would be USBD_INPROG), 1967 * so start it first. 1968 */ 1969 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1970 } 1971 1972 usbd_status 1973 uhci_device_ctrl_start(usbd_xfer_handle xfer) 1974 { 1975 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 1976 usbd_status err; 1977 1978 if (sc->sc_dying) 1979 return (USBD_IOERROR); 1980 1981 #ifdef DIAGNOSTIC 1982 if (!(xfer->rqflags & URQ_REQUEST)) 1983 panic("uhci_device_ctrl_transfer: not a request"); 1984 #endif 1985 1986 err = uhci_device_request(xfer); 1987 if (err) 1988 return (err); 1989 1990 if (sc->sc_bus.use_polling) 1991 uhci_waitintr(sc, xfer); 1992 return (USBD_IN_PROGRESS); 1993 } 1994 1995 usbd_status 1996 uhci_device_intr_transfer(usbd_xfer_handle xfer) 1997 { 1998 usbd_status err; 1999 2000 /* Insert last in queue. */ 2001 err = usb_insert_transfer(xfer); 2002 if (err) 2003 return (err); 2004 2005 /* 2006 * Pipe isn't running (otherwise err would be USBD_INPROG), 2007 * so start it first. 2008 */ 2009 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2010 } 2011 2012 usbd_status 2013 uhci_device_intr_start(usbd_xfer_handle xfer) 2014 { 2015 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2016 usbd_device_handle dev = upipe->pipe.device; 2017 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2018 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2019 uhci_soft_td_t *data, *dataend; 2020 uhci_soft_qh_t *sqh; 2021 usbd_status err; 2022 int isread, endpt; 2023 int i, s; 2024 2025 if (sc->sc_dying) 2026 return (USBD_IOERROR); 2027 2028 DPRINTFN(3,("uhci_device_intr_start: xfer=%p len=%d flags=%d\n", 2029 xfer, xfer->length, xfer->flags)); 2030 2031 #ifdef DIAGNOSTIC 2032 if (xfer->rqflags & URQ_REQUEST) 2033 panic("uhci_device_intr_start: a request"); 2034 #endif 2035 2036 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2037 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2038 2039 upipe->u.intr.isread = isread; 2040 2041 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2042 xfer->flags, &xfer->dmabuf, &data, 2043 &dataend); 2044 2045 if (err) 2046 return (err); 2047 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2048 2049 #ifdef UHCI_DEBUG 2050 if (uhcidebug > 10) { 2051 DPRINTF(("uhci_device_intr_start: data(1)\n")); 2052 uhci_dump_tds(data); 2053 uhci_dump_qh(upipe->u.intr.qhs[0]); 2054 } 2055 #endif 2056 2057 s = splusb(); 2058 /* Set up interrupt info. */ 2059 ii->xfer = xfer; 2060 ii->stdstart = data; 2061 ii->stdend = dataend; 2062 #ifdef DIAGNOSTIC 2063 if (!ii->isdone) { 2064 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2065 } 2066 ii->isdone = 0; 2067 #endif 2068 2069 DPRINTFN(10,("uhci_device_intr_start: qhs[0]=%p\n", 2070 upipe->u.intr.qhs[0])); 2071 for (i = 0; i < upipe->u.intr.npoll; i++) { 2072 sqh = upipe->u.intr.qhs[i]; 2073 sqh->elink = data; 2074 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2075 } 2076 uhci_add_intr_info(sc, ii); 2077 xfer->status = USBD_IN_PROGRESS; 2078 splx(s); 2079 2080 #ifdef UHCI_DEBUG 2081 if (uhcidebug > 10) { 2082 DPRINTF(("uhci_device_intr_start: data(2)\n")); 2083 uhci_dump_tds(data); 2084 uhci_dump_qh(upipe->u.intr.qhs[0]); 2085 } 2086 #endif 2087 2088 return (USBD_IN_PROGRESS); 2089 } 2090 2091 /* Abort a device control request. */ 2092 void 2093 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2094 { 2095 DPRINTF(("uhci_device_ctrl_abort:\n")); 2096 uhci_abort_xfer(xfer, USBD_CANCELLED); 2097 } 2098 2099 /* Close a device control pipe. */ 2100 void 2101 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2102 { 2103 } 2104 2105 /* Abort a device interrupt request. */ 2106 void 2107 uhci_device_intr_abort(usbd_xfer_handle xfer) 2108 { 2109 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2110 if (xfer->pipe->intrxfer == xfer) { 2111 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2112 xfer->pipe->intrxfer = NULL; 2113 } 2114 uhci_abort_xfer(xfer, USBD_CANCELLED); 2115 } 2116 2117 /* Close a device interrupt pipe. */ 2118 void 2119 uhci_device_intr_close(usbd_pipe_handle pipe) 2120 { 2121 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2122 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2123 int i, npoll; 2124 int s; 2125 2126 /* Unlink descriptors from controller data structures. */ 2127 npoll = upipe->u.intr.npoll; 2128 s = splusb(); 2129 for (i = 0; i < npoll; i++) 2130 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2131 splx(s); 2132 2133 /* 2134 * We now have to wait for any activity on the physical 2135 * descriptors to stop. 2136 */ 2137 usb_delay_ms(&sc->sc_bus, 2); 2138 2139 for(i = 0; i < npoll; i++) 2140 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2141 free(upipe->u.intr.qhs, M_USBHC); 2142 2143 /* XXX free other resources */ 2144 } 2145 2146 usbd_status 2147 uhci_device_request(usbd_xfer_handle xfer) 2148 { 2149 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2150 usb_device_request_t *req = &xfer->request; 2151 usbd_device_handle dev = upipe->pipe.device; 2152 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2153 int addr = dev->address; 2154 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2155 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2156 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2157 uhci_soft_qh_t *sqh; 2158 int len; 2159 u_int32_t ls; 2160 usbd_status err; 2161 int isread; 2162 int s; 2163 2164 DPRINTFN(3,("uhci_device_request type=0x%02x, request=0x%02x, " 2165 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2166 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2167 UGETW(req->wIndex), UGETW(req->wLength), 2168 addr, endpt)); 2169 2170 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2171 isread = req->bmRequestType & UT_READ; 2172 len = UGETW(req->wLength); 2173 2174 setup = upipe->u.ctl.setup; 2175 stat = upipe->u.ctl.stat; 2176 sqh = upipe->u.ctl.sqh; 2177 2178 /* Set up data transaction */ 2179 if (len != 0) { 2180 upipe->nexttoggle = 1; 2181 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2182 &xfer->dmabuf, &data, &dataend); 2183 if (err) 2184 return (err); 2185 next = data; 2186 dataend->link.std = stat; 2187 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2188 } else { 2189 next = stat; 2190 } 2191 upipe->u.ctl.length = len; 2192 2193 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2194 2195 setup->link.std = next; 2196 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2197 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2198 UHCI_TD_ACTIVE); 2199 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2200 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2201 2202 stat->link.std = NULL; 2203 stat->td.td_link = htole32(UHCI_PTR_T); 2204 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2205 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2206 stat->td.td_token = 2207 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2208 UHCI_TD_IN (0, endpt, addr, 1)); 2209 stat->td.td_buffer = htole32(0); 2210 2211 #ifdef UHCI_DEBUG 2212 if (uhcidebug > 10) { 2213 DPRINTF(("uhci_device_request: before transfer\n")); 2214 uhci_dump_tds(setup); 2215 } 2216 #endif 2217 2218 /* Set up interrupt info. */ 2219 ii->xfer = xfer; 2220 ii->stdstart = setup; 2221 ii->stdend = stat; 2222 #ifdef DIAGNOSTIC 2223 if (!ii->isdone) { 2224 printf("uhci_device_request: not done, ii=%p\n", ii); 2225 } 2226 ii->isdone = 0; 2227 #endif 2228 2229 sqh->elink = setup; 2230 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2231 2232 s = splusb(); 2233 if (dev->speed == USB_SPEED_LOW) 2234 uhci_add_ls_ctrl(sc, sqh); 2235 else 2236 uhci_add_hs_ctrl(sc, sqh); 2237 uhci_add_intr_info(sc, ii); 2238 #ifdef UHCI_DEBUG 2239 if (uhcidebug > 12) { 2240 uhci_soft_td_t *std; 2241 uhci_soft_qh_t *xqh; 2242 uhci_soft_qh_t *sxqh; 2243 int maxqh = 0; 2244 uhci_physaddr_t link; 2245 DPRINTF(("uhci_device_request: follow from [0]\n")); 2246 for (std = sc->sc_vframes[0].htd, link = 0; 2247 (link & UHCI_PTR_QH) == 0; 2248 std = std->link.std) { 2249 link = letoh32(std->td.td_link); 2250 uhci_dump_td(std); 2251 } 2252 sxqh = (uhci_soft_qh_t *)std; 2253 uhci_dump_qh(sxqh); 2254 for (xqh = sxqh; 2255 xqh != NULL; 2256 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2257 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2258 uhci_dump_qh(xqh); 2259 } 2260 DPRINTF(("Enqueued QH:\n")); 2261 uhci_dump_qh(sqh); 2262 uhci_dump_tds(sqh->elink); 2263 } 2264 #endif 2265 if (xfer->timeout && !sc->sc_bus.use_polling) { 2266 timeout_del(&xfer->timeout_handle); 2267 timeout_set(&xfer->timeout_handle, uhci_timeout, ii); 2268 timeout_add(&xfer->timeout_handle, mstohz(xfer->timeout)); 2269 } 2270 xfer->status = USBD_IN_PROGRESS; 2271 splx(s); 2272 2273 return (USBD_NORMAL_COMPLETION); 2274 } 2275 2276 usbd_status 2277 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2278 { 2279 usbd_status err; 2280 2281 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2282 2283 /* Put it on our queue, */ 2284 err = usb_insert_transfer(xfer); 2285 2286 /* bail out on error, */ 2287 if (err && err != USBD_IN_PROGRESS) 2288 return (err); 2289 2290 /* XXX should check inuse here */ 2291 2292 /* insert into schedule, */ 2293 uhci_device_isoc_enter(xfer); 2294 2295 /* and start if the pipe wasn't running */ 2296 if (!err) 2297 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2298 2299 return (err); 2300 } 2301 2302 void 2303 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2304 { 2305 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2306 usbd_device_handle dev = upipe->pipe.device; 2307 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2308 struct iso *iso = &upipe->u.iso; 2309 uhci_soft_td_t *std; 2310 u_int32_t buf, len, status; 2311 int s, i, next, nframes; 2312 2313 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2314 "nframes=%d\n", 2315 iso->inuse, iso->next, xfer, xfer->nframes)); 2316 2317 if (sc->sc_dying) 2318 return; 2319 2320 if (xfer->status == USBD_IN_PROGRESS) { 2321 /* This request has already been entered into the frame list */ 2322 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2323 /* XXX */ 2324 } 2325 2326 #ifdef DIAGNOSTIC 2327 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2328 printf("uhci_device_isoc_enter: overflow!\n"); 2329 #endif 2330 2331 next = iso->next; 2332 if (next == -1) { 2333 /* Not in use yet, schedule it a few frames ahead. */ 2334 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2335 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2336 } 2337 2338 xfer->status = USBD_IN_PROGRESS; 2339 UXFER(xfer)->curframe = next; 2340 2341 buf = DMAADDR(&xfer->dmabuf, 0); 2342 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2343 UHCI_TD_ACTIVE | 2344 UHCI_TD_IOS); 2345 nframes = xfer->nframes; 2346 s = splusb(); 2347 for (i = 0; i < nframes; i++) { 2348 std = iso->stds[next]; 2349 if (++next >= UHCI_VFRAMELIST_COUNT) 2350 next = 0; 2351 len = xfer->frlengths[i]; 2352 std->td.td_buffer = htole32(buf); 2353 if (i == nframes - 1) 2354 status |= UHCI_TD_IOC; 2355 std->td.td_status = htole32(status); 2356 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2357 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2358 #ifdef UHCI_DEBUG 2359 if (uhcidebug > 5) { 2360 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2361 uhci_dump_td(std); 2362 } 2363 #endif 2364 buf += len; 2365 } 2366 iso->next = next; 2367 iso->inuse += xfer->nframes; 2368 2369 splx(s); 2370 } 2371 2372 usbd_status 2373 uhci_device_isoc_start(usbd_xfer_handle xfer) 2374 { 2375 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2376 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2377 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2378 uhci_soft_td_t *end; 2379 int s, i; 2380 2381 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2382 2383 if (sc->sc_dying) 2384 return (USBD_IOERROR); 2385 2386 #ifdef DIAGNOSTIC 2387 if (xfer->status != USBD_IN_PROGRESS) 2388 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2389 #endif 2390 2391 /* Find the last TD */ 2392 i = UXFER(xfer)->curframe + xfer->nframes; 2393 if (i >= UHCI_VFRAMELIST_COUNT) 2394 i -= UHCI_VFRAMELIST_COUNT; 2395 end = upipe->u.iso.stds[i]; 2396 2397 #ifdef DIAGNOSTIC 2398 if (end == NULL) { 2399 printf("uhci_device_isoc_start: end == NULL\n"); 2400 return (USBD_INVAL); 2401 } 2402 #endif 2403 2404 s = splusb(); 2405 2406 /* Set up interrupt info. */ 2407 ii->xfer = xfer; 2408 ii->stdstart = end; 2409 ii->stdend = end; 2410 #ifdef DIAGNOSTIC 2411 if (!ii->isdone) 2412 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2413 ii->isdone = 0; 2414 #endif 2415 uhci_add_intr_info(sc, ii); 2416 2417 splx(s); 2418 2419 return (USBD_IN_PROGRESS); 2420 } 2421 2422 void 2423 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2424 { 2425 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2426 uhci_soft_td_t **stds = upipe->u.iso.stds; 2427 uhci_soft_td_t *std; 2428 int i, n, s, nframes, maxlen, len; 2429 2430 s = splusb(); 2431 2432 /* Transfer is already done. */ 2433 if (xfer->status != USBD_NOT_STARTED && 2434 xfer->status != USBD_IN_PROGRESS) { 2435 splx(s); 2436 return; 2437 } 2438 2439 /* Give xfer the requested abort code. */ 2440 xfer->status = USBD_CANCELLED; 2441 2442 /* make hardware ignore it, */ 2443 nframes = xfer->nframes; 2444 n = UXFER(xfer)->curframe; 2445 maxlen = 0; 2446 for (i = 0; i < nframes; i++) { 2447 std = stds[n]; 2448 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2449 len = UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token)); 2450 if (len > maxlen) 2451 maxlen = len; 2452 if (++n >= UHCI_VFRAMELIST_COUNT) 2453 n = 0; 2454 } 2455 2456 /* and wait until we are sure the hardware has finished. */ 2457 delay(maxlen); 2458 2459 #ifdef DIAGNOSTIC 2460 UXFER(xfer)->iinfo.isdone = 1; 2461 #endif 2462 /* Run callback and remove from interrupt list. */ 2463 usb_transfer_complete(xfer); 2464 2465 splx(s); 2466 } 2467 2468 void 2469 uhci_device_isoc_close(usbd_pipe_handle pipe) 2470 { 2471 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2472 usbd_device_handle dev = upipe->pipe.device; 2473 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2474 uhci_soft_td_t *std, *vstd; 2475 struct iso *iso; 2476 int i, s; 2477 2478 /* 2479 * Make sure all TDs are marked as inactive. 2480 * Wait for completion. 2481 * Unschedule. 2482 * Deallocate. 2483 */ 2484 iso = &upipe->u.iso; 2485 2486 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2487 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2488 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2489 2490 s = splusb(); 2491 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2492 std = iso->stds[i]; 2493 for (vstd = sc->sc_vframes[i].htd; 2494 vstd != NULL && vstd->link.std != std; 2495 vstd = vstd->link.std) 2496 ; 2497 if (vstd == NULL) { 2498 /*panic*/ 2499 printf("uhci_device_isoc_close: %p not found\n", std); 2500 splx(s); 2501 return; 2502 } 2503 vstd->link = std->link; 2504 vstd->td.td_link = std->td.td_link; 2505 uhci_free_std(sc, std); 2506 } 2507 splx(s); 2508 2509 free(iso->stds, M_USBHC); 2510 } 2511 2512 usbd_status 2513 uhci_setup_isoc(usbd_pipe_handle pipe) 2514 { 2515 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2516 usbd_device_handle dev = upipe->pipe.device; 2517 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2518 int addr = upipe->pipe.device->address; 2519 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2520 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2521 uhci_soft_td_t *std, *vstd; 2522 u_int32_t token; 2523 struct iso *iso; 2524 int i, s; 2525 2526 iso = &upipe->u.iso; 2527 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2528 M_USBHC, M_WAITOK); 2529 2530 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2531 UHCI_TD_OUT(0, endpt, addr, 0); 2532 2533 /* Allocate the TDs and mark as inactive; */ 2534 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2535 std = uhci_alloc_std(sc); 2536 if (std == 0) 2537 goto bad; 2538 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2539 std->td.td_token = htole32(token); 2540 iso->stds[i] = std; 2541 } 2542 2543 /* Insert TDs into schedule. */ 2544 s = splusb(); 2545 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2546 std = iso->stds[i]; 2547 vstd = sc->sc_vframes[i].htd; 2548 std->link = vstd->link; 2549 std->td.td_link = vstd->td.td_link; 2550 vstd->link.std = std; 2551 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2552 } 2553 splx(s); 2554 2555 iso->next = -1; 2556 iso->inuse = 0; 2557 2558 return (USBD_NORMAL_COMPLETION); 2559 2560 bad: 2561 while (--i >= 0) 2562 uhci_free_std(sc, iso->stds[i]); 2563 free(iso->stds, M_USBHC); 2564 return (USBD_NOMEM); 2565 } 2566 2567 void 2568 uhci_device_isoc_done(usbd_xfer_handle xfer) 2569 { 2570 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2571 2572 DPRINTFN(4, ("uhci_device_isoc_done: length=%d\n", xfer->actlen)); 2573 2574 if (ii->xfer != xfer) 2575 /* Not on interrupt list, ignore it. */ 2576 return; 2577 2578 if (!uhci_active_intr_info(ii)) 2579 return; 2580 2581 #ifdef DIAGNOSTIC 2582 if (xfer->busy_free == XFER_FREE) { 2583 printf("uhci_device_isoc_done: xfer=%p is free\n", xfer); 2584 return; 2585 } 2586 2587 if (ii->stdend == NULL) { 2588 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2589 #ifdef UHCI_DEBUG 2590 uhci_dump_ii(ii); 2591 #endif 2592 return; 2593 } 2594 #endif 2595 2596 /* Turn off the interrupt since it is active even if the TD is not. */ 2597 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2598 2599 uhci_del_intr_info(ii); /* remove from active list */ 2600 } 2601 2602 void 2603 uhci_device_intr_done(usbd_xfer_handle xfer) 2604 { 2605 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2606 uhci_softc_t *sc = ii->sc; 2607 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2608 uhci_soft_qh_t *sqh; 2609 int i, npoll; 2610 2611 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2612 2613 npoll = upipe->u.intr.npoll; 2614 for(i = 0; i < npoll; i++) { 2615 sqh = upipe->u.intr.qhs[i]; 2616 sqh->elink = NULL; 2617 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2618 } 2619 uhci_free_std_chain(sc, ii->stdstart, NULL); 2620 2621 /* XXX Wasteful. */ 2622 if (xfer->pipe->repeat) { 2623 uhci_soft_td_t *data, *dataend; 2624 2625 DPRINTFN(5,("uhci_device_intr_done: requeuing\n")); 2626 2627 /* This alloc cannot fail since we freed the chain above. */ 2628 uhci_alloc_std_chain(upipe, sc, xfer->length, 2629 upipe->u.intr.isread, xfer->flags, 2630 &xfer->dmabuf, &data, &dataend); 2631 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2632 2633 #ifdef UHCI_DEBUG 2634 if (uhcidebug > 10) { 2635 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2636 uhci_dump_tds(data); 2637 uhci_dump_qh(upipe->u.intr.qhs[0]); 2638 } 2639 #endif 2640 2641 ii->stdstart = data; 2642 ii->stdend = dataend; 2643 #ifdef DIAGNOSTIC 2644 if (!ii->isdone) { 2645 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 2646 } 2647 ii->isdone = 0; 2648 #endif 2649 for (i = 0; i < npoll; i++) { 2650 sqh = upipe->u.intr.qhs[i]; 2651 sqh->elink = data; 2652 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2653 } 2654 xfer->status = USBD_IN_PROGRESS; 2655 /* The ii is already on the examined list, just leave it. */ 2656 } else { 2657 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 2658 if (uhci_active_intr_info(ii)) 2659 uhci_del_intr_info(ii); 2660 } 2661 } 2662 2663 /* Deallocate request data structures */ 2664 void 2665 uhci_device_ctrl_done(usbd_xfer_handle xfer) 2666 { 2667 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2668 uhci_softc_t *sc = ii->sc; 2669 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2670 2671 #ifdef DIAGNOSTIC 2672 if (!(xfer->rqflags & URQ_REQUEST)) 2673 panic("uhci_device_ctrl_done: not a request"); 2674 #endif 2675 2676 if (!uhci_active_intr_info(ii)) 2677 return; 2678 2679 uhci_del_intr_info(ii); /* remove from active list */ 2680 2681 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2682 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 2683 else 2684 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 2685 2686 if (upipe->u.ctl.length != 0) 2687 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2688 2689 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 2690 } 2691 2692 /* Deallocate request data structures */ 2693 void 2694 uhci_device_bulk_done(usbd_xfer_handle xfer) 2695 { 2696 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2697 uhci_softc_t *sc = ii->sc; 2698 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2699 2700 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 2701 xfer, ii, sc, upipe)); 2702 2703 if (!uhci_active_intr_info(ii)) 2704 return; 2705 2706 uhci_del_intr_info(ii); /* remove from active list */ 2707 2708 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2709 2710 uhci_free_std_chain(sc, ii->stdstart, NULL); 2711 2712 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 2713 } 2714 2715 /* Add interrupt QH, called with vflock. */ 2716 void 2717 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2718 { 2719 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2720 uhci_soft_qh_t *eqh; 2721 2722 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2723 2724 eqh = vf->eqh; 2725 sqh->hlink = eqh->hlink; 2726 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2727 eqh->hlink = sqh; 2728 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 2729 vf->eqh = sqh; 2730 vf->bandwidth++; 2731 } 2732 2733 /* Remove interrupt QH. */ 2734 void 2735 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2736 { 2737 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2738 uhci_soft_qh_t *pqh; 2739 2740 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2741 2742 /* See comment in uhci_remove_ctrl() */ 2743 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 2744 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2745 delay(UHCI_QH_REMOVE_DELAY); 2746 } 2747 2748 pqh = uhci_find_prev_qh(vf->hqh, sqh); 2749 pqh->hlink = sqh->hlink; 2750 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2751 delay(UHCI_QH_REMOVE_DELAY); 2752 if (vf->eqh == sqh) 2753 vf->eqh = pqh; 2754 vf->bandwidth--; 2755 } 2756 2757 usbd_status 2758 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 2759 { 2760 uhci_soft_qh_t *sqh; 2761 int i, npoll, s; 2762 u_int bestbw, bw, bestoffs, offs; 2763 2764 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 2765 if (ival == 0) { 2766 printf("uhci_device_setintr: 0 interval\n"); 2767 return (USBD_INVAL); 2768 } 2769 2770 if (ival > UHCI_VFRAMELIST_COUNT) 2771 ival = UHCI_VFRAMELIST_COUNT; 2772 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2773 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 2774 2775 upipe->u.intr.npoll = npoll; 2776 upipe->u.intr.qhs = 2777 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2778 2779 /* 2780 * Figure out which offset in the schedule that has most 2781 * bandwidth left over. 2782 */ 2783 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2784 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2785 for (bw = i = 0; i < npoll; i++) 2786 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2787 if (bw < bestbw) { 2788 bestbw = bw; 2789 bestoffs = offs; 2790 } 2791 } 2792 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2793 2794 for(i = 0; i < npoll; i++) { 2795 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2796 sqh->elink = NULL; 2797 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2798 sqh->pos = MOD(i * ival + bestoffs); 2799 } 2800 #undef MOD 2801 2802 s = splusb(); 2803 /* Enter QHs into the controller data structures. */ 2804 for(i = 0; i < npoll; i++) 2805 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 2806 splx(s); 2807 2808 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 2809 return (USBD_NORMAL_COMPLETION); 2810 } 2811 2812 /* Open a new pipe. */ 2813 usbd_status 2814 uhci_open(usbd_pipe_handle pipe) 2815 { 2816 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2817 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2818 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2819 usbd_status err; 2820 int ival; 2821 2822 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2823 pipe, pipe->device->address, 2824 ed->bEndpointAddress, sc->sc_addr)); 2825 2826 upipe->aborting = 0; 2827 upipe->nexttoggle = pipe->endpoint->savedtoggle; 2828 2829 if (pipe->device->address == sc->sc_addr) { 2830 switch (ed->bEndpointAddress) { 2831 case USB_CONTROL_ENDPOINT: 2832 pipe->methods = &uhci_root_ctrl_methods; 2833 break; 2834 case UE_DIR_IN | UHCI_INTR_ENDPT: 2835 pipe->methods = &uhci_root_intr_methods; 2836 break; 2837 default: 2838 return (USBD_INVAL); 2839 } 2840 } else { 2841 switch (ed->bmAttributes & UE_XFERTYPE) { 2842 case UE_CONTROL: 2843 pipe->methods = &uhci_device_ctrl_methods; 2844 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2845 if (upipe->u.ctl.sqh == NULL) 2846 goto bad; 2847 upipe->u.ctl.setup = uhci_alloc_std(sc); 2848 if (upipe->u.ctl.setup == NULL) { 2849 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2850 goto bad; 2851 } 2852 upipe->u.ctl.stat = uhci_alloc_std(sc); 2853 if (upipe->u.ctl.stat == NULL) { 2854 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2855 uhci_free_std(sc, upipe->u.ctl.setup); 2856 goto bad; 2857 } 2858 err = usb_allocmem(&sc->sc_bus, 2859 sizeof(usb_device_request_t), 2860 0, &upipe->u.ctl.reqdma); 2861 if (err) { 2862 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2863 uhci_free_std(sc, upipe->u.ctl.setup); 2864 uhci_free_std(sc, upipe->u.ctl.stat); 2865 goto bad; 2866 } 2867 break; 2868 case UE_INTERRUPT: 2869 pipe->methods = &uhci_device_intr_methods; 2870 ival = pipe->interval; 2871 if (ival == USBD_DEFAULT_INTERVAL) 2872 ival = ed->bInterval; 2873 return (uhci_device_setintr(sc, upipe, ival)); 2874 case UE_ISOCHRONOUS: 2875 pipe->methods = &uhci_device_isoc_methods; 2876 return (uhci_setup_isoc(pipe)); 2877 case UE_BULK: 2878 pipe->methods = &uhci_device_bulk_methods; 2879 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2880 if (upipe->u.bulk.sqh == NULL) 2881 goto bad; 2882 break; 2883 } 2884 } 2885 return (USBD_NORMAL_COMPLETION); 2886 2887 bad: 2888 return (USBD_NOMEM); 2889 } 2890 2891 /* 2892 * Data structures and routines to emulate the root hub. 2893 */ 2894 usb_device_descriptor_t uhci_devd = { 2895 USB_DEVICE_DESCRIPTOR_SIZE, 2896 UDESC_DEVICE, /* type */ 2897 {0x00, 0x01}, /* USB version */ 2898 UDCLASS_HUB, /* class */ 2899 UDSUBCLASS_HUB, /* subclass */ 2900 UDPROTO_FSHUB, /* protocol */ 2901 64, /* max packet */ 2902 {0},{0},{0x00,0x01}, /* device id */ 2903 1,2,0, /* string indices */ 2904 1 /* # of configurations */ 2905 }; 2906 2907 usb_config_descriptor_t uhci_confd = { 2908 USB_CONFIG_DESCRIPTOR_SIZE, 2909 UDESC_CONFIG, 2910 {USB_CONFIG_DESCRIPTOR_SIZE + 2911 USB_INTERFACE_DESCRIPTOR_SIZE + 2912 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2913 1, 2914 1, 2915 0, 2916 UC_SELF_POWERED, 2917 0 /* max power */ 2918 }; 2919 2920 usb_interface_descriptor_t uhci_ifcd = { 2921 USB_INTERFACE_DESCRIPTOR_SIZE, 2922 UDESC_INTERFACE, 2923 0, 2924 0, 2925 1, 2926 UICLASS_HUB, 2927 UISUBCLASS_HUB, 2928 UIPROTO_FSHUB, 2929 0 2930 }; 2931 2932 usb_endpoint_descriptor_t uhci_endpd = { 2933 USB_ENDPOINT_DESCRIPTOR_SIZE, 2934 UDESC_ENDPOINT, 2935 UE_DIR_IN | UHCI_INTR_ENDPT, 2936 UE_INTERRUPT, 2937 {8}, 2938 255 2939 }; 2940 2941 usb_hub_descriptor_t uhci_hubd_piix = { 2942 USB_HUB_DESCRIPTOR_SIZE, 2943 UDESC_HUB, 2944 2, 2945 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 2946 50, /* power on to power good */ 2947 0, 2948 { 0x00 }, /* both ports are removable */ 2949 }; 2950 2951 int 2952 uhci_str(usb_string_descriptor_t *p, int l, char *s) 2953 { 2954 int i; 2955 2956 if (l == 0) 2957 return (0); 2958 p->bLength = 2 * strlen(s) + 2; 2959 if (l == 1) 2960 return (1); 2961 p->bDescriptorType = UDESC_STRING; 2962 l -= 2; 2963 for (i = 0; s[i] && l > 1; i++, l -= 2) 2964 USETW2(p->bString[i], 0, s[i]); 2965 return (2*i+2); 2966 } 2967 2968 /* 2969 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 2970 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 2971 * should not be used by the USB subsystem. As we cannot issue a 2972 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 2973 * will be enabled as part of the reset. 2974 * 2975 * On the VT83C572, the port cannot be successfully enabled until the 2976 * outstanding "port enable change" and "connection status change" 2977 * events have been reset. 2978 */ 2979 usbd_status 2980 uhci_portreset(uhci_softc_t *sc, int index) 2981 { 2982 int lim, port, x; 2983 2984 if (index == 1) 2985 port = UHCI_PORTSC1; 2986 else if (index == 2) 2987 port = UHCI_PORTSC2; 2988 else 2989 return (USBD_IOERROR); 2990 2991 x = URWMASK(UREAD2(sc, port)); 2992 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2993 2994 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2995 2996 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 2997 index, UREAD2(sc, port))); 2998 2999 x = URWMASK(UREAD2(sc, port)); 3000 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3001 3002 delay(100); 3003 3004 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3005 index, UREAD2(sc, port))); 3006 3007 x = URWMASK(UREAD2(sc, port)); 3008 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3009 3010 for (lim = 10; --lim > 0;) { 3011 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3012 3013 x = UREAD2(sc, port); 3014 3015 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3016 index, lim, x)); 3017 3018 if (!(x & UHCI_PORTSC_CCS)) { 3019 /* 3020 * No device is connected (or was disconnected 3021 * during reset). Consider the port reset. 3022 * The delay must be long enough to ensure on 3023 * the initial iteration that the device 3024 * connection will have been registered. 50ms 3025 * appears to be sufficient, but 20ms is not. 3026 */ 3027 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3028 index, lim)); 3029 break; 3030 } 3031 3032 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3033 /* 3034 * Port enabled changed and/or connection 3035 * status changed were set. Reset either or 3036 * both raised flags (by writing a 1 to that 3037 * bit), and wait again for state to settle. 3038 */ 3039 UWRITE2(sc, port, URWMASK(x) | 3040 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3041 continue; 3042 } 3043 3044 if (x & UHCI_PORTSC_PE) 3045 /* Port is enabled */ 3046 break; 3047 3048 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3049 } 3050 3051 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3052 index, UREAD2(sc, port))); 3053 3054 if (lim <= 0) { 3055 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3056 return (USBD_TIMEOUT); 3057 } 3058 3059 sc->sc_isreset = 1; 3060 return (USBD_NORMAL_COMPLETION); 3061 } 3062 3063 /* 3064 * Simulate a hardware hub by handling all the necessary requests. 3065 */ 3066 usbd_status 3067 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3068 { 3069 usbd_status err; 3070 3071 /* Insert last in queue. */ 3072 err = usb_insert_transfer(xfer); 3073 if (err) 3074 return (err); 3075 3076 /* 3077 * Pipe isn't running (otherwise err would be USBD_INPROG), 3078 * so start it first. 3079 */ 3080 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3081 } 3082 3083 usbd_status 3084 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3085 { 3086 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3087 usb_device_request_t *req; 3088 void *buf = NULL; 3089 int port, x; 3090 int s, len, value, index, status, change, l, totlen = 0; 3091 usb_port_status_t ps; 3092 usbd_status err; 3093 3094 if (sc->sc_dying) 3095 return (USBD_IOERROR); 3096 3097 #ifdef DIAGNOSTIC 3098 if (!(xfer->rqflags & URQ_REQUEST)) 3099 panic("uhci_root_ctrl_start: not a request"); 3100 #endif 3101 req = &xfer->request; 3102 3103 DPRINTFN(2,("uhci_root_ctrl_start type=0x%02x request=%02x\n", 3104 req->bmRequestType, req->bRequest)); 3105 3106 len = UGETW(req->wLength); 3107 value = UGETW(req->wValue); 3108 index = UGETW(req->wIndex); 3109 3110 if (len != 0) 3111 buf = KERNADDR(&xfer->dmabuf, 0); 3112 3113 #define C(x,y) ((x) | ((y) << 8)) 3114 switch(C(req->bRequest, req->bmRequestType)) { 3115 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3116 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3117 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3118 /* 3119 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3120 * for the integrated root hub. 3121 */ 3122 break; 3123 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3124 if (len > 0) { 3125 *(u_int8_t *)buf = sc->sc_conf; 3126 totlen = 1; 3127 } 3128 break; 3129 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3130 DPRINTFN(2,("uhci_root_ctrl_start wValue=0x%04x\n", value)); 3131 switch(value >> 8) { 3132 case UDESC_DEVICE: 3133 if ((value & 0xff) != 0) { 3134 err = USBD_IOERROR; 3135 goto ret; 3136 } 3137 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3138 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3139 memcpy(buf, &uhci_devd, l); 3140 break; 3141 case UDESC_CONFIG: 3142 if ((value & 0xff) != 0) { 3143 err = USBD_IOERROR; 3144 goto ret; 3145 } 3146 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3147 memcpy(buf, &uhci_confd, l); 3148 buf = (char *)buf + l; 3149 len -= l; 3150 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3151 totlen += l; 3152 memcpy(buf, &uhci_ifcd, l); 3153 buf = (char *)buf + l; 3154 len -= l; 3155 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3156 totlen += l; 3157 memcpy(buf, &uhci_endpd, l); 3158 break; 3159 case UDESC_STRING: 3160 if (len == 0) 3161 break; 3162 *(u_int8_t *)buf = 0; 3163 totlen = 1; 3164 switch (value & 0xff) { 3165 case 0: /* Language table */ 3166 totlen = uhci_str(buf, len, "\001"); 3167 break; 3168 case 1: /* Vendor */ 3169 totlen = uhci_str(buf, len, sc->sc_vendor); 3170 break; 3171 case 2: /* Product */ 3172 totlen = uhci_str(buf, len, "UHCI root hub"); 3173 break; 3174 } 3175 break; 3176 default: 3177 err = USBD_IOERROR; 3178 goto ret; 3179 } 3180 break; 3181 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3182 if (len > 0) { 3183 *(u_int8_t *)buf = 0; 3184 totlen = 1; 3185 } 3186 break; 3187 case C(UR_GET_STATUS, UT_READ_DEVICE): 3188 if (len > 1) { 3189 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3190 totlen = 2; 3191 } 3192 break; 3193 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3194 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3195 if (len > 1) { 3196 USETW(((usb_status_t *)buf)->wStatus, 0); 3197 totlen = 2; 3198 } 3199 break; 3200 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3201 if (value >= USB_MAX_DEVICES) { 3202 err = USBD_IOERROR; 3203 goto ret; 3204 } 3205 sc->sc_addr = value; 3206 break; 3207 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3208 if (value != 0 && value != 1) { 3209 err = USBD_IOERROR; 3210 goto ret; 3211 } 3212 sc->sc_conf = value; 3213 break; 3214 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3215 break; 3216 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3217 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3218 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3219 err = USBD_IOERROR; 3220 goto ret; 3221 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3222 break; 3223 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3224 break; 3225 /* Hub requests */ 3226 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3227 break; 3228 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3229 DPRINTFN(3, ("uhci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 3230 "port=%d feature=%d\n", 3231 index, value)); 3232 if (index == 1) 3233 port = UHCI_PORTSC1; 3234 else if (index == 2) 3235 port = UHCI_PORTSC2; 3236 else { 3237 err = USBD_IOERROR; 3238 goto ret; 3239 } 3240 switch(value) { 3241 case UHF_PORT_ENABLE: 3242 x = URWMASK(UREAD2(sc, port)); 3243 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3244 break; 3245 case UHF_PORT_SUSPEND: 3246 x = URWMASK(UREAD2(sc, port)); 3247 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3248 break; 3249 case UHF_PORT_RESET: 3250 x = URWMASK(UREAD2(sc, port)); 3251 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3252 break; 3253 case UHF_C_PORT_CONNECTION: 3254 x = URWMASK(UREAD2(sc, port)); 3255 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3256 break; 3257 case UHF_C_PORT_ENABLE: 3258 x = URWMASK(UREAD2(sc, port)); 3259 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3260 break; 3261 case UHF_C_PORT_OVER_CURRENT: 3262 x = URWMASK(UREAD2(sc, port)); 3263 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3264 break; 3265 case UHF_C_PORT_RESET: 3266 sc->sc_isreset = 0; 3267 err = USBD_NORMAL_COMPLETION; 3268 goto ret; 3269 case UHF_PORT_CONNECTION: 3270 case UHF_PORT_OVER_CURRENT: 3271 case UHF_PORT_POWER: 3272 case UHF_PORT_LOW_SPEED: 3273 case UHF_C_PORT_SUSPEND: 3274 default: 3275 err = USBD_IOERROR; 3276 goto ret; 3277 } 3278 break; 3279 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3280 if (index == 1) 3281 port = UHCI_PORTSC1; 3282 else if (index == 2) 3283 port = UHCI_PORTSC2; 3284 else { 3285 err = USBD_IOERROR; 3286 goto ret; 3287 } 3288 if (len > 0) { 3289 *(u_int8_t *)buf = 3290 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3291 UHCI_PORTSC_LS_SHIFT; 3292 totlen = 1; 3293 } 3294 break; 3295 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3296 if ((value & 0xff) != 0) { 3297 err = USBD_IOERROR; 3298 goto ret; 3299 } 3300 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3301 totlen = l; 3302 memcpy(buf, &uhci_hubd_piix, l); 3303 break; 3304 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3305 if (len != 4) { 3306 err = USBD_IOERROR; 3307 goto ret; 3308 } 3309 memset(buf, 0, len); 3310 totlen = len; 3311 break; 3312 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3313 if (index == 1) 3314 port = UHCI_PORTSC1; 3315 else if (index == 2) 3316 port = UHCI_PORTSC2; 3317 else { 3318 err = USBD_IOERROR; 3319 goto ret; 3320 } 3321 if (len != 4) { 3322 err = USBD_IOERROR; 3323 goto ret; 3324 } 3325 x = UREAD2(sc, port); 3326 status = change = 0; 3327 if (x & UHCI_PORTSC_CCS) 3328 status |= UPS_CURRENT_CONNECT_STATUS; 3329 if (x & UHCI_PORTSC_CSC) 3330 change |= UPS_C_CONNECT_STATUS; 3331 if (x & UHCI_PORTSC_PE) 3332 status |= UPS_PORT_ENABLED; 3333 if (x & UHCI_PORTSC_POEDC) 3334 change |= UPS_C_PORT_ENABLED; 3335 if (x & UHCI_PORTSC_OCI) 3336 status |= UPS_OVERCURRENT_INDICATOR; 3337 if (x & UHCI_PORTSC_OCIC) 3338 change |= UPS_C_OVERCURRENT_INDICATOR; 3339 if (x & UHCI_PORTSC_SUSP) 3340 status |= UPS_SUSPEND; 3341 if (x & UHCI_PORTSC_LSDA) 3342 status |= UPS_LOW_SPEED; 3343 status |= UPS_PORT_POWER; 3344 if (sc->sc_isreset) 3345 change |= UPS_C_PORT_RESET; 3346 USETW(ps.wPortStatus, status); 3347 USETW(ps.wPortChange, change); 3348 l = min(len, sizeof ps); 3349 memcpy(buf, &ps, l); 3350 totlen = l; 3351 break; 3352 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3353 err = USBD_IOERROR; 3354 goto ret; 3355 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3356 break; 3357 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3358 if (index == 1) 3359 port = UHCI_PORTSC1; 3360 else if (index == 2) 3361 port = UHCI_PORTSC2; 3362 else { 3363 err = USBD_IOERROR; 3364 goto ret; 3365 } 3366 switch(value) { 3367 case UHF_PORT_ENABLE: 3368 x = URWMASK(UREAD2(sc, port)); 3369 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3370 break; 3371 case UHF_PORT_SUSPEND: 3372 x = URWMASK(UREAD2(sc, port)); 3373 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3374 break; 3375 case UHF_PORT_RESET: 3376 err = uhci_portreset(sc, index); 3377 goto ret; 3378 case UHF_PORT_POWER: 3379 /* Pretend we turned on power */ 3380 err = USBD_NORMAL_COMPLETION; 3381 goto ret; 3382 case UHF_PORT_DISOWN_TO_1_1: 3383 /* accept, but do nothing */ 3384 err = USBD_NORMAL_COMPLETION; 3385 goto ret; 3386 case UHF_C_PORT_CONNECTION: 3387 case UHF_C_PORT_ENABLE: 3388 case UHF_C_PORT_OVER_CURRENT: 3389 case UHF_PORT_CONNECTION: 3390 case UHF_PORT_OVER_CURRENT: 3391 case UHF_PORT_LOW_SPEED: 3392 case UHF_C_PORT_SUSPEND: 3393 case UHF_C_PORT_RESET: 3394 default: 3395 err = USBD_IOERROR; 3396 goto ret; 3397 } 3398 break; 3399 default: 3400 err = USBD_IOERROR; 3401 goto ret; 3402 } 3403 xfer->actlen = totlen; 3404 err = USBD_NORMAL_COMPLETION; 3405 ret: 3406 xfer->status = err; 3407 s = splusb(); 3408 usb_transfer_complete(xfer); 3409 splx(s); 3410 return (USBD_IN_PROGRESS); 3411 } 3412 3413 /* Abort a root control request. */ 3414 void 3415 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3416 { 3417 /* Nothing to do, all transfers are synchronous. */ 3418 } 3419 3420 /* Close the root pipe. */ 3421 void 3422 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3423 { 3424 DPRINTF(("uhci_root_ctrl_close\n")); 3425 } 3426 3427 /* Abort a root interrupt request. */ 3428 void 3429 uhci_root_intr_abort(usbd_xfer_handle xfer) 3430 { 3431 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3432 3433 timeout_del(&sc->sc_poll_handle); 3434 sc->sc_intr_xfer = NULL; 3435 3436 if (xfer->pipe->intrxfer == xfer) { 3437 DPRINTF(("uhci_root_intr_abort: remove\n")); 3438 xfer->pipe->intrxfer = 0; 3439 } 3440 xfer->status = USBD_CANCELLED; 3441 #ifdef DIAGNOSTIC 3442 UXFER(xfer)->iinfo.isdone = 1; 3443 #endif 3444 usb_transfer_complete(xfer); 3445 } 3446 3447 usbd_status 3448 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3449 { 3450 usbd_status err; 3451 3452 /* Insert last in queue. */ 3453 err = usb_insert_transfer(xfer); 3454 if (err) 3455 return (err); 3456 3457 /* Pipe isn't running (otherwise err would be USBD_INPROG), 3458 * start first 3459 */ 3460 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3461 } 3462 3463 /* Start a transfer on the root interrupt pipe */ 3464 usbd_status 3465 uhci_root_intr_start(usbd_xfer_handle xfer) 3466 { 3467 usbd_pipe_handle pipe = xfer->pipe; 3468 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3469 3470 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3471 xfer, xfer->length, xfer->flags)); 3472 3473 if (sc->sc_dying) 3474 return (USBD_IOERROR); 3475 3476 sc->sc_ival = mstohz(xfer->pipe->endpoint->edesc->bInterval); 3477 timeout_del(&sc->sc_poll_handle); 3478 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer); 3479 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 3480 sc->sc_intr_xfer = xfer; 3481 return (USBD_IN_PROGRESS); 3482 } 3483 3484 /* Close the root interrupt pipe. */ 3485 void 3486 uhci_root_intr_close(usbd_pipe_handle pipe) 3487 { 3488 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3489 3490 timeout_del(&sc->sc_poll_handle); 3491 sc->sc_intr_xfer = NULL; 3492 DPRINTF(("uhci_root_intr_close\n")); 3493 } 3494