1 /* $OpenBSD: uhci.c,v 1.73 2009/11/04 19:14:10 kettenis Exp $ */ 2 /* $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * USB Universal Host Controller driver. 37 * Handles e.g. PIIX3 and PIIX4. 38 * 39 * UHCI spec: http://download.intel.com/technology/usb/UHCI11D.pdf 40 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 41 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 42 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/malloc.h> 49 #include <sys/device.h> 50 #include <sys/selinfo.h> 51 #include <sys/proc.h> 52 #include <sys/queue.h> 53 54 #include <machine/bus.h> 55 #include <machine/endian.h> 56 57 #include <dev/usb/usb.h> 58 #include <dev/usb/usbdi.h> 59 #include <dev/usb/usbdivar.h> 60 #include <dev/usb/usb_mem.h> 61 #include <dev/usb/usb_quirks.h> 62 63 #include <dev/usb/uhcireg.h> 64 #include <dev/usb/uhcivar.h> 65 66 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 67 /*#define UHCI_CTL_LOOP */ 68 69 struct cfdriver uhci_cd = { 70 NULL, "uhci", DV_DULL 71 }; 72 73 #ifdef UHCI_DEBUG 74 uhci_softc_t *thesc; 75 #define DPRINTF(x) if (uhcidebug) printf x 76 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 77 int uhcidebug = 0; 78 int uhcinoloop = 0; 79 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 80 #else 81 #define DPRINTF(x) 82 #define DPRINTFN(n,x) 83 #endif 84 85 #define mstohz(ms) ((ms) * hz / 1000) 86 87 /* 88 * The UHCI controller is little endian, so on big endian machines 89 * the data stored in memory needs to be swapped. 90 */ 91 92 struct uhci_pipe { 93 struct usbd_pipe pipe; 94 int nexttoggle; 95 96 u_char aborting; 97 usbd_xfer_handle abortstart, abortend; 98 99 /* Info needed for different pipe kinds. */ 100 union { 101 /* Control pipe */ 102 struct { 103 uhci_soft_qh_t *sqh; 104 usb_dma_t reqdma; 105 uhci_soft_td_t *setup, *stat; 106 u_int length; 107 } ctl; 108 /* Interrupt pipe */ 109 struct { 110 int npoll; 111 int isread; 112 uhci_soft_qh_t **qhs; 113 } intr; 114 /* Bulk pipe */ 115 struct { 116 uhci_soft_qh_t *sqh; 117 u_int length; 118 int isread; 119 } bulk; 120 /* Iso pipe */ 121 struct iso { 122 uhci_soft_td_t **stds; 123 int next, inuse; 124 } iso; 125 } u; 126 }; 127 128 void uhci_globalreset(uhci_softc_t *); 129 usbd_status uhci_portreset(uhci_softc_t*, int); 130 void uhci_reset(uhci_softc_t *); 131 void uhci_shutdown(void *v); 132 void uhci_power(int, void *); 133 usbd_status uhci_run(uhci_softc_t *, int run); 134 uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 135 void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 136 uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 137 void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 138 #if 0 139 void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 140 uhci_intr_info_t *); 141 void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 142 #endif 143 144 void uhci_free_std_chain(uhci_softc_t *, 145 uhci_soft_td_t *, uhci_soft_td_t *); 146 usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 147 uhci_softc_t *, u_int, int, u_int16_t, usb_dma_t *, 148 uhci_soft_td_t **, uhci_soft_td_t **); 149 void uhci_poll_hub(void *); 150 void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 151 void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 152 void uhci_idone(uhci_intr_info_t *); 153 154 void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 155 156 void uhci_timeout(void *); 157 void uhci_timeout_task(void *); 158 void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 159 void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 160 void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 161 void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 162 void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 163 void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 164 int uhci_str(usb_string_descriptor_t *, int, char *); 165 void uhci_add_loop(uhci_softc_t *sc); 166 void uhci_rem_loop(uhci_softc_t *sc); 167 168 usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 169 void uhci_device_isoc_enter(usbd_xfer_handle); 170 171 usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 172 void uhci_freem(struct usbd_bus *, usb_dma_t *); 173 174 usbd_xfer_handle uhci_allocx(struct usbd_bus *); 175 void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 176 177 usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 178 usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 179 void uhci_device_ctrl_abort(usbd_xfer_handle); 180 void uhci_device_ctrl_close(usbd_pipe_handle); 181 void uhci_device_ctrl_done(usbd_xfer_handle); 182 183 usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 184 usbd_status uhci_device_intr_start(usbd_xfer_handle); 185 void uhci_device_intr_abort(usbd_xfer_handle); 186 void uhci_device_intr_close(usbd_pipe_handle); 187 void uhci_device_intr_done(usbd_xfer_handle); 188 189 usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 190 usbd_status uhci_device_bulk_start(usbd_xfer_handle); 191 void uhci_device_bulk_abort(usbd_xfer_handle); 192 void uhci_device_bulk_close(usbd_pipe_handle); 193 void uhci_device_bulk_done(usbd_xfer_handle); 194 195 usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 196 usbd_status uhci_device_isoc_start(usbd_xfer_handle); 197 void uhci_device_isoc_abort(usbd_xfer_handle); 198 void uhci_device_isoc_close(usbd_pipe_handle); 199 void uhci_device_isoc_done(usbd_xfer_handle); 200 201 usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 202 usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 203 void uhci_root_ctrl_abort(usbd_xfer_handle); 204 void uhci_root_ctrl_close(usbd_pipe_handle); 205 void uhci_root_ctrl_done(usbd_xfer_handle); 206 207 usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 208 usbd_status uhci_root_intr_start(usbd_xfer_handle); 209 void uhci_root_intr_abort(usbd_xfer_handle); 210 void uhci_root_intr_close(usbd_pipe_handle); 211 void uhci_root_intr_done(usbd_xfer_handle); 212 213 usbd_status uhci_open(usbd_pipe_handle); 214 void uhci_poll(struct usbd_bus *); 215 void uhci_softintr(void *); 216 217 usbd_status uhci_device_request(usbd_xfer_handle xfer); 218 219 void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 220 void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 221 usbd_status uhci_device_setintr(uhci_softc_t *sc, 222 struct uhci_pipe *pipe, int ival); 223 224 void uhci_device_clear_toggle(usbd_pipe_handle pipe); 225 void uhci_noop(usbd_pipe_handle pipe); 226 227 __inline__ uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 228 uhci_soft_qh_t *); 229 230 #ifdef UHCI_DEBUG 231 void uhci_dump_all(uhci_softc_t *); 232 void uhci_dumpregs(uhci_softc_t *); 233 void uhci_dump_qhs(uhci_soft_qh_t *); 234 void uhci_dump_qh(uhci_soft_qh_t *); 235 void uhci_dump_tds(uhci_soft_td_t *); 236 void uhci_dump_td(uhci_soft_td_t *); 237 void uhci_dump_ii(uhci_intr_info_t *ii); 238 void uhci_dump(void); 239 #endif 240 241 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 242 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 243 #define UWRITE1(sc, r, x) \ 244 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 245 } while (/*CONSTCOND*/0) 246 #define UWRITE2(sc, r, x) \ 247 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 248 } while (/*CONSTCOND*/0) 249 #define UWRITE4(sc, r, x) \ 250 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 251 } while (/*CONSTCOND*/0) 252 #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 253 #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 254 #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 255 256 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 257 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 258 259 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 260 261 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 262 263 #define UHCI_INTR_ENDPT 1 264 265 struct usbd_bus_methods uhci_bus_methods = { 266 uhci_open, 267 uhci_softintr, 268 uhci_poll, 269 uhci_allocm, 270 uhci_freem, 271 uhci_allocx, 272 uhci_freex, 273 }; 274 275 struct usbd_pipe_methods uhci_root_ctrl_methods = { 276 uhci_root_ctrl_transfer, 277 uhci_root_ctrl_start, 278 uhci_root_ctrl_abort, 279 uhci_root_ctrl_close, 280 uhci_noop, 281 uhci_root_ctrl_done, 282 }; 283 284 struct usbd_pipe_methods uhci_root_intr_methods = { 285 uhci_root_intr_transfer, 286 uhci_root_intr_start, 287 uhci_root_intr_abort, 288 uhci_root_intr_close, 289 uhci_noop, 290 uhci_root_intr_done, 291 }; 292 293 struct usbd_pipe_methods uhci_device_ctrl_methods = { 294 uhci_device_ctrl_transfer, 295 uhci_device_ctrl_start, 296 uhci_device_ctrl_abort, 297 uhci_device_ctrl_close, 298 uhci_noop, 299 uhci_device_ctrl_done, 300 }; 301 302 struct usbd_pipe_methods uhci_device_intr_methods = { 303 uhci_device_intr_transfer, 304 uhci_device_intr_start, 305 uhci_device_intr_abort, 306 uhci_device_intr_close, 307 uhci_device_clear_toggle, 308 uhci_device_intr_done, 309 }; 310 311 struct usbd_pipe_methods uhci_device_bulk_methods = { 312 uhci_device_bulk_transfer, 313 uhci_device_bulk_start, 314 uhci_device_bulk_abort, 315 uhci_device_bulk_close, 316 uhci_device_clear_toggle, 317 uhci_device_bulk_done, 318 }; 319 320 struct usbd_pipe_methods uhci_device_isoc_methods = { 321 uhci_device_isoc_transfer, 322 uhci_device_isoc_start, 323 uhci_device_isoc_abort, 324 uhci_device_isoc_close, 325 uhci_noop, 326 uhci_device_isoc_done, 327 }; 328 329 #define uhci_add_intr_info(sc, ii) \ 330 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 331 #define uhci_del_intr_info(ii) \ 332 do { \ 333 LIST_REMOVE((ii), list); \ 334 (ii)->list.le_prev = NULL; \ 335 } while (0) 336 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 337 338 __inline__ uhci_soft_qh_t * 339 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 340 { 341 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 342 343 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 344 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 345 if (letoh32(pqh->qh.qh_hlink) & UHCI_PTR_T) { 346 printf("uhci_find_prev_qh: QH not found\n"); 347 return (NULL); 348 } 349 #endif 350 } 351 return (pqh); 352 } 353 354 void 355 uhci_globalreset(uhci_softc_t *sc) 356 { 357 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 358 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 359 UHCICMD(sc, 0); /* do nothing */ 360 } 361 362 usbd_status 363 uhci_init(uhci_softc_t *sc) 364 { 365 usbd_status err; 366 int i, j; 367 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 368 uhci_soft_td_t *std; 369 370 DPRINTFN(1,("uhci_init: start\n")); 371 372 #ifdef UHCI_DEBUG 373 thesc = sc; 374 375 if (uhcidebug > 2) 376 uhci_dumpregs(sc); 377 #endif 378 379 /* Save SOF over HC reset. */ 380 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 381 382 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 383 uhci_globalreset(sc); /* reset the controller */ 384 uhci_reset(sc); 385 386 /* Restore saved SOF. */ 387 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 388 389 /* Allocate and initialize real frame array. */ 390 err = usb_allocmem(&sc->sc_bus, 391 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 392 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 393 if (err) 394 return (err); 395 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 396 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 397 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 398 399 /* 400 * Allocate a TD, inactive, that hangs from the last QH. 401 * This is to avoid a bug in the PIIX that makes it run berserk 402 * otherwise. 403 */ 404 std = uhci_alloc_std(sc); 405 if (std == NULL) 406 return (USBD_NOMEM); 407 std->link.std = NULL; 408 std->td.td_link = htole32(UHCI_PTR_T); 409 std->td.td_status = htole32(0); /* inactive */ 410 std->td.td_token = htole32(0); 411 std->td.td_buffer = htole32(0); 412 413 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 414 lsqh = uhci_alloc_sqh(sc); 415 if (lsqh == NULL) 416 return (USBD_NOMEM); 417 lsqh->hlink = NULL; 418 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 419 lsqh->elink = std; 420 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 421 sc->sc_last_qh = lsqh; 422 423 /* Allocate the dummy QH where bulk traffic will be queued. */ 424 bsqh = uhci_alloc_sqh(sc); 425 if (bsqh == NULL) 426 return (USBD_NOMEM); 427 bsqh->hlink = lsqh; 428 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 429 bsqh->elink = NULL; 430 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 431 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 432 433 /* Allocate dummy QH where high speed control traffic will be queued. */ 434 chsqh = uhci_alloc_sqh(sc); 435 if (chsqh == NULL) 436 return (USBD_NOMEM); 437 chsqh->hlink = bsqh; 438 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 439 chsqh->elink = NULL; 440 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 441 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 442 443 /* Allocate dummy QH where control traffic will be queued. */ 444 clsqh = uhci_alloc_sqh(sc); 445 if (clsqh == NULL) 446 return (USBD_NOMEM); 447 clsqh->hlink = chsqh; 448 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 449 clsqh->elink = NULL; 450 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 451 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 452 453 /* 454 * Make all (virtual) frame list pointers point to the interrupt 455 * queue heads and the interrupt queue heads at the control 456 * queue head and point the physical frame list to the virtual. 457 */ 458 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 459 std = uhci_alloc_std(sc); 460 sqh = uhci_alloc_sqh(sc); 461 if (std == NULL || sqh == NULL) 462 return (USBD_NOMEM); 463 std->link.sqh = sqh; 464 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 465 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 466 std->td.td_token = htole32(0); 467 std->td.td_buffer = htole32(0); 468 sqh->hlink = clsqh; 469 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 470 sqh->elink = NULL; 471 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 472 sc->sc_vframes[i].htd = std; 473 sc->sc_vframes[i].etd = std; 474 sc->sc_vframes[i].hqh = sqh; 475 sc->sc_vframes[i].eqh = sqh; 476 for (j = i; 477 j < UHCI_FRAMELIST_COUNT; 478 j += UHCI_VFRAMELIST_COUNT) 479 sc->sc_pframes[j] = htole32(std->physaddr); 480 } 481 482 LIST_INIT(&sc->sc_intrhead); 483 484 SIMPLEQ_INIT(&sc->sc_free_xfers); 485 486 timeout_set(&sc->sc_poll_handle, NULL, NULL); 487 488 /* Set up the bus struct. */ 489 sc->sc_bus.methods = &uhci_bus_methods; 490 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 491 492 sc->sc_suspend = PWR_RESUME; 493 sc->sc_powerhook = powerhook_establish(uhci_power, sc); 494 sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc); 495 496 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 497 498 DPRINTFN(1,("uhci_init: enabling\n")); 499 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 500 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 501 502 return (uhci_run(sc, 1)); /* and here we go... */ 503 } 504 505 int 506 uhci_activate(struct device *self, int act) 507 { 508 struct uhci_softc *sc = (struct uhci_softc *)self; 509 int rv = 0; 510 511 switch (act) { 512 case DVACT_ACTIVATE: 513 break; 514 515 case DVACT_DEACTIVATE: 516 if (sc->sc_child != NULL) 517 rv = config_deactivate(sc->sc_child); 518 break; 519 } 520 return (rv); 521 } 522 523 int 524 uhci_detach(struct uhci_softc *sc, int flags) 525 { 526 usbd_xfer_handle xfer; 527 int rv = 0; 528 529 if (sc->sc_child != NULL) 530 rv = config_detach(sc->sc_child, flags); 531 532 if (rv != 0) 533 return (rv); 534 535 if (sc->sc_powerhook != NULL) 536 powerhook_disestablish(sc->sc_powerhook); 537 if (sc->sc_shutdownhook != NULL) 538 shutdownhook_disestablish(sc->sc_shutdownhook); 539 540 /* Free all xfers associated with this HC. */ 541 for (;;) { 542 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 543 if (xfer == NULL) 544 break; 545 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 546 free(xfer, M_USB); 547 } 548 549 /* XXX free other data structures XXX */ 550 551 return (rv); 552 } 553 554 usbd_status 555 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 556 { 557 struct uhci_softc *sc = (struct uhci_softc *)bus; 558 u_int32_t n; 559 560 /* 561 * XXX 562 * Since we are allocating a buffer we can assume that we will 563 * need TDs for it. Since we don't want to allocate those from 564 * an interrupt context, we allocate them here and free them again. 565 * This is no guarantee that we'll get the TDs next time... 566 */ 567 n = size / 8; 568 if (n > 16) { 569 u_int32_t i; 570 uhci_soft_td_t **stds; 571 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 572 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 573 M_NOWAIT | M_ZERO); 574 if (stds == NULL) 575 panic("uhci_allocm"); 576 for(i=0; i < n; i++) 577 stds[i] = uhci_alloc_std(sc); 578 for(i=0; i < n; i++) 579 if (stds[i] != NULL) 580 uhci_free_std(sc, stds[i]); 581 free(stds, M_TEMP); 582 } 583 584 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 585 } 586 587 void 588 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 589 { 590 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 591 } 592 593 usbd_xfer_handle 594 uhci_allocx(struct usbd_bus *bus) 595 { 596 struct uhci_softc *sc = (struct uhci_softc *)bus; 597 usbd_xfer_handle xfer; 598 599 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 600 if (xfer != NULL) { 601 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 602 #ifdef DIAGNOSTIC 603 if (xfer->busy_free != XFER_FREE) { 604 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 605 xfer->busy_free); 606 } 607 #endif 608 } else { 609 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 610 } 611 if (xfer != NULL) { 612 memset(xfer, 0, sizeof (struct uhci_xfer)); 613 UXFER(xfer)->iinfo.sc = sc; 614 #ifdef DIAGNOSTIC 615 UXFER(xfer)->iinfo.isdone = 1; 616 xfer->busy_free = XFER_BUSY; 617 #endif 618 } 619 return (xfer); 620 } 621 622 void 623 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 624 { 625 struct uhci_softc *sc = (struct uhci_softc *)bus; 626 627 #ifdef DIAGNOSTIC 628 if (xfer->busy_free != XFER_BUSY) { 629 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 630 xfer->busy_free); 631 return; 632 } 633 xfer->busy_free = XFER_FREE; 634 if (!UXFER(xfer)->iinfo.isdone) { 635 printf("uhci_freex: !isdone\n"); 636 return; 637 } 638 #endif 639 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 640 } 641 642 /* 643 * Shut down the controller when the system is going down. 644 */ 645 void 646 uhci_shutdown(void *v) 647 { 648 uhci_softc_t *sc = v; 649 650 DPRINTF(("uhci_shutdown: stopping the HC\n")); 651 uhci_run(sc, 0); /* stop the controller */ 652 } 653 654 /* 655 * Handle suspend/resume. 656 * 657 * We need to switch to polling mode here, because this routine is 658 * called from an interrupt context. This is all right since we 659 * are almost suspended anyway. 660 */ 661 void 662 uhci_power(int why, void *v) 663 { 664 uhci_softc_t *sc = v; 665 int cmd; 666 int s; 667 668 s = splhardusb(); 669 cmd = UREAD2(sc, UHCI_CMD); 670 671 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n", 672 sc, why, sc->sc_suspend, cmd)); 673 674 switch (why) { 675 case PWR_SUSPEND: 676 case PWR_STANDBY: 677 #ifdef UHCI_DEBUG 678 if (uhcidebug > 2) 679 uhci_dumpregs(sc); 680 #endif 681 if (sc->sc_intr_xfer != NULL) 682 timeout_del(&sc->sc_poll_handle); 683 sc->sc_bus.use_polling++; 684 uhci_run(sc, 0); /* stop the controller */ 685 686 /* save some state if BIOS doesn't */ 687 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 688 689 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 690 691 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 692 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 693 sc->sc_suspend = why; 694 sc->sc_bus.use_polling--; 695 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 696 break; 697 case PWR_RESUME: 698 #ifdef DIAGNOSTIC 699 if (sc->sc_suspend == PWR_RESUME) 700 printf("uhci_power: weird, resume without suspend.\n"); 701 #endif 702 sc->sc_bus.use_polling++; 703 sc->sc_suspend = why; 704 if (cmd & UHCI_CMD_RS) 705 uhci_run(sc, 0); /* in case BIOS has started it */ 706 707 /* restore saved state */ 708 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 709 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 710 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 711 712 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 713 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 714 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 715 UHCICMD(sc, UHCI_CMD_MAXP); 716 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 717 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 718 uhci_run(sc, 1); /* and start traffic again */ 719 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 720 sc->sc_bus.use_polling--; 721 if (sc->sc_intr_xfer != NULL) { 722 timeout_del(&sc->sc_poll_handle); 723 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, 724 sc->sc_intr_xfer); 725 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 726 } 727 #ifdef UHCI_DEBUG 728 if (uhcidebug > 2) 729 uhci_dumpregs(sc); 730 #endif 731 break; 732 } 733 splx(s); 734 } 735 736 #ifdef UHCI_DEBUG 737 void 738 uhci_dumpregs(uhci_softc_t *sc) 739 { 740 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 741 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 742 sc->sc_bus.bdev.dv_xname, 743 UREAD2(sc, UHCI_CMD), 744 UREAD2(sc, UHCI_STS), 745 UREAD2(sc, UHCI_INTR), 746 UREAD2(sc, UHCI_FRNUM), 747 UREAD4(sc, UHCI_FLBASEADDR), 748 UREAD1(sc, UHCI_SOF), 749 UREAD2(sc, UHCI_PORTSC1), 750 UREAD2(sc, UHCI_PORTSC2))); 751 } 752 753 void 754 uhci_dump_td(uhci_soft_td_t *p) 755 { 756 char sbuf[128], sbuf2[128]; 757 758 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 759 "token=0x%08lx buffer=0x%08lx\n", 760 p, (long)p->physaddr, 761 (long)letoh32(p->td.td_link), 762 (long)letoh32(p->td.td_status), 763 (long)letoh32(p->td.td_token), 764 (long)letoh32(p->td.td_buffer))); 765 766 bitmask_snprintf((u_int32_t)letoh32(p->td.td_link), "\20\1T\2Q\3VF", 767 sbuf, sizeof(sbuf)); 768 bitmask_snprintf((u_int32_t)letoh32(p->td.td_status), 769 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 770 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 771 sbuf2, sizeof(sbuf2)); 772 773 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 774 "D=%d,maxlen=%d\n", sbuf, sbuf2, 775 UHCI_TD_GET_ERRCNT(letoh32(p->td.td_status)), 776 UHCI_TD_GET_ACTLEN(letoh32(p->td.td_status)), 777 UHCI_TD_GET_PID(letoh32(p->td.td_token)), 778 UHCI_TD_GET_DEVADDR(letoh32(p->td.td_token)), 779 UHCI_TD_GET_ENDPT(letoh32(p->td.td_token)), 780 UHCI_TD_GET_DT(letoh32(p->td.td_token)), 781 UHCI_TD_GET_MAXLEN(letoh32(p->td.td_token)))); 782 } 783 784 void 785 uhci_dump_qh(uhci_soft_qh_t *sqh) 786 { 787 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 788 (int)sqh->physaddr, letoh32(sqh->qh.qh_hlink), 789 letoh32(sqh->qh.qh_elink))); 790 } 791 792 793 void 794 uhci_dump(void) 795 { 796 uhci_dump_all(thesc); 797 } 798 799 void 800 uhci_dump_all(uhci_softc_t *sc) 801 { 802 uhci_dumpregs(sc); 803 printf("intrs=%d\n", sc->sc_bus.no_intrs); 804 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 805 uhci_dump_qh(sc->sc_lctl_start); 806 } 807 808 809 void 810 uhci_dump_qhs(uhci_soft_qh_t *sqh) 811 { 812 uhci_dump_qh(sqh); 813 814 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 815 * Traverses sideways first, then down. 816 * 817 * QH1 818 * QH2 819 * No QH 820 * TD2.1 821 * TD2.2 822 * TD1.1 823 * etc. 824 * 825 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 826 */ 827 828 829 if (sqh->hlink != NULL && !(letoh32(sqh->qh.qh_hlink) & UHCI_PTR_T)) 830 uhci_dump_qhs(sqh->hlink); 831 else 832 DPRINTF(("No QH\n")); 833 834 if (sqh->elink != NULL && !(letoh32(sqh->qh.qh_elink) & UHCI_PTR_T)) 835 uhci_dump_tds(sqh->elink); 836 else 837 DPRINTF(("No TD\n")); 838 } 839 840 void 841 uhci_dump_tds(uhci_soft_td_t *std) 842 { 843 uhci_soft_td_t *td; 844 845 for(td = std; td != NULL; td = td->link.std) { 846 uhci_dump_td(td); 847 848 /* Check whether the link pointer in this TD marks 849 * the link pointer as end of queue. This avoids 850 * printing the free list in case the queue/TD has 851 * already been moved there (seatbelt). 852 */ 853 if (letoh32(td->td.td_link) & UHCI_PTR_T || 854 letoh32(td->td.td_link) == 0) 855 break; 856 } 857 } 858 859 void 860 uhci_dump_ii(uhci_intr_info_t *ii) 861 { 862 usbd_pipe_handle pipe; 863 usb_endpoint_descriptor_t *ed; 864 usbd_device_handle dev; 865 866 #ifdef DIAGNOSTIC 867 #define DONE ii->isdone 868 #else 869 #define DONE 0 870 #endif 871 if (ii == NULL) { 872 printf("ii NULL\n"); 873 return; 874 } 875 if (ii->xfer == NULL) { 876 printf("ii %p: done=%d xfer=NULL\n", 877 ii, DONE); 878 return; 879 } 880 pipe = ii->xfer->pipe; 881 if (pipe == NULL) { 882 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 883 ii, DONE, ii->xfer); 884 return; 885 } 886 if (pipe->endpoint == NULL) { 887 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 888 ii, DONE, ii->xfer, pipe); 889 return; 890 } 891 if (pipe->device == NULL) { 892 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 893 ii, DONE, ii->xfer, pipe); 894 return; 895 } 896 ed = pipe->endpoint->edesc; 897 dev = pipe->device; 898 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 899 ii, DONE, ii->xfer, dev, 900 UGETW(dev->ddesc.idVendor), 901 UGETW(dev->ddesc.idProduct), 902 dev->address, pipe, 903 ed->bEndpointAddress, ed->bmAttributes); 904 #undef DONE 905 } 906 907 void uhci_dump_iis(struct uhci_softc *sc); 908 void 909 uhci_dump_iis(struct uhci_softc *sc) 910 { 911 uhci_intr_info_t *ii; 912 913 printf("intr_info list:\n"); 914 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 915 uhci_dump_ii(ii); 916 } 917 918 void iidump(void); 919 void iidump(void) { uhci_dump_iis(thesc); } 920 921 #endif 922 923 /* 924 * This routine is executed periodically and simulates interrupts 925 * from the root controller interrupt pipe for port status change. 926 */ 927 void 928 uhci_poll_hub(void *addr) 929 { 930 usbd_xfer_handle xfer = addr; 931 usbd_pipe_handle pipe = xfer->pipe; 932 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 933 int s; 934 u_char *p; 935 936 DPRINTFN(20, ("uhci_poll_hub\n")); 937 938 timeout_del(&sc->sc_poll_handle); 939 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer); 940 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 941 942 p = KERNADDR(&xfer->dmabuf, 0); 943 p[0] = 0; 944 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 945 p[0] |= 1<<1; 946 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 947 p[0] |= 1<<2; 948 if (p[0] == 0) 949 /* No change, try again in a while */ 950 return; 951 952 xfer->actlen = 1; 953 xfer->status = USBD_NORMAL_COMPLETION; 954 s = splusb(); 955 xfer->device->bus->intr_context++; 956 usb_transfer_complete(xfer); 957 xfer->device->bus->intr_context--; 958 splx(s); 959 } 960 961 void 962 uhci_root_intr_done(usbd_xfer_handle xfer) 963 { 964 } 965 966 void 967 uhci_root_ctrl_done(usbd_xfer_handle xfer) 968 { 969 } 970 971 /* 972 * Let the last QH loop back to the high speed control transfer QH. 973 * This is what intel calls "bandwidth reclamation" and improves 974 * USB performance a lot for some devices. 975 * If we are already looping, just count it. 976 */ 977 void 978 uhci_add_loop(uhci_softc_t *sc) { 979 #ifdef UHCI_DEBUG 980 if (uhcinoloop) 981 return; 982 #endif 983 if (++sc->sc_loops == 1) { 984 DPRINTFN(5,("uhci_add_loop\n")); 985 /* Note, we don't loop back the soft pointer. */ 986 sc->sc_last_qh->qh.qh_hlink = 987 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 988 } 989 } 990 991 void 992 uhci_rem_loop(uhci_softc_t *sc) { 993 #ifdef UHCI_DEBUG 994 if (uhcinoloop) 995 return; 996 #endif 997 if (--sc->sc_loops == 0) { 998 DPRINTFN(5,("uhci_rem_loop\n")); 999 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1000 } 1001 } 1002 1003 /* Add high speed control QH, called at splusb(). */ 1004 void 1005 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1006 { 1007 uhci_soft_qh_t *eqh; 1008 1009 SPLUSBCHECK; 1010 1011 DPRINTFN(10, ("uhci_add_hs_ctrl: sqh=%p\n", sqh)); 1012 eqh = sc->sc_hctl_end; 1013 sqh->hlink = eqh->hlink; 1014 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1015 eqh->hlink = sqh; 1016 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1017 sc->sc_hctl_end = sqh; 1018 #ifdef UHCI_CTL_LOOP 1019 uhci_add_loop(sc); 1020 #endif 1021 } 1022 1023 /* Remove high speed control QH, called at splusb(). */ 1024 void 1025 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1026 { 1027 uhci_soft_qh_t *pqh; 1028 1029 SPLUSBCHECK; 1030 1031 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1032 #ifdef UHCI_CTL_LOOP 1033 uhci_rem_loop(sc); 1034 #endif 1035 /* 1036 * The T bit should be set in the elink of the QH so that the HC 1037 * doesn't follow the pointer. This condition may fail if the 1038 * the transferred packet was short so that the QH still points 1039 * at the last used TD. 1040 * In this case we set the T bit and wait a little for the HC 1041 * to stop looking at the TD. 1042 */ 1043 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1044 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1045 delay(UHCI_QH_REMOVE_DELAY); 1046 } 1047 1048 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1049 pqh->hlink = sqh->hlink; 1050 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1051 delay(UHCI_QH_REMOVE_DELAY); 1052 if (sc->sc_hctl_end == sqh) 1053 sc->sc_hctl_end = pqh; 1054 } 1055 1056 /* Add low speed control QH, called at splusb(). */ 1057 void 1058 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1059 { 1060 uhci_soft_qh_t *eqh; 1061 1062 SPLUSBCHECK; 1063 1064 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1065 eqh = sc->sc_lctl_end; 1066 sqh->hlink = eqh->hlink; 1067 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1068 eqh->hlink = sqh; 1069 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1070 sc->sc_lctl_end = sqh; 1071 } 1072 1073 /* Remove low speed control QH, called at splusb(). */ 1074 void 1075 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1076 { 1077 uhci_soft_qh_t *pqh; 1078 1079 SPLUSBCHECK; 1080 1081 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1082 /* See comment in uhci_remove_hs_ctrl() */ 1083 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1084 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1085 delay(UHCI_QH_REMOVE_DELAY); 1086 } 1087 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1088 pqh->hlink = sqh->hlink; 1089 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1090 delay(UHCI_QH_REMOVE_DELAY); 1091 if (sc->sc_lctl_end == sqh) 1092 sc->sc_lctl_end = pqh; 1093 } 1094 1095 /* Add bulk QH, called at splusb(). */ 1096 void 1097 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1098 { 1099 uhci_soft_qh_t *eqh; 1100 1101 SPLUSBCHECK; 1102 1103 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1104 eqh = sc->sc_bulk_end; 1105 sqh->hlink = eqh->hlink; 1106 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1107 eqh->hlink = sqh; 1108 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1109 sc->sc_bulk_end = sqh; 1110 uhci_add_loop(sc); 1111 } 1112 1113 /* Remove bulk QH, called at splusb(). */ 1114 void 1115 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1116 { 1117 uhci_soft_qh_t *pqh; 1118 1119 SPLUSBCHECK; 1120 1121 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1122 uhci_rem_loop(sc); 1123 /* See comment in uhci_remove_hs_ctrl() */ 1124 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1125 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1126 delay(UHCI_QH_REMOVE_DELAY); 1127 } 1128 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1129 pqh->hlink = sqh->hlink; 1130 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1131 delay(UHCI_QH_REMOVE_DELAY); 1132 if (sc->sc_bulk_end == sqh) 1133 sc->sc_bulk_end = pqh; 1134 } 1135 1136 int uhci_intr1(uhci_softc_t *); 1137 1138 int 1139 uhci_intr(void *arg) 1140 { 1141 uhci_softc_t *sc = arg; 1142 1143 if (sc->sc_dying) 1144 return (0); 1145 1146 if (sc->sc_bus.use_polling) { 1147 #ifdef DIAGNOSTIC 1148 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1149 #endif 1150 return (0); 1151 } 1152 return (uhci_intr1(sc)); 1153 } 1154 1155 int 1156 uhci_intr1(uhci_softc_t *sc) 1157 { 1158 int status; 1159 int ack; 1160 1161 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1162 if (status == 0) /* The interrupt was not for us. */ 1163 return (0); 1164 if (status == 0xffffffff) { 1165 sc->sc_dying = 1; 1166 return (0); 1167 } 1168 1169 #ifdef UHCI_DEBUG 1170 if (uhcidebug > 15) { 1171 DPRINTF(("%s: uhci_intr1\n", sc->sc_bus.bdev.dv_xname)); 1172 uhci_dumpregs(sc); 1173 } 1174 #endif 1175 1176 if (sc->sc_suspend != PWR_RESUME) { 1177 printf("%s: interrupt while not operating ignored\n", 1178 sc->sc_bus.bdev.dv_xname); 1179 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1180 return (0); 1181 } 1182 1183 ack = 0; 1184 if (status & UHCI_STS_USBINT) 1185 ack |= UHCI_STS_USBINT; 1186 if (status & UHCI_STS_USBEI) 1187 ack |= UHCI_STS_USBEI; 1188 if (status & UHCI_STS_RD) { 1189 ack |= UHCI_STS_RD; 1190 #ifdef UHCI_DEBUG 1191 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 1192 #endif 1193 } 1194 if (status & UHCI_STS_HSE) { 1195 ack |= UHCI_STS_HSE; 1196 printf("%s: host system error\n", sc->sc_bus.bdev.dv_xname); 1197 } 1198 if (status & UHCI_STS_HCPE) { 1199 ack |= UHCI_STS_HCPE; 1200 printf("%s: host controller process error\n", 1201 sc->sc_bus.bdev.dv_xname); 1202 } 1203 if (status & UHCI_STS_HCH) { 1204 /* no acknowledge needed */ 1205 if (!sc->sc_dying) { 1206 printf("%s: host controller halted\n", 1207 sc->sc_bus.bdev.dv_xname); 1208 #ifdef UHCI_DEBUG 1209 uhci_dump_all(sc); 1210 #endif 1211 } 1212 sc->sc_dying = 1; 1213 } 1214 1215 if (!ack) 1216 return (0); /* nothing to acknowledge */ 1217 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1218 1219 sc->sc_bus.no_intrs++; 1220 usb_schedsoftintr(&sc->sc_bus); 1221 1222 DPRINTFN(15, ("%s: uhci_intr1: exit\n", sc->sc_bus.bdev.dv_xname)); 1223 1224 return (1); 1225 } 1226 1227 void 1228 uhci_softintr(void *v) 1229 { 1230 uhci_softc_t *sc = v; 1231 uhci_intr_info_t *ii, *nextii; 1232 1233 DPRINTFN(10,("%s: uhci_softintr (%d)\n", sc->sc_bus.bdev.dv_xname, 1234 sc->sc_bus.intr_context)); 1235 1236 sc->sc_bus.intr_context++; 1237 1238 /* 1239 * Interrupts on UHCI really suck. When the host controller 1240 * interrupts because a transfer is completed there is no 1241 * way of knowing which transfer it was. You can scan down 1242 * the TDs and QHs of the previous frame to limit the search, 1243 * but that assumes that the interrupt was not delayed by more 1244 * than 1 ms, which may not always be true (e.g. after debug 1245 * output on a slow console). 1246 * We scan all interrupt descriptors to see if any have 1247 * completed. 1248 */ 1249 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1250 nextii = LIST_NEXT(ii, list); 1251 uhci_check_intr(sc, ii); 1252 } 1253 1254 if (sc->sc_softwake) { 1255 sc->sc_softwake = 0; 1256 wakeup(&sc->sc_softwake); 1257 } 1258 1259 sc->sc_bus.intr_context--; 1260 } 1261 1262 /* Check for an interrupt. */ 1263 void 1264 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1265 { 1266 uhci_soft_td_t *std, *lstd; 1267 u_int32_t status; 1268 1269 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1270 #ifdef DIAGNOSTIC 1271 if (ii == NULL) { 1272 printf("uhci_check_intr: no ii? %p\n", ii); 1273 return; 1274 } 1275 #endif 1276 if (ii->xfer->status == USBD_CANCELLED || 1277 ii->xfer->status == USBD_TIMEOUT) { 1278 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1279 return; 1280 } 1281 1282 if (ii->stdstart == NULL) 1283 return; 1284 lstd = ii->stdend; 1285 #ifdef DIAGNOSTIC 1286 if (lstd == NULL) { 1287 printf("uhci_check_intr: std==0\n"); 1288 return; 1289 } 1290 #endif 1291 /* 1292 * If the last TD is still active we need to check whether there 1293 * is an error somewhere in the middle, or whether there was a 1294 * short packet (SPD and not ACTIVE). 1295 */ 1296 if (letoh32(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1297 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1298 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1299 status = letoh32(std->td.td_status); 1300 /* If there's an active TD the xfer isn't done. */ 1301 if (status & UHCI_TD_ACTIVE) 1302 break; 1303 /* Any kind of error makes the xfer done. */ 1304 if (status & UHCI_TD_STALLED) 1305 goto done; 1306 /* We want short packets, and it is short: it's done */ 1307 if ((status & UHCI_TD_SPD) && 1308 UHCI_TD_GET_ACTLEN(status) < 1309 UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token))) 1310 goto done; 1311 } 1312 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1313 ii, ii->stdstart)); 1314 return; 1315 } 1316 done: 1317 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1318 timeout_del(&ii->xfer->timeout_handle); 1319 uhci_idone(ii); 1320 } 1321 1322 /* Called at splusb() */ 1323 void 1324 uhci_idone(uhci_intr_info_t *ii) 1325 { 1326 usbd_xfer_handle xfer = ii->xfer; 1327 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1328 uhci_soft_td_t *std; 1329 u_int32_t status = 0, nstatus; 1330 int actlen; 1331 1332 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1333 #ifdef DIAGNOSTIC 1334 { 1335 int s = splhigh(); 1336 if (ii->isdone) { 1337 splx(s); 1338 #ifdef UHCI_DEBUG 1339 printf("uhci_idone: ii is done!\n "); 1340 uhci_dump_ii(ii); 1341 #else 1342 printf("uhci_idone: ii=%p is done!\n", ii); 1343 #endif 1344 return; 1345 } 1346 ii->isdone = 1; 1347 splx(s); 1348 } 1349 #endif 1350 1351 if (xfer->nframes != 0) { 1352 /* Isoc transfer, do things differently. */ 1353 uhci_soft_td_t **stds = upipe->u.iso.stds; 1354 int i, n, nframes, len; 1355 1356 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1357 1358 nframes = xfer->nframes; 1359 actlen = 0; 1360 n = UXFER(xfer)->curframe; 1361 for (i = 0; i < nframes; i++) { 1362 std = stds[n]; 1363 #ifdef UHCI_DEBUG 1364 if (uhcidebug > 5) { 1365 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1366 uhci_dump_td(std); 1367 } 1368 #endif 1369 if (++n >= UHCI_VFRAMELIST_COUNT) 1370 n = 0; 1371 status = letoh32(std->td.td_status); 1372 len = UHCI_TD_GET_ACTLEN(status); 1373 xfer->frlengths[i] = len; 1374 actlen += len; 1375 } 1376 upipe->u.iso.inuse -= nframes; 1377 xfer->actlen = actlen; 1378 xfer->status = USBD_NORMAL_COMPLETION; 1379 goto end; 1380 } 1381 1382 #ifdef UHCI_DEBUG 1383 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1384 ii, xfer, upipe)); 1385 if (uhcidebug > 10) 1386 uhci_dump_tds(ii->stdstart); 1387 #endif 1388 1389 /* The transfer is done, compute actual length and status. */ 1390 actlen = 0; 1391 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1392 nstatus = letoh32(std->td.td_status); 1393 if (nstatus & UHCI_TD_ACTIVE) 1394 break; 1395 1396 status = nstatus; 1397 if (UHCI_TD_GET_PID(letoh32(std->td.td_token)) != 1398 UHCI_TD_PID_SETUP) 1399 actlen += UHCI_TD_GET_ACTLEN(status); 1400 else { 1401 /* 1402 * UHCI will report CRCTO in addition to a STALL or NAK 1403 * for a SETUP transaction. See section 3.2.2, "TD 1404 * CONTROL AND STATUS". 1405 */ 1406 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1407 status &= ~UHCI_TD_CRCTO; 1408 } 1409 } 1410 /* If there are left over TDs we need to update the toggle. */ 1411 if (std != NULL) 1412 upipe->nexttoggle = UHCI_TD_GET_DT(letoh32(std->td.td_token)); 1413 1414 status &= UHCI_TD_ERROR; 1415 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1416 actlen, status)); 1417 xfer->actlen = actlen; 1418 if (status != 0) { 1419 #ifdef UHCI_DEBUG 1420 char sbuf[128]; 1421 1422 bitmask_snprintf((u_int32_t)status, 1423 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1424 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1425 sbuf, sizeof(sbuf)); 1426 1427 DPRINTFN((status == UHCI_TD_STALLED)*10, 1428 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1429 "status 0x%s\n", 1430 xfer->pipe->device->address, 1431 xfer->pipe->endpoint->edesc->bEndpointAddress, 1432 sbuf)); 1433 #endif 1434 1435 if (status == UHCI_TD_STALLED) 1436 xfer->status = USBD_STALLED; 1437 else 1438 xfer->status = USBD_IOERROR; /* more info XXX */ 1439 } else { 1440 xfer->status = USBD_NORMAL_COMPLETION; 1441 } 1442 1443 end: 1444 usb_transfer_complete(xfer); 1445 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1446 } 1447 1448 /* 1449 * Called when a request does not complete. 1450 */ 1451 void 1452 uhci_timeout(void *addr) 1453 { 1454 uhci_intr_info_t *ii = addr; 1455 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1456 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1457 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1458 1459 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1460 1461 if (sc->sc_dying) { 1462 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1463 return; 1464 } 1465 1466 /* Execute the abort in a process context. */ 1467 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1468 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task); 1469 } 1470 1471 void 1472 uhci_timeout_task(void *addr) 1473 { 1474 usbd_xfer_handle xfer = addr; 1475 int s; 1476 1477 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1478 1479 s = splusb(); 1480 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1481 splx(s); 1482 } 1483 1484 /* 1485 * Wait here until controller claims to have an interrupt. 1486 * Then call uhci_intr and return. Use timeout to avoid waiting 1487 * too long. 1488 * Only used during boot when interrupts are not enabled yet. 1489 */ 1490 void 1491 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1492 { 1493 int timo = xfer->timeout; 1494 uhci_intr_info_t *ii; 1495 1496 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1497 1498 xfer->status = USBD_IN_PROGRESS; 1499 for (; timo >= 0; timo--) { 1500 usb_delay_ms(&sc->sc_bus, 1); 1501 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1502 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) { 1503 uhci_intr1(sc); 1504 if (xfer->status != USBD_IN_PROGRESS) 1505 return; 1506 } 1507 } 1508 1509 /* Timeout */ 1510 DPRINTF(("uhci_waitintr: timeout\n")); 1511 for (ii = LIST_FIRST(&sc->sc_intrhead); 1512 ii != NULL && ii->xfer != xfer; 1513 ii = LIST_NEXT(ii, list)) 1514 ; 1515 #ifdef DIAGNOSTIC 1516 if (ii == NULL) 1517 panic("uhci_waitintr: lost intr_info"); 1518 #endif 1519 uhci_idone(ii); 1520 } 1521 1522 void 1523 uhci_poll(struct usbd_bus *bus) 1524 { 1525 uhci_softc_t *sc = (uhci_softc_t *)bus; 1526 1527 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) 1528 uhci_intr1(sc); 1529 } 1530 1531 void 1532 uhci_reset(uhci_softc_t *sc) 1533 { 1534 int n; 1535 1536 UHCICMD(sc, UHCI_CMD_HCRESET); 1537 /* The reset bit goes low when the controller is done. */ 1538 for (n = 0; n < UHCI_RESET_TIMEOUT && 1539 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1540 usb_delay_ms(&sc->sc_bus, 1); 1541 if (n >= UHCI_RESET_TIMEOUT) 1542 printf("%s: controller did not reset\n", 1543 sc->sc_bus.bdev.dv_xname); 1544 } 1545 1546 usbd_status 1547 uhci_run(uhci_softc_t *sc, int run) 1548 { 1549 int s, n, running; 1550 u_int16_t cmd; 1551 1552 run = run != 0; 1553 s = splhardusb(); 1554 DPRINTF(("uhci_run: setting run=%d\n", run)); 1555 cmd = UREAD2(sc, UHCI_CMD); 1556 if (run) 1557 cmd |= UHCI_CMD_RS; 1558 else 1559 cmd &= ~UHCI_CMD_RS; 1560 UHCICMD(sc, cmd); 1561 for(n = 0; n < 10; n++) { 1562 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1563 /* return when we've entered the state we want */ 1564 if (run == running) { 1565 splx(s); 1566 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1567 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1568 return (USBD_NORMAL_COMPLETION); 1569 } 1570 usb_delay_ms(&sc->sc_bus, 1); 1571 } 1572 splx(s); 1573 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname, 1574 run ? "start" : "stop"); 1575 return (USBD_IOERROR); 1576 } 1577 1578 /* 1579 * Memory management routines. 1580 * uhci_alloc_std allocates TDs 1581 * uhci_alloc_sqh allocates QHs 1582 * These two routines do their own free list management, 1583 * partly for speed, partly because allocating DMAable memory 1584 * has page size granularaity so much memory would be wasted if 1585 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1586 */ 1587 1588 uhci_soft_td_t * 1589 uhci_alloc_std(uhci_softc_t *sc) 1590 { 1591 uhci_soft_td_t *std; 1592 usbd_status err; 1593 int i, offs; 1594 usb_dma_t dma; 1595 1596 if (sc->sc_freetds == NULL) { 1597 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1598 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1599 UHCI_TD_ALIGN, &dma); 1600 if (err) 1601 return (0); 1602 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1603 offs = i * UHCI_STD_SIZE; 1604 std = KERNADDR(&dma, offs); 1605 std->physaddr = DMAADDR(&dma, offs); 1606 std->link.std = sc->sc_freetds; 1607 sc->sc_freetds = std; 1608 } 1609 } 1610 std = sc->sc_freetds; 1611 sc->sc_freetds = std->link.std; 1612 memset(&std->td, 0, sizeof(uhci_td_t)); 1613 return std; 1614 } 1615 1616 void 1617 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1618 { 1619 #ifdef DIAGNOSTIC 1620 #define TD_IS_FREE 0x12345678 1621 if (letoh32(std->td.td_token) == TD_IS_FREE) { 1622 printf("uhci_free_std: freeing free TD %p\n", std); 1623 return; 1624 } 1625 std->td.td_token = htole32(TD_IS_FREE); 1626 #endif 1627 std->link.std = sc->sc_freetds; 1628 sc->sc_freetds = std; 1629 } 1630 1631 uhci_soft_qh_t * 1632 uhci_alloc_sqh(uhci_softc_t *sc) 1633 { 1634 uhci_soft_qh_t *sqh; 1635 usbd_status err; 1636 int i, offs; 1637 usb_dma_t dma; 1638 1639 if (sc->sc_freeqhs == NULL) { 1640 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1641 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1642 UHCI_QH_ALIGN, &dma); 1643 if (err) 1644 return (0); 1645 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1646 offs = i * UHCI_SQH_SIZE; 1647 sqh = KERNADDR(&dma, offs); 1648 sqh->physaddr = DMAADDR(&dma, offs); 1649 sqh->hlink = sc->sc_freeqhs; 1650 sc->sc_freeqhs = sqh; 1651 } 1652 } 1653 sqh = sc->sc_freeqhs; 1654 sc->sc_freeqhs = sqh->hlink; 1655 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1656 return (sqh); 1657 } 1658 1659 void 1660 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1661 { 1662 sqh->hlink = sc->sc_freeqhs; 1663 sc->sc_freeqhs = sqh; 1664 } 1665 1666 void 1667 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1668 uhci_soft_td_t *stdend) 1669 { 1670 uhci_soft_td_t *p; 1671 1672 for (; std != stdend; std = p) { 1673 p = std->link.std; 1674 uhci_free_std(sc, std); 1675 } 1676 } 1677 1678 usbd_status 1679 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, u_int len, 1680 int rd, u_int16_t flags, usb_dma_t *dma, 1681 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1682 { 1683 uhci_soft_td_t *p, *lastp; 1684 uhci_physaddr_t lastlink; 1685 int i, ntd, l, tog, maxp; 1686 u_int32_t status; 1687 int addr = upipe->pipe.device->address; 1688 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1689 1690 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%u speed=%d " 1691 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1692 upipe->pipe.device->speed, flags)); 1693 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1694 if (maxp == 0) { 1695 printf("uhci_alloc_std_chain: maxp=0\n"); 1696 return (USBD_INVAL); 1697 } 1698 ntd = (len + maxp - 1) / maxp; 1699 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1700 ntd++; 1701 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1702 if (ntd == 0) { 1703 *sp = *ep = 0; 1704 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1705 return (USBD_NORMAL_COMPLETION); 1706 } 1707 tog = upipe->nexttoggle; 1708 if (ntd % 2 == 0) 1709 tog ^= 1; 1710 upipe->nexttoggle = tog ^ 1; 1711 lastp = NULL; 1712 lastlink = UHCI_PTR_T; 1713 ntd--; 1714 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1715 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1716 status |= UHCI_TD_LS; 1717 if (flags & USBD_SHORT_XFER_OK) 1718 status |= UHCI_TD_SPD; 1719 for (i = ntd; i >= 0; i--) { 1720 p = uhci_alloc_std(sc); 1721 if (p == NULL) { 1722 uhci_free_std_chain(sc, lastp, NULL); 1723 return (USBD_NOMEM); 1724 } 1725 p->link.std = lastp; 1726 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1727 lastp = p; 1728 lastlink = p->physaddr; 1729 p->td.td_status = htole32(status); 1730 if (i == ntd) { 1731 /* last TD */ 1732 l = len % maxp; 1733 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1734 l = maxp; 1735 *ep = p; 1736 } else 1737 l = maxp; 1738 p->td.td_token = 1739 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1740 UHCI_TD_OUT(l, endpt, addr, tog)); 1741 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1742 tog ^= 1; 1743 } 1744 *sp = lastp; 1745 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1746 upipe->nexttoggle)); 1747 return (USBD_NORMAL_COMPLETION); 1748 } 1749 1750 void 1751 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1752 { 1753 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1754 upipe->nexttoggle = 0; 1755 } 1756 1757 void 1758 uhci_noop(usbd_pipe_handle pipe) 1759 { 1760 } 1761 1762 usbd_status 1763 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1764 { 1765 usbd_status err; 1766 1767 /* Insert last in queue. */ 1768 err = usb_insert_transfer(xfer); 1769 if (err) 1770 return (err); 1771 1772 /* 1773 * Pipe isn't running (otherwise err would be USBD_INPROG), 1774 * so start it first. 1775 */ 1776 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1777 } 1778 1779 usbd_status 1780 uhci_device_bulk_start(usbd_xfer_handle xfer) 1781 { 1782 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1783 usbd_device_handle dev = upipe->pipe.device; 1784 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1785 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1786 uhci_soft_td_t *data, *dataend; 1787 uhci_soft_qh_t *sqh; 1788 usbd_status err; 1789 u_int len; 1790 int isread, endpt; 1791 int s; 1792 1793 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%u flags=%d ii=%p\n", 1794 xfer, xfer->length, xfer->flags, ii)); 1795 1796 if (sc->sc_dying) 1797 return (USBD_IOERROR); 1798 1799 #ifdef DIAGNOSTIC 1800 if (xfer->rqflags & URQ_REQUEST) 1801 panic("uhci_device_bulk_start: a request"); 1802 #endif 1803 1804 len = xfer->length; 1805 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1806 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1807 sqh = upipe->u.bulk.sqh; 1808 1809 upipe->u.bulk.isread = isread; 1810 upipe->u.bulk.length = len; 1811 1812 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 1813 &xfer->dmabuf, &data, &dataend); 1814 if (err) 1815 return (err); 1816 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1817 1818 #ifdef UHCI_DEBUG 1819 if (uhcidebug > 8) { 1820 DPRINTF(("uhci_device_bulk_start: data(1)\n")); 1821 uhci_dump_tds(data); 1822 } 1823 #endif 1824 1825 /* Set up interrupt info. */ 1826 ii->xfer = xfer; 1827 ii->stdstart = data; 1828 ii->stdend = dataend; 1829 #ifdef DIAGNOSTIC 1830 if (!ii->isdone) { 1831 printf("uhci_device_bulk_start: not done, ii=%p\n", ii); 1832 } 1833 ii->isdone = 0; 1834 #endif 1835 1836 sqh->elink = data; 1837 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1838 1839 s = splusb(); 1840 uhci_add_bulk(sc, sqh); 1841 uhci_add_intr_info(sc, ii); 1842 1843 if (xfer->timeout && !sc->sc_bus.use_polling) { 1844 timeout_del(&xfer->timeout_handle); 1845 timeout_set(&xfer->timeout_handle, uhci_timeout, ii); 1846 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 1847 } 1848 xfer->status = USBD_IN_PROGRESS; 1849 splx(s); 1850 1851 #ifdef UHCI_DEBUG 1852 if (uhcidebug > 10) { 1853 DPRINTF(("uhci_device_bulk_start: data(2)\n")); 1854 uhci_dump_tds(data); 1855 } 1856 #endif 1857 1858 if (sc->sc_bus.use_polling) 1859 uhci_waitintr(sc, xfer); 1860 1861 return (USBD_IN_PROGRESS); 1862 } 1863 1864 /* Abort a device bulk request. */ 1865 void 1866 uhci_device_bulk_abort(usbd_xfer_handle xfer) 1867 { 1868 DPRINTF(("uhci_device_bulk_abort:\n")); 1869 uhci_abort_xfer(xfer, USBD_CANCELLED); 1870 } 1871 1872 /* 1873 * Abort a device request. 1874 * If this routine is called at splusb() it guarantees that the request 1875 * will be removed from the hardware scheduling and that the callback 1876 * for it will be called with USBD_CANCELLED status. 1877 * It's impossible to guarantee that the requested transfer will not 1878 * have happened since the hardware runs concurrently. 1879 * If the transaction has already happened we rely on the ordinary 1880 * interrupt processing to process it. 1881 */ 1882 void 1883 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1884 { 1885 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1886 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1887 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1888 uhci_soft_td_t *std; 1889 int s; 1890 1891 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 1892 1893 if (sc->sc_dying) { 1894 /* If we're dying, just do the software part. */ 1895 s = splusb(); 1896 xfer->status = status; /* make software ignore it */ 1897 timeout_del(&xfer->timeout_handle); 1898 usb_transfer_complete(xfer); 1899 splx(s); 1900 return; 1901 } 1902 1903 if (xfer->device->bus->intr_context || !curproc) 1904 panic("uhci_abort_xfer: not in process context"); 1905 1906 /* 1907 * Step 1: Make interrupt routine and hardware ignore xfer. 1908 */ 1909 s = splusb(); 1910 xfer->status = status; /* make software ignore it */ 1911 timeout_del(&xfer->timeout_handle); 1912 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 1913 for (std = ii->stdstart; std != NULL; std = std->link.std) 1914 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1915 splx(s); 1916 1917 /* 1918 * Step 2: Wait until we know hardware has finished any possible 1919 * use of the xfer. Also make sure the soft interrupt routine 1920 * has run. 1921 */ 1922 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 1923 s = splusb(); 1924 sc->sc_softwake = 1; 1925 usb_schedsoftintr(&sc->sc_bus); 1926 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 1927 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 1928 splx(s); 1929 1930 /* 1931 * Step 3: Execute callback. 1932 */ 1933 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 1934 s = splusb(); 1935 #ifdef DIAGNOSTIC 1936 ii->isdone = 1; 1937 #endif 1938 usb_transfer_complete(xfer); 1939 splx(s); 1940 } 1941 1942 /* Close a device bulk pipe. */ 1943 void 1944 uhci_device_bulk_close(usbd_pipe_handle pipe) 1945 { 1946 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1947 usbd_device_handle dev = upipe->pipe.device; 1948 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1949 1950 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1951 pipe->endpoint->savedtoggle = upipe->nexttoggle; 1952 } 1953 1954 usbd_status 1955 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 1956 { 1957 usbd_status err; 1958 1959 /* Insert last in queue. */ 1960 err = usb_insert_transfer(xfer); 1961 if (err) 1962 return (err); 1963 1964 /* 1965 * Pipe isn't running (otherwise err would be USBD_INPROG), 1966 * so start it first. 1967 */ 1968 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1969 } 1970 1971 usbd_status 1972 uhci_device_ctrl_start(usbd_xfer_handle xfer) 1973 { 1974 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 1975 usbd_status err; 1976 1977 if (sc->sc_dying) 1978 return (USBD_IOERROR); 1979 1980 #ifdef DIAGNOSTIC 1981 if (!(xfer->rqflags & URQ_REQUEST)) 1982 panic("uhci_device_ctrl_transfer: not a request"); 1983 #endif 1984 1985 err = uhci_device_request(xfer); 1986 if (err) 1987 return (err); 1988 1989 if (sc->sc_bus.use_polling) 1990 uhci_waitintr(sc, xfer); 1991 return (USBD_IN_PROGRESS); 1992 } 1993 1994 usbd_status 1995 uhci_device_intr_transfer(usbd_xfer_handle xfer) 1996 { 1997 usbd_status err; 1998 1999 /* Insert last in queue. */ 2000 err = usb_insert_transfer(xfer); 2001 if (err) 2002 return (err); 2003 2004 /* 2005 * Pipe isn't running (otherwise err would be USBD_INPROG), 2006 * so start it first. 2007 */ 2008 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2009 } 2010 2011 usbd_status 2012 uhci_device_intr_start(usbd_xfer_handle xfer) 2013 { 2014 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2015 usbd_device_handle dev = upipe->pipe.device; 2016 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2017 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2018 uhci_soft_td_t *data, *dataend; 2019 uhci_soft_qh_t *sqh; 2020 usbd_status err; 2021 int isread, endpt; 2022 int i, s; 2023 2024 if (sc->sc_dying) 2025 return (USBD_IOERROR); 2026 2027 DPRINTFN(3,("uhci_device_intr_start: xfer=%p len=%u flags=%d\n", 2028 xfer, xfer->length, xfer->flags)); 2029 2030 #ifdef DIAGNOSTIC 2031 if (xfer->rqflags & URQ_REQUEST) 2032 panic("uhci_device_intr_start: a request"); 2033 #endif 2034 2035 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2036 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2037 2038 upipe->u.intr.isread = isread; 2039 2040 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2041 xfer->flags, &xfer->dmabuf, &data, 2042 &dataend); 2043 2044 if (err) 2045 return (err); 2046 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2047 2048 #ifdef UHCI_DEBUG 2049 if (uhcidebug > 10) { 2050 DPRINTF(("uhci_device_intr_start: data(1)\n")); 2051 uhci_dump_tds(data); 2052 uhci_dump_qh(upipe->u.intr.qhs[0]); 2053 } 2054 #endif 2055 2056 s = splusb(); 2057 /* Set up interrupt info. */ 2058 ii->xfer = xfer; 2059 ii->stdstart = data; 2060 ii->stdend = dataend; 2061 #ifdef DIAGNOSTIC 2062 if (!ii->isdone) { 2063 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2064 } 2065 ii->isdone = 0; 2066 #endif 2067 2068 DPRINTFN(10,("uhci_device_intr_start: qhs[0]=%p\n", 2069 upipe->u.intr.qhs[0])); 2070 for (i = 0; i < upipe->u.intr.npoll; i++) { 2071 sqh = upipe->u.intr.qhs[i]; 2072 sqh->elink = data; 2073 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2074 } 2075 uhci_add_intr_info(sc, ii); 2076 xfer->status = USBD_IN_PROGRESS; 2077 splx(s); 2078 2079 #ifdef UHCI_DEBUG 2080 if (uhcidebug > 10) { 2081 DPRINTF(("uhci_device_intr_start: data(2)\n")); 2082 uhci_dump_tds(data); 2083 uhci_dump_qh(upipe->u.intr.qhs[0]); 2084 } 2085 #endif 2086 2087 return (USBD_IN_PROGRESS); 2088 } 2089 2090 /* Abort a device control request. */ 2091 void 2092 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2093 { 2094 DPRINTF(("uhci_device_ctrl_abort:\n")); 2095 uhci_abort_xfer(xfer, USBD_CANCELLED); 2096 } 2097 2098 /* Close a device control pipe. */ 2099 void 2100 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2101 { 2102 } 2103 2104 /* Abort a device interrupt request. */ 2105 void 2106 uhci_device_intr_abort(usbd_xfer_handle xfer) 2107 { 2108 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2109 if (xfer->pipe->intrxfer == xfer) { 2110 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2111 xfer->pipe->intrxfer = NULL; 2112 } 2113 uhci_abort_xfer(xfer, USBD_CANCELLED); 2114 } 2115 2116 /* Close a device interrupt pipe. */ 2117 void 2118 uhci_device_intr_close(usbd_pipe_handle pipe) 2119 { 2120 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2121 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2122 int i, npoll; 2123 int s; 2124 2125 /* Unlink descriptors from controller data structures. */ 2126 npoll = upipe->u.intr.npoll; 2127 s = splusb(); 2128 for (i = 0; i < npoll; i++) 2129 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2130 splx(s); 2131 2132 /* 2133 * We now have to wait for any activity on the physical 2134 * descriptors to stop. 2135 */ 2136 usb_delay_ms(&sc->sc_bus, 2); 2137 2138 for(i = 0; i < npoll; i++) 2139 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2140 free(upipe->u.intr.qhs, M_USBHC); 2141 2142 /* XXX free other resources */ 2143 } 2144 2145 usbd_status 2146 uhci_device_request(usbd_xfer_handle xfer) 2147 { 2148 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2149 usb_device_request_t *req = &xfer->request; 2150 usbd_device_handle dev = upipe->pipe.device; 2151 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2152 int addr = dev->address; 2153 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2154 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2155 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2156 uhci_soft_qh_t *sqh; 2157 u_int len; 2158 u_int32_t ls; 2159 usbd_status err; 2160 int isread; 2161 int s; 2162 2163 DPRINTFN(3,("uhci_device_request type=0x%02x, request=0x%02x, " 2164 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n", 2165 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2166 UGETW(req->wIndex), UGETW(req->wLength), 2167 addr, endpt)); 2168 2169 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2170 isread = req->bmRequestType & UT_READ; 2171 len = UGETW(req->wLength); 2172 2173 setup = upipe->u.ctl.setup; 2174 stat = upipe->u.ctl.stat; 2175 sqh = upipe->u.ctl.sqh; 2176 2177 /* Set up data transaction */ 2178 if (len != 0) { 2179 upipe->nexttoggle = 1; 2180 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2181 &xfer->dmabuf, &data, &dataend); 2182 if (err) 2183 return (err); 2184 next = data; 2185 dataend->link.std = stat; 2186 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2187 } else { 2188 next = stat; 2189 } 2190 upipe->u.ctl.length = len; 2191 2192 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2193 2194 setup->link.std = next; 2195 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2196 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2197 UHCI_TD_ACTIVE); 2198 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2199 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2200 2201 stat->link.std = NULL; 2202 stat->td.td_link = htole32(UHCI_PTR_T); 2203 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2204 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2205 stat->td.td_token = 2206 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2207 UHCI_TD_IN (0, endpt, addr, 1)); 2208 stat->td.td_buffer = htole32(0); 2209 2210 #ifdef UHCI_DEBUG 2211 if (uhcidebug > 10) { 2212 DPRINTF(("uhci_device_request: before transfer\n")); 2213 uhci_dump_tds(setup); 2214 } 2215 #endif 2216 2217 /* Set up interrupt info. */ 2218 ii->xfer = xfer; 2219 ii->stdstart = setup; 2220 ii->stdend = stat; 2221 #ifdef DIAGNOSTIC 2222 if (!ii->isdone) { 2223 printf("uhci_device_request: not done, ii=%p\n", ii); 2224 } 2225 ii->isdone = 0; 2226 #endif 2227 2228 sqh->elink = setup; 2229 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2230 2231 s = splusb(); 2232 if (dev->speed == USB_SPEED_LOW) 2233 uhci_add_ls_ctrl(sc, sqh); 2234 else 2235 uhci_add_hs_ctrl(sc, sqh); 2236 uhci_add_intr_info(sc, ii); 2237 #ifdef UHCI_DEBUG 2238 if (uhcidebug > 12) { 2239 uhci_soft_td_t *std; 2240 uhci_soft_qh_t *xqh; 2241 uhci_soft_qh_t *sxqh; 2242 int maxqh = 0; 2243 uhci_physaddr_t link; 2244 DPRINTF(("uhci_device_request: follow from [0]\n")); 2245 for (std = sc->sc_vframes[0].htd, link = 0; 2246 (link & UHCI_PTR_QH) == 0; 2247 std = std->link.std) { 2248 link = letoh32(std->td.td_link); 2249 uhci_dump_td(std); 2250 } 2251 sxqh = (uhci_soft_qh_t *)std; 2252 uhci_dump_qh(sxqh); 2253 for (xqh = sxqh; 2254 xqh != NULL; 2255 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2256 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2257 uhci_dump_qh(xqh); 2258 } 2259 DPRINTF(("Enqueued QH:\n")); 2260 uhci_dump_qh(sqh); 2261 uhci_dump_tds(sqh->elink); 2262 } 2263 #endif 2264 if (xfer->timeout && !sc->sc_bus.use_polling) { 2265 timeout_del(&xfer->timeout_handle); 2266 timeout_set(&xfer->timeout_handle, uhci_timeout, ii); 2267 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 2268 } 2269 xfer->status = USBD_IN_PROGRESS; 2270 splx(s); 2271 2272 return (USBD_NORMAL_COMPLETION); 2273 } 2274 2275 usbd_status 2276 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2277 { 2278 usbd_status err; 2279 2280 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2281 2282 /* Put it on our queue, */ 2283 err = usb_insert_transfer(xfer); 2284 2285 /* bail out on error, */ 2286 if (err && err != USBD_IN_PROGRESS) 2287 return (err); 2288 2289 /* XXX should check inuse here */ 2290 2291 /* insert into schedule, */ 2292 uhci_device_isoc_enter(xfer); 2293 2294 /* and start if the pipe wasn't running */ 2295 if (!err) 2296 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2297 2298 return (err); 2299 } 2300 2301 void 2302 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2303 { 2304 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2305 usbd_device_handle dev = upipe->pipe.device; 2306 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2307 struct iso *iso = &upipe->u.iso; 2308 uhci_soft_td_t *std; 2309 u_int32_t buf, len, status; 2310 int s, i, next, nframes; 2311 2312 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2313 "nframes=%d\n", 2314 iso->inuse, iso->next, xfer, xfer->nframes)); 2315 2316 if (sc->sc_dying) 2317 return; 2318 2319 if (xfer->status == USBD_IN_PROGRESS) { 2320 /* This request has already been entered into the frame list */ 2321 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2322 /* XXX */ 2323 } 2324 2325 #ifdef DIAGNOSTIC 2326 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2327 printf("uhci_device_isoc_enter: overflow!\n"); 2328 #endif 2329 2330 next = iso->next; 2331 if (next == -1) { 2332 /* Not in use yet, schedule it a few frames ahead. */ 2333 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2334 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2335 } 2336 2337 xfer->status = USBD_IN_PROGRESS; 2338 UXFER(xfer)->curframe = next; 2339 2340 buf = DMAADDR(&xfer->dmabuf, 0); 2341 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2342 UHCI_TD_ACTIVE | 2343 UHCI_TD_IOS); 2344 nframes = xfer->nframes; 2345 s = splusb(); 2346 for (i = 0; i < nframes; i++) { 2347 std = iso->stds[next]; 2348 if (++next >= UHCI_VFRAMELIST_COUNT) 2349 next = 0; 2350 len = xfer->frlengths[i]; 2351 std->td.td_buffer = htole32(buf); 2352 if (i == nframes - 1) 2353 status |= UHCI_TD_IOC; 2354 std->td.td_status = htole32(status); 2355 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2356 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2357 #ifdef UHCI_DEBUG 2358 if (uhcidebug > 5) { 2359 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2360 uhci_dump_td(std); 2361 } 2362 #endif 2363 buf += len; 2364 } 2365 iso->next = next; 2366 iso->inuse += xfer->nframes; 2367 2368 splx(s); 2369 } 2370 2371 usbd_status 2372 uhci_device_isoc_start(usbd_xfer_handle xfer) 2373 { 2374 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2375 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2376 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2377 uhci_soft_td_t *end; 2378 int s, i; 2379 2380 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2381 2382 if (sc->sc_dying) 2383 return (USBD_IOERROR); 2384 2385 #ifdef DIAGNOSTIC 2386 if (xfer->status != USBD_IN_PROGRESS) 2387 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2388 #endif 2389 2390 /* Find the last TD */ 2391 i = UXFER(xfer)->curframe + xfer->nframes; 2392 if (i >= UHCI_VFRAMELIST_COUNT) 2393 i -= UHCI_VFRAMELIST_COUNT; 2394 end = upipe->u.iso.stds[i]; 2395 2396 #ifdef DIAGNOSTIC 2397 if (end == NULL) { 2398 printf("uhci_device_isoc_start: end == NULL\n"); 2399 return (USBD_INVAL); 2400 } 2401 #endif 2402 2403 s = splusb(); 2404 2405 /* Set up interrupt info. */ 2406 ii->xfer = xfer; 2407 ii->stdstart = end; 2408 ii->stdend = end; 2409 #ifdef DIAGNOSTIC 2410 if (!ii->isdone) 2411 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2412 ii->isdone = 0; 2413 #endif 2414 uhci_add_intr_info(sc, ii); 2415 2416 splx(s); 2417 2418 return (USBD_IN_PROGRESS); 2419 } 2420 2421 void 2422 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2423 { 2424 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2425 uhci_soft_td_t **stds = upipe->u.iso.stds; 2426 uhci_soft_td_t *std; 2427 int i, n, s, nframes, maxlen, len; 2428 2429 s = splusb(); 2430 2431 /* Transfer is already done. */ 2432 if (xfer->status != USBD_NOT_STARTED && 2433 xfer->status != USBD_IN_PROGRESS) { 2434 splx(s); 2435 return; 2436 } 2437 2438 /* Give xfer the requested abort code. */ 2439 xfer->status = USBD_CANCELLED; 2440 2441 /* make hardware ignore it, */ 2442 nframes = xfer->nframes; 2443 n = UXFER(xfer)->curframe; 2444 maxlen = 0; 2445 for (i = 0; i < nframes; i++) { 2446 std = stds[n]; 2447 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2448 len = UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token)); 2449 if (len > maxlen) 2450 maxlen = len; 2451 if (++n >= UHCI_VFRAMELIST_COUNT) 2452 n = 0; 2453 } 2454 2455 /* and wait until we are sure the hardware has finished. */ 2456 delay(maxlen); 2457 2458 #ifdef DIAGNOSTIC 2459 UXFER(xfer)->iinfo.isdone = 1; 2460 #endif 2461 /* Run callback and remove from interrupt list. */ 2462 usb_transfer_complete(xfer); 2463 2464 splx(s); 2465 } 2466 2467 void 2468 uhci_device_isoc_close(usbd_pipe_handle pipe) 2469 { 2470 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2471 usbd_device_handle dev = upipe->pipe.device; 2472 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2473 uhci_soft_td_t *std, *vstd; 2474 struct iso *iso; 2475 int i, s; 2476 2477 /* 2478 * Make sure all TDs are marked as inactive. 2479 * Wait for completion. 2480 * Unschedule. 2481 * Deallocate. 2482 */ 2483 iso = &upipe->u.iso; 2484 2485 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2486 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2487 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2488 2489 s = splusb(); 2490 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2491 std = iso->stds[i]; 2492 for (vstd = sc->sc_vframes[i].htd; 2493 vstd != NULL && vstd->link.std != std; 2494 vstd = vstd->link.std) 2495 ; 2496 if (vstd == NULL) { 2497 /*panic*/ 2498 printf("uhci_device_isoc_close: %p not found\n", std); 2499 splx(s); 2500 return; 2501 } 2502 vstd->link = std->link; 2503 vstd->td.td_link = std->td.td_link; 2504 uhci_free_std(sc, std); 2505 } 2506 splx(s); 2507 2508 free(iso->stds, M_USBHC); 2509 } 2510 2511 usbd_status 2512 uhci_setup_isoc(usbd_pipe_handle pipe) 2513 { 2514 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2515 usbd_device_handle dev = upipe->pipe.device; 2516 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2517 int addr = upipe->pipe.device->address; 2518 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2519 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2520 uhci_soft_td_t *std, *vstd; 2521 u_int32_t token; 2522 struct iso *iso; 2523 int i, s; 2524 2525 iso = &upipe->u.iso; 2526 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2527 M_USBHC, M_WAITOK); 2528 2529 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2530 UHCI_TD_OUT(0, endpt, addr, 0); 2531 2532 /* Allocate the TDs and mark as inactive; */ 2533 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2534 std = uhci_alloc_std(sc); 2535 if (std == 0) 2536 goto bad; 2537 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2538 std->td.td_token = htole32(token); 2539 iso->stds[i] = std; 2540 } 2541 2542 /* Insert TDs into schedule. */ 2543 s = splusb(); 2544 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2545 std = iso->stds[i]; 2546 vstd = sc->sc_vframes[i].htd; 2547 std->link = vstd->link; 2548 std->td.td_link = vstd->td.td_link; 2549 vstd->link.std = std; 2550 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2551 } 2552 splx(s); 2553 2554 iso->next = -1; 2555 iso->inuse = 0; 2556 2557 return (USBD_NORMAL_COMPLETION); 2558 2559 bad: 2560 while (--i >= 0) 2561 uhci_free_std(sc, iso->stds[i]); 2562 free(iso->stds, M_USBHC); 2563 return (USBD_NOMEM); 2564 } 2565 2566 void 2567 uhci_device_isoc_done(usbd_xfer_handle xfer) 2568 { 2569 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2570 2571 DPRINTFN(4, ("uhci_device_isoc_done: length=%d\n", xfer->actlen)); 2572 2573 if (ii->xfer != xfer) 2574 /* Not on interrupt list, ignore it. */ 2575 return; 2576 2577 if (!uhci_active_intr_info(ii)) 2578 return; 2579 2580 #ifdef DIAGNOSTIC 2581 if (xfer->busy_free == XFER_FREE) { 2582 printf("uhci_device_isoc_done: xfer=%p is free\n", xfer); 2583 return; 2584 } 2585 2586 if (ii->stdend == NULL) { 2587 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2588 #ifdef UHCI_DEBUG 2589 uhci_dump_ii(ii); 2590 #endif 2591 return; 2592 } 2593 #endif 2594 2595 /* Turn off the interrupt since it is active even if the TD is not. */ 2596 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2597 2598 uhci_del_intr_info(ii); /* remove from active list */ 2599 } 2600 2601 void 2602 uhci_device_intr_done(usbd_xfer_handle xfer) 2603 { 2604 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2605 uhci_softc_t *sc = ii->sc; 2606 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2607 uhci_soft_qh_t *sqh; 2608 int i, npoll; 2609 2610 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2611 2612 npoll = upipe->u.intr.npoll; 2613 for(i = 0; i < npoll; i++) { 2614 sqh = upipe->u.intr.qhs[i]; 2615 sqh->elink = NULL; 2616 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2617 } 2618 uhci_free_std_chain(sc, ii->stdstart, NULL); 2619 2620 /* XXX Wasteful. */ 2621 if (xfer->pipe->repeat) { 2622 uhci_soft_td_t *data, *dataend; 2623 2624 DPRINTFN(5,("uhci_device_intr_done: requeuing\n")); 2625 2626 /* This alloc cannot fail since we freed the chain above. */ 2627 uhci_alloc_std_chain(upipe, sc, xfer->length, 2628 upipe->u.intr.isread, xfer->flags, 2629 &xfer->dmabuf, &data, &dataend); 2630 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2631 2632 #ifdef UHCI_DEBUG 2633 if (uhcidebug > 10) { 2634 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2635 uhci_dump_tds(data); 2636 uhci_dump_qh(upipe->u.intr.qhs[0]); 2637 } 2638 #endif 2639 2640 ii->stdstart = data; 2641 ii->stdend = dataend; 2642 #ifdef DIAGNOSTIC 2643 if (!ii->isdone) { 2644 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 2645 } 2646 ii->isdone = 0; 2647 #endif 2648 for (i = 0; i < npoll; i++) { 2649 sqh = upipe->u.intr.qhs[i]; 2650 sqh->elink = data; 2651 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2652 } 2653 xfer->status = USBD_IN_PROGRESS; 2654 /* The ii is already on the examined list, just leave it. */ 2655 } else { 2656 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 2657 if (uhci_active_intr_info(ii)) 2658 uhci_del_intr_info(ii); 2659 } 2660 } 2661 2662 /* Deallocate request data structures */ 2663 void 2664 uhci_device_ctrl_done(usbd_xfer_handle xfer) 2665 { 2666 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2667 uhci_softc_t *sc = ii->sc; 2668 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2669 2670 #ifdef DIAGNOSTIC 2671 if (!(xfer->rqflags & URQ_REQUEST)) 2672 panic("uhci_device_ctrl_done: not a request"); 2673 #endif 2674 2675 if (!uhci_active_intr_info(ii)) 2676 return; 2677 2678 uhci_del_intr_info(ii); /* remove from active list */ 2679 2680 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2681 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 2682 else 2683 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 2684 2685 if (upipe->u.ctl.length != 0) 2686 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2687 2688 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 2689 } 2690 2691 /* Deallocate request data structures */ 2692 void 2693 uhci_device_bulk_done(usbd_xfer_handle xfer) 2694 { 2695 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2696 uhci_softc_t *sc = ii->sc; 2697 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2698 2699 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 2700 xfer, ii, sc, upipe)); 2701 2702 if (!uhci_active_intr_info(ii)) 2703 return; 2704 2705 uhci_del_intr_info(ii); /* remove from active list */ 2706 2707 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2708 2709 uhci_free_std_chain(sc, ii->stdstart, NULL); 2710 2711 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 2712 } 2713 2714 /* Add interrupt QH, called with vflock. */ 2715 void 2716 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2717 { 2718 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2719 uhci_soft_qh_t *eqh; 2720 2721 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2722 2723 eqh = vf->eqh; 2724 sqh->hlink = eqh->hlink; 2725 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2726 eqh->hlink = sqh; 2727 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 2728 vf->eqh = sqh; 2729 vf->bandwidth++; 2730 } 2731 2732 /* Remove interrupt QH. */ 2733 void 2734 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2735 { 2736 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2737 uhci_soft_qh_t *pqh; 2738 2739 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2740 2741 /* See comment in uhci_remove_ctrl() */ 2742 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 2743 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2744 delay(UHCI_QH_REMOVE_DELAY); 2745 } 2746 2747 pqh = uhci_find_prev_qh(vf->hqh, sqh); 2748 pqh->hlink = sqh->hlink; 2749 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2750 delay(UHCI_QH_REMOVE_DELAY); 2751 if (vf->eqh == sqh) 2752 vf->eqh = pqh; 2753 vf->bandwidth--; 2754 } 2755 2756 usbd_status 2757 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 2758 { 2759 uhci_soft_qh_t *sqh; 2760 int i, npoll, s; 2761 u_int bestbw, bw, bestoffs, offs; 2762 2763 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 2764 if (ival == 0) { 2765 printf("uhci_device_setintr: 0 interval\n"); 2766 return (USBD_INVAL); 2767 } 2768 2769 if (ival > UHCI_VFRAMELIST_COUNT) 2770 ival = UHCI_VFRAMELIST_COUNT; 2771 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2772 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 2773 2774 upipe->u.intr.npoll = npoll; 2775 upipe->u.intr.qhs = 2776 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2777 2778 /* 2779 * Figure out which offset in the schedule that has most 2780 * bandwidth left over. 2781 */ 2782 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2783 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2784 for (bw = i = 0; i < npoll; i++) 2785 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2786 if (bw < bestbw) { 2787 bestbw = bw; 2788 bestoffs = offs; 2789 } 2790 } 2791 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2792 2793 for(i = 0; i < npoll; i++) { 2794 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2795 sqh->elink = NULL; 2796 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2797 sqh->pos = MOD(i * ival + bestoffs); 2798 } 2799 #undef MOD 2800 2801 s = splusb(); 2802 /* Enter QHs into the controller data structures. */ 2803 for(i = 0; i < npoll; i++) 2804 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 2805 splx(s); 2806 2807 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 2808 return (USBD_NORMAL_COMPLETION); 2809 } 2810 2811 /* Open a new pipe. */ 2812 usbd_status 2813 uhci_open(usbd_pipe_handle pipe) 2814 { 2815 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2816 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2817 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2818 usbd_status err; 2819 int ival; 2820 2821 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2822 pipe, pipe->device->address, 2823 ed->bEndpointAddress, sc->sc_addr)); 2824 2825 upipe->aborting = 0; 2826 upipe->nexttoggle = pipe->endpoint->savedtoggle; 2827 2828 if (pipe->device->address == sc->sc_addr) { 2829 switch (ed->bEndpointAddress) { 2830 case USB_CONTROL_ENDPOINT: 2831 pipe->methods = &uhci_root_ctrl_methods; 2832 break; 2833 case UE_DIR_IN | UHCI_INTR_ENDPT: 2834 pipe->methods = &uhci_root_intr_methods; 2835 break; 2836 default: 2837 return (USBD_INVAL); 2838 } 2839 } else { 2840 switch (ed->bmAttributes & UE_XFERTYPE) { 2841 case UE_CONTROL: 2842 pipe->methods = &uhci_device_ctrl_methods; 2843 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2844 if (upipe->u.ctl.sqh == NULL) 2845 goto bad; 2846 upipe->u.ctl.setup = uhci_alloc_std(sc); 2847 if (upipe->u.ctl.setup == NULL) { 2848 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2849 goto bad; 2850 } 2851 upipe->u.ctl.stat = uhci_alloc_std(sc); 2852 if (upipe->u.ctl.stat == NULL) { 2853 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2854 uhci_free_std(sc, upipe->u.ctl.setup); 2855 goto bad; 2856 } 2857 err = usb_allocmem(&sc->sc_bus, 2858 sizeof(usb_device_request_t), 2859 0, &upipe->u.ctl.reqdma); 2860 if (err) { 2861 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2862 uhci_free_std(sc, upipe->u.ctl.setup); 2863 uhci_free_std(sc, upipe->u.ctl.stat); 2864 goto bad; 2865 } 2866 break; 2867 case UE_INTERRUPT: 2868 pipe->methods = &uhci_device_intr_methods; 2869 ival = pipe->interval; 2870 if (ival == USBD_DEFAULT_INTERVAL) 2871 ival = ed->bInterval; 2872 return (uhci_device_setintr(sc, upipe, ival)); 2873 case UE_ISOCHRONOUS: 2874 pipe->methods = &uhci_device_isoc_methods; 2875 return (uhci_setup_isoc(pipe)); 2876 case UE_BULK: 2877 pipe->methods = &uhci_device_bulk_methods; 2878 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2879 if (upipe->u.bulk.sqh == NULL) 2880 goto bad; 2881 break; 2882 } 2883 } 2884 return (USBD_NORMAL_COMPLETION); 2885 2886 bad: 2887 return (USBD_NOMEM); 2888 } 2889 2890 /* 2891 * Data structures and routines to emulate the root hub. 2892 */ 2893 usb_device_descriptor_t uhci_devd = { 2894 USB_DEVICE_DESCRIPTOR_SIZE, 2895 UDESC_DEVICE, /* type */ 2896 {0x00, 0x01}, /* USB version */ 2897 UDCLASS_HUB, /* class */ 2898 UDSUBCLASS_HUB, /* subclass */ 2899 UDPROTO_FSHUB, /* protocol */ 2900 64, /* max packet */ 2901 {0},{0},{0x00,0x01}, /* device id */ 2902 1,2,0, /* string indices */ 2903 1 /* # of configurations */ 2904 }; 2905 2906 usb_config_descriptor_t uhci_confd = { 2907 USB_CONFIG_DESCRIPTOR_SIZE, 2908 UDESC_CONFIG, 2909 {USB_CONFIG_DESCRIPTOR_SIZE + 2910 USB_INTERFACE_DESCRIPTOR_SIZE + 2911 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2912 1, 2913 1, 2914 0, 2915 UC_SELF_POWERED, 2916 0 /* max power */ 2917 }; 2918 2919 usb_interface_descriptor_t uhci_ifcd = { 2920 USB_INTERFACE_DESCRIPTOR_SIZE, 2921 UDESC_INTERFACE, 2922 0, 2923 0, 2924 1, 2925 UICLASS_HUB, 2926 UISUBCLASS_HUB, 2927 UIPROTO_FSHUB, 2928 0 2929 }; 2930 2931 usb_endpoint_descriptor_t uhci_endpd = { 2932 USB_ENDPOINT_DESCRIPTOR_SIZE, 2933 UDESC_ENDPOINT, 2934 UE_DIR_IN | UHCI_INTR_ENDPT, 2935 UE_INTERRUPT, 2936 {8}, 2937 255 2938 }; 2939 2940 usb_hub_descriptor_t uhci_hubd_piix = { 2941 USB_HUB_DESCRIPTOR_SIZE, 2942 UDESC_HUB, 2943 2, 2944 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 2945 50, /* power on to power good */ 2946 0, 2947 { 0x00 }, /* both ports are removable */ 2948 }; 2949 2950 int 2951 uhci_str(usb_string_descriptor_t *p, int l, char *s) 2952 { 2953 int i; 2954 2955 if (l == 0) 2956 return (0); 2957 p->bLength = 2 * strlen(s) + 2; 2958 if (l == 1) 2959 return (1); 2960 p->bDescriptorType = UDESC_STRING; 2961 l -= 2; 2962 for (i = 0; s[i] && l > 1; i++, l -= 2) 2963 USETW2(p->bString[i], 0, s[i]); 2964 return (2*i+2); 2965 } 2966 2967 /* 2968 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 2969 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 2970 * should not be used by the USB subsystem. As we cannot issue a 2971 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 2972 * will be enabled as part of the reset. 2973 * 2974 * On the VT83C572, the port cannot be successfully enabled until the 2975 * outstanding "port enable change" and "connection status change" 2976 * events have been reset. 2977 */ 2978 usbd_status 2979 uhci_portreset(uhci_softc_t *sc, int index) 2980 { 2981 int lim, port, x; 2982 2983 if (index == 1) 2984 port = UHCI_PORTSC1; 2985 else if (index == 2) 2986 port = UHCI_PORTSC2; 2987 else 2988 return (USBD_IOERROR); 2989 2990 x = URWMASK(UREAD2(sc, port)); 2991 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2992 2993 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2994 2995 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 2996 index, UREAD2(sc, port))); 2997 2998 x = URWMASK(UREAD2(sc, port)); 2999 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3000 3001 delay(100); 3002 3003 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3004 index, UREAD2(sc, port))); 3005 3006 x = URWMASK(UREAD2(sc, port)); 3007 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3008 3009 for (lim = 10; --lim > 0;) { 3010 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3011 3012 x = UREAD2(sc, port); 3013 3014 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3015 index, lim, x)); 3016 3017 if (!(x & UHCI_PORTSC_CCS)) { 3018 /* 3019 * No device is connected (or was disconnected 3020 * during reset). Consider the port reset. 3021 * The delay must be long enough to ensure on 3022 * the initial iteration that the device 3023 * connection will have been registered. 50ms 3024 * appears to be sufficient, but 20ms is not. 3025 */ 3026 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3027 index, lim)); 3028 break; 3029 } 3030 3031 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3032 /* 3033 * Port enabled changed and/or connection 3034 * status changed were set. Reset either or 3035 * both raised flags (by writing a 1 to that 3036 * bit), and wait again for state to settle. 3037 */ 3038 UWRITE2(sc, port, URWMASK(x) | 3039 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3040 continue; 3041 } 3042 3043 if (x & UHCI_PORTSC_PE) 3044 /* Port is enabled */ 3045 break; 3046 3047 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3048 } 3049 3050 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3051 index, UREAD2(sc, port))); 3052 3053 if (lim <= 0) { 3054 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3055 return (USBD_TIMEOUT); 3056 } 3057 3058 sc->sc_isreset = 1; 3059 return (USBD_NORMAL_COMPLETION); 3060 } 3061 3062 /* 3063 * Simulate a hardware hub by handling all the necessary requests. 3064 */ 3065 usbd_status 3066 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3067 { 3068 usbd_status err; 3069 3070 /* Insert last in queue. */ 3071 err = usb_insert_transfer(xfer); 3072 if (err) 3073 return (err); 3074 3075 /* 3076 * Pipe isn't running (otherwise err would be USBD_INPROG), 3077 * so start it first. 3078 */ 3079 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3080 } 3081 3082 usbd_status 3083 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3084 { 3085 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3086 usb_device_request_t *req; 3087 void *buf = NULL; 3088 int port, x; 3089 int s, len, value, index, status, change, l, totlen = 0; 3090 usb_port_status_t ps; 3091 usbd_status err; 3092 3093 if (sc->sc_dying) 3094 return (USBD_IOERROR); 3095 3096 #ifdef DIAGNOSTIC 3097 if (!(xfer->rqflags & URQ_REQUEST)) 3098 panic("uhci_root_ctrl_start: not a request"); 3099 #endif 3100 req = &xfer->request; 3101 3102 DPRINTFN(2,("uhci_root_ctrl_start type=0x%02x request=%02x\n", 3103 req->bmRequestType, req->bRequest)); 3104 3105 len = UGETW(req->wLength); 3106 value = UGETW(req->wValue); 3107 index = UGETW(req->wIndex); 3108 3109 if (len != 0) 3110 buf = KERNADDR(&xfer->dmabuf, 0); 3111 3112 #define C(x,y) ((x) | ((y) << 8)) 3113 switch(C(req->bRequest, req->bmRequestType)) { 3114 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3115 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3116 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3117 /* 3118 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3119 * for the integrated root hub. 3120 */ 3121 break; 3122 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3123 if (len > 0) { 3124 *(u_int8_t *)buf = sc->sc_conf; 3125 totlen = 1; 3126 } 3127 break; 3128 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3129 DPRINTFN(2,("uhci_root_ctrl_start wValue=0x%04x\n", value)); 3130 switch(value >> 8) { 3131 case UDESC_DEVICE: 3132 if ((value & 0xff) != 0) { 3133 err = USBD_IOERROR; 3134 goto ret; 3135 } 3136 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3137 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3138 memcpy(buf, &uhci_devd, l); 3139 break; 3140 case UDESC_CONFIG: 3141 if ((value & 0xff) != 0) { 3142 err = USBD_IOERROR; 3143 goto ret; 3144 } 3145 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3146 memcpy(buf, &uhci_confd, l); 3147 buf = (char *)buf + l; 3148 len -= l; 3149 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3150 totlen += l; 3151 memcpy(buf, &uhci_ifcd, l); 3152 buf = (char *)buf + l; 3153 len -= l; 3154 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3155 totlen += l; 3156 memcpy(buf, &uhci_endpd, l); 3157 break; 3158 case UDESC_STRING: 3159 if (len == 0) 3160 break; 3161 *(u_int8_t *)buf = 0; 3162 totlen = 1; 3163 switch (value & 0xff) { 3164 case 0: /* Language table */ 3165 totlen = uhci_str(buf, len, "\001"); 3166 break; 3167 case 1: /* Vendor */ 3168 totlen = uhci_str(buf, len, sc->sc_vendor); 3169 break; 3170 case 2: /* Product */ 3171 totlen = uhci_str(buf, len, "UHCI root hub"); 3172 break; 3173 } 3174 break; 3175 default: 3176 err = USBD_IOERROR; 3177 goto ret; 3178 } 3179 break; 3180 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3181 if (len > 0) { 3182 *(u_int8_t *)buf = 0; 3183 totlen = 1; 3184 } 3185 break; 3186 case C(UR_GET_STATUS, UT_READ_DEVICE): 3187 if (len > 1) { 3188 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3189 totlen = 2; 3190 } 3191 break; 3192 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3193 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3194 if (len > 1) { 3195 USETW(((usb_status_t *)buf)->wStatus, 0); 3196 totlen = 2; 3197 } 3198 break; 3199 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3200 if (value >= USB_MAX_DEVICES) { 3201 err = USBD_IOERROR; 3202 goto ret; 3203 } 3204 sc->sc_addr = value; 3205 break; 3206 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3207 if (value != 0 && value != 1) { 3208 err = USBD_IOERROR; 3209 goto ret; 3210 } 3211 sc->sc_conf = value; 3212 break; 3213 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3214 break; 3215 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3216 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3217 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3218 err = USBD_IOERROR; 3219 goto ret; 3220 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3221 break; 3222 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3223 break; 3224 /* Hub requests */ 3225 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3226 break; 3227 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3228 DPRINTFN(3, ("uhci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 3229 "port=%d feature=%d\n", 3230 index, value)); 3231 if (index == 1) 3232 port = UHCI_PORTSC1; 3233 else if (index == 2) 3234 port = UHCI_PORTSC2; 3235 else { 3236 err = USBD_IOERROR; 3237 goto ret; 3238 } 3239 switch(value) { 3240 case UHF_PORT_ENABLE: 3241 x = URWMASK(UREAD2(sc, port)); 3242 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3243 break; 3244 case UHF_PORT_SUSPEND: 3245 x = URWMASK(UREAD2(sc, port)); 3246 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3247 break; 3248 case UHF_PORT_RESET: 3249 x = URWMASK(UREAD2(sc, port)); 3250 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3251 break; 3252 case UHF_C_PORT_CONNECTION: 3253 x = URWMASK(UREAD2(sc, port)); 3254 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3255 break; 3256 case UHF_C_PORT_ENABLE: 3257 x = URWMASK(UREAD2(sc, port)); 3258 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3259 break; 3260 case UHF_C_PORT_OVER_CURRENT: 3261 x = URWMASK(UREAD2(sc, port)); 3262 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3263 break; 3264 case UHF_C_PORT_RESET: 3265 sc->sc_isreset = 0; 3266 err = USBD_NORMAL_COMPLETION; 3267 goto ret; 3268 case UHF_PORT_CONNECTION: 3269 case UHF_PORT_OVER_CURRENT: 3270 case UHF_PORT_POWER: 3271 case UHF_PORT_LOW_SPEED: 3272 case UHF_C_PORT_SUSPEND: 3273 default: 3274 err = USBD_IOERROR; 3275 goto ret; 3276 } 3277 break; 3278 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3279 if (index == 1) 3280 port = UHCI_PORTSC1; 3281 else if (index == 2) 3282 port = UHCI_PORTSC2; 3283 else { 3284 err = USBD_IOERROR; 3285 goto ret; 3286 } 3287 if (len > 0) { 3288 *(u_int8_t *)buf = 3289 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3290 UHCI_PORTSC_LS_SHIFT; 3291 totlen = 1; 3292 } 3293 break; 3294 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3295 if ((value & 0xff) != 0) { 3296 err = USBD_IOERROR; 3297 goto ret; 3298 } 3299 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3300 totlen = l; 3301 memcpy(buf, &uhci_hubd_piix, l); 3302 break; 3303 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3304 if (len != 4) { 3305 err = USBD_IOERROR; 3306 goto ret; 3307 } 3308 memset(buf, 0, len); 3309 totlen = len; 3310 break; 3311 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3312 if (index == 1) 3313 port = UHCI_PORTSC1; 3314 else if (index == 2) 3315 port = UHCI_PORTSC2; 3316 else { 3317 err = USBD_IOERROR; 3318 goto ret; 3319 } 3320 if (len != 4) { 3321 err = USBD_IOERROR; 3322 goto ret; 3323 } 3324 x = UREAD2(sc, port); 3325 status = change = 0; 3326 if (x & UHCI_PORTSC_CCS) 3327 status |= UPS_CURRENT_CONNECT_STATUS; 3328 if (x & UHCI_PORTSC_CSC) 3329 change |= UPS_C_CONNECT_STATUS; 3330 if (x & UHCI_PORTSC_PE) 3331 status |= UPS_PORT_ENABLED; 3332 if (x & UHCI_PORTSC_POEDC) 3333 change |= UPS_C_PORT_ENABLED; 3334 if (x & UHCI_PORTSC_OCI) 3335 status |= UPS_OVERCURRENT_INDICATOR; 3336 if (x & UHCI_PORTSC_OCIC) 3337 change |= UPS_C_OVERCURRENT_INDICATOR; 3338 if (x & UHCI_PORTSC_SUSP) 3339 status |= UPS_SUSPEND; 3340 if (x & UHCI_PORTSC_LSDA) 3341 status |= UPS_LOW_SPEED; 3342 status |= UPS_PORT_POWER; 3343 if (sc->sc_isreset) 3344 change |= UPS_C_PORT_RESET; 3345 USETW(ps.wPortStatus, status); 3346 USETW(ps.wPortChange, change); 3347 l = min(len, sizeof ps); 3348 memcpy(buf, &ps, l); 3349 totlen = l; 3350 break; 3351 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3352 err = USBD_IOERROR; 3353 goto ret; 3354 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3355 break; 3356 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3357 if (index == 1) 3358 port = UHCI_PORTSC1; 3359 else if (index == 2) 3360 port = UHCI_PORTSC2; 3361 else { 3362 err = USBD_IOERROR; 3363 goto ret; 3364 } 3365 switch(value) { 3366 case UHF_PORT_ENABLE: 3367 x = URWMASK(UREAD2(sc, port)); 3368 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3369 break; 3370 case UHF_PORT_SUSPEND: 3371 x = URWMASK(UREAD2(sc, port)); 3372 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3373 break; 3374 case UHF_PORT_RESET: 3375 err = uhci_portreset(sc, index); 3376 goto ret; 3377 case UHF_PORT_POWER: 3378 /* Pretend we turned on power */ 3379 err = USBD_NORMAL_COMPLETION; 3380 goto ret; 3381 case UHF_PORT_DISOWN_TO_1_1: 3382 /* accept, but do nothing */ 3383 err = USBD_NORMAL_COMPLETION; 3384 goto ret; 3385 case UHF_C_PORT_CONNECTION: 3386 case UHF_C_PORT_ENABLE: 3387 case UHF_C_PORT_OVER_CURRENT: 3388 case UHF_PORT_CONNECTION: 3389 case UHF_PORT_OVER_CURRENT: 3390 case UHF_PORT_LOW_SPEED: 3391 case UHF_C_PORT_SUSPEND: 3392 case UHF_C_PORT_RESET: 3393 default: 3394 err = USBD_IOERROR; 3395 goto ret; 3396 } 3397 break; 3398 default: 3399 err = USBD_IOERROR; 3400 goto ret; 3401 } 3402 xfer->actlen = totlen; 3403 err = USBD_NORMAL_COMPLETION; 3404 ret: 3405 xfer->status = err; 3406 s = splusb(); 3407 usb_transfer_complete(xfer); 3408 splx(s); 3409 return (USBD_IN_PROGRESS); 3410 } 3411 3412 /* Abort a root control request. */ 3413 void 3414 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3415 { 3416 /* Nothing to do, all transfers are synchronous. */ 3417 } 3418 3419 /* Close the root pipe. */ 3420 void 3421 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3422 { 3423 DPRINTF(("uhci_root_ctrl_close\n")); 3424 } 3425 3426 /* Abort a root interrupt request. */ 3427 void 3428 uhci_root_intr_abort(usbd_xfer_handle xfer) 3429 { 3430 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3431 3432 timeout_del(&sc->sc_poll_handle); 3433 sc->sc_intr_xfer = NULL; 3434 3435 if (xfer->pipe->intrxfer == xfer) { 3436 DPRINTF(("uhci_root_intr_abort: remove\n")); 3437 xfer->pipe->intrxfer = 0; 3438 } 3439 xfer->status = USBD_CANCELLED; 3440 #ifdef DIAGNOSTIC 3441 UXFER(xfer)->iinfo.isdone = 1; 3442 #endif 3443 usb_transfer_complete(xfer); 3444 } 3445 3446 usbd_status 3447 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3448 { 3449 usbd_status err; 3450 3451 /* Insert last in queue. */ 3452 err = usb_insert_transfer(xfer); 3453 if (err) 3454 return (err); 3455 3456 /* Pipe isn't running (otherwise err would be USBD_INPROG), 3457 * start first 3458 */ 3459 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3460 } 3461 3462 /* Start a transfer on the root interrupt pipe */ 3463 usbd_status 3464 uhci_root_intr_start(usbd_xfer_handle xfer) 3465 { 3466 usbd_pipe_handle pipe = xfer->pipe; 3467 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3468 3469 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%u flags=%d\n", 3470 xfer, xfer->length, xfer->flags)); 3471 3472 if (sc->sc_dying) 3473 return (USBD_IOERROR); 3474 3475 sc->sc_ival = mstohz(xfer->pipe->endpoint->edesc->bInterval); 3476 timeout_del(&sc->sc_poll_handle); 3477 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer); 3478 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 3479 sc->sc_intr_xfer = xfer; 3480 return (USBD_IN_PROGRESS); 3481 } 3482 3483 /* Close the root interrupt pipe. */ 3484 void 3485 uhci_root_intr_close(usbd_pipe_handle pipe) 3486 { 3487 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3488 3489 timeout_del(&sc->sc_poll_handle); 3490 sc->sc_intr_xfer = NULL; 3491 DPRINTF(("uhci_root_intr_close\n")); 3492 } 3493