1 /* $OpenBSD: uhci.c,v 1.90 2011/07/03 15:47:17 matthew Exp $ */ 2 /* $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * USB Universal Host Controller driver. 37 * Handles e.g. PIIX3 and PIIX4. 38 * 39 * UHCI spec: http://download.intel.com/technology/usb/UHCI11D.pdf 40 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 41 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 42 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/malloc.h> 49 #include <sys/device.h> 50 #include <sys/selinfo.h> 51 #include <sys/proc.h> 52 #include <sys/queue.h> 53 54 #include <machine/bus.h> 55 #include <machine/endian.h> 56 57 #include <dev/usb/usb.h> 58 #include <dev/usb/usbdi.h> 59 #include <dev/usb/usbdivar.h> 60 #include <dev/usb/usb_mem.h> 61 #include <dev/usb/usb_quirks.h> 62 63 #include <dev/usb/uhcireg.h> 64 #include <dev/usb/uhcivar.h> 65 66 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 67 /*#define UHCI_CTL_LOOP */ 68 69 struct cfdriver uhci_cd = { 70 NULL, "uhci", DV_DULL 71 }; 72 73 #ifdef UHCI_DEBUG 74 uhci_softc_t *thesc; 75 #define DPRINTF(x) if (uhcidebug) printf x 76 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 77 int uhcidebug = 0; 78 int uhcinoloop = 0; 79 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 80 #else 81 #define DPRINTF(x) 82 #define DPRINTFN(n,x) 83 #endif 84 85 #define mstohz(ms) ((ms) * hz / 1000) 86 87 /* 88 * The UHCI controller is little endian, so on big endian machines 89 * the data stored in memory needs to be swapped. 90 */ 91 92 struct uhci_pipe { 93 struct usbd_pipe pipe; 94 int nexttoggle; 95 96 u_char aborting; 97 usbd_xfer_handle abortstart, abortend; 98 99 /* Info needed for different pipe kinds. */ 100 union { 101 /* Control pipe */ 102 struct { 103 uhci_soft_qh_t *sqh; 104 usb_dma_t reqdma; 105 uhci_soft_td_t *setup, *stat; 106 u_int length; 107 } ctl; 108 /* Interrupt pipe */ 109 struct { 110 int npoll; 111 int isread; 112 uhci_soft_qh_t **qhs; 113 } intr; 114 /* Bulk pipe */ 115 struct { 116 uhci_soft_qh_t *sqh; 117 u_int length; 118 int isread; 119 } bulk; 120 /* Iso pipe */ 121 struct iso { 122 uhci_soft_td_t **stds; 123 int next, inuse; 124 } iso; 125 } u; 126 }; 127 128 void uhci_globalreset(uhci_softc_t *); 129 usbd_status uhci_portreset(uhci_softc_t*, int); 130 void uhci_reset(uhci_softc_t *); 131 void uhci_shutdown(void *v); 132 usbd_status uhci_run(uhci_softc_t *, int run); 133 uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 134 void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 135 uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 136 void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 137 #if 0 138 void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 139 uhci_intr_info_t *); 140 void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 141 #endif 142 143 void uhci_free_std_chain(uhci_softc_t *, 144 uhci_soft_td_t *, uhci_soft_td_t *); 145 usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 146 uhci_softc_t *, u_int, int, u_int16_t, usb_dma_t *, 147 uhci_soft_td_t **, uhci_soft_td_t **); 148 void uhci_poll_hub(void *); 149 void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 150 void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 151 void uhci_idone(uhci_intr_info_t *); 152 153 void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 154 155 void uhci_timeout(void *); 156 void uhci_timeout_task(void *); 157 void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 158 void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 159 void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 160 void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 161 void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 162 void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 163 int uhci_str(usb_string_descriptor_t *, int, char *); 164 void uhci_add_loop(uhci_softc_t *sc); 165 void uhci_rem_loop(uhci_softc_t *sc); 166 167 usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 168 void uhci_device_isoc_enter(usbd_xfer_handle); 169 170 usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 171 void uhci_freem(struct usbd_bus *, usb_dma_t *); 172 173 usbd_xfer_handle uhci_allocx(struct usbd_bus *); 174 void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 175 176 usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 177 usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 178 void uhci_device_ctrl_abort(usbd_xfer_handle); 179 void uhci_device_ctrl_close(usbd_pipe_handle); 180 void uhci_device_ctrl_done(usbd_xfer_handle); 181 182 usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 183 usbd_status uhci_device_intr_start(usbd_xfer_handle); 184 void uhci_device_intr_abort(usbd_xfer_handle); 185 void uhci_device_intr_close(usbd_pipe_handle); 186 void uhci_device_intr_done(usbd_xfer_handle); 187 188 usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 189 usbd_status uhci_device_bulk_start(usbd_xfer_handle); 190 void uhci_device_bulk_abort(usbd_xfer_handle); 191 void uhci_device_bulk_close(usbd_pipe_handle); 192 void uhci_device_bulk_done(usbd_xfer_handle); 193 194 usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 195 usbd_status uhci_device_isoc_start(usbd_xfer_handle); 196 void uhci_device_isoc_abort(usbd_xfer_handle); 197 void uhci_device_isoc_close(usbd_pipe_handle); 198 void uhci_device_isoc_done(usbd_xfer_handle); 199 200 usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 201 usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 202 void uhci_root_ctrl_abort(usbd_xfer_handle); 203 void uhci_root_ctrl_close(usbd_pipe_handle); 204 void uhci_root_ctrl_done(usbd_xfer_handle); 205 206 usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 207 usbd_status uhci_root_intr_start(usbd_xfer_handle); 208 void uhci_root_intr_abort(usbd_xfer_handle); 209 void uhci_root_intr_close(usbd_pipe_handle); 210 void uhci_root_intr_done(usbd_xfer_handle); 211 212 usbd_status uhci_open(usbd_pipe_handle); 213 void uhci_poll(struct usbd_bus *); 214 void uhci_softintr(void *); 215 216 usbd_status uhci_device_request(usbd_xfer_handle xfer); 217 218 void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 219 void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 220 usbd_status uhci_device_setintr(uhci_softc_t *sc, 221 struct uhci_pipe *pipe, int ival); 222 223 void uhci_device_clear_toggle(usbd_pipe_handle pipe); 224 void uhci_noop(usbd_pipe_handle pipe); 225 226 __inline__ uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 227 uhci_soft_qh_t *); 228 229 #ifdef UHCI_DEBUG 230 void uhci_dump_all(uhci_softc_t *); 231 void uhci_dumpregs(uhci_softc_t *); 232 void uhci_dump_qhs(uhci_soft_qh_t *); 233 void uhci_dump_qh(uhci_soft_qh_t *); 234 void uhci_dump_tds(uhci_soft_td_t *); 235 void uhci_dump_td(uhci_soft_td_t *); 236 void uhci_dump_ii(uhci_intr_info_t *ii); 237 void uhci_dump(void); 238 #endif 239 240 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 241 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 242 #define UWRITE1(sc, r, x) \ 243 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 244 } while (/*CONSTCOND*/0) 245 #define UWRITE2(sc, r, x) \ 246 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 247 } while (/*CONSTCOND*/0) 248 #define UWRITE4(sc, r, x) \ 249 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 250 } while (/*CONSTCOND*/0) 251 252 static __inline u_int8_t 253 UREAD1(uhci_softc_t *sc, bus_size_t r) 254 { 255 UBARR(sc); 256 return bus_space_read_1(sc->iot, sc->ioh, r); 257 } 258 259 static __inline u_int16_t 260 UREAD2(uhci_softc_t *sc, bus_size_t r) 261 { 262 UBARR(sc); 263 return bus_space_read_2(sc->iot, sc->ioh, r); 264 } 265 266 static __inline u_int32_t 267 UREAD4(uhci_softc_t *sc, bus_size_t r) 268 { 269 UBARR(sc); 270 return bus_space_read_4(sc->iot, sc->ioh, r); 271 } 272 273 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 274 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 275 276 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 277 278 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 279 280 #define UHCI_INTR_ENDPT 1 281 282 struct usbd_bus_methods uhci_bus_methods = { 283 uhci_open, 284 uhci_softintr, 285 uhci_poll, 286 uhci_allocm, 287 uhci_freem, 288 uhci_allocx, 289 uhci_freex, 290 }; 291 292 struct usbd_pipe_methods uhci_root_ctrl_methods = { 293 uhci_root_ctrl_transfer, 294 uhci_root_ctrl_start, 295 uhci_root_ctrl_abort, 296 uhci_root_ctrl_close, 297 uhci_noop, 298 uhci_root_ctrl_done, 299 }; 300 301 struct usbd_pipe_methods uhci_root_intr_methods = { 302 uhci_root_intr_transfer, 303 uhci_root_intr_start, 304 uhci_root_intr_abort, 305 uhci_root_intr_close, 306 uhci_noop, 307 uhci_root_intr_done, 308 }; 309 310 struct usbd_pipe_methods uhci_device_ctrl_methods = { 311 uhci_device_ctrl_transfer, 312 uhci_device_ctrl_start, 313 uhci_device_ctrl_abort, 314 uhci_device_ctrl_close, 315 uhci_noop, 316 uhci_device_ctrl_done, 317 }; 318 319 struct usbd_pipe_methods uhci_device_intr_methods = { 320 uhci_device_intr_transfer, 321 uhci_device_intr_start, 322 uhci_device_intr_abort, 323 uhci_device_intr_close, 324 uhci_device_clear_toggle, 325 uhci_device_intr_done, 326 }; 327 328 struct usbd_pipe_methods uhci_device_bulk_methods = { 329 uhci_device_bulk_transfer, 330 uhci_device_bulk_start, 331 uhci_device_bulk_abort, 332 uhci_device_bulk_close, 333 uhci_device_clear_toggle, 334 uhci_device_bulk_done, 335 }; 336 337 struct usbd_pipe_methods uhci_device_isoc_methods = { 338 uhci_device_isoc_transfer, 339 uhci_device_isoc_start, 340 uhci_device_isoc_abort, 341 uhci_device_isoc_close, 342 uhci_noop, 343 uhci_device_isoc_done, 344 }; 345 346 #define uhci_add_intr_info(sc, ii) \ 347 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 348 #define uhci_del_intr_info(ii) \ 349 do { \ 350 LIST_REMOVE((ii), list); \ 351 (ii)->list.le_prev = NULL; \ 352 } while (0) 353 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 354 355 __inline__ uhci_soft_qh_t * 356 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 357 { 358 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 359 360 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 361 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 362 if (letoh32(pqh->qh.qh_hlink) & UHCI_PTR_T) { 363 printf("uhci_find_prev_qh: QH not found\n"); 364 return (NULL); 365 } 366 #endif 367 } 368 return (pqh); 369 } 370 371 void 372 uhci_globalreset(uhci_softc_t *sc) 373 { 374 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 375 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 376 UHCICMD(sc, 0); /* do nothing */ 377 } 378 379 usbd_status 380 uhci_init(uhci_softc_t *sc) 381 { 382 usbd_status err; 383 int i, j; 384 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 385 uhci_soft_td_t *std; 386 387 DPRINTFN(1,("uhci_init: start\n")); 388 389 #ifdef UHCI_DEBUG 390 thesc = sc; 391 392 if (uhcidebug > 2) 393 uhci_dumpregs(sc); 394 #endif 395 396 /* Save SOF over HC reset. */ 397 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 398 399 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 400 uhci_globalreset(sc); /* reset the controller */ 401 uhci_reset(sc); 402 403 /* Restore saved SOF. */ 404 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 405 406 /* Allocate and initialize real frame array. */ 407 err = usb_allocmem(&sc->sc_bus, 408 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 409 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 410 if (err) 411 return (err); 412 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 413 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 414 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 415 416 /* 417 * Allocate a TD, inactive, that hangs from the last QH. 418 * This is to avoid a bug in the PIIX that makes it run berserk 419 * otherwise. 420 */ 421 std = uhci_alloc_std(sc); 422 if (std == NULL) 423 return (USBD_NOMEM); 424 std->link.std = NULL; 425 std->td.td_link = htole32(UHCI_PTR_T); 426 std->td.td_status = htole32(0); /* inactive */ 427 std->td.td_token = htole32(0); 428 std->td.td_buffer = htole32(0); 429 430 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 431 lsqh = uhci_alloc_sqh(sc); 432 if (lsqh == NULL) 433 return (USBD_NOMEM); 434 lsqh->hlink = NULL; 435 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 436 lsqh->elink = std; 437 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 438 sc->sc_last_qh = lsqh; 439 440 /* Allocate the dummy QH where bulk traffic will be queued. */ 441 bsqh = uhci_alloc_sqh(sc); 442 if (bsqh == NULL) 443 return (USBD_NOMEM); 444 bsqh->hlink = lsqh; 445 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 446 bsqh->elink = NULL; 447 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 448 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 449 450 /* Allocate dummy QH where high speed control traffic will be queued. */ 451 chsqh = uhci_alloc_sqh(sc); 452 if (chsqh == NULL) 453 return (USBD_NOMEM); 454 chsqh->hlink = bsqh; 455 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 456 chsqh->elink = NULL; 457 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 458 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 459 460 /* Allocate dummy QH where control traffic will be queued. */ 461 clsqh = uhci_alloc_sqh(sc); 462 if (clsqh == NULL) 463 return (USBD_NOMEM); 464 clsqh->hlink = chsqh; 465 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 466 clsqh->elink = NULL; 467 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 468 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 469 470 /* 471 * Make all (virtual) frame list pointers point to the interrupt 472 * queue heads and the interrupt queue heads at the control 473 * queue head and point the physical frame list to the virtual. 474 */ 475 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 476 std = uhci_alloc_std(sc); 477 sqh = uhci_alloc_sqh(sc); 478 if (std == NULL || sqh == NULL) 479 return (USBD_NOMEM); 480 std->link.sqh = sqh; 481 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 482 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 483 std->td.td_token = htole32(0); 484 std->td.td_buffer = htole32(0); 485 sqh->hlink = clsqh; 486 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 487 sqh->elink = NULL; 488 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 489 sc->sc_vframes[i].htd = std; 490 sc->sc_vframes[i].etd = std; 491 sc->sc_vframes[i].hqh = sqh; 492 sc->sc_vframes[i].eqh = sqh; 493 for (j = i; 494 j < UHCI_FRAMELIST_COUNT; 495 j += UHCI_VFRAMELIST_COUNT) 496 sc->sc_pframes[j] = htole32(std->physaddr); 497 } 498 499 LIST_INIT(&sc->sc_intrhead); 500 501 SIMPLEQ_INIT(&sc->sc_free_xfers); 502 503 timeout_set(&sc->sc_poll_handle, NULL, NULL); 504 505 /* Set up the bus struct. */ 506 sc->sc_bus.methods = &uhci_bus_methods; 507 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 508 509 sc->sc_suspend = DVACT_RESUME; 510 sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc); 511 512 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 513 514 DPRINTFN(1,("uhci_init: enabling\n")); 515 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 516 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 517 518 return (uhci_run(sc, 1)); /* and here we go... */ 519 } 520 521 int 522 uhci_activate(struct device *self, int act) 523 { 524 struct uhci_softc *sc = (struct uhci_softc *)self; 525 int cmd, rv = 0; 526 527 switch (act) { 528 case DVACT_SUSPEND: 529 #ifdef UHCI_DEBUG 530 if (uhcidebug > 2) 531 uhci_dumpregs(sc); 532 #endif 533 if (sc->sc_intr_xfer != NULL) 534 timeout_del(&sc->sc_poll_handle); 535 sc->sc_bus.use_polling++; 536 uhci_run(sc, 0); /* stop the controller */ 537 538 /* save some state if BIOS doesn't */ 539 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 540 541 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 542 543 cmd = UREAD2(sc, UHCI_CMD); 544 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 545 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 546 sc->sc_suspend = act; 547 sc->sc_bus.use_polling--; 548 DPRINTF(("uhci_activate: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 549 break; 550 case DVACT_RESUME: 551 #ifdef DIAGNOSTIC 552 if (sc->sc_suspend == DVACT_RESUME) 553 printf("uhci_powerhook: weird, resume without suspend.\n"); 554 #endif 555 sc->sc_bus.use_polling++; 556 sc->sc_suspend = act; 557 cmd = UREAD2(sc, UHCI_CMD); 558 if (cmd & UHCI_CMD_RS) 559 uhci_run(sc, 0); /* in case BIOS has started it */ 560 561 /* restore saved state */ 562 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 563 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 564 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 565 566 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 567 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 568 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 569 UHCICMD(sc, UHCI_CMD_MAXP); 570 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 571 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 572 uhci_run(sc, 1); /* and start traffic again */ 573 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 574 sc->sc_bus.use_polling--; 575 if (sc->sc_intr_xfer != NULL) { 576 timeout_del(&sc->sc_poll_handle); 577 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, 578 sc->sc_intr_xfer); 579 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 580 } 581 #ifdef UHCI_DEBUG 582 if (uhcidebug > 2) 583 uhci_dumpregs(sc); 584 #endif 585 break; 586 case DVACT_DEACTIVATE: 587 if (sc->sc_child != NULL) 588 rv = config_deactivate(sc->sc_child); 589 break; 590 } 591 return (rv); 592 } 593 594 int 595 uhci_detach(struct uhci_softc *sc, int flags) 596 { 597 usbd_xfer_handle xfer; 598 int rv = 0; 599 600 if (sc->sc_child != NULL) 601 rv = config_detach(sc->sc_child, flags); 602 603 if (rv != 0) 604 return (rv); 605 606 if (sc->sc_shutdownhook != NULL) 607 shutdownhook_disestablish(sc->sc_shutdownhook); 608 609 if (sc->sc_intr_xfer != NULL) { 610 timeout_del(&sc->sc_poll_handle); 611 sc->sc_intr_xfer = NULL; 612 } 613 614 /* Free all xfers associated with this HC. */ 615 for (;;) { 616 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 617 if (xfer == NULL) 618 break; 619 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 620 free(xfer, M_USB); 621 } 622 623 /* XXX free other data structures XXX */ 624 625 return (rv); 626 } 627 628 usbd_status 629 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 630 { 631 struct uhci_softc *sc = (struct uhci_softc *)bus; 632 u_int32_t n; 633 634 /* 635 * XXX 636 * Since we are allocating a buffer we can assume that we will 637 * need TDs for it. Since we don't want to allocate those from 638 * an interrupt context, we allocate them here and free them again. 639 * This is no guarantee that we'll get the TDs next time... 640 */ 641 n = size / 8; 642 if (n > 16) { 643 u_int32_t i; 644 uhci_soft_td_t **stds; 645 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 646 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 647 M_NOWAIT | M_ZERO); 648 if (stds == NULL) 649 panic("uhci_allocm"); 650 for(i=0; i < n; i++) 651 stds[i] = uhci_alloc_std(sc); 652 for(i=0; i < n; i++) 653 if (stds[i] != NULL) 654 uhci_free_std(sc, stds[i]); 655 free(stds, M_TEMP); 656 } 657 658 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 659 } 660 661 void 662 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 663 { 664 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 665 } 666 667 usbd_xfer_handle 668 uhci_allocx(struct usbd_bus *bus) 669 { 670 struct uhci_softc *sc = (struct uhci_softc *)bus; 671 usbd_xfer_handle xfer; 672 673 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 674 if (xfer != NULL) { 675 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 676 #ifdef DIAGNOSTIC 677 if (xfer->busy_free != XFER_FREE) { 678 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 679 xfer->busy_free); 680 } 681 #endif 682 } else { 683 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 684 } 685 if (xfer != NULL) { 686 memset(xfer, 0, sizeof (struct uhci_xfer)); 687 UXFER(xfer)->iinfo.sc = sc; 688 #ifdef DIAGNOSTIC 689 UXFER(xfer)->iinfo.isdone = 1; 690 xfer->busy_free = XFER_BUSY; 691 #endif 692 } 693 return (xfer); 694 } 695 696 void 697 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 698 { 699 struct uhci_softc *sc = (struct uhci_softc *)bus; 700 701 #ifdef DIAGNOSTIC 702 if (xfer->busy_free != XFER_BUSY) { 703 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 704 xfer->busy_free); 705 return; 706 } 707 xfer->busy_free = XFER_FREE; 708 if (!UXFER(xfer)->iinfo.isdone) { 709 printf("uhci_freex: !isdone\n"); 710 return; 711 } 712 #endif 713 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 714 } 715 716 /* 717 * Shut down the controller when the system is going down. 718 */ 719 void 720 uhci_shutdown(void *v) 721 { 722 uhci_softc_t *sc = v; 723 724 DPRINTF(("uhci_shutdown: stopping the HC\n")); 725 uhci_run(sc, 0); /* stop the controller */ 726 } 727 728 #ifdef UHCI_DEBUG 729 void 730 uhci_dumpregs(uhci_softc_t *sc) 731 { 732 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 733 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 734 sc->sc_bus.bdev.dv_xname, 735 UREAD2(sc, UHCI_CMD), 736 UREAD2(sc, UHCI_STS), 737 UREAD2(sc, UHCI_INTR), 738 UREAD2(sc, UHCI_FRNUM), 739 UREAD4(sc, UHCI_FLBASEADDR), 740 UREAD1(sc, UHCI_SOF), 741 UREAD2(sc, UHCI_PORTSC1), 742 UREAD2(sc, UHCI_PORTSC2))); 743 } 744 745 void 746 uhci_dump_td(uhci_soft_td_t *p) 747 { 748 char sbuf[128], sbuf2[128]; 749 750 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 751 "token=0x%08lx buffer=0x%08lx\n", 752 p, (long)p->physaddr, 753 (long)letoh32(p->td.td_link), 754 (long)letoh32(p->td.td_status), 755 (long)letoh32(p->td.td_token), 756 (long)letoh32(p->td.td_buffer))); 757 758 bitmask_snprintf((u_int32_t)letoh32(p->td.td_link), "\20\1T\2Q\3VF", 759 sbuf, sizeof(sbuf)); 760 bitmask_snprintf((u_int32_t)letoh32(p->td.td_status), 761 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 762 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 763 sbuf2, sizeof(sbuf2)); 764 765 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 766 "D=%d,maxlen=%d\n", sbuf, sbuf2, 767 UHCI_TD_GET_ERRCNT(letoh32(p->td.td_status)), 768 UHCI_TD_GET_ACTLEN(letoh32(p->td.td_status)), 769 UHCI_TD_GET_PID(letoh32(p->td.td_token)), 770 UHCI_TD_GET_DEVADDR(letoh32(p->td.td_token)), 771 UHCI_TD_GET_ENDPT(letoh32(p->td.td_token)), 772 UHCI_TD_GET_DT(letoh32(p->td.td_token)), 773 UHCI_TD_GET_MAXLEN(letoh32(p->td.td_token)))); 774 } 775 776 void 777 uhci_dump_qh(uhci_soft_qh_t *sqh) 778 { 779 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 780 (int)sqh->physaddr, letoh32(sqh->qh.qh_hlink), 781 letoh32(sqh->qh.qh_elink))); 782 } 783 784 785 void 786 uhci_dump(void) 787 { 788 uhci_dump_all(thesc); 789 } 790 791 void 792 uhci_dump_all(uhci_softc_t *sc) 793 { 794 uhci_dumpregs(sc); 795 printf("intrs=%d\n", sc->sc_bus.no_intrs); 796 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 797 uhci_dump_qh(sc->sc_lctl_start); 798 } 799 800 801 void 802 uhci_dump_qhs(uhci_soft_qh_t *sqh) 803 { 804 uhci_dump_qh(sqh); 805 806 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 807 * Traverses sideways first, then down. 808 * 809 * QH1 810 * QH2 811 * No QH 812 * TD2.1 813 * TD2.2 814 * TD1.1 815 * etc. 816 * 817 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 818 */ 819 820 821 if (sqh->hlink != NULL && !(letoh32(sqh->qh.qh_hlink) & UHCI_PTR_T)) 822 uhci_dump_qhs(sqh->hlink); 823 else 824 DPRINTF(("No QH\n")); 825 826 if (sqh->elink != NULL && !(letoh32(sqh->qh.qh_elink) & UHCI_PTR_T)) 827 uhci_dump_tds(sqh->elink); 828 else 829 DPRINTF(("No TD\n")); 830 } 831 832 void 833 uhci_dump_tds(uhci_soft_td_t *std) 834 { 835 uhci_soft_td_t *td; 836 837 for(td = std; td != NULL; td = td->link.std) { 838 uhci_dump_td(td); 839 840 /* Check whether the link pointer in this TD marks 841 * the link pointer as end of queue. This avoids 842 * printing the free list in case the queue/TD has 843 * already been moved there (seatbelt). 844 */ 845 if (letoh32(td->td.td_link) & UHCI_PTR_T || 846 letoh32(td->td.td_link) == 0) 847 break; 848 } 849 } 850 851 void 852 uhci_dump_ii(uhci_intr_info_t *ii) 853 { 854 usbd_pipe_handle pipe; 855 usb_endpoint_descriptor_t *ed; 856 usbd_device_handle dev; 857 858 #ifdef DIAGNOSTIC 859 #define DONE ii->isdone 860 #else 861 #define DONE 0 862 #endif 863 if (ii == NULL) { 864 printf("ii NULL\n"); 865 return; 866 } 867 if (ii->xfer == NULL) { 868 printf("ii %p: done=%d xfer=NULL\n", 869 ii, DONE); 870 return; 871 } 872 pipe = ii->xfer->pipe; 873 if (pipe == NULL) { 874 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 875 ii, DONE, ii->xfer); 876 return; 877 } 878 if (pipe->endpoint == NULL) { 879 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 880 ii, DONE, ii->xfer, pipe); 881 return; 882 } 883 if (pipe->device == NULL) { 884 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 885 ii, DONE, ii->xfer, pipe); 886 return; 887 } 888 ed = pipe->endpoint->edesc; 889 dev = pipe->device; 890 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 891 ii, DONE, ii->xfer, dev, 892 UGETW(dev->ddesc.idVendor), 893 UGETW(dev->ddesc.idProduct), 894 dev->address, pipe, 895 ed->bEndpointAddress, ed->bmAttributes); 896 #undef DONE 897 } 898 899 void uhci_dump_iis(struct uhci_softc *sc); 900 void 901 uhci_dump_iis(struct uhci_softc *sc) 902 { 903 uhci_intr_info_t *ii; 904 905 printf("intr_info list:\n"); 906 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 907 uhci_dump_ii(ii); 908 } 909 910 void iidump(void); 911 void iidump(void) { uhci_dump_iis(thesc); } 912 913 #endif 914 915 /* 916 * This routine is executed periodically and simulates interrupts 917 * from the root controller interrupt pipe for port status change. 918 */ 919 void 920 uhci_poll_hub(void *addr) 921 { 922 usbd_xfer_handle xfer = addr; 923 usbd_pipe_handle pipe = xfer->pipe; 924 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 925 int s; 926 u_char *p; 927 928 DPRINTFN(20, ("uhci_poll_hub\n")); 929 930 if (sc->sc_bus.dying) 931 return; 932 933 timeout_del(&sc->sc_poll_handle); 934 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer); 935 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 936 937 p = KERNADDR(&xfer->dmabuf, 0); 938 p[0] = 0; 939 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 940 p[0] |= 1<<1; 941 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 942 p[0] |= 1<<2; 943 if (p[0] == 0) 944 /* No change, try again in a while */ 945 return; 946 947 xfer->actlen = 1; 948 xfer->status = USBD_NORMAL_COMPLETION; 949 s = splusb(); 950 xfer->device->bus->intr_context++; 951 usb_transfer_complete(xfer); 952 xfer->device->bus->intr_context--; 953 splx(s); 954 } 955 956 void 957 uhci_root_intr_done(usbd_xfer_handle xfer) 958 { 959 } 960 961 void 962 uhci_root_ctrl_done(usbd_xfer_handle xfer) 963 { 964 } 965 966 /* 967 * Let the last QH loop back to the high speed control transfer QH. 968 * This is what intel calls "bandwidth reclamation" and improves 969 * USB performance a lot for some devices. 970 * If we are already looping, just count it. 971 */ 972 void 973 uhci_add_loop(uhci_softc_t *sc) { 974 #ifdef UHCI_DEBUG 975 if (uhcinoloop) 976 return; 977 #endif 978 if (++sc->sc_loops == 1) { 979 DPRINTFN(5,("uhci_add_loop\n")); 980 /* Note, we don't loop back the soft pointer. */ 981 sc->sc_last_qh->qh.qh_hlink = 982 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 983 } 984 } 985 986 void 987 uhci_rem_loop(uhci_softc_t *sc) { 988 #ifdef UHCI_DEBUG 989 if (uhcinoloop) 990 return; 991 #endif 992 if (--sc->sc_loops == 0) { 993 DPRINTFN(5,("uhci_rem_loop\n")); 994 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 995 } 996 } 997 998 /* Add high speed control QH, called at splusb(). */ 999 void 1000 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1001 { 1002 uhci_soft_qh_t *eqh; 1003 1004 SPLUSBCHECK; 1005 1006 DPRINTFN(10, ("uhci_add_hs_ctrl: sqh=%p\n", sqh)); 1007 eqh = sc->sc_hctl_end; 1008 sqh->hlink = eqh->hlink; 1009 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1010 eqh->hlink = sqh; 1011 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1012 sc->sc_hctl_end = sqh; 1013 #ifdef UHCI_CTL_LOOP 1014 uhci_add_loop(sc); 1015 #endif 1016 } 1017 1018 /* Remove high speed control QH, called at splusb(). */ 1019 void 1020 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1021 { 1022 uhci_soft_qh_t *pqh; 1023 1024 SPLUSBCHECK; 1025 1026 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1027 #ifdef UHCI_CTL_LOOP 1028 uhci_rem_loop(sc); 1029 #endif 1030 /* 1031 * The T bit should be set in the elink of the QH so that the HC 1032 * doesn't follow the pointer. This condition may fail if the 1033 * the transferred packet was short so that the QH still points 1034 * at the last used TD. 1035 * In this case we set the T bit and wait a little for the HC 1036 * to stop looking at the TD. 1037 */ 1038 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1039 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1040 delay(UHCI_QH_REMOVE_DELAY); 1041 } 1042 1043 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1044 pqh->hlink = sqh->hlink; 1045 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1046 delay(UHCI_QH_REMOVE_DELAY); 1047 if (sc->sc_hctl_end == sqh) 1048 sc->sc_hctl_end = pqh; 1049 } 1050 1051 /* Add low speed control QH, called at splusb(). */ 1052 void 1053 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1054 { 1055 uhci_soft_qh_t *eqh; 1056 1057 SPLUSBCHECK; 1058 1059 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1060 eqh = sc->sc_lctl_end; 1061 sqh->hlink = eqh->hlink; 1062 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1063 eqh->hlink = sqh; 1064 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1065 sc->sc_lctl_end = sqh; 1066 } 1067 1068 /* Remove low speed control QH, called at splusb(). */ 1069 void 1070 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1071 { 1072 uhci_soft_qh_t *pqh; 1073 1074 SPLUSBCHECK; 1075 1076 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1077 /* See comment in uhci_remove_hs_ctrl() */ 1078 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1079 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1080 delay(UHCI_QH_REMOVE_DELAY); 1081 } 1082 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1083 pqh->hlink = sqh->hlink; 1084 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1085 delay(UHCI_QH_REMOVE_DELAY); 1086 if (sc->sc_lctl_end == sqh) 1087 sc->sc_lctl_end = pqh; 1088 } 1089 1090 /* Add bulk QH, called at splusb(). */ 1091 void 1092 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1093 { 1094 uhci_soft_qh_t *eqh; 1095 1096 SPLUSBCHECK; 1097 1098 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1099 eqh = sc->sc_bulk_end; 1100 sqh->hlink = eqh->hlink; 1101 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1102 eqh->hlink = sqh; 1103 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1104 sc->sc_bulk_end = sqh; 1105 uhci_add_loop(sc); 1106 } 1107 1108 /* Remove bulk QH, called at splusb(). */ 1109 void 1110 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1111 { 1112 uhci_soft_qh_t *pqh; 1113 1114 SPLUSBCHECK; 1115 1116 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1117 uhci_rem_loop(sc); 1118 /* See comment in uhci_remove_hs_ctrl() */ 1119 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1120 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1121 delay(UHCI_QH_REMOVE_DELAY); 1122 } 1123 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1124 pqh->hlink = sqh->hlink; 1125 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1126 delay(UHCI_QH_REMOVE_DELAY); 1127 if (sc->sc_bulk_end == sqh) 1128 sc->sc_bulk_end = pqh; 1129 } 1130 1131 int uhci_intr1(uhci_softc_t *); 1132 1133 int 1134 uhci_intr(void *arg) 1135 { 1136 uhci_softc_t *sc = arg; 1137 1138 if (sc->sc_bus.dying) 1139 return (0); 1140 if (sc->sc_bus.use_polling) 1141 return (0); 1142 return (uhci_intr1(sc)); 1143 } 1144 1145 int 1146 uhci_intr1(uhci_softc_t *sc) 1147 { 1148 int status; 1149 int ack; 1150 1151 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1152 if (status == 0) /* The interrupt was not for us. */ 1153 return (0); 1154 if (status == 0xffffffff) { 1155 sc->sc_bus.dying = 1; 1156 return (0); 1157 } 1158 1159 #ifdef UHCI_DEBUG 1160 if (uhcidebug > 15) { 1161 DPRINTF(("%s: uhci_intr1\n", sc->sc_bus.bdev.dv_xname)); 1162 uhci_dumpregs(sc); 1163 } 1164 #endif 1165 1166 if (sc->sc_suspend != DVACT_RESUME) { 1167 printf("%s: interrupt while not operating ignored\n", 1168 sc->sc_bus.bdev.dv_xname); 1169 return (0); 1170 } 1171 1172 ack = 0; 1173 if (status & UHCI_STS_USBINT) 1174 ack |= UHCI_STS_USBINT; 1175 if (status & UHCI_STS_USBEI) 1176 ack |= UHCI_STS_USBEI; 1177 if (status & UHCI_STS_RD) { 1178 ack |= UHCI_STS_RD; 1179 #ifdef UHCI_DEBUG 1180 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 1181 #endif 1182 } 1183 if (status & UHCI_STS_HSE) { 1184 ack |= UHCI_STS_HSE; 1185 printf("%s: host system error\n", sc->sc_bus.bdev.dv_xname); 1186 } 1187 if (status & UHCI_STS_HCPE) { 1188 ack |= UHCI_STS_HCPE; 1189 printf("%s: host controller process error\n", 1190 sc->sc_bus.bdev.dv_xname); 1191 } 1192 if (status & UHCI_STS_HCH) { 1193 /* no acknowledge needed */ 1194 if (!sc->sc_bus.dying) { 1195 printf("%s: host controller halted\n", 1196 sc->sc_bus.bdev.dv_xname); 1197 #ifdef UHCI_DEBUG 1198 uhci_dump_all(sc); 1199 #endif 1200 } 1201 sc->sc_bus.dying = 1; 1202 } 1203 1204 if (!ack) 1205 return (0); /* nothing to acknowledge */ 1206 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1207 1208 sc->sc_bus.no_intrs++; 1209 usb_schedsoftintr(&sc->sc_bus); 1210 1211 DPRINTFN(15, ("%s: uhci_intr1: exit\n", sc->sc_bus.bdev.dv_xname)); 1212 1213 return (1); 1214 } 1215 1216 void 1217 uhci_softintr(void *v) 1218 { 1219 uhci_softc_t *sc = v; 1220 uhci_intr_info_t *ii, *nextii; 1221 1222 DPRINTFN(10,("%s: uhci_softintr (%d)\n", sc->sc_bus.bdev.dv_xname, 1223 sc->sc_bus.intr_context)); 1224 1225 if (sc->sc_bus.dying) 1226 return; 1227 1228 sc->sc_bus.intr_context++; 1229 1230 /* 1231 * Interrupts on UHCI really suck. When the host controller 1232 * interrupts because a transfer is completed there is no 1233 * way of knowing which transfer it was. You can scan down 1234 * the TDs and QHs of the previous frame to limit the search, 1235 * but that assumes that the interrupt was not delayed by more 1236 * than 1 ms, which may not always be true (e.g. after debug 1237 * output on a slow console). 1238 * We scan all interrupt descriptors to see if any have 1239 * completed. 1240 */ 1241 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1242 nextii = LIST_NEXT(ii, list); 1243 uhci_check_intr(sc, ii); 1244 } 1245 1246 if (sc->sc_softwake) { 1247 sc->sc_softwake = 0; 1248 wakeup(&sc->sc_softwake); 1249 } 1250 1251 sc->sc_bus.intr_context--; 1252 } 1253 1254 /* Check for an interrupt. */ 1255 void 1256 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1257 { 1258 uhci_soft_td_t *std, *lstd; 1259 u_int32_t status; 1260 1261 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1262 #ifdef DIAGNOSTIC 1263 if (ii == NULL) { 1264 printf("uhci_check_intr: no ii? %p\n", ii); 1265 return; 1266 } 1267 #endif 1268 if (ii->xfer->status == USBD_CANCELLED || 1269 ii->xfer->status == USBD_TIMEOUT) { 1270 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1271 return; 1272 } 1273 1274 if (ii->stdstart == NULL) 1275 return; 1276 lstd = ii->stdend; 1277 #ifdef DIAGNOSTIC 1278 if (lstd == NULL) { 1279 printf("uhci_check_intr: std==0\n"); 1280 return; 1281 } 1282 #endif 1283 /* 1284 * If the last TD is still active we need to check whether there 1285 * is an error somewhere in the middle, or whether there was a 1286 * short packet (SPD and not ACTIVE). 1287 */ 1288 if (letoh32(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1289 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1290 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1291 status = letoh32(std->td.td_status); 1292 /* If there's an active TD the xfer isn't done. */ 1293 if (status & UHCI_TD_ACTIVE) 1294 break; 1295 /* Any kind of error makes the xfer done. */ 1296 if (status & UHCI_TD_STALLED) 1297 goto done; 1298 /* We want short packets, and it is short: it's done */ 1299 if ((status & UHCI_TD_SPD) && 1300 UHCI_TD_GET_ACTLEN(status) < 1301 UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token))) 1302 goto done; 1303 } 1304 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1305 ii, ii->stdstart)); 1306 return; 1307 } 1308 done: 1309 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1310 timeout_del(&ii->xfer->timeout_handle); 1311 uhci_idone(ii); 1312 } 1313 1314 /* Called at splusb() */ 1315 void 1316 uhci_idone(uhci_intr_info_t *ii) 1317 { 1318 usbd_xfer_handle xfer = ii->xfer; 1319 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1320 uhci_soft_td_t *std; 1321 u_int32_t status = 0, nstatus; 1322 int actlen; 1323 1324 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1325 #ifdef DIAGNOSTIC 1326 { 1327 int s = splhigh(); 1328 if (ii->isdone) { 1329 splx(s); 1330 #ifdef UHCI_DEBUG 1331 printf("uhci_idone: ii is done!\n "); 1332 uhci_dump_ii(ii); 1333 #else 1334 printf("uhci_idone: ii=%p is done!\n", ii); 1335 #endif 1336 return; 1337 } 1338 ii->isdone = 1; 1339 splx(s); 1340 } 1341 #endif 1342 1343 if (xfer->nframes != 0) { 1344 /* Isoc transfer, do things differently. */ 1345 uhci_soft_td_t **stds = upipe->u.iso.stds; 1346 int i, n, nframes, len; 1347 1348 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1349 1350 nframes = xfer->nframes; 1351 actlen = 0; 1352 n = UXFER(xfer)->curframe; 1353 for (i = 0; i < nframes; i++) { 1354 std = stds[n]; 1355 #ifdef UHCI_DEBUG 1356 if (uhcidebug > 5) { 1357 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1358 uhci_dump_td(std); 1359 } 1360 #endif 1361 if (++n >= UHCI_VFRAMELIST_COUNT) 1362 n = 0; 1363 status = letoh32(std->td.td_status); 1364 len = UHCI_TD_GET_ACTLEN(status); 1365 xfer->frlengths[i] = len; 1366 actlen += len; 1367 } 1368 upipe->u.iso.inuse -= nframes; 1369 xfer->actlen = actlen; 1370 xfer->status = USBD_NORMAL_COMPLETION; 1371 goto end; 1372 } 1373 1374 #ifdef UHCI_DEBUG 1375 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1376 ii, xfer, upipe)); 1377 if (uhcidebug > 10) 1378 uhci_dump_tds(ii->stdstart); 1379 #endif 1380 1381 /* The transfer is done, compute actual length and status. */ 1382 actlen = 0; 1383 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1384 nstatus = letoh32(std->td.td_status); 1385 if (nstatus & UHCI_TD_ACTIVE) 1386 break; 1387 1388 status = nstatus; 1389 if (UHCI_TD_GET_PID(letoh32(std->td.td_token)) != 1390 UHCI_TD_PID_SETUP) 1391 actlen += UHCI_TD_GET_ACTLEN(status); 1392 else { 1393 /* 1394 * UHCI will report CRCTO in addition to a STALL or NAK 1395 * for a SETUP transaction. See section 3.2.2, "TD 1396 * CONTROL AND STATUS". 1397 */ 1398 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1399 status &= ~UHCI_TD_CRCTO; 1400 } 1401 } 1402 /* If there are left over TDs we need to update the toggle. */ 1403 if (std != NULL) 1404 upipe->nexttoggle = UHCI_TD_GET_DT(letoh32(std->td.td_token)); 1405 1406 status &= UHCI_TD_ERROR; 1407 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1408 actlen, status)); 1409 xfer->actlen = actlen; 1410 if (status != 0) { 1411 #ifdef UHCI_DEBUG 1412 char sbuf[128]; 1413 1414 bitmask_snprintf((u_int32_t)status, 1415 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1416 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1417 sbuf, sizeof(sbuf)); 1418 1419 DPRINTFN((status == UHCI_TD_STALLED)*10, 1420 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1421 "status 0x%s\n", 1422 xfer->pipe->device->address, 1423 xfer->pipe->endpoint->edesc->bEndpointAddress, 1424 sbuf)); 1425 #endif 1426 1427 if (status == UHCI_TD_STALLED) 1428 xfer->status = USBD_STALLED; 1429 else 1430 xfer->status = USBD_IOERROR; /* more info XXX */ 1431 } else { 1432 xfer->status = USBD_NORMAL_COMPLETION; 1433 } 1434 1435 end: 1436 usb_transfer_complete(xfer); 1437 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1438 } 1439 1440 /* 1441 * Called when a request does not complete. 1442 */ 1443 void 1444 uhci_timeout(void *addr) 1445 { 1446 uhci_intr_info_t *ii = addr; 1447 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1448 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1449 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1450 1451 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1452 1453 if (sc->sc_bus.dying) { 1454 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1455 return; 1456 } 1457 1458 /* Execute the abort in a process context. */ 1459 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer, 1460 USB_TASK_TYPE_ABORT); 1461 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task); 1462 } 1463 1464 void 1465 uhci_timeout_task(void *addr) 1466 { 1467 usbd_xfer_handle xfer = addr; 1468 int s; 1469 1470 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1471 1472 s = splusb(); 1473 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1474 splx(s); 1475 } 1476 1477 /* 1478 * Wait here until controller claims to have an interrupt. 1479 * Then call uhci_intr and return. Use timeout to avoid waiting 1480 * too long. 1481 * Only used during boot when interrupts are not enabled yet. 1482 */ 1483 void 1484 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1485 { 1486 int timo = xfer->timeout; 1487 uhci_intr_info_t *ii; 1488 1489 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1490 1491 xfer->status = USBD_IN_PROGRESS; 1492 for (; timo >= 0; timo--) { 1493 usb_delay_ms(&sc->sc_bus, 1); 1494 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1495 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) { 1496 uhci_intr1(sc); 1497 if (xfer->status != USBD_IN_PROGRESS) 1498 return; 1499 } 1500 } 1501 1502 /* Timeout */ 1503 DPRINTF(("uhci_waitintr: timeout\n")); 1504 for (ii = LIST_FIRST(&sc->sc_intrhead); 1505 ii != NULL && ii->xfer != xfer; 1506 ii = LIST_NEXT(ii, list)) 1507 ; 1508 #ifdef DIAGNOSTIC 1509 if (ii == NULL) 1510 panic("uhci_waitintr: lost intr_info"); 1511 #endif 1512 uhci_idone(ii); 1513 } 1514 1515 void 1516 uhci_poll(struct usbd_bus *bus) 1517 { 1518 uhci_softc_t *sc = (uhci_softc_t *)bus; 1519 1520 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) 1521 uhci_intr1(sc); 1522 } 1523 1524 void 1525 uhci_reset(uhci_softc_t *sc) 1526 { 1527 int n; 1528 1529 UHCICMD(sc, UHCI_CMD_HCRESET); 1530 /* The reset bit goes low when the controller is done. */ 1531 for (n = 0; n < UHCI_RESET_TIMEOUT && 1532 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1533 usb_delay_ms(&sc->sc_bus, 1); 1534 if (n >= UHCI_RESET_TIMEOUT) 1535 printf("%s: controller did not reset\n", 1536 sc->sc_bus.bdev.dv_xname); 1537 } 1538 1539 usbd_status 1540 uhci_run(uhci_softc_t *sc, int run) 1541 { 1542 int s, n, running; 1543 u_int16_t cmd; 1544 1545 run = run != 0; 1546 s = splhardusb(); 1547 DPRINTF(("uhci_run: setting run=%d\n", run)); 1548 cmd = UREAD2(sc, UHCI_CMD); 1549 if (run) 1550 cmd |= UHCI_CMD_RS; 1551 else 1552 cmd &= ~UHCI_CMD_RS; 1553 UHCICMD(sc, cmd); 1554 for(n = 0; n < 10; n++) { 1555 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1556 /* return when we've entered the state we want */ 1557 if (run == running) { 1558 splx(s); 1559 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1560 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1561 return (USBD_NORMAL_COMPLETION); 1562 } 1563 usb_delay_ms(&sc->sc_bus, 1); 1564 } 1565 splx(s); 1566 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname, 1567 run ? "start" : "stop"); 1568 return (USBD_IOERROR); 1569 } 1570 1571 /* 1572 * Memory management routines. 1573 * uhci_alloc_std allocates TDs 1574 * uhci_alloc_sqh allocates QHs 1575 * These two routines do their own free list management, 1576 * partly for speed, partly because allocating DMAable memory 1577 * has page size granularaity so much memory would be wasted if 1578 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1579 */ 1580 1581 uhci_soft_td_t * 1582 uhci_alloc_std(uhci_softc_t *sc) 1583 { 1584 uhci_soft_td_t *std; 1585 usbd_status err; 1586 int i, offs; 1587 usb_dma_t dma; 1588 1589 if (sc->sc_freetds == NULL) { 1590 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1591 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1592 UHCI_TD_ALIGN, &dma); 1593 if (err) 1594 return (0); 1595 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1596 offs = i * UHCI_STD_SIZE; 1597 std = KERNADDR(&dma, offs); 1598 std->physaddr = DMAADDR(&dma, offs); 1599 std->link.std = sc->sc_freetds; 1600 sc->sc_freetds = std; 1601 } 1602 } 1603 std = sc->sc_freetds; 1604 sc->sc_freetds = std->link.std; 1605 memset(&std->td, 0, sizeof(uhci_td_t)); 1606 return std; 1607 } 1608 1609 void 1610 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1611 { 1612 #ifdef DIAGNOSTIC 1613 #define TD_IS_FREE 0x12345678 1614 if (letoh32(std->td.td_token) == TD_IS_FREE) { 1615 printf("uhci_free_std: freeing free TD %p\n", std); 1616 return; 1617 } 1618 std->td.td_token = htole32(TD_IS_FREE); 1619 #endif 1620 std->link.std = sc->sc_freetds; 1621 sc->sc_freetds = std; 1622 } 1623 1624 uhci_soft_qh_t * 1625 uhci_alloc_sqh(uhci_softc_t *sc) 1626 { 1627 uhci_soft_qh_t *sqh; 1628 usbd_status err; 1629 int i, offs; 1630 usb_dma_t dma; 1631 1632 if (sc->sc_freeqhs == NULL) { 1633 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1634 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1635 UHCI_QH_ALIGN, &dma); 1636 if (err) 1637 return (0); 1638 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1639 offs = i * UHCI_SQH_SIZE; 1640 sqh = KERNADDR(&dma, offs); 1641 sqh->physaddr = DMAADDR(&dma, offs); 1642 sqh->hlink = sc->sc_freeqhs; 1643 sc->sc_freeqhs = sqh; 1644 } 1645 } 1646 sqh = sc->sc_freeqhs; 1647 sc->sc_freeqhs = sqh->hlink; 1648 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1649 return (sqh); 1650 } 1651 1652 void 1653 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1654 { 1655 sqh->hlink = sc->sc_freeqhs; 1656 sc->sc_freeqhs = sqh; 1657 } 1658 1659 void 1660 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1661 uhci_soft_td_t *stdend) 1662 { 1663 uhci_soft_td_t *p; 1664 1665 for (; std != stdend; std = p) { 1666 p = std->link.std; 1667 uhci_free_std(sc, std); 1668 } 1669 } 1670 1671 usbd_status 1672 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, u_int len, 1673 int rd, u_int16_t flags, usb_dma_t *dma, 1674 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1675 { 1676 uhci_soft_td_t *p, *lastp; 1677 uhci_physaddr_t lastlink; 1678 int i, ntd, l, tog, maxp; 1679 u_int32_t status; 1680 int addr = upipe->pipe.device->address; 1681 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1682 1683 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%u speed=%d " 1684 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1685 upipe->pipe.device->speed, flags)); 1686 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1687 if (maxp == 0) { 1688 printf("uhci_alloc_std_chain: maxp=0\n"); 1689 return (USBD_INVAL); 1690 } 1691 ntd = (len + maxp - 1) / maxp; 1692 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1693 ntd++; 1694 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1695 if (ntd == 0) { 1696 *sp = *ep = 0; 1697 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1698 return (USBD_NORMAL_COMPLETION); 1699 } 1700 tog = upipe->nexttoggle; 1701 if (ntd % 2 == 0) 1702 tog ^= 1; 1703 upipe->nexttoggle = tog ^ 1; 1704 lastp = NULL; 1705 lastlink = UHCI_PTR_T; 1706 ntd--; 1707 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1708 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1709 status |= UHCI_TD_LS; 1710 if (flags & USBD_SHORT_XFER_OK) 1711 status |= UHCI_TD_SPD; 1712 for (i = ntd; i >= 0; i--) { 1713 p = uhci_alloc_std(sc); 1714 if (p == NULL) { 1715 uhci_free_std_chain(sc, lastp, NULL); 1716 return (USBD_NOMEM); 1717 } 1718 p->link.std = lastp; 1719 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1720 lastp = p; 1721 lastlink = p->physaddr; 1722 p->td.td_status = htole32(status); 1723 if (i == ntd) { 1724 /* last TD */ 1725 l = len % maxp; 1726 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1727 l = maxp; 1728 *ep = p; 1729 } else 1730 l = maxp; 1731 p->td.td_token = 1732 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1733 UHCI_TD_OUT(l, endpt, addr, tog)); 1734 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1735 tog ^= 1; 1736 } 1737 *sp = lastp; 1738 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1739 upipe->nexttoggle)); 1740 return (USBD_NORMAL_COMPLETION); 1741 } 1742 1743 void 1744 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1745 { 1746 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1747 upipe->nexttoggle = 0; 1748 } 1749 1750 void 1751 uhci_noop(usbd_pipe_handle pipe) 1752 { 1753 } 1754 1755 usbd_status 1756 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1757 { 1758 usbd_status err; 1759 1760 /* Insert last in queue. */ 1761 err = usb_insert_transfer(xfer); 1762 if (err) 1763 return (err); 1764 1765 /* 1766 * Pipe isn't running (otherwise err would be USBD_INPROG), 1767 * so start it first. 1768 */ 1769 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1770 } 1771 1772 usbd_status 1773 uhci_device_bulk_start(usbd_xfer_handle xfer) 1774 { 1775 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1776 usbd_device_handle dev = upipe->pipe.device; 1777 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1778 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1779 uhci_soft_td_t *data, *dataend; 1780 uhci_soft_qh_t *sqh; 1781 usbd_status err; 1782 u_int len; 1783 int isread, endpt; 1784 int s; 1785 1786 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%u flags=%d ii=%p\n", 1787 xfer, xfer->length, xfer->flags, ii)); 1788 1789 if (sc->sc_bus.dying) 1790 return (USBD_IOERROR); 1791 1792 #ifdef DIAGNOSTIC 1793 if (xfer->rqflags & URQ_REQUEST) 1794 panic("uhci_device_bulk_start: a request"); 1795 #endif 1796 1797 len = xfer->length; 1798 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1799 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1800 sqh = upipe->u.bulk.sqh; 1801 1802 upipe->u.bulk.isread = isread; 1803 upipe->u.bulk.length = len; 1804 1805 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 1806 &xfer->dmabuf, &data, &dataend); 1807 if (err) 1808 return (err); 1809 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1810 1811 #ifdef UHCI_DEBUG 1812 if (uhcidebug > 8) { 1813 DPRINTF(("uhci_device_bulk_start: data(1)\n")); 1814 uhci_dump_tds(data); 1815 } 1816 #endif 1817 1818 /* Set up interrupt info. */ 1819 ii->xfer = xfer; 1820 ii->stdstart = data; 1821 ii->stdend = dataend; 1822 #ifdef DIAGNOSTIC 1823 if (!ii->isdone) { 1824 printf("uhci_device_bulk_start: not done, ii=%p\n", ii); 1825 } 1826 ii->isdone = 0; 1827 #endif 1828 1829 sqh->elink = data; 1830 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1831 1832 s = splusb(); 1833 uhci_add_bulk(sc, sqh); 1834 uhci_add_intr_info(sc, ii); 1835 1836 if (xfer->timeout && !sc->sc_bus.use_polling) { 1837 timeout_del(&xfer->timeout_handle); 1838 timeout_set(&xfer->timeout_handle, uhci_timeout, ii); 1839 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 1840 } 1841 xfer->status = USBD_IN_PROGRESS; 1842 splx(s); 1843 1844 #ifdef UHCI_DEBUG 1845 if (uhcidebug > 10) { 1846 DPRINTF(("uhci_device_bulk_start: data(2)\n")); 1847 uhci_dump_tds(data); 1848 } 1849 #endif 1850 1851 if (sc->sc_bus.use_polling) 1852 uhci_waitintr(sc, xfer); 1853 1854 return (USBD_IN_PROGRESS); 1855 } 1856 1857 /* Abort a device bulk request. */ 1858 void 1859 uhci_device_bulk_abort(usbd_xfer_handle xfer) 1860 { 1861 DPRINTF(("uhci_device_bulk_abort:\n")); 1862 uhci_abort_xfer(xfer, USBD_CANCELLED); 1863 } 1864 1865 /* 1866 * Abort a device request. 1867 * If this routine is called at splusb() it guarantees that the request 1868 * will be removed from the hardware scheduling and that the callback 1869 * for it will be called with USBD_CANCELLED status. 1870 * It's impossible to guarantee that the requested transfer will not 1871 * have happened since the hardware runs concurrently. 1872 * If the transaction has already happened we rely on the ordinary 1873 * interrupt processing to process it. 1874 */ 1875 void 1876 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1877 { 1878 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1879 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1880 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1881 uhci_soft_td_t *std; 1882 int s; 1883 1884 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 1885 1886 if (sc->sc_bus.dying) { 1887 /* If we're dying, just do the software part. */ 1888 s = splusb(); 1889 xfer->status = status; /* make software ignore it */ 1890 timeout_del(&xfer->timeout_handle); 1891 usb_transfer_complete(xfer); 1892 splx(s); 1893 return; 1894 } 1895 1896 if (xfer->device->bus->intr_context || !curproc) 1897 panic("uhci_abort_xfer: not in process context"); 1898 1899 /* 1900 * Step 1: Make interrupt routine and hardware ignore xfer. 1901 */ 1902 s = splusb(); 1903 xfer->status = status; /* make software ignore it */ 1904 timeout_del(&xfer->timeout_handle); 1905 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 1906 for (std = ii->stdstart; std != NULL; std = std->link.std) 1907 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1908 splx(s); 1909 1910 /* 1911 * Step 2: Wait until we know hardware has finished any possible 1912 * use of the xfer. Also make sure the soft interrupt routine 1913 * has run. 1914 */ 1915 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 1916 s = splusb(); 1917 sc->sc_softwake = 1; 1918 usb_schedsoftintr(&sc->sc_bus); 1919 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 1920 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 1921 splx(s); 1922 1923 /* 1924 * Step 3: Execute callback. 1925 */ 1926 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 1927 s = splusb(); 1928 #ifdef DIAGNOSTIC 1929 ii->isdone = 1; 1930 #endif 1931 usb_transfer_complete(xfer); 1932 splx(s); 1933 } 1934 1935 /* Close a device bulk pipe. */ 1936 void 1937 uhci_device_bulk_close(usbd_pipe_handle pipe) 1938 { 1939 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1940 usbd_device_handle dev = upipe->pipe.device; 1941 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1942 1943 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1944 pipe->endpoint->savedtoggle = upipe->nexttoggle; 1945 } 1946 1947 usbd_status 1948 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 1949 { 1950 usbd_status err; 1951 1952 /* Insert last in queue. */ 1953 err = usb_insert_transfer(xfer); 1954 if (err) 1955 return (err); 1956 1957 /* 1958 * Pipe isn't running (otherwise err would be USBD_INPROG), 1959 * so start it first. 1960 */ 1961 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1962 } 1963 1964 usbd_status 1965 uhci_device_ctrl_start(usbd_xfer_handle xfer) 1966 { 1967 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 1968 usbd_status err; 1969 1970 if (sc->sc_bus.dying) 1971 return (USBD_IOERROR); 1972 1973 #ifdef DIAGNOSTIC 1974 if (!(xfer->rqflags & URQ_REQUEST)) 1975 panic("uhci_device_ctrl_transfer: not a request"); 1976 #endif 1977 1978 err = uhci_device_request(xfer); 1979 if (err) 1980 return (err); 1981 1982 if (sc->sc_bus.use_polling) 1983 uhci_waitintr(sc, xfer); 1984 return (USBD_IN_PROGRESS); 1985 } 1986 1987 usbd_status 1988 uhci_device_intr_transfer(usbd_xfer_handle xfer) 1989 { 1990 usbd_status err; 1991 1992 /* Insert last in queue. */ 1993 err = usb_insert_transfer(xfer); 1994 if (err) 1995 return (err); 1996 1997 /* 1998 * Pipe isn't running (otherwise err would be USBD_INPROG), 1999 * so start it first. 2000 */ 2001 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2002 } 2003 2004 usbd_status 2005 uhci_device_intr_start(usbd_xfer_handle xfer) 2006 { 2007 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2008 usbd_device_handle dev = upipe->pipe.device; 2009 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2010 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2011 uhci_soft_td_t *data, *dataend; 2012 uhci_soft_qh_t *sqh; 2013 usbd_status err; 2014 int isread, endpt; 2015 int i, s; 2016 2017 if (sc->sc_bus.dying) 2018 return (USBD_IOERROR); 2019 2020 DPRINTFN(3,("uhci_device_intr_start: xfer=%p len=%u flags=%d\n", 2021 xfer, xfer->length, xfer->flags)); 2022 2023 #ifdef DIAGNOSTIC 2024 if (xfer->rqflags & URQ_REQUEST) 2025 panic("uhci_device_intr_start: a request"); 2026 #endif 2027 2028 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2029 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2030 2031 upipe->u.intr.isread = isread; 2032 2033 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2034 xfer->flags, &xfer->dmabuf, &data, 2035 &dataend); 2036 2037 if (err) 2038 return (err); 2039 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2040 2041 #ifdef UHCI_DEBUG 2042 if (uhcidebug > 10) { 2043 DPRINTF(("uhci_device_intr_start: data(1)\n")); 2044 uhci_dump_tds(data); 2045 uhci_dump_qh(upipe->u.intr.qhs[0]); 2046 } 2047 #endif 2048 2049 s = splusb(); 2050 /* Set up interrupt info. */ 2051 ii->xfer = xfer; 2052 ii->stdstart = data; 2053 ii->stdend = dataend; 2054 #ifdef DIAGNOSTIC 2055 if (!ii->isdone) { 2056 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2057 } 2058 ii->isdone = 0; 2059 #endif 2060 2061 DPRINTFN(10,("uhci_device_intr_start: qhs[0]=%p\n", 2062 upipe->u.intr.qhs[0])); 2063 for (i = 0; i < upipe->u.intr.npoll; i++) { 2064 sqh = upipe->u.intr.qhs[i]; 2065 sqh->elink = data; 2066 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2067 } 2068 uhci_add_intr_info(sc, ii); 2069 xfer->status = USBD_IN_PROGRESS; 2070 splx(s); 2071 2072 #ifdef UHCI_DEBUG 2073 if (uhcidebug > 10) { 2074 DPRINTF(("uhci_device_intr_start: data(2)\n")); 2075 uhci_dump_tds(data); 2076 uhci_dump_qh(upipe->u.intr.qhs[0]); 2077 } 2078 #endif 2079 2080 return (USBD_IN_PROGRESS); 2081 } 2082 2083 /* Abort a device control request. */ 2084 void 2085 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2086 { 2087 DPRINTF(("uhci_device_ctrl_abort:\n")); 2088 uhci_abort_xfer(xfer, USBD_CANCELLED); 2089 } 2090 2091 /* Close a device control pipe. */ 2092 void 2093 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2094 { 2095 } 2096 2097 /* Abort a device interrupt request. */ 2098 void 2099 uhci_device_intr_abort(usbd_xfer_handle xfer) 2100 { 2101 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2102 if (xfer->pipe->intrxfer == xfer) { 2103 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2104 xfer->pipe->intrxfer = NULL; 2105 } 2106 uhci_abort_xfer(xfer, USBD_CANCELLED); 2107 } 2108 2109 /* Close a device interrupt pipe. */ 2110 void 2111 uhci_device_intr_close(usbd_pipe_handle pipe) 2112 { 2113 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2114 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2115 int i, npoll; 2116 int s; 2117 2118 /* Unlink descriptors from controller data structures. */ 2119 npoll = upipe->u.intr.npoll; 2120 s = splusb(); 2121 for (i = 0; i < npoll; i++) 2122 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2123 splx(s); 2124 2125 /* 2126 * We now have to wait for any activity on the physical 2127 * descriptors to stop. 2128 */ 2129 usb_delay_ms(&sc->sc_bus, 2); 2130 2131 for(i = 0; i < npoll; i++) 2132 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2133 free(upipe->u.intr.qhs, M_USBHC); 2134 2135 /* XXX free other resources */ 2136 } 2137 2138 usbd_status 2139 uhci_device_request(usbd_xfer_handle xfer) 2140 { 2141 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2142 usb_device_request_t *req = &xfer->request; 2143 usbd_device_handle dev = upipe->pipe.device; 2144 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2145 int addr = dev->address; 2146 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2147 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2148 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2149 uhci_soft_qh_t *sqh; 2150 u_int len; 2151 u_int32_t ls; 2152 usbd_status err; 2153 int isread; 2154 int s; 2155 2156 DPRINTFN(3,("uhci_device_request type=0x%02x, request=0x%02x, " 2157 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n", 2158 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2159 UGETW(req->wIndex), UGETW(req->wLength), 2160 addr, endpt)); 2161 2162 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2163 isread = req->bmRequestType & UT_READ; 2164 len = UGETW(req->wLength); 2165 2166 setup = upipe->u.ctl.setup; 2167 stat = upipe->u.ctl.stat; 2168 sqh = upipe->u.ctl.sqh; 2169 2170 /* Set up data transaction */ 2171 if (len != 0) { 2172 upipe->nexttoggle = 1; 2173 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2174 &xfer->dmabuf, &data, &dataend); 2175 if (err) 2176 return (err); 2177 next = data; 2178 dataend->link.std = stat; 2179 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2180 } else { 2181 next = stat; 2182 } 2183 upipe->u.ctl.length = len; 2184 2185 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2186 2187 setup->link.std = next; 2188 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2189 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2190 UHCI_TD_ACTIVE); 2191 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2192 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2193 2194 stat->link.std = NULL; 2195 stat->td.td_link = htole32(UHCI_PTR_T); 2196 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2197 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2198 stat->td.td_token = 2199 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2200 UHCI_TD_IN (0, endpt, addr, 1)); 2201 stat->td.td_buffer = htole32(0); 2202 2203 #ifdef UHCI_DEBUG 2204 if (uhcidebug > 10) { 2205 DPRINTF(("uhci_device_request: before transfer\n")); 2206 uhci_dump_tds(setup); 2207 } 2208 #endif 2209 2210 /* Set up interrupt info. */ 2211 ii->xfer = xfer; 2212 ii->stdstart = setup; 2213 ii->stdend = stat; 2214 #ifdef DIAGNOSTIC 2215 if (!ii->isdone) { 2216 printf("uhci_device_request: not done, ii=%p\n", ii); 2217 } 2218 ii->isdone = 0; 2219 #endif 2220 2221 sqh->elink = setup; 2222 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2223 2224 s = splusb(); 2225 if (dev->speed == USB_SPEED_LOW) 2226 uhci_add_ls_ctrl(sc, sqh); 2227 else 2228 uhci_add_hs_ctrl(sc, sqh); 2229 uhci_add_intr_info(sc, ii); 2230 #ifdef UHCI_DEBUG 2231 if (uhcidebug > 12) { 2232 uhci_soft_td_t *std; 2233 uhci_soft_qh_t *xqh; 2234 uhci_soft_qh_t *sxqh; 2235 int maxqh = 0; 2236 uhci_physaddr_t link; 2237 DPRINTF(("uhci_device_request: follow from [0]\n")); 2238 for (std = sc->sc_vframes[0].htd, link = 0; 2239 (link & UHCI_PTR_QH) == 0; 2240 std = std->link.std) { 2241 link = letoh32(std->td.td_link); 2242 uhci_dump_td(std); 2243 } 2244 sxqh = (uhci_soft_qh_t *)std; 2245 uhci_dump_qh(sxqh); 2246 for (xqh = sxqh; 2247 xqh != NULL; 2248 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2249 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2250 uhci_dump_qh(xqh); 2251 } 2252 DPRINTF(("Enqueued QH:\n")); 2253 uhci_dump_qh(sqh); 2254 uhci_dump_tds(sqh->elink); 2255 } 2256 #endif 2257 if (xfer->timeout && !sc->sc_bus.use_polling) { 2258 timeout_del(&xfer->timeout_handle); 2259 timeout_set(&xfer->timeout_handle, uhci_timeout, ii); 2260 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 2261 } 2262 xfer->status = USBD_IN_PROGRESS; 2263 splx(s); 2264 2265 return (USBD_NORMAL_COMPLETION); 2266 } 2267 2268 usbd_status 2269 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2270 { 2271 usbd_status err; 2272 2273 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2274 2275 /* Put it on our queue, */ 2276 err = usb_insert_transfer(xfer); 2277 2278 /* bail out on error, */ 2279 if (err && err != USBD_IN_PROGRESS) 2280 return (err); 2281 2282 /* XXX should check inuse here */ 2283 2284 /* insert into schedule, */ 2285 uhci_device_isoc_enter(xfer); 2286 2287 /* and start if the pipe wasn't running */ 2288 if (!err) 2289 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2290 2291 return (err); 2292 } 2293 2294 void 2295 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2296 { 2297 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2298 usbd_device_handle dev = upipe->pipe.device; 2299 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2300 struct iso *iso = &upipe->u.iso; 2301 uhci_soft_td_t *std; 2302 u_int32_t buf, len, status; 2303 int s, i, next, nframes; 2304 2305 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2306 "nframes=%d\n", 2307 iso->inuse, iso->next, xfer, xfer->nframes)); 2308 2309 if (sc->sc_bus.dying) 2310 return; 2311 2312 if (xfer->status == USBD_IN_PROGRESS) { 2313 /* This request has already been entered into the frame list */ 2314 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2315 /* XXX */ 2316 } 2317 2318 #ifdef DIAGNOSTIC 2319 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2320 printf("uhci_device_isoc_enter: overflow!\n"); 2321 #endif 2322 2323 next = iso->next; 2324 if (next == -1) { 2325 /* Not in use yet, schedule it a few frames ahead. */ 2326 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2327 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2328 } 2329 2330 xfer->status = USBD_IN_PROGRESS; 2331 UXFER(xfer)->curframe = next; 2332 2333 buf = DMAADDR(&xfer->dmabuf, 0); 2334 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2335 UHCI_TD_ACTIVE | 2336 UHCI_TD_IOS); 2337 nframes = xfer->nframes; 2338 s = splusb(); 2339 for (i = 0; i < nframes; i++) { 2340 std = iso->stds[next]; 2341 if (++next >= UHCI_VFRAMELIST_COUNT) 2342 next = 0; 2343 len = xfer->frlengths[i]; 2344 std->td.td_buffer = htole32(buf); 2345 if (i == nframes - 1) 2346 status |= UHCI_TD_IOC; 2347 std->td.td_status = htole32(status); 2348 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2349 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2350 #ifdef UHCI_DEBUG 2351 if (uhcidebug > 5) { 2352 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2353 uhci_dump_td(std); 2354 } 2355 #endif 2356 buf += len; 2357 } 2358 iso->next = next; 2359 iso->inuse += xfer->nframes; 2360 2361 splx(s); 2362 } 2363 2364 usbd_status 2365 uhci_device_isoc_start(usbd_xfer_handle xfer) 2366 { 2367 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2368 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2369 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2370 uhci_soft_td_t *end; 2371 int s, i; 2372 2373 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2374 2375 if (sc->sc_bus.dying) 2376 return (USBD_IOERROR); 2377 2378 #ifdef DIAGNOSTIC 2379 if (xfer->status != USBD_IN_PROGRESS) 2380 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2381 #endif 2382 2383 /* Find the last TD */ 2384 i = UXFER(xfer)->curframe + xfer->nframes; 2385 if (i >= UHCI_VFRAMELIST_COUNT) 2386 i -= UHCI_VFRAMELIST_COUNT; 2387 end = upipe->u.iso.stds[i]; 2388 2389 #ifdef DIAGNOSTIC 2390 if (end == NULL) { 2391 printf("uhci_device_isoc_start: end == NULL\n"); 2392 return (USBD_INVAL); 2393 } 2394 #endif 2395 2396 s = splusb(); 2397 2398 /* Set up interrupt info. */ 2399 ii->xfer = xfer; 2400 ii->stdstart = end; 2401 ii->stdend = end; 2402 #ifdef DIAGNOSTIC 2403 if (!ii->isdone) 2404 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2405 ii->isdone = 0; 2406 #endif 2407 uhci_add_intr_info(sc, ii); 2408 2409 splx(s); 2410 2411 return (USBD_IN_PROGRESS); 2412 } 2413 2414 void 2415 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2416 { 2417 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2418 uhci_soft_td_t **stds = upipe->u.iso.stds; 2419 uhci_soft_td_t *std; 2420 int i, n, s, nframes, maxlen, len; 2421 2422 s = splusb(); 2423 2424 /* Transfer is already done. */ 2425 if (xfer->status != USBD_NOT_STARTED && 2426 xfer->status != USBD_IN_PROGRESS) { 2427 splx(s); 2428 return; 2429 } 2430 2431 /* Give xfer the requested abort code. */ 2432 xfer->status = USBD_CANCELLED; 2433 2434 /* make hardware ignore it, */ 2435 nframes = xfer->nframes; 2436 n = UXFER(xfer)->curframe; 2437 maxlen = 0; 2438 for (i = 0; i < nframes; i++) { 2439 std = stds[n]; 2440 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2441 len = UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token)); 2442 if (len > maxlen) 2443 maxlen = len; 2444 if (++n >= UHCI_VFRAMELIST_COUNT) 2445 n = 0; 2446 } 2447 2448 /* and wait until we are sure the hardware has finished. */ 2449 delay(maxlen); 2450 2451 #ifdef DIAGNOSTIC 2452 UXFER(xfer)->iinfo.isdone = 1; 2453 #endif 2454 /* Run callback and remove from interrupt list. */ 2455 usb_transfer_complete(xfer); 2456 2457 splx(s); 2458 } 2459 2460 void 2461 uhci_device_isoc_close(usbd_pipe_handle pipe) 2462 { 2463 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2464 usbd_device_handle dev = upipe->pipe.device; 2465 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2466 uhci_soft_td_t *std, *vstd; 2467 struct iso *iso; 2468 int i, s; 2469 2470 /* 2471 * Make sure all TDs are marked as inactive. 2472 * Wait for completion. 2473 * Unschedule. 2474 * Deallocate. 2475 */ 2476 iso = &upipe->u.iso; 2477 2478 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2479 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2480 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2481 2482 s = splusb(); 2483 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2484 std = iso->stds[i]; 2485 for (vstd = sc->sc_vframes[i].htd; 2486 vstd != NULL && vstd->link.std != std; 2487 vstd = vstd->link.std) 2488 ; 2489 if (vstd == NULL) { 2490 /*panic*/ 2491 printf("uhci_device_isoc_close: %p not found\n", std); 2492 splx(s); 2493 return; 2494 } 2495 vstd->link = std->link; 2496 vstd->td.td_link = std->td.td_link; 2497 uhci_free_std(sc, std); 2498 } 2499 splx(s); 2500 2501 free(iso->stds, M_USBHC); 2502 } 2503 2504 usbd_status 2505 uhci_setup_isoc(usbd_pipe_handle pipe) 2506 { 2507 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2508 usbd_device_handle dev = upipe->pipe.device; 2509 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2510 int addr = upipe->pipe.device->address; 2511 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2512 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2513 uhci_soft_td_t *std, *vstd; 2514 u_int32_t token; 2515 struct iso *iso; 2516 int i, s; 2517 2518 iso = &upipe->u.iso; 2519 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2520 M_USBHC, M_WAITOK); 2521 2522 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2523 UHCI_TD_OUT(0, endpt, addr, 0); 2524 2525 /* Allocate the TDs and mark as inactive; */ 2526 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2527 std = uhci_alloc_std(sc); 2528 if (std == 0) 2529 goto bad; 2530 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2531 std->td.td_token = htole32(token); 2532 iso->stds[i] = std; 2533 } 2534 2535 /* Insert TDs into schedule. */ 2536 s = splusb(); 2537 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2538 std = iso->stds[i]; 2539 vstd = sc->sc_vframes[i].htd; 2540 std->link = vstd->link; 2541 std->td.td_link = vstd->td.td_link; 2542 vstd->link.std = std; 2543 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2544 } 2545 splx(s); 2546 2547 iso->next = -1; 2548 iso->inuse = 0; 2549 2550 return (USBD_NORMAL_COMPLETION); 2551 2552 bad: 2553 while (--i >= 0) 2554 uhci_free_std(sc, iso->stds[i]); 2555 free(iso->stds, M_USBHC); 2556 return (USBD_NOMEM); 2557 } 2558 2559 void 2560 uhci_device_isoc_done(usbd_xfer_handle xfer) 2561 { 2562 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2563 2564 DPRINTFN(4, ("uhci_device_isoc_done: length=%d\n", xfer->actlen)); 2565 2566 if (ii->xfer != xfer) 2567 /* Not on interrupt list, ignore it. */ 2568 return; 2569 2570 if (!uhci_active_intr_info(ii)) 2571 return; 2572 2573 #ifdef DIAGNOSTIC 2574 if (xfer->busy_free == XFER_FREE) { 2575 printf("uhci_device_isoc_done: xfer=%p is free\n", xfer); 2576 return; 2577 } 2578 2579 if (ii->stdend == NULL) { 2580 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2581 #ifdef UHCI_DEBUG 2582 uhci_dump_ii(ii); 2583 #endif 2584 return; 2585 } 2586 #endif 2587 2588 /* Turn off the interrupt since it is active even if the TD is not. */ 2589 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2590 2591 uhci_del_intr_info(ii); /* remove from active list */ 2592 } 2593 2594 void 2595 uhci_device_intr_done(usbd_xfer_handle xfer) 2596 { 2597 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2598 uhci_softc_t *sc = ii->sc; 2599 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2600 uhci_soft_qh_t *sqh; 2601 int i, npoll; 2602 2603 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2604 2605 npoll = upipe->u.intr.npoll; 2606 for(i = 0; i < npoll; i++) { 2607 sqh = upipe->u.intr.qhs[i]; 2608 sqh->elink = NULL; 2609 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2610 } 2611 uhci_free_std_chain(sc, ii->stdstart, NULL); 2612 2613 /* XXX Wasteful. */ 2614 if (xfer->pipe->repeat) { 2615 uhci_soft_td_t *data, *dataend; 2616 2617 DPRINTFN(5,("uhci_device_intr_done: requeuing\n")); 2618 2619 /* This alloc cannot fail since we freed the chain above. */ 2620 uhci_alloc_std_chain(upipe, sc, xfer->length, 2621 upipe->u.intr.isread, xfer->flags, 2622 &xfer->dmabuf, &data, &dataend); 2623 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2624 2625 #ifdef UHCI_DEBUG 2626 if (uhcidebug > 10) { 2627 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2628 uhci_dump_tds(data); 2629 uhci_dump_qh(upipe->u.intr.qhs[0]); 2630 } 2631 #endif 2632 2633 ii->stdstart = data; 2634 ii->stdend = dataend; 2635 #ifdef DIAGNOSTIC 2636 if (!ii->isdone) { 2637 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 2638 } 2639 ii->isdone = 0; 2640 #endif 2641 for (i = 0; i < npoll; i++) { 2642 sqh = upipe->u.intr.qhs[i]; 2643 sqh->elink = data; 2644 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2645 } 2646 xfer->status = USBD_IN_PROGRESS; 2647 /* The ii is already on the examined list, just leave it. */ 2648 } else { 2649 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 2650 if (uhci_active_intr_info(ii)) 2651 uhci_del_intr_info(ii); 2652 } 2653 } 2654 2655 /* Deallocate request data structures */ 2656 void 2657 uhci_device_ctrl_done(usbd_xfer_handle xfer) 2658 { 2659 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2660 uhci_softc_t *sc = ii->sc; 2661 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2662 2663 #ifdef DIAGNOSTIC 2664 if (!(xfer->rqflags & URQ_REQUEST)) 2665 panic("uhci_device_ctrl_done: not a request"); 2666 #endif 2667 2668 if (!uhci_active_intr_info(ii)) 2669 return; 2670 2671 uhci_del_intr_info(ii); /* remove from active list */ 2672 2673 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2674 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 2675 else 2676 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 2677 2678 if (upipe->u.ctl.length != 0) 2679 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2680 2681 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 2682 } 2683 2684 /* Deallocate request data structures */ 2685 void 2686 uhci_device_bulk_done(usbd_xfer_handle xfer) 2687 { 2688 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2689 uhci_softc_t *sc = ii->sc; 2690 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2691 2692 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 2693 xfer, ii, sc, upipe)); 2694 2695 if (!uhci_active_intr_info(ii)) 2696 return; 2697 2698 uhci_del_intr_info(ii); /* remove from active list */ 2699 2700 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2701 2702 uhci_free_std_chain(sc, ii->stdstart, NULL); 2703 2704 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 2705 } 2706 2707 /* Add interrupt QH, called with vflock. */ 2708 void 2709 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2710 { 2711 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2712 uhci_soft_qh_t *eqh; 2713 2714 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2715 2716 eqh = vf->eqh; 2717 sqh->hlink = eqh->hlink; 2718 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2719 eqh->hlink = sqh; 2720 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 2721 vf->eqh = sqh; 2722 vf->bandwidth++; 2723 } 2724 2725 /* Remove interrupt QH. */ 2726 void 2727 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2728 { 2729 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2730 uhci_soft_qh_t *pqh; 2731 2732 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2733 2734 /* See comment in uhci_remove_ctrl() */ 2735 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 2736 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2737 delay(UHCI_QH_REMOVE_DELAY); 2738 } 2739 2740 pqh = uhci_find_prev_qh(vf->hqh, sqh); 2741 pqh->hlink = sqh->hlink; 2742 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2743 delay(UHCI_QH_REMOVE_DELAY); 2744 if (vf->eqh == sqh) 2745 vf->eqh = pqh; 2746 vf->bandwidth--; 2747 } 2748 2749 usbd_status 2750 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 2751 { 2752 uhci_soft_qh_t *sqh, **qhs; 2753 int i, npoll, s; 2754 u_int bestbw, bw, bestoffs, offs; 2755 2756 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 2757 if (ival == 0) { 2758 printf("uhci_device_setintr: 0 interval\n"); 2759 return (USBD_INVAL); 2760 } 2761 2762 if (ival > UHCI_VFRAMELIST_COUNT) 2763 ival = UHCI_VFRAMELIST_COUNT; 2764 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2765 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 2766 2767 qhs = malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_NOWAIT); 2768 if (qhs == NULL) 2769 return (USBD_NOMEM); 2770 2771 /* 2772 * Figure out which offset in the schedule that has most 2773 * bandwidth left over. 2774 */ 2775 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2776 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2777 for (bw = i = 0; i < npoll; i++) 2778 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2779 if (bw < bestbw) { 2780 bestbw = bw; 2781 bestoffs = offs; 2782 } 2783 } 2784 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2785 2786 for(i = 0; i < npoll; i++) { 2787 sqh = uhci_alloc_sqh(sc); 2788 if (sqh == NULL) { 2789 while (i > 0) 2790 uhci_free_sqh(sc, qhs[--i]); 2791 free(qhs, M_USBHC); 2792 return (USBD_NOMEM); 2793 } 2794 sqh->elink = NULL; 2795 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2796 sqh->pos = MOD(i * ival + bestoffs); 2797 qhs[i] = sqh; 2798 } 2799 #undef MOD 2800 2801 upipe->u.intr.npoll = npoll; 2802 upipe->u.intr.qhs = qhs; 2803 2804 s = splusb(); 2805 /* Enter QHs into the controller data structures. */ 2806 for(i = 0; i < npoll; i++) 2807 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 2808 splx(s); 2809 2810 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 2811 return (USBD_NORMAL_COMPLETION); 2812 } 2813 2814 /* Open a new pipe. */ 2815 usbd_status 2816 uhci_open(usbd_pipe_handle pipe) 2817 { 2818 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2819 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2820 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2821 usbd_status err; 2822 int ival; 2823 2824 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2825 pipe, pipe->device->address, 2826 ed->bEndpointAddress, sc->sc_addr)); 2827 2828 upipe->aborting = 0; 2829 upipe->nexttoggle = pipe->endpoint->savedtoggle; 2830 2831 if (pipe->device->address == sc->sc_addr) { 2832 switch (ed->bEndpointAddress) { 2833 case USB_CONTROL_ENDPOINT: 2834 pipe->methods = &uhci_root_ctrl_methods; 2835 break; 2836 case UE_DIR_IN | UHCI_INTR_ENDPT: 2837 pipe->methods = &uhci_root_intr_methods; 2838 break; 2839 default: 2840 return (USBD_INVAL); 2841 } 2842 } else { 2843 switch (ed->bmAttributes & UE_XFERTYPE) { 2844 case UE_CONTROL: 2845 pipe->methods = &uhci_device_ctrl_methods; 2846 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2847 if (upipe->u.ctl.sqh == NULL) 2848 goto bad; 2849 upipe->u.ctl.setup = uhci_alloc_std(sc); 2850 if (upipe->u.ctl.setup == NULL) { 2851 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2852 goto bad; 2853 } 2854 upipe->u.ctl.stat = uhci_alloc_std(sc); 2855 if (upipe->u.ctl.stat == NULL) { 2856 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2857 uhci_free_std(sc, upipe->u.ctl.setup); 2858 goto bad; 2859 } 2860 err = usb_allocmem(&sc->sc_bus, 2861 sizeof(usb_device_request_t), 2862 0, &upipe->u.ctl.reqdma); 2863 if (err) { 2864 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2865 uhci_free_std(sc, upipe->u.ctl.setup); 2866 uhci_free_std(sc, upipe->u.ctl.stat); 2867 goto bad; 2868 } 2869 break; 2870 case UE_INTERRUPT: 2871 pipe->methods = &uhci_device_intr_methods; 2872 ival = pipe->interval; 2873 if (ival == USBD_DEFAULT_INTERVAL) 2874 ival = ed->bInterval; 2875 return (uhci_device_setintr(sc, upipe, ival)); 2876 case UE_ISOCHRONOUS: 2877 pipe->methods = &uhci_device_isoc_methods; 2878 return (uhci_setup_isoc(pipe)); 2879 case UE_BULK: 2880 pipe->methods = &uhci_device_bulk_methods; 2881 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2882 if (upipe->u.bulk.sqh == NULL) 2883 goto bad; 2884 break; 2885 } 2886 } 2887 return (USBD_NORMAL_COMPLETION); 2888 2889 bad: 2890 return (USBD_NOMEM); 2891 } 2892 2893 /* 2894 * Data structures and routines to emulate the root hub. 2895 */ 2896 usb_device_descriptor_t uhci_devd = { 2897 USB_DEVICE_DESCRIPTOR_SIZE, 2898 UDESC_DEVICE, /* type */ 2899 {0x00, 0x01}, /* USB version */ 2900 UDCLASS_HUB, /* class */ 2901 UDSUBCLASS_HUB, /* subclass */ 2902 UDPROTO_FSHUB, /* protocol */ 2903 64, /* max packet */ 2904 {0},{0},{0x00,0x01}, /* device id */ 2905 1,2,0, /* string indices */ 2906 1 /* # of configurations */ 2907 }; 2908 2909 usb_config_descriptor_t uhci_confd = { 2910 USB_CONFIG_DESCRIPTOR_SIZE, 2911 UDESC_CONFIG, 2912 {USB_CONFIG_DESCRIPTOR_SIZE + 2913 USB_INTERFACE_DESCRIPTOR_SIZE + 2914 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2915 1, 2916 1, 2917 0, 2918 UC_SELF_POWERED, 2919 0 /* max power */ 2920 }; 2921 2922 usb_interface_descriptor_t uhci_ifcd = { 2923 USB_INTERFACE_DESCRIPTOR_SIZE, 2924 UDESC_INTERFACE, 2925 0, 2926 0, 2927 1, 2928 UICLASS_HUB, 2929 UISUBCLASS_HUB, 2930 UIPROTO_FSHUB, 2931 0 2932 }; 2933 2934 usb_endpoint_descriptor_t uhci_endpd = { 2935 USB_ENDPOINT_DESCRIPTOR_SIZE, 2936 UDESC_ENDPOINT, 2937 UE_DIR_IN | UHCI_INTR_ENDPT, 2938 UE_INTERRUPT, 2939 {8}, 2940 255 2941 }; 2942 2943 usb_hub_descriptor_t uhci_hubd_piix = { 2944 USB_HUB_DESCRIPTOR_SIZE, 2945 UDESC_HUB, 2946 2, 2947 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 2948 50, /* power on to power good */ 2949 0, 2950 { 0x00 }, /* both ports are removable */ 2951 }; 2952 2953 int 2954 uhci_str(usb_string_descriptor_t *p, int l, char *s) 2955 { 2956 int i; 2957 2958 if (l == 0) 2959 return (0); 2960 p->bLength = 2 * strlen(s) + 2; 2961 if (l == 1) 2962 return (1); 2963 p->bDescriptorType = UDESC_STRING; 2964 l -= 2; 2965 for (i = 0; s[i] && l > 1; i++, l -= 2) 2966 USETW2(p->bString[i], 0, s[i]); 2967 return (2*i+2); 2968 } 2969 2970 /* 2971 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 2972 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 2973 * should not be used by the USB subsystem. As we cannot issue a 2974 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 2975 * will be enabled as part of the reset. 2976 * 2977 * On the VT83C572, the port cannot be successfully enabled until the 2978 * outstanding "port enable change" and "connection status change" 2979 * events have been reset. 2980 */ 2981 usbd_status 2982 uhci_portreset(uhci_softc_t *sc, int index) 2983 { 2984 int lim, port, x; 2985 2986 if (index == 1) 2987 port = UHCI_PORTSC1; 2988 else if (index == 2) 2989 port = UHCI_PORTSC2; 2990 else 2991 return (USBD_IOERROR); 2992 2993 x = URWMASK(UREAD2(sc, port)); 2994 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2995 2996 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 2997 2998 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 2999 index, UREAD2(sc, port))); 3000 3001 x = URWMASK(UREAD2(sc, port)); 3002 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3003 3004 delay(100); 3005 3006 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3007 index, UREAD2(sc, port))); 3008 3009 x = URWMASK(UREAD2(sc, port)); 3010 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3011 3012 for (lim = 10; --lim > 0;) { 3013 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3014 3015 x = UREAD2(sc, port); 3016 3017 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3018 index, lim, x)); 3019 3020 if (!(x & UHCI_PORTSC_CCS)) { 3021 /* 3022 * No device is connected (or was disconnected 3023 * during reset). Consider the port reset. 3024 * The delay must be long enough to ensure on 3025 * the initial iteration that the device 3026 * connection will have been registered. 50ms 3027 * appears to be sufficient, but 20ms is not. 3028 */ 3029 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3030 index, lim)); 3031 break; 3032 } 3033 3034 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3035 /* 3036 * Port enabled changed and/or connection 3037 * status changed were set. Reset either or 3038 * both raised flags (by writing a 1 to that 3039 * bit), and wait again for state to settle. 3040 */ 3041 UWRITE2(sc, port, URWMASK(x) | 3042 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3043 continue; 3044 } 3045 3046 if (x & UHCI_PORTSC_PE) 3047 /* Port is enabled */ 3048 break; 3049 3050 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3051 } 3052 3053 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3054 index, UREAD2(sc, port))); 3055 3056 if (lim <= 0) { 3057 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3058 return (USBD_TIMEOUT); 3059 } 3060 3061 sc->sc_isreset = 1; 3062 return (USBD_NORMAL_COMPLETION); 3063 } 3064 3065 /* 3066 * Simulate a hardware hub by handling all the necessary requests. 3067 */ 3068 usbd_status 3069 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3070 { 3071 usbd_status err; 3072 3073 /* Insert last in queue. */ 3074 err = usb_insert_transfer(xfer); 3075 if (err) 3076 return (err); 3077 3078 /* 3079 * Pipe isn't running (otherwise err would be USBD_INPROG), 3080 * so start it first. 3081 */ 3082 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3083 } 3084 3085 usbd_status 3086 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3087 { 3088 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3089 usb_device_request_t *req; 3090 void *buf = NULL; 3091 int port, x; 3092 int s, len, value, index, status, change, l, totlen = 0; 3093 usb_port_status_t ps; 3094 usbd_status err; 3095 3096 if (sc->sc_bus.dying) 3097 return (USBD_IOERROR); 3098 3099 #ifdef DIAGNOSTIC 3100 if (!(xfer->rqflags & URQ_REQUEST)) 3101 panic("uhci_root_ctrl_start: not a request"); 3102 #endif 3103 req = &xfer->request; 3104 3105 DPRINTFN(2,("uhci_root_ctrl_start type=0x%02x request=%02x\n", 3106 req->bmRequestType, req->bRequest)); 3107 3108 len = UGETW(req->wLength); 3109 value = UGETW(req->wValue); 3110 index = UGETW(req->wIndex); 3111 3112 if (len != 0) 3113 buf = KERNADDR(&xfer->dmabuf, 0); 3114 3115 #define C(x,y) ((x) | ((y) << 8)) 3116 switch(C(req->bRequest, req->bmRequestType)) { 3117 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3118 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3119 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3120 /* 3121 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3122 * for the integrated root hub. 3123 */ 3124 break; 3125 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3126 if (len > 0) { 3127 *(u_int8_t *)buf = sc->sc_conf; 3128 totlen = 1; 3129 } 3130 break; 3131 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3132 DPRINTFN(2,("uhci_root_ctrl_start wValue=0x%04x\n", value)); 3133 switch(value >> 8) { 3134 case UDESC_DEVICE: 3135 if ((value & 0xff) != 0) { 3136 err = USBD_IOERROR; 3137 goto ret; 3138 } 3139 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3140 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3141 memcpy(buf, &uhci_devd, l); 3142 break; 3143 case UDESC_CONFIG: 3144 if ((value & 0xff) != 0) { 3145 err = USBD_IOERROR; 3146 goto ret; 3147 } 3148 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3149 memcpy(buf, &uhci_confd, l); 3150 buf = (char *)buf + l; 3151 len -= l; 3152 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3153 totlen += l; 3154 memcpy(buf, &uhci_ifcd, l); 3155 buf = (char *)buf + l; 3156 len -= l; 3157 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3158 totlen += l; 3159 memcpy(buf, &uhci_endpd, l); 3160 break; 3161 case UDESC_STRING: 3162 if (len == 0) 3163 break; 3164 *(u_int8_t *)buf = 0; 3165 totlen = 1; 3166 switch (value & 0xff) { 3167 case 0: /* Language table */ 3168 totlen = uhci_str(buf, len, "\001"); 3169 break; 3170 case 1: /* Vendor */ 3171 totlen = uhci_str(buf, len, sc->sc_vendor); 3172 break; 3173 case 2: /* Product */ 3174 totlen = uhci_str(buf, len, "UHCI root hub"); 3175 break; 3176 } 3177 break; 3178 default: 3179 err = USBD_IOERROR; 3180 goto ret; 3181 } 3182 break; 3183 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3184 if (len > 0) { 3185 *(u_int8_t *)buf = 0; 3186 totlen = 1; 3187 } 3188 break; 3189 case C(UR_GET_STATUS, UT_READ_DEVICE): 3190 if (len > 1) { 3191 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3192 totlen = 2; 3193 } 3194 break; 3195 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3196 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3197 if (len > 1) { 3198 USETW(((usb_status_t *)buf)->wStatus, 0); 3199 totlen = 2; 3200 } 3201 break; 3202 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3203 if (value >= USB_MAX_DEVICES) { 3204 err = USBD_IOERROR; 3205 goto ret; 3206 } 3207 sc->sc_addr = value; 3208 break; 3209 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3210 if (value != 0 && value != 1) { 3211 err = USBD_IOERROR; 3212 goto ret; 3213 } 3214 sc->sc_conf = value; 3215 break; 3216 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3217 break; 3218 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3219 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3220 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3221 err = USBD_IOERROR; 3222 goto ret; 3223 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3224 break; 3225 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3226 break; 3227 /* Hub requests */ 3228 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3229 break; 3230 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3231 DPRINTFN(3, ("uhci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 3232 "port=%d feature=%d\n", 3233 index, value)); 3234 if (index == 1) 3235 port = UHCI_PORTSC1; 3236 else if (index == 2) 3237 port = UHCI_PORTSC2; 3238 else { 3239 err = USBD_IOERROR; 3240 goto ret; 3241 } 3242 switch(value) { 3243 case UHF_PORT_ENABLE: 3244 x = URWMASK(UREAD2(sc, port)); 3245 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3246 break; 3247 case UHF_PORT_SUSPEND: 3248 x = URWMASK(UREAD2(sc, port)); 3249 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3250 break; 3251 case UHF_PORT_RESET: 3252 x = URWMASK(UREAD2(sc, port)); 3253 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3254 break; 3255 case UHF_C_PORT_CONNECTION: 3256 x = URWMASK(UREAD2(sc, port)); 3257 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3258 break; 3259 case UHF_C_PORT_ENABLE: 3260 x = URWMASK(UREAD2(sc, port)); 3261 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3262 break; 3263 case UHF_C_PORT_OVER_CURRENT: 3264 x = URWMASK(UREAD2(sc, port)); 3265 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3266 break; 3267 case UHF_C_PORT_RESET: 3268 sc->sc_isreset = 0; 3269 err = USBD_NORMAL_COMPLETION; 3270 goto ret; 3271 case UHF_PORT_CONNECTION: 3272 case UHF_PORT_OVER_CURRENT: 3273 case UHF_PORT_POWER: 3274 case UHF_PORT_LOW_SPEED: 3275 case UHF_C_PORT_SUSPEND: 3276 default: 3277 err = USBD_IOERROR; 3278 goto ret; 3279 } 3280 break; 3281 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3282 if (index == 1) 3283 port = UHCI_PORTSC1; 3284 else if (index == 2) 3285 port = UHCI_PORTSC2; 3286 else { 3287 err = USBD_IOERROR; 3288 goto ret; 3289 } 3290 if (len > 0) { 3291 *(u_int8_t *)buf = 3292 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3293 UHCI_PORTSC_LS_SHIFT; 3294 totlen = 1; 3295 } 3296 break; 3297 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3298 if ((value & 0xff) != 0) { 3299 err = USBD_IOERROR; 3300 goto ret; 3301 } 3302 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3303 totlen = l; 3304 memcpy(buf, &uhci_hubd_piix, l); 3305 break; 3306 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3307 if (len != 4) { 3308 err = USBD_IOERROR; 3309 goto ret; 3310 } 3311 memset(buf, 0, len); 3312 totlen = len; 3313 break; 3314 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3315 if (index == 1) 3316 port = UHCI_PORTSC1; 3317 else if (index == 2) 3318 port = UHCI_PORTSC2; 3319 else { 3320 err = USBD_IOERROR; 3321 goto ret; 3322 } 3323 if (len != 4) { 3324 err = USBD_IOERROR; 3325 goto ret; 3326 } 3327 x = UREAD2(sc, port); 3328 status = change = 0; 3329 if (x & UHCI_PORTSC_CCS) 3330 status |= UPS_CURRENT_CONNECT_STATUS; 3331 if (x & UHCI_PORTSC_CSC) 3332 change |= UPS_C_CONNECT_STATUS; 3333 if (x & UHCI_PORTSC_PE) 3334 status |= UPS_PORT_ENABLED; 3335 if (x & UHCI_PORTSC_POEDC) 3336 change |= UPS_C_PORT_ENABLED; 3337 if (x & UHCI_PORTSC_OCI) 3338 status |= UPS_OVERCURRENT_INDICATOR; 3339 if (x & UHCI_PORTSC_OCIC) 3340 change |= UPS_C_OVERCURRENT_INDICATOR; 3341 if (x & UHCI_PORTSC_SUSP) 3342 status |= UPS_SUSPEND; 3343 if (x & UHCI_PORTSC_LSDA) 3344 status |= UPS_LOW_SPEED; 3345 status |= UPS_PORT_POWER; 3346 if (sc->sc_isreset) 3347 change |= UPS_C_PORT_RESET; 3348 USETW(ps.wPortStatus, status); 3349 USETW(ps.wPortChange, change); 3350 l = min(len, sizeof ps); 3351 memcpy(buf, &ps, l); 3352 totlen = l; 3353 break; 3354 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3355 err = USBD_IOERROR; 3356 goto ret; 3357 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3358 break; 3359 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3360 if (index == 1) 3361 port = UHCI_PORTSC1; 3362 else if (index == 2) 3363 port = UHCI_PORTSC2; 3364 else { 3365 err = USBD_IOERROR; 3366 goto ret; 3367 } 3368 switch(value) { 3369 case UHF_PORT_ENABLE: 3370 x = URWMASK(UREAD2(sc, port)); 3371 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3372 break; 3373 case UHF_PORT_SUSPEND: 3374 x = URWMASK(UREAD2(sc, port)); 3375 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3376 break; 3377 case UHF_PORT_RESET: 3378 err = uhci_portreset(sc, index); 3379 goto ret; 3380 case UHF_PORT_POWER: 3381 /* Pretend we turned on power */ 3382 err = USBD_NORMAL_COMPLETION; 3383 goto ret; 3384 case UHF_PORT_DISOWN_TO_1_1: 3385 /* accept, but do nothing */ 3386 err = USBD_NORMAL_COMPLETION; 3387 goto ret; 3388 case UHF_C_PORT_CONNECTION: 3389 case UHF_C_PORT_ENABLE: 3390 case UHF_C_PORT_OVER_CURRENT: 3391 case UHF_PORT_CONNECTION: 3392 case UHF_PORT_OVER_CURRENT: 3393 case UHF_PORT_LOW_SPEED: 3394 case UHF_C_PORT_SUSPEND: 3395 case UHF_C_PORT_RESET: 3396 default: 3397 err = USBD_IOERROR; 3398 goto ret; 3399 } 3400 break; 3401 default: 3402 err = USBD_IOERROR; 3403 goto ret; 3404 } 3405 xfer->actlen = totlen; 3406 err = USBD_NORMAL_COMPLETION; 3407 ret: 3408 xfer->status = err; 3409 s = splusb(); 3410 usb_transfer_complete(xfer); 3411 splx(s); 3412 return (USBD_IN_PROGRESS); 3413 } 3414 3415 /* Abort a root control request. */ 3416 void 3417 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3418 { 3419 /* Nothing to do, all transfers are synchronous. */ 3420 } 3421 3422 /* Close the root pipe. */ 3423 void 3424 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3425 { 3426 DPRINTF(("uhci_root_ctrl_close\n")); 3427 } 3428 3429 /* Abort a root interrupt request. */ 3430 void 3431 uhci_root_intr_abort(usbd_xfer_handle xfer) 3432 { 3433 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3434 3435 timeout_del(&sc->sc_poll_handle); 3436 sc->sc_intr_xfer = NULL; 3437 3438 if (xfer->pipe->intrxfer == xfer) { 3439 DPRINTF(("uhci_root_intr_abort: remove\n")); 3440 xfer->pipe->intrxfer = 0; 3441 } 3442 xfer->status = USBD_CANCELLED; 3443 #ifdef DIAGNOSTIC 3444 UXFER(xfer)->iinfo.isdone = 1; 3445 #endif 3446 usb_transfer_complete(xfer); 3447 } 3448 3449 usbd_status 3450 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3451 { 3452 usbd_status err; 3453 3454 /* Insert last in queue. */ 3455 err = usb_insert_transfer(xfer); 3456 if (err) 3457 return (err); 3458 3459 /* Pipe isn't running (otherwise err would be USBD_INPROG), 3460 * start first 3461 */ 3462 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3463 } 3464 3465 /* Start a transfer on the root interrupt pipe */ 3466 usbd_status 3467 uhci_root_intr_start(usbd_xfer_handle xfer) 3468 { 3469 usbd_pipe_handle pipe = xfer->pipe; 3470 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3471 3472 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%u flags=%d\n", 3473 xfer, xfer->length, xfer->flags)); 3474 3475 if (sc->sc_bus.dying) 3476 return (USBD_IOERROR); 3477 3478 sc->sc_ival = mstohz(xfer->pipe->endpoint->edesc->bInterval); 3479 timeout_del(&sc->sc_poll_handle); 3480 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer); 3481 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 3482 sc->sc_intr_xfer = xfer; 3483 return (USBD_IN_PROGRESS); 3484 } 3485 3486 /* Close the root interrupt pipe. */ 3487 void 3488 uhci_root_intr_close(usbd_pipe_handle pipe) 3489 { 3490 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3491 3492 timeout_del(&sc->sc_poll_handle); 3493 sc->sc_intr_xfer = NULL; 3494 DPRINTF(("uhci_root_intr_close\n")); 3495 } 3496