1 /* $OpenBSD: uhci.c,v 1.71 2009/07/24 08:15:38 blambert Exp $ */ 2 /* $NetBSD: uhci.c,v 1.172 2003/02/23 04:19:26 simonb Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * USB Universal Host Controller driver. 37 * Handles e.g. PIIX3 and PIIX4. 38 * 39 * UHCI spec: http://download.intel.com/technology/usb/UHCI11D.pdf 40 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 41 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 42 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/kernel.h> 48 #include <sys/malloc.h> 49 #include <sys/device.h> 50 #include <sys/selinfo.h> 51 #include <sys/proc.h> 52 #include <sys/queue.h> 53 54 #include <machine/bus.h> 55 #include <machine/endian.h> 56 57 #include <dev/usb/usb.h> 58 #include <dev/usb/usbdi.h> 59 #include <dev/usb/usbdivar.h> 60 #include <dev/usb/usb_mem.h> 61 #include <dev/usb/usb_quirks.h> 62 63 #include <dev/usb/uhcireg.h> 64 #include <dev/usb/uhcivar.h> 65 66 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 67 /*#define UHCI_CTL_LOOP */ 68 69 struct cfdriver uhci_cd = { 70 NULL, "uhci", DV_DULL 71 }; 72 73 #ifdef UHCI_DEBUG 74 uhci_softc_t *thesc; 75 #define DPRINTF(x) if (uhcidebug) printf x 76 #define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 77 int uhcidebug = 0; 78 int uhcinoloop = 0; 79 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 80 #else 81 #define DPRINTF(x) 82 #define DPRINTFN(n,x) 83 #endif 84 85 #define mstohz(ms) ((ms) * hz / 1000) 86 87 /* 88 * The UHCI controller is little endian, so on big endian machines 89 * the data stored in memory needs to be swapped. 90 */ 91 92 struct uhci_pipe { 93 struct usbd_pipe pipe; 94 int nexttoggle; 95 96 u_char aborting; 97 usbd_xfer_handle abortstart, abortend; 98 99 /* Info needed for different pipe kinds. */ 100 union { 101 /* Control pipe */ 102 struct { 103 uhci_soft_qh_t *sqh; 104 usb_dma_t reqdma; 105 uhci_soft_td_t *setup, *stat; 106 u_int length; 107 } ctl; 108 /* Interrupt pipe */ 109 struct { 110 int npoll; 111 int isread; 112 uhci_soft_qh_t **qhs; 113 } intr; 114 /* Bulk pipe */ 115 struct { 116 uhci_soft_qh_t *sqh; 117 u_int length; 118 int isread; 119 } bulk; 120 /* Iso pipe */ 121 struct iso { 122 uhci_soft_td_t **stds; 123 int next, inuse; 124 } iso; 125 } u; 126 }; 127 128 void uhci_globalreset(uhci_softc_t *); 129 usbd_status uhci_portreset(uhci_softc_t*, int); 130 void uhci_reset(uhci_softc_t *); 131 void uhci_shutdown(void *v); 132 void uhci_power(int, void *); 133 usbd_status uhci_run(uhci_softc_t *, int run); 134 uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 135 void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 136 uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 137 void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 138 #if 0 139 void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 140 uhci_intr_info_t *); 141 void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 142 #endif 143 144 void uhci_free_std_chain(uhci_softc_t *, 145 uhci_soft_td_t *, uhci_soft_td_t *); 146 usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 147 uhci_softc_t *, u_int, int, u_int16_t, usb_dma_t *, 148 uhci_soft_td_t **, uhci_soft_td_t **); 149 void uhci_poll_hub(void *); 150 void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 151 void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 152 void uhci_idone(uhci_intr_info_t *); 153 154 void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 155 156 void uhci_timeout(void *); 157 void uhci_timeout_task(void *); 158 void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 159 void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 160 void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 161 void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 162 void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 163 void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 164 int uhci_str(usb_string_descriptor_t *, int, char *); 165 void uhci_add_loop(uhci_softc_t *sc); 166 void uhci_rem_loop(uhci_softc_t *sc); 167 168 usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 169 void uhci_device_isoc_enter(usbd_xfer_handle); 170 171 usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 172 void uhci_freem(struct usbd_bus *, usb_dma_t *); 173 174 usbd_xfer_handle uhci_allocx(struct usbd_bus *); 175 void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 176 177 usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 178 usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 179 void uhci_device_ctrl_abort(usbd_xfer_handle); 180 void uhci_device_ctrl_close(usbd_pipe_handle); 181 void uhci_device_ctrl_done(usbd_xfer_handle); 182 183 usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 184 usbd_status uhci_device_intr_start(usbd_xfer_handle); 185 void uhci_device_intr_abort(usbd_xfer_handle); 186 void uhci_device_intr_close(usbd_pipe_handle); 187 void uhci_device_intr_done(usbd_xfer_handle); 188 189 usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 190 usbd_status uhci_device_bulk_start(usbd_xfer_handle); 191 void uhci_device_bulk_abort(usbd_xfer_handle); 192 void uhci_device_bulk_close(usbd_pipe_handle); 193 void uhci_device_bulk_done(usbd_xfer_handle); 194 195 usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 196 usbd_status uhci_device_isoc_start(usbd_xfer_handle); 197 void uhci_device_isoc_abort(usbd_xfer_handle); 198 void uhci_device_isoc_close(usbd_pipe_handle); 199 void uhci_device_isoc_done(usbd_xfer_handle); 200 201 usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 202 usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 203 void uhci_root_ctrl_abort(usbd_xfer_handle); 204 void uhci_root_ctrl_close(usbd_pipe_handle); 205 void uhci_root_ctrl_done(usbd_xfer_handle); 206 207 usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 208 usbd_status uhci_root_intr_start(usbd_xfer_handle); 209 void uhci_root_intr_abort(usbd_xfer_handle); 210 void uhci_root_intr_close(usbd_pipe_handle); 211 void uhci_root_intr_done(usbd_xfer_handle); 212 213 usbd_status uhci_open(usbd_pipe_handle); 214 void uhci_poll(struct usbd_bus *); 215 void uhci_softintr(void *); 216 217 usbd_status uhci_device_request(usbd_xfer_handle xfer); 218 219 void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 220 void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 221 usbd_status uhci_device_setintr(uhci_softc_t *sc, 222 struct uhci_pipe *pipe, int ival); 223 224 void uhci_device_clear_toggle(usbd_pipe_handle pipe); 225 void uhci_noop(usbd_pipe_handle pipe); 226 227 __inline__ uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 228 uhci_soft_qh_t *); 229 230 #ifdef UHCI_DEBUG 231 void uhci_dump_all(uhci_softc_t *); 232 void uhci_dumpregs(uhci_softc_t *); 233 void uhci_dump_qhs(uhci_soft_qh_t *); 234 void uhci_dump_qh(uhci_soft_qh_t *); 235 void uhci_dump_tds(uhci_soft_td_t *); 236 void uhci_dump_td(uhci_soft_td_t *); 237 void uhci_dump_ii(uhci_intr_info_t *ii); 238 void uhci_dump(void); 239 #endif 240 241 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 242 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 243 #define UWRITE1(sc, r, x) \ 244 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 245 } while (/*CONSTCOND*/0) 246 #define UWRITE2(sc, r, x) \ 247 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 248 } while (/*CONSTCOND*/0) 249 #define UWRITE4(sc, r, x) \ 250 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 251 } while (/*CONSTCOND*/0) 252 #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 253 #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 254 #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 255 256 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 257 #define UHCISTS(sc) UREAD2(sc, UHCI_STS) 258 259 #define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 260 261 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 262 263 #define UHCI_INTR_ENDPT 1 264 265 struct usbd_bus_methods uhci_bus_methods = { 266 uhci_open, 267 uhci_softintr, 268 uhci_poll, 269 uhci_allocm, 270 uhci_freem, 271 uhci_allocx, 272 uhci_freex, 273 }; 274 275 struct usbd_pipe_methods uhci_root_ctrl_methods = { 276 uhci_root_ctrl_transfer, 277 uhci_root_ctrl_start, 278 uhci_root_ctrl_abort, 279 uhci_root_ctrl_close, 280 uhci_noop, 281 uhci_root_ctrl_done, 282 }; 283 284 struct usbd_pipe_methods uhci_root_intr_methods = { 285 uhci_root_intr_transfer, 286 uhci_root_intr_start, 287 uhci_root_intr_abort, 288 uhci_root_intr_close, 289 uhci_noop, 290 uhci_root_intr_done, 291 }; 292 293 struct usbd_pipe_methods uhci_device_ctrl_methods = { 294 uhci_device_ctrl_transfer, 295 uhci_device_ctrl_start, 296 uhci_device_ctrl_abort, 297 uhci_device_ctrl_close, 298 uhci_noop, 299 uhci_device_ctrl_done, 300 }; 301 302 struct usbd_pipe_methods uhci_device_intr_methods = { 303 uhci_device_intr_transfer, 304 uhci_device_intr_start, 305 uhci_device_intr_abort, 306 uhci_device_intr_close, 307 uhci_device_clear_toggle, 308 uhci_device_intr_done, 309 }; 310 311 struct usbd_pipe_methods uhci_device_bulk_methods = { 312 uhci_device_bulk_transfer, 313 uhci_device_bulk_start, 314 uhci_device_bulk_abort, 315 uhci_device_bulk_close, 316 uhci_device_clear_toggle, 317 uhci_device_bulk_done, 318 }; 319 320 struct usbd_pipe_methods uhci_device_isoc_methods = { 321 uhci_device_isoc_transfer, 322 uhci_device_isoc_start, 323 uhci_device_isoc_abort, 324 uhci_device_isoc_close, 325 uhci_noop, 326 uhci_device_isoc_done, 327 }; 328 329 #define uhci_add_intr_info(sc, ii) \ 330 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 331 #define uhci_del_intr_info(ii) \ 332 do { \ 333 LIST_REMOVE((ii), list); \ 334 (ii)->list.le_prev = NULL; \ 335 } while (0) 336 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 337 338 __inline__ uhci_soft_qh_t * 339 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 340 { 341 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 342 343 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 344 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 345 if (letoh32(pqh->qh.qh_hlink) & UHCI_PTR_T) { 346 printf("uhci_find_prev_qh: QH not found\n"); 347 return (NULL); 348 } 349 #endif 350 } 351 return (pqh); 352 } 353 354 void 355 uhci_globalreset(uhci_softc_t *sc) 356 { 357 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 358 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 359 UHCICMD(sc, 0); /* do nothing */ 360 } 361 362 usbd_status 363 uhci_init(uhci_softc_t *sc) 364 { 365 usbd_status err; 366 int i, j; 367 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 368 uhci_soft_td_t *std; 369 370 DPRINTFN(1,("uhci_init: start\n")); 371 372 #ifdef UHCI_DEBUG 373 thesc = sc; 374 375 if (uhcidebug > 2) 376 uhci_dumpregs(sc); 377 #endif 378 379 /* Save SOF over HC reset. */ 380 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 381 382 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 383 uhci_globalreset(sc); /* reset the controller */ 384 uhci_reset(sc); 385 386 /* Restore saved SOF. */ 387 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 388 389 /* Allocate and initialize real frame array. */ 390 err = usb_allocmem(&sc->sc_bus, 391 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 392 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 393 if (err) 394 return (err); 395 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 396 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 397 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 398 399 /* 400 * Allocate a TD, inactive, that hangs from the last QH. 401 * This is to avoid a bug in the PIIX that makes it run berserk 402 * otherwise. 403 */ 404 std = uhci_alloc_std(sc); 405 if (std == NULL) 406 return (USBD_NOMEM); 407 std->link.std = NULL; 408 std->td.td_link = htole32(UHCI_PTR_T); 409 std->td.td_status = htole32(0); /* inactive */ 410 std->td.td_token = htole32(0); 411 std->td.td_buffer = htole32(0); 412 413 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 414 lsqh = uhci_alloc_sqh(sc); 415 if (lsqh == NULL) 416 return (USBD_NOMEM); 417 lsqh->hlink = NULL; 418 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 419 lsqh->elink = std; 420 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 421 sc->sc_last_qh = lsqh; 422 423 /* Allocate the dummy QH where bulk traffic will be queued. */ 424 bsqh = uhci_alloc_sqh(sc); 425 if (bsqh == NULL) 426 return (USBD_NOMEM); 427 bsqh->hlink = lsqh; 428 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 429 bsqh->elink = NULL; 430 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 431 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 432 433 /* Allocate dummy QH where high speed control traffic will be queued. */ 434 chsqh = uhci_alloc_sqh(sc); 435 if (chsqh == NULL) 436 return (USBD_NOMEM); 437 chsqh->hlink = bsqh; 438 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 439 chsqh->elink = NULL; 440 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 441 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 442 443 /* Allocate dummy QH where control traffic will be queued. */ 444 clsqh = uhci_alloc_sqh(sc); 445 if (clsqh == NULL) 446 return (USBD_NOMEM); 447 clsqh->hlink = chsqh; 448 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 449 clsqh->elink = NULL; 450 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 451 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 452 453 /* 454 * Make all (virtual) frame list pointers point to the interrupt 455 * queue heads and the interrupt queue heads at the control 456 * queue head and point the physical frame list to the virtual. 457 */ 458 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 459 std = uhci_alloc_std(sc); 460 sqh = uhci_alloc_sqh(sc); 461 if (std == NULL || sqh == NULL) 462 return (USBD_NOMEM); 463 std->link.sqh = sqh; 464 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 465 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 466 std->td.td_token = htole32(0); 467 std->td.td_buffer = htole32(0); 468 sqh->hlink = clsqh; 469 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 470 sqh->elink = NULL; 471 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 472 sc->sc_vframes[i].htd = std; 473 sc->sc_vframes[i].etd = std; 474 sc->sc_vframes[i].hqh = sqh; 475 sc->sc_vframes[i].eqh = sqh; 476 for (j = i; 477 j < UHCI_FRAMELIST_COUNT; 478 j += UHCI_VFRAMELIST_COUNT) 479 sc->sc_pframes[j] = htole32(std->physaddr); 480 } 481 482 LIST_INIT(&sc->sc_intrhead); 483 484 SIMPLEQ_INIT(&sc->sc_free_xfers); 485 486 timeout_set(&sc->sc_poll_handle, NULL, NULL); 487 488 /* Set up the bus struct. */ 489 sc->sc_bus.methods = &uhci_bus_methods; 490 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 491 492 sc->sc_suspend = PWR_RESUME; 493 sc->sc_powerhook = powerhook_establish(uhci_power, sc); 494 sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc); 495 496 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 497 498 DPRINTFN(1,("uhci_init: enabling\n")); 499 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 500 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 501 502 return (uhci_run(sc, 1)); /* and here we go... */ 503 } 504 505 int 506 uhci_activate(struct device *self, enum devact act) 507 { 508 struct uhci_softc *sc = (struct uhci_softc *)self; 509 int rv = 0; 510 511 switch (act) { 512 case DVACT_ACTIVATE: 513 break; 514 515 case DVACT_DEACTIVATE: 516 if (sc->sc_child != NULL) 517 rv = config_deactivate(sc->sc_child); 518 break; 519 } 520 return (rv); 521 } 522 523 int 524 uhci_detach(struct uhci_softc *sc, int flags) 525 { 526 usbd_xfer_handle xfer; 527 int rv = 0; 528 529 if (sc->sc_child != NULL) 530 rv = config_detach(sc->sc_child, flags); 531 532 if (rv != 0) 533 return (rv); 534 535 if (sc->sc_powerhook != NULL) 536 powerhook_disestablish(sc->sc_powerhook); 537 if (sc->sc_shutdownhook != NULL) 538 shutdownhook_disestablish(sc->sc_shutdownhook); 539 540 /* Free all xfers associated with this HC. */ 541 for (;;) { 542 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 543 if (xfer == NULL) 544 break; 545 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 546 free(xfer, M_USB); 547 } 548 549 /* XXX free other data structures XXX */ 550 551 return (rv); 552 } 553 554 usbd_status 555 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 556 { 557 struct uhci_softc *sc = (struct uhci_softc *)bus; 558 u_int32_t n; 559 560 /* 561 * XXX 562 * Since we are allocating a buffer we can assume that we will 563 * need TDs for it. Since we don't want to allocate those from 564 * an interrupt context, we allocate them here and free them again. 565 * This is no guarantee that we'll get the TDs next time... 566 */ 567 n = size / 8; 568 if (n > 16) { 569 u_int32_t i; 570 uhci_soft_td_t **stds; 571 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 572 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 573 M_NOWAIT | M_ZERO); 574 if (stds == NULL) 575 panic("uhci_allocm"); 576 for(i=0; i < n; i++) 577 stds[i] = uhci_alloc_std(sc); 578 for(i=0; i < n; i++) 579 if (stds[i] != NULL) 580 uhci_free_std(sc, stds[i]); 581 free(stds, M_TEMP); 582 } 583 584 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 585 } 586 587 void 588 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 589 { 590 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 591 } 592 593 usbd_xfer_handle 594 uhci_allocx(struct usbd_bus *bus) 595 { 596 struct uhci_softc *sc = (struct uhci_softc *)bus; 597 usbd_xfer_handle xfer; 598 599 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 600 if (xfer != NULL) { 601 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 602 #ifdef DIAGNOSTIC 603 if (xfer->busy_free != XFER_FREE) { 604 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 605 xfer->busy_free); 606 } 607 #endif 608 } else { 609 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 610 } 611 if (xfer != NULL) { 612 memset(xfer, 0, sizeof (struct uhci_xfer)); 613 UXFER(xfer)->iinfo.sc = sc; 614 #ifdef DIAGNOSTIC 615 UXFER(xfer)->iinfo.isdone = 1; 616 xfer->busy_free = XFER_BUSY; 617 #endif 618 } 619 return (xfer); 620 } 621 622 void 623 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 624 { 625 struct uhci_softc *sc = (struct uhci_softc *)bus; 626 627 #ifdef DIAGNOSTIC 628 if (xfer->busy_free != XFER_BUSY) { 629 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 630 xfer->busy_free); 631 return; 632 } 633 xfer->busy_free = XFER_FREE; 634 if (!UXFER(xfer)->iinfo.isdone) { 635 printf("uhci_freex: !isdone\n"); 636 return; 637 } 638 #endif 639 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 640 } 641 642 /* 643 * Shut down the controller when the system is going down. 644 */ 645 void 646 uhci_shutdown(void *v) 647 { 648 uhci_softc_t *sc = v; 649 650 DPRINTF(("uhci_shutdown: stopping the HC\n")); 651 uhci_run(sc, 0); /* stop the controller */ 652 } 653 654 /* 655 * Handle suspend/resume. 656 * 657 * We need to switch to polling mode here, because this routine is 658 * called from an interrupt context. This is all right since we 659 * are almost suspended anyway. 660 */ 661 void 662 uhci_power(int why, void *v) 663 { 664 uhci_softc_t *sc = v; 665 int cmd; 666 int s; 667 668 s = splhardusb(); 669 cmd = UREAD2(sc, UHCI_CMD); 670 671 DPRINTF(("uhci_power: sc=%p, why=%d (was %d), cmd=0x%x\n", 672 sc, why, sc->sc_suspend, cmd)); 673 674 switch (why) { 675 case PWR_SUSPEND: 676 case PWR_STANDBY: 677 #ifdef UHCI_DEBUG 678 if (uhcidebug > 2) 679 uhci_dumpregs(sc); 680 #endif 681 if (sc->sc_intr_xfer != NULL) 682 timeout_del(&sc->sc_poll_handle); 683 sc->sc_bus.use_polling++; 684 uhci_run(sc, 0); /* stop the controller */ 685 686 /* save some state if BIOS doesn't */ 687 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 688 689 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 690 691 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */ 692 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 693 sc->sc_suspend = why; 694 sc->sc_bus.use_polling--; 695 DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD))); 696 break; 697 case PWR_RESUME: 698 #ifdef DIAGNOSTIC 699 if (sc->sc_suspend == PWR_RESUME) 700 printf("uhci_power: weird, resume without suspend.\n"); 701 #endif 702 sc->sc_bus.use_polling++; 703 sc->sc_suspend = why; 704 if (cmd & UHCI_CMD_RS) 705 uhci_run(sc, 0); /* in case BIOS has started it */ 706 707 /* restore saved state */ 708 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 709 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 710 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 711 712 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */ 713 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 714 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 715 UHCICMD(sc, UHCI_CMD_MAXP); 716 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 717 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* re-enable intrs */ 718 uhci_run(sc, 1); /* and start traffic again */ 719 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 720 sc->sc_bus.use_polling--; 721 if (sc->sc_intr_xfer != NULL) { 722 timeout_del(&sc->sc_poll_handle); 723 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, 724 sc->sc_intr_xfer); 725 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 726 } 727 #ifdef UHCI_DEBUG 728 if (uhcidebug > 2) 729 uhci_dumpregs(sc); 730 #endif 731 break; 732 } 733 splx(s); 734 } 735 736 #ifdef UHCI_DEBUG 737 void 738 uhci_dumpregs(uhci_softc_t *sc) 739 { 740 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 741 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 742 sc->sc_bus.bdev.dv_xname, 743 UREAD2(sc, UHCI_CMD), 744 UREAD2(sc, UHCI_STS), 745 UREAD2(sc, UHCI_INTR), 746 UREAD2(sc, UHCI_FRNUM), 747 UREAD4(sc, UHCI_FLBASEADDR), 748 UREAD1(sc, UHCI_SOF), 749 UREAD2(sc, UHCI_PORTSC1), 750 UREAD2(sc, UHCI_PORTSC2))); 751 } 752 753 void 754 uhci_dump_td(uhci_soft_td_t *p) 755 { 756 char sbuf[128], sbuf2[128]; 757 758 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 759 "token=0x%08lx buffer=0x%08lx\n", 760 p, (long)p->physaddr, 761 (long)letoh32(p->td.td_link), 762 (long)letoh32(p->td.td_status), 763 (long)letoh32(p->td.td_token), 764 (long)letoh32(p->td.td_buffer))); 765 766 bitmask_snprintf((u_int32_t)letoh32(p->td.td_link), "\20\1T\2Q\3VF", 767 sbuf, sizeof(sbuf)); 768 bitmask_snprintf((u_int32_t)letoh32(p->td.td_status), 769 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 770 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 771 sbuf2, sizeof(sbuf2)); 772 773 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 774 "D=%d,maxlen=%d\n", sbuf, sbuf2, 775 UHCI_TD_GET_ERRCNT(letoh32(p->td.td_status)), 776 UHCI_TD_GET_ACTLEN(letoh32(p->td.td_status)), 777 UHCI_TD_GET_PID(letoh32(p->td.td_token)), 778 UHCI_TD_GET_DEVADDR(letoh32(p->td.td_token)), 779 UHCI_TD_GET_ENDPT(letoh32(p->td.td_token)), 780 UHCI_TD_GET_DT(letoh32(p->td.td_token)), 781 UHCI_TD_GET_MAXLEN(letoh32(p->td.td_token)))); 782 } 783 784 void 785 uhci_dump_qh(uhci_soft_qh_t *sqh) 786 { 787 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 788 (int)sqh->physaddr, letoh32(sqh->qh.qh_hlink), 789 letoh32(sqh->qh.qh_elink))); 790 } 791 792 793 void 794 uhci_dump(void) 795 { 796 uhci_dump_all(thesc); 797 } 798 799 void 800 uhci_dump_all(uhci_softc_t *sc) 801 { 802 uhci_dumpregs(sc); 803 printf("intrs=%d\n", sc->sc_bus.no_intrs); 804 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 805 uhci_dump_qh(sc->sc_lctl_start); 806 } 807 808 809 void 810 uhci_dump_qhs(uhci_soft_qh_t *sqh) 811 { 812 uhci_dump_qh(sqh); 813 814 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 815 * Traverses sideways first, then down. 816 * 817 * QH1 818 * QH2 819 * No QH 820 * TD2.1 821 * TD2.2 822 * TD1.1 823 * etc. 824 * 825 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 826 */ 827 828 829 if (sqh->hlink != NULL && !(letoh32(sqh->qh.qh_hlink) & UHCI_PTR_T)) 830 uhci_dump_qhs(sqh->hlink); 831 else 832 DPRINTF(("No QH\n")); 833 834 if (sqh->elink != NULL && !(letoh32(sqh->qh.qh_elink) & UHCI_PTR_T)) 835 uhci_dump_tds(sqh->elink); 836 else 837 DPRINTF(("No TD\n")); 838 } 839 840 void 841 uhci_dump_tds(uhci_soft_td_t *std) 842 { 843 uhci_soft_td_t *td; 844 845 for(td = std; td != NULL; td = td->link.std) { 846 uhci_dump_td(td); 847 848 /* Check whether the link pointer in this TD marks 849 * the link pointer as end of queue. This avoids 850 * printing the free list in case the queue/TD has 851 * already been moved there (seatbelt). 852 */ 853 if (letoh32(td->td.td_link) & UHCI_PTR_T || 854 letoh32(td->td.td_link) == 0) 855 break; 856 } 857 } 858 859 void 860 uhci_dump_ii(uhci_intr_info_t *ii) 861 { 862 usbd_pipe_handle pipe; 863 usb_endpoint_descriptor_t *ed; 864 usbd_device_handle dev; 865 866 #ifdef DIAGNOSTIC 867 #define DONE ii->isdone 868 #else 869 #define DONE 0 870 #endif 871 if (ii == NULL) { 872 printf("ii NULL\n"); 873 return; 874 } 875 if (ii->xfer == NULL) { 876 printf("ii %p: done=%d xfer=NULL\n", 877 ii, DONE); 878 return; 879 } 880 pipe = ii->xfer->pipe; 881 if (pipe == NULL) { 882 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 883 ii, DONE, ii->xfer); 884 return; 885 } 886 if (pipe->endpoint == NULL) { 887 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 888 ii, DONE, ii->xfer, pipe); 889 return; 890 } 891 if (pipe->device == NULL) { 892 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 893 ii, DONE, ii->xfer, pipe); 894 return; 895 } 896 ed = pipe->endpoint->edesc; 897 dev = pipe->device; 898 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 899 ii, DONE, ii->xfer, dev, 900 UGETW(dev->ddesc.idVendor), 901 UGETW(dev->ddesc.idProduct), 902 dev->address, pipe, 903 ed->bEndpointAddress, ed->bmAttributes); 904 #undef DONE 905 } 906 907 void uhci_dump_iis(struct uhci_softc *sc); 908 void 909 uhci_dump_iis(struct uhci_softc *sc) 910 { 911 uhci_intr_info_t *ii; 912 913 printf("intr_info list:\n"); 914 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 915 uhci_dump_ii(ii); 916 } 917 918 void iidump(void); 919 void iidump(void) { uhci_dump_iis(thesc); } 920 921 #endif 922 923 /* 924 * This routine is executed periodically and simulates interrupts 925 * from the root controller interrupt pipe for port status change. 926 */ 927 void 928 uhci_poll_hub(void *addr) 929 { 930 usbd_xfer_handle xfer = addr; 931 usbd_pipe_handle pipe = xfer->pipe; 932 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 933 int s; 934 u_char *p; 935 936 DPRINTFN(20, ("uhci_poll_hub\n")); 937 938 timeout_del(&sc->sc_poll_handle); 939 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer); 940 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 941 942 p = KERNADDR(&xfer->dmabuf, 0); 943 p[0] = 0; 944 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 945 p[0] |= 1<<1; 946 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 947 p[0] |= 1<<2; 948 if (p[0] == 0) 949 /* No change, try again in a while */ 950 return; 951 952 xfer->actlen = 1; 953 xfer->status = USBD_NORMAL_COMPLETION; 954 s = splusb(); 955 xfer->device->bus->intr_context++; 956 usb_transfer_complete(xfer); 957 xfer->device->bus->intr_context--; 958 splx(s); 959 } 960 961 void 962 uhci_root_intr_done(usbd_xfer_handle xfer) 963 { 964 } 965 966 void 967 uhci_root_ctrl_done(usbd_xfer_handle xfer) 968 { 969 } 970 971 /* 972 * Let the last QH loop back to the high speed control transfer QH. 973 * This is what intel calls "bandwidth reclamation" and improves 974 * USB performance a lot for some devices. 975 * If we are already looping, just count it. 976 */ 977 void 978 uhci_add_loop(uhci_softc_t *sc) { 979 #ifdef UHCI_DEBUG 980 if (uhcinoloop) 981 return; 982 #endif 983 if (++sc->sc_loops == 1) { 984 DPRINTFN(5,("uhci_add_loop\n")); 985 /* Note, we don't loop back the soft pointer. */ 986 sc->sc_last_qh->qh.qh_hlink = 987 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 988 } 989 } 990 991 void 992 uhci_rem_loop(uhci_softc_t *sc) { 993 #ifdef UHCI_DEBUG 994 if (uhcinoloop) 995 return; 996 #endif 997 if (--sc->sc_loops == 0) { 998 DPRINTFN(5,("uhci_rem_loop\n")); 999 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1000 } 1001 } 1002 1003 /* Add high speed control QH, called at splusb(). */ 1004 void 1005 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1006 { 1007 uhci_soft_qh_t *eqh; 1008 1009 SPLUSBCHECK; 1010 1011 DPRINTFN(10, ("uhci_add_hs_ctrl: sqh=%p\n", sqh)); 1012 eqh = sc->sc_hctl_end; 1013 sqh->hlink = eqh->hlink; 1014 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1015 eqh->hlink = sqh; 1016 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1017 sc->sc_hctl_end = sqh; 1018 #ifdef UHCI_CTL_LOOP 1019 uhci_add_loop(sc); 1020 #endif 1021 } 1022 1023 /* Remove high speed control QH, called at splusb(). */ 1024 void 1025 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1026 { 1027 uhci_soft_qh_t *pqh; 1028 1029 SPLUSBCHECK; 1030 1031 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1032 #ifdef UHCI_CTL_LOOP 1033 uhci_rem_loop(sc); 1034 #endif 1035 /* 1036 * The T bit should be set in the elink of the QH so that the HC 1037 * doesn't follow the pointer. This condition may fail if the 1038 * the transferred packet was short so that the QH still points 1039 * at the last used TD. 1040 * In this case we set the T bit and wait a little for the HC 1041 * to stop looking at the TD. 1042 */ 1043 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1044 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1045 delay(UHCI_QH_REMOVE_DELAY); 1046 } 1047 1048 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1049 pqh->hlink = sqh->hlink; 1050 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1051 delay(UHCI_QH_REMOVE_DELAY); 1052 if (sc->sc_hctl_end == sqh) 1053 sc->sc_hctl_end = pqh; 1054 } 1055 1056 /* Add low speed control QH, called at splusb(). */ 1057 void 1058 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1059 { 1060 uhci_soft_qh_t *eqh; 1061 1062 SPLUSBCHECK; 1063 1064 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1065 eqh = sc->sc_lctl_end; 1066 sqh->hlink = eqh->hlink; 1067 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1068 eqh->hlink = sqh; 1069 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1070 sc->sc_lctl_end = sqh; 1071 } 1072 1073 /* Remove low speed control QH, called at splusb(). */ 1074 void 1075 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1076 { 1077 uhci_soft_qh_t *pqh; 1078 1079 SPLUSBCHECK; 1080 1081 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1082 /* See comment in uhci_remove_hs_ctrl() */ 1083 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1084 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1085 delay(UHCI_QH_REMOVE_DELAY); 1086 } 1087 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1088 pqh->hlink = sqh->hlink; 1089 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1090 delay(UHCI_QH_REMOVE_DELAY); 1091 if (sc->sc_lctl_end == sqh) 1092 sc->sc_lctl_end = pqh; 1093 } 1094 1095 /* Add bulk QH, called at splusb(). */ 1096 void 1097 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1098 { 1099 uhci_soft_qh_t *eqh; 1100 1101 SPLUSBCHECK; 1102 1103 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1104 eqh = sc->sc_bulk_end; 1105 sqh->hlink = eqh->hlink; 1106 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1107 eqh->hlink = sqh; 1108 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1109 sc->sc_bulk_end = sqh; 1110 uhci_add_loop(sc); 1111 } 1112 1113 /* Remove bulk QH, called at splusb(). */ 1114 void 1115 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1116 { 1117 uhci_soft_qh_t *pqh; 1118 1119 SPLUSBCHECK; 1120 1121 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1122 uhci_rem_loop(sc); 1123 /* See comment in uhci_remove_hs_ctrl() */ 1124 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1125 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1126 delay(UHCI_QH_REMOVE_DELAY); 1127 } 1128 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1129 pqh->hlink = sqh->hlink; 1130 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1131 delay(UHCI_QH_REMOVE_DELAY); 1132 if (sc->sc_bulk_end == sqh) 1133 sc->sc_bulk_end = pqh; 1134 } 1135 1136 int uhci_intr1(uhci_softc_t *); 1137 1138 int 1139 uhci_intr(void *arg) 1140 { 1141 uhci_softc_t *sc = arg; 1142 1143 if (sc->sc_dying) 1144 return (0); 1145 1146 if (sc->sc_bus.use_polling) { 1147 #ifdef DIAGNOSTIC 1148 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1149 #endif 1150 return (0); 1151 } 1152 return (uhci_intr1(sc)); 1153 } 1154 1155 int 1156 uhci_intr1(uhci_softc_t *sc) 1157 { 1158 int status; 1159 int ack; 1160 1161 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1162 if (status == 0) /* The interrupt was not for us. */ 1163 return (0); 1164 if (status == 0xffffffff) { 1165 sc->sc_dying = 1; 1166 return (0); 1167 } 1168 1169 #ifdef UHCI_DEBUG 1170 if (uhcidebug > 15) { 1171 DPRINTF(("%s: uhci_intr1\n", sc->sc_bus.bdev.dv_xname)); 1172 uhci_dumpregs(sc); 1173 } 1174 #endif 1175 1176 if (sc->sc_suspend != PWR_RESUME) { 1177 printf("%s: interrupt while not operating ignored\n", 1178 sc->sc_bus.bdev.dv_xname); 1179 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1180 return (0); 1181 } 1182 1183 ack = 0; 1184 if (status & UHCI_STS_USBINT) 1185 ack |= UHCI_STS_USBINT; 1186 if (status & UHCI_STS_USBEI) 1187 ack |= UHCI_STS_USBEI; 1188 if (status & UHCI_STS_RD) { 1189 ack |= UHCI_STS_RD; 1190 #ifdef UHCI_DEBUG 1191 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 1192 #endif 1193 } 1194 if (status & UHCI_STS_HSE) { 1195 ack |= UHCI_STS_HSE; 1196 printf("%s: host system error\n", sc->sc_bus.bdev.dv_xname); 1197 } 1198 if (status & UHCI_STS_HCPE) { 1199 ack |= UHCI_STS_HCPE; 1200 printf("%s: host controller process error\n", 1201 sc->sc_bus.bdev.dv_xname); 1202 } 1203 if (status & UHCI_STS_HCH) { 1204 /* no acknowledge needed */ 1205 if (!sc->sc_dying) { 1206 printf("%s: host controller halted\n", 1207 sc->sc_bus.bdev.dv_xname); 1208 #ifdef UHCI_DEBUG 1209 uhci_dump_all(sc); 1210 #endif 1211 } 1212 sc->sc_dying = 1; 1213 } 1214 1215 if (!ack) 1216 return (0); /* nothing to acknowledge */ 1217 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1218 1219 sc->sc_bus.no_intrs++; 1220 usb_schedsoftintr(&sc->sc_bus); 1221 1222 DPRINTFN(15, ("%s: uhci_intr1: exit\n", sc->sc_bus.bdev.dv_xname)); 1223 1224 return (1); 1225 } 1226 1227 void 1228 uhci_softintr(void *v) 1229 { 1230 uhci_softc_t *sc = v; 1231 uhci_intr_info_t *ii, *nextii; 1232 1233 DPRINTFN(10,("%s: uhci_softintr (%d)\n", sc->sc_bus.bdev.dv_xname, 1234 sc->sc_bus.intr_context)); 1235 1236 sc->sc_bus.intr_context++; 1237 1238 /* 1239 * Interrupts on UHCI really suck. When the host controller 1240 * interrupts because a transfer is completed there is no 1241 * way of knowing which transfer it was. You can scan down 1242 * the TDs and QHs of the previous frame to limit the search, 1243 * but that assumes that the interrupt was not delayed by more 1244 * than 1 ms, which may not always be true (e.g. after debug 1245 * output on a slow console). 1246 * We scan all interrupt descriptors to see if any have 1247 * completed. 1248 */ 1249 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1250 nextii = LIST_NEXT(ii, list); 1251 uhci_check_intr(sc, ii); 1252 } 1253 1254 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1255 if (sc->sc_softwake) { 1256 sc->sc_softwake = 0; 1257 wakeup(&sc->sc_softwake); 1258 } 1259 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */ 1260 1261 sc->sc_bus.intr_context--; 1262 } 1263 1264 /* Check for an interrupt. */ 1265 void 1266 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1267 { 1268 uhci_soft_td_t *std, *lstd; 1269 u_int32_t status; 1270 1271 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1272 #ifdef DIAGNOSTIC 1273 if (ii == NULL) { 1274 printf("uhci_check_intr: no ii? %p\n", ii); 1275 return; 1276 } 1277 #endif 1278 if (ii->xfer->status == USBD_CANCELLED || 1279 ii->xfer->status == USBD_TIMEOUT) { 1280 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1281 return; 1282 } 1283 1284 if (ii->stdstart == NULL) 1285 return; 1286 lstd = ii->stdend; 1287 #ifdef DIAGNOSTIC 1288 if (lstd == NULL) { 1289 printf("uhci_check_intr: std==0\n"); 1290 return; 1291 } 1292 #endif 1293 /* 1294 * If the last TD is still active we need to check whether there 1295 * is an error somewhere in the middle, or whether there was a 1296 * short packet (SPD and not ACTIVE). 1297 */ 1298 if (letoh32(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1299 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1300 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1301 status = letoh32(std->td.td_status); 1302 /* If there's an active TD the xfer isn't done. */ 1303 if (status & UHCI_TD_ACTIVE) 1304 break; 1305 /* Any kind of error makes the xfer done. */ 1306 if (status & UHCI_TD_STALLED) 1307 goto done; 1308 /* We want short packets, and it is short: it's done */ 1309 if ((status & UHCI_TD_SPD) && 1310 UHCI_TD_GET_ACTLEN(status) < 1311 UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token))) 1312 goto done; 1313 } 1314 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1315 ii, ii->stdstart)); 1316 return; 1317 } 1318 done: 1319 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1320 timeout_del(&ii->xfer->timeout_handle); 1321 uhci_idone(ii); 1322 } 1323 1324 /* Called at splusb() */ 1325 void 1326 uhci_idone(uhci_intr_info_t *ii) 1327 { 1328 usbd_xfer_handle xfer = ii->xfer; 1329 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1330 uhci_soft_td_t *std; 1331 u_int32_t status = 0, nstatus; 1332 int actlen; 1333 1334 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1335 #ifdef DIAGNOSTIC 1336 { 1337 int s = splhigh(); 1338 if (ii->isdone) { 1339 splx(s); 1340 #ifdef UHCI_DEBUG 1341 printf("uhci_idone: ii is done!\n "); 1342 uhci_dump_ii(ii); 1343 #else 1344 printf("uhci_idone: ii=%p is done!\n", ii); 1345 #endif 1346 return; 1347 } 1348 ii->isdone = 1; 1349 splx(s); 1350 } 1351 #endif 1352 1353 if (xfer->nframes != 0) { 1354 /* Isoc transfer, do things differently. */ 1355 uhci_soft_td_t **stds = upipe->u.iso.stds; 1356 int i, n, nframes, len; 1357 1358 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1359 1360 nframes = xfer->nframes; 1361 actlen = 0; 1362 n = UXFER(xfer)->curframe; 1363 for (i = 0; i < nframes; i++) { 1364 std = stds[n]; 1365 #ifdef UHCI_DEBUG 1366 if (uhcidebug > 5) { 1367 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1368 uhci_dump_td(std); 1369 } 1370 #endif 1371 if (++n >= UHCI_VFRAMELIST_COUNT) 1372 n = 0; 1373 status = letoh32(std->td.td_status); 1374 len = UHCI_TD_GET_ACTLEN(status); 1375 xfer->frlengths[i] = len; 1376 actlen += len; 1377 } 1378 upipe->u.iso.inuse -= nframes; 1379 xfer->actlen = actlen; 1380 xfer->status = USBD_NORMAL_COMPLETION; 1381 goto end; 1382 } 1383 1384 #ifdef UHCI_DEBUG 1385 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1386 ii, xfer, upipe)); 1387 if (uhcidebug > 10) 1388 uhci_dump_tds(ii->stdstart); 1389 #endif 1390 1391 /* The transfer is done, compute actual length and status. */ 1392 actlen = 0; 1393 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1394 nstatus = letoh32(std->td.td_status); 1395 if (nstatus & UHCI_TD_ACTIVE) 1396 break; 1397 1398 status = nstatus; 1399 if (UHCI_TD_GET_PID(letoh32(std->td.td_token)) != 1400 UHCI_TD_PID_SETUP) 1401 actlen += UHCI_TD_GET_ACTLEN(status); 1402 else { 1403 /* 1404 * UHCI will report CRCTO in addition to a STALL or NAK 1405 * for a SETUP transaction. See section 3.2.2, "TD 1406 * CONTROL AND STATUS". 1407 */ 1408 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1409 status &= ~UHCI_TD_CRCTO; 1410 } 1411 } 1412 /* If there are left over TDs we need to update the toggle. */ 1413 if (std != NULL) 1414 upipe->nexttoggle = UHCI_TD_GET_DT(letoh32(std->td.td_token)); 1415 1416 status &= UHCI_TD_ERROR; 1417 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1418 actlen, status)); 1419 xfer->actlen = actlen; 1420 if (status != 0) { 1421 #ifdef UHCI_DEBUG 1422 char sbuf[128]; 1423 1424 bitmask_snprintf((u_int32_t)status, 1425 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1426 "BABBLE\26DBUFFER\27STALLED\30ACTIVE", 1427 sbuf, sizeof(sbuf)); 1428 1429 DPRINTFN((status == UHCI_TD_STALLED)*10, 1430 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1431 "status 0x%s\n", 1432 xfer->pipe->device->address, 1433 xfer->pipe->endpoint->edesc->bEndpointAddress, 1434 sbuf)); 1435 #endif 1436 1437 if (status == UHCI_TD_STALLED) 1438 xfer->status = USBD_STALLED; 1439 else 1440 xfer->status = USBD_IOERROR; /* more info XXX */ 1441 } else { 1442 xfer->status = USBD_NORMAL_COMPLETION; 1443 } 1444 1445 end: 1446 usb_transfer_complete(xfer); 1447 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1448 } 1449 1450 /* 1451 * Called when a request does not complete. 1452 */ 1453 void 1454 uhci_timeout(void *addr) 1455 { 1456 uhci_intr_info_t *ii = addr; 1457 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1458 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1459 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1460 1461 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1462 1463 if (sc->sc_dying) { 1464 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1465 return; 1466 } 1467 1468 /* Execute the abort in a process context. */ 1469 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1470 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task); 1471 } 1472 1473 void 1474 uhci_timeout_task(void *addr) 1475 { 1476 usbd_xfer_handle xfer = addr; 1477 int s; 1478 1479 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1480 1481 s = splusb(); 1482 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1483 splx(s); 1484 } 1485 1486 /* 1487 * Wait here until controller claims to have an interrupt. 1488 * Then call uhci_intr and return. Use timeout to avoid waiting 1489 * too long. 1490 * Only used during boot when interrupts are not enabled yet. 1491 */ 1492 void 1493 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1494 { 1495 int timo = xfer->timeout; 1496 uhci_intr_info_t *ii; 1497 1498 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1499 1500 xfer->status = USBD_IN_PROGRESS; 1501 for (; timo >= 0; timo--) { 1502 usb_delay_ms(&sc->sc_bus, 1); 1503 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1504 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) { 1505 uhci_intr1(sc); 1506 if (xfer->status != USBD_IN_PROGRESS) 1507 return; 1508 } 1509 } 1510 1511 /* Timeout */ 1512 DPRINTF(("uhci_waitintr: timeout\n")); 1513 for (ii = LIST_FIRST(&sc->sc_intrhead); 1514 ii != NULL && ii->xfer != xfer; 1515 ii = LIST_NEXT(ii, list)) 1516 ; 1517 #ifdef DIAGNOSTIC 1518 if (ii == NULL) 1519 panic("uhci_waitintr: lost intr_info"); 1520 #endif 1521 uhci_idone(ii); 1522 } 1523 1524 void 1525 uhci_poll(struct usbd_bus *bus) 1526 { 1527 uhci_softc_t *sc = (uhci_softc_t *)bus; 1528 1529 if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) 1530 uhci_intr1(sc); 1531 } 1532 1533 void 1534 uhci_reset(uhci_softc_t *sc) 1535 { 1536 int n; 1537 1538 UHCICMD(sc, UHCI_CMD_HCRESET); 1539 /* The reset bit goes low when the controller is done. */ 1540 for (n = 0; n < UHCI_RESET_TIMEOUT && 1541 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1542 usb_delay_ms(&sc->sc_bus, 1); 1543 if (n >= UHCI_RESET_TIMEOUT) 1544 printf("%s: controller did not reset\n", 1545 sc->sc_bus.bdev.dv_xname); 1546 } 1547 1548 usbd_status 1549 uhci_run(uhci_softc_t *sc, int run) 1550 { 1551 int s, n, running; 1552 u_int16_t cmd; 1553 1554 run = run != 0; 1555 s = splhardusb(); 1556 DPRINTF(("uhci_run: setting run=%d\n", run)); 1557 cmd = UREAD2(sc, UHCI_CMD); 1558 if (run) 1559 cmd |= UHCI_CMD_RS; 1560 else 1561 cmd &= ~UHCI_CMD_RS; 1562 UHCICMD(sc, cmd); 1563 for(n = 0; n < 10; n++) { 1564 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1565 /* return when we've entered the state we want */ 1566 if (run == running) { 1567 splx(s); 1568 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1569 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1570 return (USBD_NORMAL_COMPLETION); 1571 } 1572 usb_delay_ms(&sc->sc_bus, 1); 1573 } 1574 splx(s); 1575 printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname, 1576 run ? "start" : "stop"); 1577 return (USBD_IOERROR); 1578 } 1579 1580 /* 1581 * Memory management routines. 1582 * uhci_alloc_std allocates TDs 1583 * uhci_alloc_sqh allocates QHs 1584 * These two routines do their own free list management, 1585 * partly for speed, partly because allocating DMAable memory 1586 * has page size granularaity so much memory would be wasted if 1587 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1588 */ 1589 1590 uhci_soft_td_t * 1591 uhci_alloc_std(uhci_softc_t *sc) 1592 { 1593 uhci_soft_td_t *std; 1594 usbd_status err; 1595 int i, offs; 1596 usb_dma_t dma; 1597 1598 if (sc->sc_freetds == NULL) { 1599 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1600 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1601 UHCI_TD_ALIGN, &dma); 1602 if (err) 1603 return (0); 1604 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1605 offs = i * UHCI_STD_SIZE; 1606 std = KERNADDR(&dma, offs); 1607 std->physaddr = DMAADDR(&dma, offs); 1608 std->link.std = sc->sc_freetds; 1609 sc->sc_freetds = std; 1610 } 1611 } 1612 std = sc->sc_freetds; 1613 sc->sc_freetds = std->link.std; 1614 memset(&std->td, 0, sizeof(uhci_td_t)); 1615 return std; 1616 } 1617 1618 void 1619 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1620 { 1621 #ifdef DIAGNOSTIC 1622 #define TD_IS_FREE 0x12345678 1623 if (letoh32(std->td.td_token) == TD_IS_FREE) { 1624 printf("uhci_free_std: freeing free TD %p\n", std); 1625 return; 1626 } 1627 std->td.td_token = htole32(TD_IS_FREE); 1628 #endif 1629 std->link.std = sc->sc_freetds; 1630 sc->sc_freetds = std; 1631 } 1632 1633 uhci_soft_qh_t * 1634 uhci_alloc_sqh(uhci_softc_t *sc) 1635 { 1636 uhci_soft_qh_t *sqh; 1637 usbd_status err; 1638 int i, offs; 1639 usb_dma_t dma; 1640 1641 if (sc->sc_freeqhs == NULL) { 1642 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1643 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1644 UHCI_QH_ALIGN, &dma); 1645 if (err) 1646 return (0); 1647 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1648 offs = i * UHCI_SQH_SIZE; 1649 sqh = KERNADDR(&dma, offs); 1650 sqh->physaddr = DMAADDR(&dma, offs); 1651 sqh->hlink = sc->sc_freeqhs; 1652 sc->sc_freeqhs = sqh; 1653 } 1654 } 1655 sqh = sc->sc_freeqhs; 1656 sc->sc_freeqhs = sqh->hlink; 1657 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1658 return (sqh); 1659 } 1660 1661 void 1662 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1663 { 1664 sqh->hlink = sc->sc_freeqhs; 1665 sc->sc_freeqhs = sqh; 1666 } 1667 1668 void 1669 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1670 uhci_soft_td_t *stdend) 1671 { 1672 uhci_soft_td_t *p; 1673 1674 for (; std != stdend; std = p) { 1675 p = std->link.std; 1676 uhci_free_std(sc, std); 1677 } 1678 } 1679 1680 usbd_status 1681 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, u_int len, 1682 int rd, u_int16_t flags, usb_dma_t *dma, 1683 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1684 { 1685 uhci_soft_td_t *p, *lastp; 1686 uhci_physaddr_t lastlink; 1687 int i, ntd, l, tog, maxp; 1688 u_int32_t status; 1689 int addr = upipe->pipe.device->address; 1690 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1691 1692 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%u speed=%d " 1693 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1694 upipe->pipe.device->speed, flags)); 1695 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1696 if (maxp == 0) { 1697 printf("uhci_alloc_std_chain: maxp=0\n"); 1698 return (USBD_INVAL); 1699 } 1700 ntd = (len + maxp - 1) / maxp; 1701 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1702 ntd++; 1703 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1704 if (ntd == 0) { 1705 *sp = *ep = 0; 1706 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1707 return (USBD_NORMAL_COMPLETION); 1708 } 1709 tog = upipe->nexttoggle; 1710 if (ntd % 2 == 0) 1711 tog ^= 1; 1712 upipe->nexttoggle = tog ^ 1; 1713 lastp = NULL; 1714 lastlink = UHCI_PTR_T; 1715 ntd--; 1716 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1717 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1718 status |= UHCI_TD_LS; 1719 if (flags & USBD_SHORT_XFER_OK) 1720 status |= UHCI_TD_SPD; 1721 for (i = ntd; i >= 0; i--) { 1722 p = uhci_alloc_std(sc); 1723 if (p == NULL) { 1724 uhci_free_std_chain(sc, lastp, NULL); 1725 return (USBD_NOMEM); 1726 } 1727 p->link.std = lastp; 1728 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1729 lastp = p; 1730 lastlink = p->physaddr; 1731 p->td.td_status = htole32(status); 1732 if (i == ntd) { 1733 /* last TD */ 1734 l = len % maxp; 1735 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1736 l = maxp; 1737 *ep = p; 1738 } else 1739 l = maxp; 1740 p->td.td_token = 1741 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1742 UHCI_TD_OUT(l, endpt, addr, tog)); 1743 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1744 tog ^= 1; 1745 } 1746 *sp = lastp; 1747 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1748 upipe->nexttoggle)); 1749 return (USBD_NORMAL_COMPLETION); 1750 } 1751 1752 void 1753 uhci_device_clear_toggle(usbd_pipe_handle pipe) 1754 { 1755 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1756 upipe->nexttoggle = 0; 1757 } 1758 1759 void 1760 uhci_noop(usbd_pipe_handle pipe) 1761 { 1762 } 1763 1764 usbd_status 1765 uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1766 { 1767 usbd_status err; 1768 1769 /* Insert last in queue. */ 1770 err = usb_insert_transfer(xfer); 1771 if (err) 1772 return (err); 1773 1774 /* 1775 * Pipe isn't running (otherwise err would be USBD_INPROG), 1776 * so start it first. 1777 */ 1778 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1779 } 1780 1781 usbd_status 1782 uhci_device_bulk_start(usbd_xfer_handle xfer) 1783 { 1784 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1785 usbd_device_handle dev = upipe->pipe.device; 1786 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1787 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1788 uhci_soft_td_t *data, *dataend; 1789 uhci_soft_qh_t *sqh; 1790 usbd_status err; 1791 u_int len; 1792 int isread, endpt; 1793 int s; 1794 1795 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%u flags=%d ii=%p\n", 1796 xfer, xfer->length, xfer->flags, ii)); 1797 1798 if (sc->sc_dying) 1799 return (USBD_IOERROR); 1800 1801 #ifdef DIAGNOSTIC 1802 if (xfer->rqflags & URQ_REQUEST) 1803 panic("uhci_device_bulk_start: a request"); 1804 #endif 1805 1806 len = xfer->length; 1807 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1808 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 1809 sqh = upipe->u.bulk.sqh; 1810 1811 upipe->u.bulk.isread = isread; 1812 upipe->u.bulk.length = len; 1813 1814 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 1815 &xfer->dmabuf, &data, &dataend); 1816 if (err) 1817 return (err); 1818 dataend->td.td_status |= htole32(UHCI_TD_IOC); 1819 1820 #ifdef UHCI_DEBUG 1821 if (uhcidebug > 8) { 1822 DPRINTF(("uhci_device_bulk_start: data(1)\n")); 1823 uhci_dump_tds(data); 1824 } 1825 #endif 1826 1827 /* Set up interrupt info. */ 1828 ii->xfer = xfer; 1829 ii->stdstart = data; 1830 ii->stdend = dataend; 1831 #ifdef DIAGNOSTIC 1832 if (!ii->isdone) { 1833 printf("uhci_device_bulk_start: not done, ii=%p\n", ii); 1834 } 1835 ii->isdone = 0; 1836 #endif 1837 1838 sqh->elink = data; 1839 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 1840 1841 s = splusb(); 1842 uhci_add_bulk(sc, sqh); 1843 uhci_add_intr_info(sc, ii); 1844 1845 if (xfer->timeout && !sc->sc_bus.use_polling) { 1846 timeout_del(&xfer->timeout_handle); 1847 timeout_set(&xfer->timeout_handle, uhci_timeout, ii); 1848 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 1849 } 1850 xfer->status = USBD_IN_PROGRESS; 1851 splx(s); 1852 1853 #ifdef UHCI_DEBUG 1854 if (uhcidebug > 10) { 1855 DPRINTF(("uhci_device_bulk_start: data(2)\n")); 1856 uhci_dump_tds(data); 1857 } 1858 #endif 1859 1860 if (sc->sc_bus.use_polling) 1861 uhci_waitintr(sc, xfer); 1862 1863 return (USBD_IN_PROGRESS); 1864 } 1865 1866 /* Abort a device bulk request. */ 1867 void 1868 uhci_device_bulk_abort(usbd_xfer_handle xfer) 1869 { 1870 DPRINTF(("uhci_device_bulk_abort:\n")); 1871 uhci_abort_xfer(xfer, USBD_CANCELLED); 1872 } 1873 1874 /* 1875 * Abort a device request. 1876 * If this routine is called at splusb() it guarantees that the request 1877 * will be removed from the hardware scheduling and that the callback 1878 * for it will be called with USBD_CANCELLED status. 1879 * It's impossible to guarantee that the requested transfer will not 1880 * have happened since the hardware runs concurrently. 1881 * If the transaction has already happened we rely on the ordinary 1882 * interrupt processing to process it. 1883 */ 1884 void 1885 uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1886 { 1887 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 1888 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1889 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 1890 uhci_soft_td_t *std; 1891 int s; 1892 1893 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 1894 1895 if (sc->sc_dying) { 1896 /* If we're dying, just do the software part. */ 1897 s = splusb(); 1898 xfer->status = status; /* make software ignore it */ 1899 timeout_del(&xfer->timeout_handle); 1900 usb_transfer_complete(xfer); 1901 splx(s); 1902 return; 1903 } 1904 1905 if (xfer->device->bus->intr_context || !curproc) 1906 panic("uhci_abort_xfer: not in process context"); 1907 1908 /* 1909 * Step 1: Make interrupt routine and hardware ignore xfer. 1910 */ 1911 s = splusb(); 1912 xfer->status = status; /* make software ignore it */ 1913 timeout_del(&xfer->timeout_handle); 1914 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 1915 for (std = ii->stdstart; std != NULL; std = std->link.std) 1916 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 1917 splx(s); 1918 1919 /* 1920 * Step 2: Wait until we know hardware has finished any possible 1921 * use of the xfer. Also make sure the soft interrupt routine 1922 * has run. 1923 */ 1924 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 1925 s = splusb(); 1926 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1927 sc->sc_softwake = 1; 1928 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */ 1929 usb_schedsoftintr(&sc->sc_bus); 1930 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1931 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 1932 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 1933 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */ 1934 splx(s); 1935 1936 /* 1937 * Step 3: Execute callback. 1938 */ 1939 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 1940 s = splusb(); 1941 #ifdef DIAGNOSTIC 1942 ii->isdone = 1; 1943 #endif 1944 usb_transfer_complete(xfer); 1945 splx(s); 1946 } 1947 1948 /* Close a device bulk pipe. */ 1949 void 1950 uhci_device_bulk_close(usbd_pipe_handle pipe) 1951 { 1952 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1953 usbd_device_handle dev = upipe->pipe.device; 1954 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 1955 1956 uhci_free_sqh(sc, upipe->u.bulk.sqh); 1957 pipe->endpoint->savedtoggle = upipe->nexttoggle; 1958 } 1959 1960 usbd_status 1961 uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 1962 { 1963 usbd_status err; 1964 1965 /* Insert last in queue. */ 1966 err = usb_insert_transfer(xfer); 1967 if (err) 1968 return (err); 1969 1970 /* 1971 * Pipe isn't running (otherwise err would be USBD_INPROG), 1972 * so start it first. 1973 */ 1974 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 1975 } 1976 1977 usbd_status 1978 uhci_device_ctrl_start(usbd_xfer_handle xfer) 1979 { 1980 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 1981 usbd_status err; 1982 1983 if (sc->sc_dying) 1984 return (USBD_IOERROR); 1985 1986 #ifdef DIAGNOSTIC 1987 if (!(xfer->rqflags & URQ_REQUEST)) 1988 panic("uhci_device_ctrl_transfer: not a request"); 1989 #endif 1990 1991 err = uhci_device_request(xfer); 1992 if (err) 1993 return (err); 1994 1995 if (sc->sc_bus.use_polling) 1996 uhci_waitintr(sc, xfer); 1997 return (USBD_IN_PROGRESS); 1998 } 1999 2000 usbd_status 2001 uhci_device_intr_transfer(usbd_xfer_handle xfer) 2002 { 2003 usbd_status err; 2004 2005 /* Insert last in queue. */ 2006 err = usb_insert_transfer(xfer); 2007 if (err) 2008 return (err); 2009 2010 /* 2011 * Pipe isn't running (otherwise err would be USBD_INPROG), 2012 * so start it first. 2013 */ 2014 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2015 } 2016 2017 usbd_status 2018 uhci_device_intr_start(usbd_xfer_handle xfer) 2019 { 2020 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2021 usbd_device_handle dev = upipe->pipe.device; 2022 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2023 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2024 uhci_soft_td_t *data, *dataend; 2025 uhci_soft_qh_t *sqh; 2026 usbd_status err; 2027 int isread, endpt; 2028 int i, s; 2029 2030 if (sc->sc_dying) 2031 return (USBD_IOERROR); 2032 2033 DPRINTFN(3,("uhci_device_intr_start: xfer=%p len=%u flags=%d\n", 2034 xfer, xfer->length, xfer->flags)); 2035 2036 #ifdef DIAGNOSTIC 2037 if (xfer->rqflags & URQ_REQUEST) 2038 panic("uhci_device_intr_start: a request"); 2039 #endif 2040 2041 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2042 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2043 2044 upipe->u.intr.isread = isread; 2045 2046 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2047 xfer->flags, &xfer->dmabuf, &data, 2048 &dataend); 2049 2050 if (err) 2051 return (err); 2052 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2053 2054 #ifdef UHCI_DEBUG 2055 if (uhcidebug > 10) { 2056 DPRINTF(("uhci_device_intr_start: data(1)\n")); 2057 uhci_dump_tds(data); 2058 uhci_dump_qh(upipe->u.intr.qhs[0]); 2059 } 2060 #endif 2061 2062 s = splusb(); 2063 /* Set up interrupt info. */ 2064 ii->xfer = xfer; 2065 ii->stdstart = data; 2066 ii->stdend = dataend; 2067 #ifdef DIAGNOSTIC 2068 if (!ii->isdone) { 2069 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2070 } 2071 ii->isdone = 0; 2072 #endif 2073 2074 DPRINTFN(10,("uhci_device_intr_start: qhs[0]=%p\n", 2075 upipe->u.intr.qhs[0])); 2076 for (i = 0; i < upipe->u.intr.npoll; i++) { 2077 sqh = upipe->u.intr.qhs[i]; 2078 sqh->elink = data; 2079 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2080 } 2081 uhci_add_intr_info(sc, ii); 2082 xfer->status = USBD_IN_PROGRESS; 2083 splx(s); 2084 2085 #ifdef UHCI_DEBUG 2086 if (uhcidebug > 10) { 2087 DPRINTF(("uhci_device_intr_start: data(2)\n")); 2088 uhci_dump_tds(data); 2089 uhci_dump_qh(upipe->u.intr.qhs[0]); 2090 } 2091 #endif 2092 2093 return (USBD_IN_PROGRESS); 2094 } 2095 2096 /* Abort a device control request. */ 2097 void 2098 uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2099 { 2100 DPRINTF(("uhci_device_ctrl_abort:\n")); 2101 uhci_abort_xfer(xfer, USBD_CANCELLED); 2102 } 2103 2104 /* Close a device control pipe. */ 2105 void 2106 uhci_device_ctrl_close(usbd_pipe_handle pipe) 2107 { 2108 } 2109 2110 /* Abort a device interrupt request. */ 2111 void 2112 uhci_device_intr_abort(usbd_xfer_handle xfer) 2113 { 2114 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2115 if (xfer->pipe->intrxfer == xfer) { 2116 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2117 xfer->pipe->intrxfer = NULL; 2118 } 2119 uhci_abort_xfer(xfer, USBD_CANCELLED); 2120 } 2121 2122 /* Close a device interrupt pipe. */ 2123 void 2124 uhci_device_intr_close(usbd_pipe_handle pipe) 2125 { 2126 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2127 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2128 int i, npoll; 2129 int s; 2130 2131 /* Unlink descriptors from controller data structures. */ 2132 npoll = upipe->u.intr.npoll; 2133 s = splusb(); 2134 for (i = 0; i < npoll; i++) 2135 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2136 splx(s); 2137 2138 /* 2139 * We now have to wait for any activity on the physical 2140 * descriptors to stop. 2141 */ 2142 usb_delay_ms(&sc->sc_bus, 2); 2143 2144 for(i = 0; i < npoll; i++) 2145 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2146 free(upipe->u.intr.qhs, M_USBHC); 2147 2148 /* XXX free other resources */ 2149 } 2150 2151 usbd_status 2152 uhci_device_request(usbd_xfer_handle xfer) 2153 { 2154 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2155 usb_device_request_t *req = &xfer->request; 2156 usbd_device_handle dev = upipe->pipe.device; 2157 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2158 int addr = dev->address; 2159 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2160 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2161 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2162 uhci_soft_qh_t *sqh; 2163 u_int len; 2164 u_int32_t ls; 2165 usbd_status err; 2166 int isread; 2167 int s; 2168 2169 DPRINTFN(3,("uhci_device_request type=0x%02x, request=0x%02x, " 2170 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n", 2171 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2172 UGETW(req->wIndex), UGETW(req->wLength), 2173 addr, endpt)); 2174 2175 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2176 isread = req->bmRequestType & UT_READ; 2177 len = UGETW(req->wLength); 2178 2179 setup = upipe->u.ctl.setup; 2180 stat = upipe->u.ctl.stat; 2181 sqh = upipe->u.ctl.sqh; 2182 2183 /* Set up data transaction */ 2184 if (len != 0) { 2185 upipe->nexttoggle = 1; 2186 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2187 &xfer->dmabuf, &data, &dataend); 2188 if (err) 2189 return (err); 2190 next = data; 2191 dataend->link.std = stat; 2192 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2193 } else { 2194 next = stat; 2195 } 2196 upipe->u.ctl.length = len; 2197 2198 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2199 2200 setup->link.std = next; 2201 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2202 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2203 UHCI_TD_ACTIVE); 2204 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2205 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2206 2207 stat->link.std = NULL; 2208 stat->td.td_link = htole32(UHCI_PTR_T); 2209 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2210 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2211 stat->td.td_token = 2212 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2213 UHCI_TD_IN (0, endpt, addr, 1)); 2214 stat->td.td_buffer = htole32(0); 2215 2216 #ifdef UHCI_DEBUG 2217 if (uhcidebug > 10) { 2218 DPRINTF(("uhci_device_request: before transfer\n")); 2219 uhci_dump_tds(setup); 2220 } 2221 #endif 2222 2223 /* Set up interrupt info. */ 2224 ii->xfer = xfer; 2225 ii->stdstart = setup; 2226 ii->stdend = stat; 2227 #ifdef DIAGNOSTIC 2228 if (!ii->isdone) { 2229 printf("uhci_device_request: not done, ii=%p\n", ii); 2230 } 2231 ii->isdone = 0; 2232 #endif 2233 2234 sqh->elink = setup; 2235 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2236 2237 s = splusb(); 2238 if (dev->speed == USB_SPEED_LOW) 2239 uhci_add_ls_ctrl(sc, sqh); 2240 else 2241 uhci_add_hs_ctrl(sc, sqh); 2242 uhci_add_intr_info(sc, ii); 2243 #ifdef UHCI_DEBUG 2244 if (uhcidebug > 12) { 2245 uhci_soft_td_t *std; 2246 uhci_soft_qh_t *xqh; 2247 uhci_soft_qh_t *sxqh; 2248 int maxqh = 0; 2249 uhci_physaddr_t link; 2250 DPRINTF(("uhci_device_request: follow from [0]\n")); 2251 for (std = sc->sc_vframes[0].htd, link = 0; 2252 (link & UHCI_PTR_QH) == 0; 2253 std = std->link.std) { 2254 link = letoh32(std->td.td_link); 2255 uhci_dump_td(std); 2256 } 2257 sxqh = (uhci_soft_qh_t *)std; 2258 uhci_dump_qh(sxqh); 2259 for (xqh = sxqh; 2260 xqh != NULL; 2261 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2262 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2263 uhci_dump_qh(xqh); 2264 } 2265 DPRINTF(("Enqueued QH:\n")); 2266 uhci_dump_qh(sqh); 2267 uhci_dump_tds(sqh->elink); 2268 } 2269 #endif 2270 if (xfer->timeout && !sc->sc_bus.use_polling) { 2271 timeout_del(&xfer->timeout_handle); 2272 timeout_set(&xfer->timeout_handle, uhci_timeout, ii); 2273 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 2274 } 2275 xfer->status = USBD_IN_PROGRESS; 2276 splx(s); 2277 2278 return (USBD_NORMAL_COMPLETION); 2279 } 2280 2281 usbd_status 2282 uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2283 { 2284 usbd_status err; 2285 2286 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2287 2288 /* Put it on our queue, */ 2289 err = usb_insert_transfer(xfer); 2290 2291 /* bail out on error, */ 2292 if (err && err != USBD_IN_PROGRESS) 2293 return (err); 2294 2295 /* XXX should check inuse here */ 2296 2297 /* insert into schedule, */ 2298 uhci_device_isoc_enter(xfer); 2299 2300 /* and start if the pipe wasn't running */ 2301 if (!err) 2302 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2303 2304 return (err); 2305 } 2306 2307 void 2308 uhci_device_isoc_enter(usbd_xfer_handle xfer) 2309 { 2310 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2311 usbd_device_handle dev = upipe->pipe.device; 2312 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2313 struct iso *iso = &upipe->u.iso; 2314 uhci_soft_td_t *std; 2315 u_int32_t buf, len, status; 2316 int s, i, next, nframes; 2317 2318 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2319 "nframes=%d\n", 2320 iso->inuse, iso->next, xfer, xfer->nframes)); 2321 2322 if (sc->sc_dying) 2323 return; 2324 2325 if (xfer->status == USBD_IN_PROGRESS) { 2326 /* This request has already been entered into the frame list */ 2327 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2328 /* XXX */ 2329 } 2330 2331 #ifdef DIAGNOSTIC 2332 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2333 printf("uhci_device_isoc_enter: overflow!\n"); 2334 #endif 2335 2336 next = iso->next; 2337 if (next == -1) { 2338 /* Not in use yet, schedule it a few frames ahead. */ 2339 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2340 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2341 } 2342 2343 xfer->status = USBD_IN_PROGRESS; 2344 UXFER(xfer)->curframe = next; 2345 2346 buf = DMAADDR(&xfer->dmabuf, 0); 2347 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2348 UHCI_TD_ACTIVE | 2349 UHCI_TD_IOS); 2350 nframes = xfer->nframes; 2351 s = splusb(); 2352 for (i = 0; i < nframes; i++) { 2353 std = iso->stds[next]; 2354 if (++next >= UHCI_VFRAMELIST_COUNT) 2355 next = 0; 2356 len = xfer->frlengths[i]; 2357 std->td.td_buffer = htole32(buf); 2358 if (i == nframes - 1) 2359 status |= UHCI_TD_IOC; 2360 std->td.td_status = htole32(status); 2361 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2362 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2363 #ifdef UHCI_DEBUG 2364 if (uhcidebug > 5) { 2365 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2366 uhci_dump_td(std); 2367 } 2368 #endif 2369 buf += len; 2370 } 2371 iso->next = next; 2372 iso->inuse += xfer->nframes; 2373 2374 splx(s); 2375 } 2376 2377 usbd_status 2378 uhci_device_isoc_start(usbd_xfer_handle xfer) 2379 { 2380 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2381 uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus; 2382 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2383 uhci_soft_td_t *end; 2384 int s, i; 2385 2386 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2387 2388 if (sc->sc_dying) 2389 return (USBD_IOERROR); 2390 2391 #ifdef DIAGNOSTIC 2392 if (xfer->status != USBD_IN_PROGRESS) 2393 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2394 #endif 2395 2396 /* Find the last TD */ 2397 i = UXFER(xfer)->curframe + xfer->nframes; 2398 if (i >= UHCI_VFRAMELIST_COUNT) 2399 i -= UHCI_VFRAMELIST_COUNT; 2400 end = upipe->u.iso.stds[i]; 2401 2402 #ifdef DIAGNOSTIC 2403 if (end == NULL) { 2404 printf("uhci_device_isoc_start: end == NULL\n"); 2405 return (USBD_INVAL); 2406 } 2407 #endif 2408 2409 s = splusb(); 2410 2411 /* Set up interrupt info. */ 2412 ii->xfer = xfer; 2413 ii->stdstart = end; 2414 ii->stdend = end; 2415 #ifdef DIAGNOSTIC 2416 if (!ii->isdone) 2417 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2418 ii->isdone = 0; 2419 #endif 2420 uhci_add_intr_info(sc, ii); 2421 2422 splx(s); 2423 2424 return (USBD_IN_PROGRESS); 2425 } 2426 2427 void 2428 uhci_device_isoc_abort(usbd_xfer_handle xfer) 2429 { 2430 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2431 uhci_soft_td_t **stds = upipe->u.iso.stds; 2432 uhci_soft_td_t *std; 2433 int i, n, s, nframes, maxlen, len; 2434 2435 s = splusb(); 2436 2437 /* Transfer is already done. */ 2438 if (xfer->status != USBD_NOT_STARTED && 2439 xfer->status != USBD_IN_PROGRESS) { 2440 splx(s); 2441 return; 2442 } 2443 2444 /* Give xfer the requested abort code. */ 2445 xfer->status = USBD_CANCELLED; 2446 2447 /* make hardware ignore it, */ 2448 nframes = xfer->nframes; 2449 n = UXFER(xfer)->curframe; 2450 maxlen = 0; 2451 for (i = 0; i < nframes; i++) { 2452 std = stds[n]; 2453 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2454 len = UHCI_TD_GET_MAXLEN(letoh32(std->td.td_token)); 2455 if (len > maxlen) 2456 maxlen = len; 2457 if (++n >= UHCI_VFRAMELIST_COUNT) 2458 n = 0; 2459 } 2460 2461 /* and wait until we are sure the hardware has finished. */ 2462 delay(maxlen); 2463 2464 #ifdef DIAGNOSTIC 2465 UXFER(xfer)->iinfo.isdone = 1; 2466 #endif 2467 /* Run callback and remove from interrupt list. */ 2468 usb_transfer_complete(xfer); 2469 2470 splx(s); 2471 } 2472 2473 void 2474 uhci_device_isoc_close(usbd_pipe_handle pipe) 2475 { 2476 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2477 usbd_device_handle dev = upipe->pipe.device; 2478 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2479 uhci_soft_td_t *std, *vstd; 2480 struct iso *iso; 2481 int i, s; 2482 2483 /* 2484 * Make sure all TDs are marked as inactive. 2485 * Wait for completion. 2486 * Unschedule. 2487 * Deallocate. 2488 */ 2489 iso = &upipe->u.iso; 2490 2491 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) 2492 iso->stds[i]->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2493 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2494 2495 s = splusb(); 2496 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2497 std = iso->stds[i]; 2498 for (vstd = sc->sc_vframes[i].htd; 2499 vstd != NULL && vstd->link.std != std; 2500 vstd = vstd->link.std) 2501 ; 2502 if (vstd == NULL) { 2503 /*panic*/ 2504 printf("uhci_device_isoc_close: %p not found\n", std); 2505 splx(s); 2506 return; 2507 } 2508 vstd->link = std->link; 2509 vstd->td.td_link = std->td.td_link; 2510 uhci_free_std(sc, std); 2511 } 2512 splx(s); 2513 2514 free(iso->stds, M_USBHC); 2515 } 2516 2517 usbd_status 2518 uhci_setup_isoc(usbd_pipe_handle pipe) 2519 { 2520 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2521 usbd_device_handle dev = upipe->pipe.device; 2522 uhci_softc_t *sc = (uhci_softc_t *)dev->bus; 2523 int addr = upipe->pipe.device->address; 2524 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2525 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2526 uhci_soft_td_t *std, *vstd; 2527 u_int32_t token; 2528 struct iso *iso; 2529 int i, s; 2530 2531 iso = &upipe->u.iso; 2532 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2533 M_USBHC, M_WAITOK); 2534 2535 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2536 UHCI_TD_OUT(0, endpt, addr, 0); 2537 2538 /* Allocate the TDs and mark as inactive; */ 2539 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2540 std = uhci_alloc_std(sc); 2541 if (std == 0) 2542 goto bad; 2543 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2544 std->td.td_token = htole32(token); 2545 iso->stds[i] = std; 2546 } 2547 2548 /* Insert TDs into schedule. */ 2549 s = splusb(); 2550 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2551 std = iso->stds[i]; 2552 vstd = sc->sc_vframes[i].htd; 2553 std->link = vstd->link; 2554 std->td.td_link = vstd->td.td_link; 2555 vstd->link.std = std; 2556 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2557 } 2558 splx(s); 2559 2560 iso->next = -1; 2561 iso->inuse = 0; 2562 2563 return (USBD_NORMAL_COMPLETION); 2564 2565 bad: 2566 while (--i >= 0) 2567 uhci_free_std(sc, iso->stds[i]); 2568 free(iso->stds, M_USBHC); 2569 return (USBD_NOMEM); 2570 } 2571 2572 void 2573 uhci_device_isoc_done(usbd_xfer_handle xfer) 2574 { 2575 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2576 2577 DPRINTFN(4, ("uhci_device_isoc_done: length=%d\n", xfer->actlen)); 2578 2579 if (ii->xfer != xfer) 2580 /* Not on interrupt list, ignore it. */ 2581 return; 2582 2583 if (!uhci_active_intr_info(ii)) 2584 return; 2585 2586 #ifdef DIAGNOSTIC 2587 if (xfer->busy_free == XFER_FREE) { 2588 printf("uhci_device_isoc_done: xfer=%p is free\n", xfer); 2589 return; 2590 } 2591 2592 if (ii->stdend == NULL) { 2593 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2594 #ifdef UHCI_DEBUG 2595 uhci_dump_ii(ii); 2596 #endif 2597 return; 2598 } 2599 #endif 2600 2601 /* Turn off the interrupt since it is active even if the TD is not. */ 2602 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2603 2604 uhci_del_intr_info(ii); /* remove from active list */ 2605 } 2606 2607 void 2608 uhci_device_intr_done(usbd_xfer_handle xfer) 2609 { 2610 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2611 uhci_softc_t *sc = ii->sc; 2612 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2613 uhci_soft_qh_t *sqh; 2614 int i, npoll; 2615 2616 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2617 2618 npoll = upipe->u.intr.npoll; 2619 for(i = 0; i < npoll; i++) { 2620 sqh = upipe->u.intr.qhs[i]; 2621 sqh->elink = NULL; 2622 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2623 } 2624 uhci_free_std_chain(sc, ii->stdstart, NULL); 2625 2626 /* XXX Wasteful. */ 2627 if (xfer->pipe->repeat) { 2628 uhci_soft_td_t *data, *dataend; 2629 2630 DPRINTFN(5,("uhci_device_intr_done: requeuing\n")); 2631 2632 /* This alloc cannot fail since we freed the chain above. */ 2633 uhci_alloc_std_chain(upipe, sc, xfer->length, 2634 upipe->u.intr.isread, xfer->flags, 2635 &xfer->dmabuf, &data, &dataend); 2636 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2637 2638 #ifdef UHCI_DEBUG 2639 if (uhcidebug > 10) { 2640 DPRINTF(("uhci_device_intr_done: data(1)\n")); 2641 uhci_dump_tds(data); 2642 uhci_dump_qh(upipe->u.intr.qhs[0]); 2643 } 2644 #endif 2645 2646 ii->stdstart = data; 2647 ii->stdend = dataend; 2648 #ifdef DIAGNOSTIC 2649 if (!ii->isdone) { 2650 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 2651 } 2652 ii->isdone = 0; 2653 #endif 2654 for (i = 0; i < npoll; i++) { 2655 sqh = upipe->u.intr.qhs[i]; 2656 sqh->elink = data; 2657 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2658 } 2659 xfer->status = USBD_IN_PROGRESS; 2660 /* The ii is already on the examined list, just leave it. */ 2661 } else { 2662 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 2663 if (uhci_active_intr_info(ii)) 2664 uhci_del_intr_info(ii); 2665 } 2666 } 2667 2668 /* Deallocate request data structures */ 2669 void 2670 uhci_device_ctrl_done(usbd_xfer_handle xfer) 2671 { 2672 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2673 uhci_softc_t *sc = ii->sc; 2674 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2675 2676 #ifdef DIAGNOSTIC 2677 if (!(xfer->rqflags & URQ_REQUEST)) 2678 panic("uhci_device_ctrl_done: not a request"); 2679 #endif 2680 2681 if (!uhci_active_intr_info(ii)) 2682 return; 2683 2684 uhci_del_intr_info(ii); /* remove from active list */ 2685 2686 if (upipe->pipe.device->speed == USB_SPEED_LOW) 2687 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 2688 else 2689 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 2690 2691 if (upipe->u.ctl.length != 0) 2692 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 2693 2694 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 2695 } 2696 2697 /* Deallocate request data structures */ 2698 void 2699 uhci_device_bulk_done(usbd_xfer_handle xfer) 2700 { 2701 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2702 uhci_softc_t *sc = ii->sc; 2703 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2704 2705 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 2706 xfer, ii, sc, upipe)); 2707 2708 if (!uhci_active_intr_info(ii)) 2709 return; 2710 2711 uhci_del_intr_info(ii); /* remove from active list */ 2712 2713 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 2714 2715 uhci_free_std_chain(sc, ii->stdstart, NULL); 2716 2717 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 2718 } 2719 2720 /* Add interrupt QH, called with vflock. */ 2721 void 2722 uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2723 { 2724 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2725 uhci_soft_qh_t *eqh; 2726 2727 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2728 2729 eqh = vf->eqh; 2730 sqh->hlink = eqh->hlink; 2731 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 2732 eqh->hlink = sqh; 2733 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 2734 vf->eqh = sqh; 2735 vf->bandwidth++; 2736 } 2737 2738 /* Remove interrupt QH. */ 2739 void 2740 uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 2741 { 2742 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 2743 uhci_soft_qh_t *pqh; 2744 2745 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 2746 2747 /* See comment in uhci_remove_ctrl() */ 2748 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 2749 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2750 delay(UHCI_QH_REMOVE_DELAY); 2751 } 2752 2753 pqh = uhci_find_prev_qh(vf->hqh, sqh); 2754 pqh->hlink = sqh->hlink; 2755 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 2756 delay(UHCI_QH_REMOVE_DELAY); 2757 if (vf->eqh == sqh) 2758 vf->eqh = pqh; 2759 vf->bandwidth--; 2760 } 2761 2762 usbd_status 2763 uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 2764 { 2765 uhci_soft_qh_t *sqh; 2766 int i, npoll, s; 2767 u_int bestbw, bw, bestoffs, offs; 2768 2769 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 2770 if (ival == 0) { 2771 printf("uhci_device_setintr: 0 interval\n"); 2772 return (USBD_INVAL); 2773 } 2774 2775 if (ival > UHCI_VFRAMELIST_COUNT) 2776 ival = UHCI_VFRAMELIST_COUNT; 2777 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 2778 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 2779 2780 upipe->u.intr.npoll = npoll; 2781 upipe->u.intr.qhs = 2782 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 2783 2784 /* 2785 * Figure out which offset in the schedule that has most 2786 * bandwidth left over. 2787 */ 2788 #define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 2789 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 2790 for (bw = i = 0; i < npoll; i++) 2791 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 2792 if (bw < bestbw) { 2793 bestbw = bw; 2794 bestoffs = offs; 2795 } 2796 } 2797 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 2798 2799 for(i = 0; i < npoll; i++) { 2800 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 2801 sqh->elink = NULL; 2802 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2803 sqh->pos = MOD(i * ival + bestoffs); 2804 } 2805 #undef MOD 2806 2807 s = splusb(); 2808 /* Enter QHs into the controller data structures. */ 2809 for(i = 0; i < npoll; i++) 2810 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 2811 splx(s); 2812 2813 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 2814 return (USBD_NORMAL_COMPLETION); 2815 } 2816 2817 /* Open a new pipe. */ 2818 usbd_status 2819 uhci_open(usbd_pipe_handle pipe) 2820 { 2821 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 2822 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2823 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2824 usbd_status err; 2825 int ival; 2826 2827 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2828 pipe, pipe->device->address, 2829 ed->bEndpointAddress, sc->sc_addr)); 2830 2831 upipe->aborting = 0; 2832 upipe->nexttoggle = pipe->endpoint->savedtoggle; 2833 2834 if (pipe->device->address == sc->sc_addr) { 2835 switch (ed->bEndpointAddress) { 2836 case USB_CONTROL_ENDPOINT: 2837 pipe->methods = &uhci_root_ctrl_methods; 2838 break; 2839 case UE_DIR_IN | UHCI_INTR_ENDPT: 2840 pipe->methods = &uhci_root_intr_methods; 2841 break; 2842 default: 2843 return (USBD_INVAL); 2844 } 2845 } else { 2846 switch (ed->bmAttributes & UE_XFERTYPE) { 2847 case UE_CONTROL: 2848 pipe->methods = &uhci_device_ctrl_methods; 2849 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 2850 if (upipe->u.ctl.sqh == NULL) 2851 goto bad; 2852 upipe->u.ctl.setup = uhci_alloc_std(sc); 2853 if (upipe->u.ctl.setup == NULL) { 2854 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2855 goto bad; 2856 } 2857 upipe->u.ctl.stat = uhci_alloc_std(sc); 2858 if (upipe->u.ctl.stat == NULL) { 2859 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2860 uhci_free_std(sc, upipe->u.ctl.setup); 2861 goto bad; 2862 } 2863 err = usb_allocmem(&sc->sc_bus, 2864 sizeof(usb_device_request_t), 2865 0, &upipe->u.ctl.reqdma); 2866 if (err) { 2867 uhci_free_sqh(sc, upipe->u.ctl.sqh); 2868 uhci_free_std(sc, upipe->u.ctl.setup); 2869 uhci_free_std(sc, upipe->u.ctl.stat); 2870 goto bad; 2871 } 2872 break; 2873 case UE_INTERRUPT: 2874 pipe->methods = &uhci_device_intr_methods; 2875 ival = pipe->interval; 2876 if (ival == USBD_DEFAULT_INTERVAL) 2877 ival = ed->bInterval; 2878 return (uhci_device_setintr(sc, upipe, ival)); 2879 case UE_ISOCHRONOUS: 2880 pipe->methods = &uhci_device_isoc_methods; 2881 return (uhci_setup_isoc(pipe)); 2882 case UE_BULK: 2883 pipe->methods = &uhci_device_bulk_methods; 2884 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 2885 if (upipe->u.bulk.sqh == NULL) 2886 goto bad; 2887 break; 2888 } 2889 } 2890 return (USBD_NORMAL_COMPLETION); 2891 2892 bad: 2893 return (USBD_NOMEM); 2894 } 2895 2896 /* 2897 * Data structures and routines to emulate the root hub. 2898 */ 2899 usb_device_descriptor_t uhci_devd = { 2900 USB_DEVICE_DESCRIPTOR_SIZE, 2901 UDESC_DEVICE, /* type */ 2902 {0x00, 0x01}, /* USB version */ 2903 UDCLASS_HUB, /* class */ 2904 UDSUBCLASS_HUB, /* subclass */ 2905 UDPROTO_FSHUB, /* protocol */ 2906 64, /* max packet */ 2907 {0},{0},{0x00,0x01}, /* device id */ 2908 1,2,0, /* string indices */ 2909 1 /* # of configurations */ 2910 }; 2911 2912 usb_config_descriptor_t uhci_confd = { 2913 USB_CONFIG_DESCRIPTOR_SIZE, 2914 UDESC_CONFIG, 2915 {USB_CONFIG_DESCRIPTOR_SIZE + 2916 USB_INTERFACE_DESCRIPTOR_SIZE + 2917 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2918 1, 2919 1, 2920 0, 2921 UC_SELF_POWERED, 2922 0 /* max power */ 2923 }; 2924 2925 usb_interface_descriptor_t uhci_ifcd = { 2926 USB_INTERFACE_DESCRIPTOR_SIZE, 2927 UDESC_INTERFACE, 2928 0, 2929 0, 2930 1, 2931 UICLASS_HUB, 2932 UISUBCLASS_HUB, 2933 UIPROTO_FSHUB, 2934 0 2935 }; 2936 2937 usb_endpoint_descriptor_t uhci_endpd = { 2938 USB_ENDPOINT_DESCRIPTOR_SIZE, 2939 UDESC_ENDPOINT, 2940 UE_DIR_IN | UHCI_INTR_ENDPT, 2941 UE_INTERRUPT, 2942 {8}, 2943 255 2944 }; 2945 2946 usb_hub_descriptor_t uhci_hubd_piix = { 2947 USB_HUB_DESCRIPTOR_SIZE, 2948 UDESC_HUB, 2949 2, 2950 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 2951 50, /* power on to power good */ 2952 0, 2953 { 0x00 }, /* both ports are removable */ 2954 }; 2955 2956 int 2957 uhci_str(usb_string_descriptor_t *p, int l, char *s) 2958 { 2959 int i; 2960 2961 if (l == 0) 2962 return (0); 2963 p->bLength = 2 * strlen(s) + 2; 2964 if (l == 1) 2965 return (1); 2966 p->bDescriptorType = UDESC_STRING; 2967 l -= 2; 2968 for (i = 0; s[i] && l > 1; i++, l -= 2) 2969 USETW2(p->bString[i], 0, s[i]); 2970 return (2*i+2); 2971 } 2972 2973 /* 2974 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 2975 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 2976 * should not be used by the USB subsystem. As we cannot issue a 2977 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 2978 * will be enabled as part of the reset. 2979 * 2980 * On the VT83C572, the port cannot be successfully enabled until the 2981 * outstanding "port enable change" and "connection status change" 2982 * events have been reset. 2983 */ 2984 usbd_status 2985 uhci_portreset(uhci_softc_t *sc, int index) 2986 { 2987 int lim, port, x; 2988 2989 if (index == 1) 2990 port = UHCI_PORTSC1; 2991 else if (index == 2) 2992 port = UHCI_PORTSC2; 2993 else 2994 return (USBD_IOERROR); 2995 2996 x = URWMASK(UREAD2(sc, port)); 2997 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 2998 2999 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3000 3001 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3002 index, UREAD2(sc, port))); 3003 3004 x = URWMASK(UREAD2(sc, port)); 3005 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3006 3007 delay(100); 3008 3009 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3010 index, UREAD2(sc, port))); 3011 3012 x = URWMASK(UREAD2(sc, port)); 3013 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3014 3015 for (lim = 10; --lim > 0;) { 3016 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3017 3018 x = UREAD2(sc, port); 3019 3020 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3021 index, lim, x)); 3022 3023 if (!(x & UHCI_PORTSC_CCS)) { 3024 /* 3025 * No device is connected (or was disconnected 3026 * during reset). Consider the port reset. 3027 * The delay must be long enough to ensure on 3028 * the initial iteration that the device 3029 * connection will have been registered. 50ms 3030 * appears to be sufficient, but 20ms is not. 3031 */ 3032 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3033 index, lim)); 3034 break; 3035 } 3036 3037 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3038 /* 3039 * Port enabled changed and/or connection 3040 * status changed were set. Reset either or 3041 * both raised flags (by writing a 1 to that 3042 * bit), and wait again for state to settle. 3043 */ 3044 UWRITE2(sc, port, URWMASK(x) | 3045 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3046 continue; 3047 } 3048 3049 if (x & UHCI_PORTSC_PE) 3050 /* Port is enabled */ 3051 break; 3052 3053 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3054 } 3055 3056 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3057 index, UREAD2(sc, port))); 3058 3059 if (lim <= 0) { 3060 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3061 return (USBD_TIMEOUT); 3062 } 3063 3064 sc->sc_isreset = 1; 3065 return (USBD_NORMAL_COMPLETION); 3066 } 3067 3068 /* 3069 * Simulate a hardware hub by handling all the necessary requests. 3070 */ 3071 usbd_status 3072 uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3073 { 3074 usbd_status err; 3075 3076 /* Insert last in queue. */ 3077 err = usb_insert_transfer(xfer); 3078 if (err) 3079 return (err); 3080 3081 /* 3082 * Pipe isn't running (otherwise err would be USBD_INPROG), 3083 * so start it first. 3084 */ 3085 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3086 } 3087 3088 usbd_status 3089 uhci_root_ctrl_start(usbd_xfer_handle xfer) 3090 { 3091 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3092 usb_device_request_t *req; 3093 void *buf = NULL; 3094 int port, x; 3095 int s, len, value, index, status, change, l, totlen = 0; 3096 usb_port_status_t ps; 3097 usbd_status err; 3098 3099 if (sc->sc_dying) 3100 return (USBD_IOERROR); 3101 3102 #ifdef DIAGNOSTIC 3103 if (!(xfer->rqflags & URQ_REQUEST)) 3104 panic("uhci_root_ctrl_start: not a request"); 3105 #endif 3106 req = &xfer->request; 3107 3108 DPRINTFN(2,("uhci_root_ctrl_start type=0x%02x request=%02x\n", 3109 req->bmRequestType, req->bRequest)); 3110 3111 len = UGETW(req->wLength); 3112 value = UGETW(req->wValue); 3113 index = UGETW(req->wIndex); 3114 3115 if (len != 0) 3116 buf = KERNADDR(&xfer->dmabuf, 0); 3117 3118 #define C(x,y) ((x) | ((y) << 8)) 3119 switch(C(req->bRequest, req->bmRequestType)) { 3120 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3121 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3122 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3123 /* 3124 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3125 * for the integrated root hub. 3126 */ 3127 break; 3128 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3129 if (len > 0) { 3130 *(u_int8_t *)buf = sc->sc_conf; 3131 totlen = 1; 3132 } 3133 break; 3134 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3135 DPRINTFN(2,("uhci_root_ctrl_start wValue=0x%04x\n", value)); 3136 switch(value >> 8) { 3137 case UDESC_DEVICE: 3138 if ((value & 0xff) != 0) { 3139 err = USBD_IOERROR; 3140 goto ret; 3141 } 3142 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3143 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3144 memcpy(buf, &uhci_devd, l); 3145 break; 3146 case UDESC_CONFIG: 3147 if ((value & 0xff) != 0) { 3148 err = USBD_IOERROR; 3149 goto ret; 3150 } 3151 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3152 memcpy(buf, &uhci_confd, l); 3153 buf = (char *)buf + l; 3154 len -= l; 3155 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3156 totlen += l; 3157 memcpy(buf, &uhci_ifcd, l); 3158 buf = (char *)buf + l; 3159 len -= l; 3160 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3161 totlen += l; 3162 memcpy(buf, &uhci_endpd, l); 3163 break; 3164 case UDESC_STRING: 3165 if (len == 0) 3166 break; 3167 *(u_int8_t *)buf = 0; 3168 totlen = 1; 3169 switch (value & 0xff) { 3170 case 0: /* Language table */ 3171 totlen = uhci_str(buf, len, "\001"); 3172 break; 3173 case 1: /* Vendor */ 3174 totlen = uhci_str(buf, len, sc->sc_vendor); 3175 break; 3176 case 2: /* Product */ 3177 totlen = uhci_str(buf, len, "UHCI root hub"); 3178 break; 3179 } 3180 break; 3181 default: 3182 err = USBD_IOERROR; 3183 goto ret; 3184 } 3185 break; 3186 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3187 if (len > 0) { 3188 *(u_int8_t *)buf = 0; 3189 totlen = 1; 3190 } 3191 break; 3192 case C(UR_GET_STATUS, UT_READ_DEVICE): 3193 if (len > 1) { 3194 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3195 totlen = 2; 3196 } 3197 break; 3198 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3199 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3200 if (len > 1) { 3201 USETW(((usb_status_t *)buf)->wStatus, 0); 3202 totlen = 2; 3203 } 3204 break; 3205 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3206 if (value >= USB_MAX_DEVICES) { 3207 err = USBD_IOERROR; 3208 goto ret; 3209 } 3210 sc->sc_addr = value; 3211 break; 3212 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3213 if (value != 0 && value != 1) { 3214 err = USBD_IOERROR; 3215 goto ret; 3216 } 3217 sc->sc_conf = value; 3218 break; 3219 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3220 break; 3221 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3222 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3223 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3224 err = USBD_IOERROR; 3225 goto ret; 3226 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3227 break; 3228 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3229 break; 3230 /* Hub requests */ 3231 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3232 break; 3233 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3234 DPRINTFN(3, ("uhci_root_ctrl_start: UR_CLEAR_PORT_FEATURE " 3235 "port=%d feature=%d\n", 3236 index, value)); 3237 if (index == 1) 3238 port = UHCI_PORTSC1; 3239 else if (index == 2) 3240 port = UHCI_PORTSC2; 3241 else { 3242 err = USBD_IOERROR; 3243 goto ret; 3244 } 3245 switch(value) { 3246 case UHF_PORT_ENABLE: 3247 x = URWMASK(UREAD2(sc, port)); 3248 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3249 break; 3250 case UHF_PORT_SUSPEND: 3251 x = URWMASK(UREAD2(sc, port)); 3252 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3253 break; 3254 case UHF_PORT_RESET: 3255 x = URWMASK(UREAD2(sc, port)); 3256 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3257 break; 3258 case UHF_C_PORT_CONNECTION: 3259 x = URWMASK(UREAD2(sc, port)); 3260 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3261 break; 3262 case UHF_C_PORT_ENABLE: 3263 x = URWMASK(UREAD2(sc, port)); 3264 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3265 break; 3266 case UHF_C_PORT_OVER_CURRENT: 3267 x = URWMASK(UREAD2(sc, port)); 3268 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3269 break; 3270 case UHF_C_PORT_RESET: 3271 sc->sc_isreset = 0; 3272 err = USBD_NORMAL_COMPLETION; 3273 goto ret; 3274 case UHF_PORT_CONNECTION: 3275 case UHF_PORT_OVER_CURRENT: 3276 case UHF_PORT_POWER: 3277 case UHF_PORT_LOW_SPEED: 3278 case UHF_C_PORT_SUSPEND: 3279 default: 3280 err = USBD_IOERROR; 3281 goto ret; 3282 } 3283 break; 3284 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3285 if (index == 1) 3286 port = UHCI_PORTSC1; 3287 else if (index == 2) 3288 port = UHCI_PORTSC2; 3289 else { 3290 err = USBD_IOERROR; 3291 goto ret; 3292 } 3293 if (len > 0) { 3294 *(u_int8_t *)buf = 3295 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3296 UHCI_PORTSC_LS_SHIFT; 3297 totlen = 1; 3298 } 3299 break; 3300 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3301 if ((value & 0xff) != 0) { 3302 err = USBD_IOERROR; 3303 goto ret; 3304 } 3305 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3306 totlen = l; 3307 memcpy(buf, &uhci_hubd_piix, l); 3308 break; 3309 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3310 if (len != 4) { 3311 err = USBD_IOERROR; 3312 goto ret; 3313 } 3314 memset(buf, 0, len); 3315 totlen = len; 3316 break; 3317 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3318 if (index == 1) 3319 port = UHCI_PORTSC1; 3320 else if (index == 2) 3321 port = UHCI_PORTSC2; 3322 else { 3323 err = USBD_IOERROR; 3324 goto ret; 3325 } 3326 if (len != 4) { 3327 err = USBD_IOERROR; 3328 goto ret; 3329 } 3330 x = UREAD2(sc, port); 3331 status = change = 0; 3332 if (x & UHCI_PORTSC_CCS) 3333 status |= UPS_CURRENT_CONNECT_STATUS; 3334 if (x & UHCI_PORTSC_CSC) 3335 change |= UPS_C_CONNECT_STATUS; 3336 if (x & UHCI_PORTSC_PE) 3337 status |= UPS_PORT_ENABLED; 3338 if (x & UHCI_PORTSC_POEDC) 3339 change |= UPS_C_PORT_ENABLED; 3340 if (x & UHCI_PORTSC_OCI) 3341 status |= UPS_OVERCURRENT_INDICATOR; 3342 if (x & UHCI_PORTSC_OCIC) 3343 change |= UPS_C_OVERCURRENT_INDICATOR; 3344 if (x & UHCI_PORTSC_SUSP) 3345 status |= UPS_SUSPEND; 3346 if (x & UHCI_PORTSC_LSDA) 3347 status |= UPS_LOW_SPEED; 3348 status |= UPS_PORT_POWER; 3349 if (sc->sc_isreset) 3350 change |= UPS_C_PORT_RESET; 3351 USETW(ps.wPortStatus, status); 3352 USETW(ps.wPortChange, change); 3353 l = min(len, sizeof ps); 3354 memcpy(buf, &ps, l); 3355 totlen = l; 3356 break; 3357 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3358 err = USBD_IOERROR; 3359 goto ret; 3360 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3361 break; 3362 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3363 if (index == 1) 3364 port = UHCI_PORTSC1; 3365 else if (index == 2) 3366 port = UHCI_PORTSC2; 3367 else { 3368 err = USBD_IOERROR; 3369 goto ret; 3370 } 3371 switch(value) { 3372 case UHF_PORT_ENABLE: 3373 x = URWMASK(UREAD2(sc, port)); 3374 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3375 break; 3376 case UHF_PORT_SUSPEND: 3377 x = URWMASK(UREAD2(sc, port)); 3378 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3379 break; 3380 case UHF_PORT_RESET: 3381 err = uhci_portreset(sc, index); 3382 goto ret; 3383 case UHF_PORT_POWER: 3384 /* Pretend we turned on power */ 3385 err = USBD_NORMAL_COMPLETION; 3386 goto ret; 3387 case UHF_PORT_DISOWN_TO_1_1: 3388 /* accept, but do nothing */ 3389 err = USBD_NORMAL_COMPLETION; 3390 goto ret; 3391 case UHF_C_PORT_CONNECTION: 3392 case UHF_C_PORT_ENABLE: 3393 case UHF_C_PORT_OVER_CURRENT: 3394 case UHF_PORT_CONNECTION: 3395 case UHF_PORT_OVER_CURRENT: 3396 case UHF_PORT_LOW_SPEED: 3397 case UHF_C_PORT_SUSPEND: 3398 case UHF_C_PORT_RESET: 3399 default: 3400 err = USBD_IOERROR; 3401 goto ret; 3402 } 3403 break; 3404 default: 3405 err = USBD_IOERROR; 3406 goto ret; 3407 } 3408 xfer->actlen = totlen; 3409 err = USBD_NORMAL_COMPLETION; 3410 ret: 3411 xfer->status = err; 3412 s = splusb(); 3413 usb_transfer_complete(xfer); 3414 splx(s); 3415 return (USBD_IN_PROGRESS); 3416 } 3417 3418 /* Abort a root control request. */ 3419 void 3420 uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3421 { 3422 /* Nothing to do, all transfers are synchronous. */ 3423 } 3424 3425 /* Close the root pipe. */ 3426 void 3427 uhci_root_ctrl_close(usbd_pipe_handle pipe) 3428 { 3429 DPRINTF(("uhci_root_ctrl_close\n")); 3430 } 3431 3432 /* Abort a root interrupt request. */ 3433 void 3434 uhci_root_intr_abort(usbd_xfer_handle xfer) 3435 { 3436 uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus; 3437 3438 timeout_del(&sc->sc_poll_handle); 3439 sc->sc_intr_xfer = NULL; 3440 3441 if (xfer->pipe->intrxfer == xfer) { 3442 DPRINTF(("uhci_root_intr_abort: remove\n")); 3443 xfer->pipe->intrxfer = 0; 3444 } 3445 xfer->status = USBD_CANCELLED; 3446 #ifdef DIAGNOSTIC 3447 UXFER(xfer)->iinfo.isdone = 1; 3448 #endif 3449 usb_transfer_complete(xfer); 3450 } 3451 3452 usbd_status 3453 uhci_root_intr_transfer(usbd_xfer_handle xfer) 3454 { 3455 usbd_status err; 3456 3457 /* Insert last in queue. */ 3458 err = usb_insert_transfer(xfer); 3459 if (err) 3460 return (err); 3461 3462 /* Pipe isn't running (otherwise err would be USBD_INPROG), 3463 * start first 3464 */ 3465 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3466 } 3467 3468 /* Start a transfer on the root interrupt pipe */ 3469 usbd_status 3470 uhci_root_intr_start(usbd_xfer_handle xfer) 3471 { 3472 usbd_pipe_handle pipe = xfer->pipe; 3473 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3474 3475 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%u flags=%d\n", 3476 xfer, xfer->length, xfer->flags)); 3477 3478 if (sc->sc_dying) 3479 return (USBD_IOERROR); 3480 3481 sc->sc_ival = mstohz(xfer->pipe->endpoint->edesc->bInterval); 3482 timeout_del(&sc->sc_poll_handle); 3483 timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer); 3484 timeout_add(&sc->sc_poll_handle, sc->sc_ival); 3485 sc->sc_intr_xfer = xfer; 3486 return (USBD_IN_PROGRESS); 3487 } 3488 3489 /* Close the root interrupt pipe. */ 3490 void 3491 uhci_root_intr_close(usbd_pipe_handle pipe) 3492 { 3493 uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus; 3494 3495 timeout_del(&sc->sc_poll_handle); 3496 sc->sc_intr_xfer = NULL; 3497 DPRINTF(("uhci_root_intr_close\n")); 3498 } 3499