1 /* $OpenBSD: ohci.c,v 1.35 2003/07/08 13:19:09 nate Exp $ */ 2 /* $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the NetBSD 24 * Foundation, Inc. and its contributors. 25 * 4. Neither the name of The NetBSD Foundation nor the names of its 26 * contributors may be used to endorse or promote products derived 27 * from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 30 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 31 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 32 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 33 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 * POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * USB Open Host Controller driver. 44 * 45 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 46 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 47 */ 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/malloc.h> 52 #if defined(__NetBSD__) || defined(__OpenBSD__) 53 #include <sys/kernel.h> 54 #include <sys/device.h> 55 #include <sys/select.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus_pio.h> 60 #include <machine/bus_memio.h> 61 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 62 #include <machine/cpu.h> 63 #endif 64 #endif 65 #include <sys/proc.h> 66 #include <sys/queue.h> 67 68 #include <machine/bus.h> 69 #include <machine/endian.h> 70 71 #include <dev/usb/usb.h> 72 #include <dev/usb/usbdi.h> 73 #include <dev/usb/usbdivar.h> 74 #include <dev/usb/usb_mem.h> 75 #include <dev/usb/usb_quirks.h> 76 77 #include <dev/usb/ohcireg.h> 78 #include <dev/usb/ohcivar.h> 79 80 #if defined(__FreeBSD__) 81 #include <machine/clock.h> 82 83 #define delay(d) DELAY(d) 84 #endif 85 86 #if defined(__OpenBSD__) 87 struct cfdriver ohci_cd = { 88 NULL, "ohci", DV_DULL 89 }; 90 #endif 91 92 #ifdef OHCI_DEBUG 93 #define DPRINTF(x) if (ohcidebug) logprintf x 94 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 95 int ohcidebug = 0; 96 #ifndef __NetBSD__ 97 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 98 #endif 99 #else 100 #define DPRINTF(x) 101 #define DPRINTFN(n,x) 102 #endif 103 104 /* 105 * The OHCI controller is little endian, so on big endian machines 106 * the data strored in memory needs to be swapped. 107 */ 108 #if defined(__FreeBSD__) 109 #if BYTE_ORDER == BIG_ENDIAN 110 #define htole32(x) (bswap32(x)) 111 #define le32toh(x) (bswap32(x)) 112 #else 113 #define htole32(x) (x) 114 #define le32toh(x) (x) 115 #endif 116 #endif 117 118 struct ohci_pipe; 119 120 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 121 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 122 123 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 124 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 125 126 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 127 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 128 129 #if 0 130 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 131 ohci_soft_td_t *); 132 #endif 133 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 134 ohci_softc_t *, int, int, usbd_xfer_handle, 135 ohci_soft_td_t *, ohci_soft_td_t **); 136 137 Static void ohci_shutdown(void *v); 138 Static void ohci_power(int, void *); 139 Static usbd_status ohci_open(usbd_pipe_handle); 140 Static void ohci_poll(struct usbd_bus *); 141 Static void ohci_softintr(void *); 142 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 143 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 144 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 145 146 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 147 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 149 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 151 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 152 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 154 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 155 156 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 157 Static void ohci_device_isoc_enter(usbd_xfer_handle); 158 159 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 160 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 161 162 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 163 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 164 165 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 166 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 167 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 168 Static void ohci_root_ctrl_close(usbd_pipe_handle); 169 Static void ohci_root_ctrl_done(usbd_xfer_handle); 170 171 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 172 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 173 Static void ohci_root_intr_abort(usbd_xfer_handle); 174 Static void ohci_root_intr_close(usbd_pipe_handle); 175 Static void ohci_root_intr_done(usbd_xfer_handle); 176 177 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 178 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 179 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 180 Static void ohci_device_ctrl_close(usbd_pipe_handle); 181 Static void ohci_device_ctrl_done(usbd_xfer_handle); 182 183 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 184 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 185 Static void ohci_device_bulk_abort(usbd_xfer_handle); 186 Static void ohci_device_bulk_close(usbd_pipe_handle); 187 Static void ohci_device_bulk_done(usbd_xfer_handle); 188 189 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 190 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 191 Static void ohci_device_intr_abort(usbd_xfer_handle); 192 Static void ohci_device_intr_close(usbd_pipe_handle); 193 Static void ohci_device_intr_done(usbd_xfer_handle); 194 195 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 196 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 197 Static void ohci_device_isoc_abort(usbd_xfer_handle); 198 Static void ohci_device_isoc_close(usbd_pipe_handle); 199 Static void ohci_device_isoc_done(usbd_xfer_handle); 200 201 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 202 struct ohci_pipe *pipe, int ival); 203 204 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 205 206 Static void ohci_timeout(void *); 207 Static void ohci_timeout_task(void *); 208 Static void ohci_rhsc_able(ohci_softc_t *, int); 209 Static void ohci_rhsc_enable(void *); 210 211 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 212 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 213 214 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 215 Static void ohci_noop(usbd_pipe_handle pipe); 216 217 #ifdef OHCI_DEBUG 218 Static void ohci_dumpregs(ohci_softc_t *); 219 Static void ohci_dump_tds(ohci_soft_td_t *); 220 Static void ohci_dump_td(ohci_soft_td_t *); 221 Static void ohci_dump_ed(ohci_soft_ed_t *); 222 Static void ohci_dump_itd(ohci_soft_itd_t *); 223 Static void ohci_dump_itds(ohci_soft_itd_t *); 224 #endif 225 226 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 227 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 228 #define OWRITE1(sc, r, x) \ 229 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 230 #define OWRITE2(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE4(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 235 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 236 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 237 238 /* Reverse the bits in a value 0 .. 31 */ 239 Static u_int8_t revbits[OHCI_NO_INTRS] = 240 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 241 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 242 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 243 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 244 245 struct ohci_pipe { 246 struct usbd_pipe pipe; 247 ohci_soft_ed_t *sed; 248 union { 249 ohci_soft_td_t *td; 250 ohci_soft_itd_t *itd; 251 } tail; 252 /* Info needed for different pipe kinds. */ 253 union { 254 /* Control pipe */ 255 struct { 256 usb_dma_t reqdma; 257 u_int length; 258 ohci_soft_td_t *setup, *data, *stat; 259 } ctl; 260 /* Interrupt pipe */ 261 struct { 262 int nslots; 263 int pos; 264 } intr; 265 /* Bulk pipe */ 266 struct { 267 u_int length; 268 int isread; 269 } bulk; 270 /* Iso pipe */ 271 struct iso { 272 int next, inuse; 273 } iso; 274 } u; 275 }; 276 277 #define OHCI_INTR_ENDPT 1 278 279 Static struct usbd_bus_methods ohci_bus_methods = { 280 ohci_open, 281 ohci_softintr, 282 ohci_poll, 283 ohci_allocm, 284 ohci_freem, 285 ohci_allocx, 286 ohci_freex, 287 }; 288 289 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 290 ohci_root_ctrl_transfer, 291 ohci_root_ctrl_start, 292 ohci_root_ctrl_abort, 293 ohci_root_ctrl_close, 294 ohci_noop, 295 ohci_root_ctrl_done, 296 }; 297 298 Static struct usbd_pipe_methods ohci_root_intr_methods = { 299 ohci_root_intr_transfer, 300 ohci_root_intr_start, 301 ohci_root_intr_abort, 302 ohci_root_intr_close, 303 ohci_noop, 304 ohci_root_intr_done, 305 }; 306 307 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 308 ohci_device_ctrl_transfer, 309 ohci_device_ctrl_start, 310 ohci_device_ctrl_abort, 311 ohci_device_ctrl_close, 312 ohci_noop, 313 ohci_device_ctrl_done, 314 }; 315 316 Static struct usbd_pipe_methods ohci_device_intr_methods = { 317 ohci_device_intr_transfer, 318 ohci_device_intr_start, 319 ohci_device_intr_abort, 320 ohci_device_intr_close, 321 ohci_device_clear_toggle, 322 ohci_device_intr_done, 323 }; 324 325 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 326 ohci_device_bulk_transfer, 327 ohci_device_bulk_start, 328 ohci_device_bulk_abort, 329 ohci_device_bulk_close, 330 ohci_device_clear_toggle, 331 ohci_device_bulk_done, 332 }; 333 334 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 335 ohci_device_isoc_transfer, 336 ohci_device_isoc_start, 337 ohci_device_isoc_abort, 338 ohci_device_isoc_close, 339 ohci_noop, 340 ohci_device_isoc_done, 341 }; 342 343 #if defined(__NetBSD__) || defined(__OpenBSD__) 344 int 345 ohci_activate(device_ptr_t self, enum devact act) 346 { 347 struct ohci_softc *sc = (struct ohci_softc *)self; 348 int rv = 0; 349 350 switch (act) { 351 case DVACT_ACTIVATE: 352 return (EOPNOTSUPP); 353 break; 354 355 case DVACT_DEACTIVATE: 356 if (sc->sc_child != NULL) 357 rv = config_deactivate(sc->sc_child); 358 sc->sc_dying = 1; 359 break; 360 } 361 return (rv); 362 } 363 364 int 365 ohci_detach(struct ohci_softc *sc, int flags) 366 { 367 int rv = 0; 368 369 if (sc->sc_child != NULL) 370 rv = config_detach(sc->sc_child, flags); 371 372 if (rv != 0) 373 return (rv); 374 375 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 376 377 #if defined(__NetBSD__) || defined(__OpenBSD__) 378 powerhook_disestablish(sc->sc_powerhook); 379 shutdownhook_disestablish(sc->sc_shutdownhook); 380 #endif 381 382 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 383 384 /* free data structures XXX */ 385 386 return (rv); 387 } 388 #endif 389 390 ohci_soft_ed_t * 391 ohci_alloc_sed(ohci_softc_t *sc) 392 { 393 ohci_soft_ed_t *sed; 394 usbd_status err; 395 int i, offs; 396 usb_dma_t dma; 397 398 if (sc->sc_freeeds == NULL) { 399 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 400 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 401 OHCI_ED_ALIGN, &dma); 402 if (err) 403 return (0); 404 for(i = 0; i < OHCI_SED_CHUNK; i++) { 405 offs = i * OHCI_SED_SIZE; 406 sed = KERNADDR(&dma, offs); 407 sed->physaddr = DMAADDR(&dma, offs); 408 sed->next = sc->sc_freeeds; 409 sc->sc_freeeds = sed; 410 } 411 } 412 sed = sc->sc_freeeds; 413 sc->sc_freeeds = sed->next; 414 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 415 sed->next = 0; 416 return (sed); 417 } 418 419 void 420 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 421 { 422 sed->next = sc->sc_freeeds; 423 sc->sc_freeeds = sed; 424 } 425 426 ohci_soft_td_t * 427 ohci_alloc_std(ohci_softc_t *sc) 428 { 429 ohci_soft_td_t *std; 430 usbd_status err; 431 int i, offs; 432 usb_dma_t dma; 433 int s; 434 435 if (sc->sc_freetds == NULL) { 436 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 437 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 438 OHCI_TD_ALIGN, &dma); 439 if (err) 440 return (NULL); 441 s = splusb(); 442 for(i = 0; i < OHCI_STD_CHUNK; i++) { 443 offs = i * OHCI_STD_SIZE; 444 std = KERNADDR(&dma, offs); 445 std->physaddr = DMAADDR(&dma, offs); 446 std->nexttd = sc->sc_freetds; 447 sc->sc_freetds = std; 448 } 449 splx(s); 450 } 451 452 s = splusb(); 453 std = sc->sc_freetds; 454 sc->sc_freetds = std->nexttd; 455 memset(&std->td, 0, sizeof(ohci_td_t)); 456 std->nexttd = NULL; 457 std->xfer = NULL; 458 ohci_hash_add_td(sc, std); 459 splx(s); 460 461 return (std); 462 } 463 464 void 465 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 466 { 467 int s; 468 469 s = splusb(); 470 ohci_hash_rem_td(sc, std); 471 std->nexttd = sc->sc_freetds; 472 sc->sc_freetds = std; 473 splx(s); 474 } 475 476 usbd_status 477 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 478 int alen, int rd, usbd_xfer_handle xfer, 479 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 480 { 481 ohci_soft_td_t *next, *cur; 482 ohci_physaddr_t dataphys, dataphysend; 483 u_int32_t tdflags; 484 int len, curlen; 485 usb_dma_t *dma = &xfer->dmabuf; 486 u_int16_t flags = xfer->flags; 487 488 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 489 490 len = alen; 491 cur = sp; 492 dataphys = DMAADDR(dma, 0); 493 dataphysend = OHCI_PAGE(dataphys + len - 1); 494 tdflags = htole32( 495 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 496 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 497 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 498 499 for (;;) { 500 next = ohci_alloc_std(sc); 501 if (next == NULL) 502 goto nomem; 503 504 /* The OHCI hardware can handle at most one page crossing. */ 505 if (OHCI_PAGE(dataphys) == dataphysend || 506 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 507 /* we can handle it in this TD */ 508 curlen = len; 509 } else { 510 /* must use multiple TDs, fill as much as possible. */ 511 curlen = 2 * OHCI_PAGE_SIZE - 512 (dataphys & (OHCI_PAGE_SIZE-1)); 513 /* the length must be a multiple of the max size */ 514 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 515 #ifdef DIAGNOSTIC 516 if (curlen == 0) 517 panic("ohci_alloc_std: curlen == 0"); 518 #endif 519 } 520 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 521 "dataphysend=0x%08x len=%d curlen=%d\n", 522 dataphys, dataphysend, 523 len, curlen)); 524 len -= curlen; 525 526 cur->td.td_flags = tdflags; 527 cur->td.td_cbp = htole32(dataphys); 528 cur->nexttd = next; 529 cur->td.td_nexttd = htole32(next->physaddr); 530 cur->td.td_be = htole32(dataphys + curlen - 1); 531 cur->len = curlen; 532 cur->flags = OHCI_ADD_LEN; 533 cur->xfer = xfer; 534 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 535 dataphys, dataphys + curlen - 1)); 536 if (len == 0) 537 break; 538 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 539 dataphys += curlen; 540 cur = next; 541 } 542 if ((flags & USBD_FORCE_SHORT_XFER) && 543 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 544 /* Force a 0 length transfer at the end. */ 545 546 cur = next; 547 next = ohci_alloc_std(sc); 548 if (next == NULL) 549 goto nomem; 550 551 cur->td.td_flags = tdflags; 552 cur->td.td_cbp = 0; /* indicate 0 length packet */ 553 cur->nexttd = next; 554 cur->td.td_nexttd = htole32(next->physaddr); 555 cur->td.td_be = ~0; 556 cur->len = 0; 557 cur->flags = 0; 558 cur->xfer = xfer; 559 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 560 } 561 *ep = cur; 562 563 return (USBD_NORMAL_COMPLETION); 564 565 nomem: 566 /* XXX free chain */ 567 return (USBD_NOMEM); 568 } 569 570 #if 0 571 Static void 572 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 573 ohci_soft_td_t *stdend) 574 { 575 ohci_soft_td_t *p; 576 577 for (; std != stdend; std = p) { 578 p = std->nexttd; 579 ohci_free_std(sc, std); 580 } 581 } 582 #endif 583 584 ohci_soft_itd_t * 585 ohci_alloc_sitd(ohci_softc_t *sc) 586 { 587 ohci_soft_itd_t *sitd; 588 usbd_status err; 589 int i, s, offs; 590 usb_dma_t dma; 591 592 if (sc->sc_freeitds == NULL) { 593 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 594 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 595 OHCI_ITD_ALIGN, &dma); 596 if (err) 597 return (NULL); 598 s = splusb(); 599 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 600 offs = i * OHCI_SITD_SIZE; 601 sitd = KERNADDR(&dma, offs); 602 sitd->physaddr = DMAADDR(&dma, offs); 603 sitd->nextitd = sc->sc_freeitds; 604 sc->sc_freeitds = sitd; 605 } 606 splx(s); 607 } 608 609 s = splusb(); 610 sitd = sc->sc_freeitds; 611 sc->sc_freeitds = sitd->nextitd; 612 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 613 sitd->nextitd = NULL; 614 sitd->xfer = NULL; 615 ohci_hash_add_itd(sc, sitd); 616 splx(s); 617 618 #ifdef DIAGNOSTIC 619 sitd->isdone = 0; 620 #endif 621 622 return (sitd); 623 } 624 625 void 626 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 627 { 628 int s; 629 630 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 631 632 #ifdef DIAGNOSTIC 633 if (!sitd->isdone) { 634 panic("ohci_free_sitd: sitd=%p not done", sitd); 635 return; 636 } 637 /* Warn double free */ 638 sitd->isdone = 0; 639 #endif 640 641 s = splusb(); 642 ohci_hash_rem_itd(sc, sitd); 643 sitd->nextitd = sc->sc_freeitds; 644 sc->sc_freeitds = sitd; 645 splx(s); 646 } 647 648 usbd_status 649 ohci_init(ohci_softc_t *sc) 650 { 651 ohci_soft_ed_t *sed, *psed; 652 usbd_status err; 653 int i; 654 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 655 656 DPRINTF(("ohci_init: start\n")); 657 #if defined(__OpenBSD__) 658 printf(","); 659 #else 660 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 661 #endif 662 rev = OREAD4(sc, OHCI_REVISION); 663 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 664 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 665 666 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 667 printf("%s: unsupported OHCI revision\n", 668 USBDEVNAME(sc->sc_bus.bdev)); 669 sc->sc_bus.usbrev = USBREV_UNKNOWN; 670 return (USBD_INVAL); 671 } 672 sc->sc_bus.usbrev = USBREV_1_0; 673 674 for (i = 0; i < OHCI_HASH_SIZE; i++) 675 LIST_INIT(&sc->sc_hash_tds[i]); 676 for (i = 0; i < OHCI_HASH_SIZE; i++) 677 LIST_INIT(&sc->sc_hash_itds[i]); 678 679 SIMPLEQ_INIT(&sc->sc_free_xfers); 680 681 /* XXX determine alignment by R/W */ 682 /* Allocate the HCCA area. */ 683 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 684 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 685 if (err) 686 return (err); 687 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 688 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 689 690 sc->sc_eintrs = OHCI_NORMAL_INTRS; 691 692 /* Allocate dummy ED that starts the control list. */ 693 sc->sc_ctrl_head = ohci_alloc_sed(sc); 694 if (sc->sc_ctrl_head == NULL) { 695 err = USBD_NOMEM; 696 goto bad1; 697 } 698 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 699 700 /* Allocate dummy ED that starts the bulk list. */ 701 sc->sc_bulk_head = ohci_alloc_sed(sc); 702 if (sc->sc_bulk_head == NULL) { 703 err = USBD_NOMEM; 704 goto bad2; 705 } 706 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 707 708 /* Allocate dummy ED that starts the isochronous list. */ 709 sc->sc_isoc_head = ohci_alloc_sed(sc); 710 if (sc->sc_isoc_head == NULL) { 711 err = USBD_NOMEM; 712 goto bad3; 713 } 714 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 715 716 /* Allocate all the dummy EDs that make up the interrupt tree. */ 717 for (i = 0; i < OHCI_NO_EDS; i++) { 718 sed = ohci_alloc_sed(sc); 719 if (sed == NULL) { 720 while (--i >= 0) 721 ohci_free_sed(sc, sc->sc_eds[i]); 722 err = USBD_NOMEM; 723 goto bad4; 724 } 725 /* All ED fields are set to 0. */ 726 sc->sc_eds[i] = sed; 727 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 728 if (i != 0) 729 psed = sc->sc_eds[(i-1) / 2]; 730 else 731 psed= sc->sc_isoc_head; 732 sed->next = psed; 733 sed->ed.ed_nexted = htole32(psed->physaddr); 734 } 735 /* 736 * Fill HCCA interrupt table. The bit reversal is to get 737 * the tree set up properly to spread the interrupts. 738 */ 739 for (i = 0; i < OHCI_NO_INTRS; i++) 740 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 741 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 742 743 #ifdef OHCI_DEBUG 744 if (ohcidebug > 15) { 745 for (i = 0; i < OHCI_NO_EDS; i++) { 746 printf("ed#%d ", i); 747 ohci_dump_ed(sc->sc_eds[i]); 748 } 749 printf("iso "); 750 ohci_dump_ed(sc->sc_isoc_head); 751 } 752 #endif 753 754 /* Determine in what context we are running. */ 755 ctl = OREAD4(sc, OHCI_CONTROL); 756 if (ctl & OHCI_IR) { 757 /* SMM active, request change */ 758 DPRINTF(("ohci_init: SMM active, request owner change\n")); 759 s = OREAD4(sc, OHCI_COMMAND_STATUS); 760 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 761 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 762 usb_delay_ms(&sc->sc_bus, 1); 763 ctl = OREAD4(sc, OHCI_CONTROL); 764 } 765 if ((ctl & OHCI_IR) == 0) { 766 printf("%s: SMM does not respond, resetting\n", 767 USBDEVNAME(sc->sc_bus.bdev)); 768 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 769 goto reset; 770 } 771 #if 0 772 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 773 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 774 /* BIOS started controller. */ 775 DPRINTF(("ohci_init: BIOS active\n")); 776 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 777 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 778 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 779 } 780 #endif 781 } else { 782 DPRINTF(("ohci_init: cold started\n")); 783 reset: 784 /* Controller was cold started. */ 785 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 786 } 787 788 /* 789 * This reset should not be necessary according to the OHCI spec, but 790 * without it some controllers do not start. 791 */ 792 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 793 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 794 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 795 796 /* We now own the host controller and the bus has been reset. */ 797 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 798 799 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 800 /* Nominal time for a reset is 10 us. */ 801 for (i = 0; i < 10; i++) { 802 delay(10); 803 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 804 if (!hcr) 805 break; 806 } 807 if (hcr) { 808 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 809 err = USBD_IOERROR; 810 goto bad5; 811 } 812 #ifdef OHCI_DEBUG 813 if (ohcidebug > 15) 814 ohci_dumpregs(sc); 815 #endif 816 817 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 818 819 /* Set up HC registers. */ 820 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 821 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 822 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 823 /* disable all interrupts and then switch on all desired interrupts */ 824 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 825 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 826 /* switch on desired functional features */ 827 ctl = OREAD4(sc, OHCI_CONTROL); 828 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 829 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 830 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 831 /* And finally start it! */ 832 OWRITE4(sc, OHCI_CONTROL, ctl); 833 834 /* 835 * The controller is now OPERATIONAL. Set a some final 836 * registers that should be set earlier, but that the 837 * controller ignores when in the SUSPEND state. 838 */ 839 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 840 fm |= OHCI_FSMPS(ival) | ival; 841 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 842 per = OHCI_PERIODIC(ival); /* 90% periodic */ 843 OWRITE4(sc, OHCI_PERIODIC_START, per); 844 845 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 846 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 847 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 848 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 849 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 850 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 851 852 /* 853 * The AMD756 requires a delay before re-reading the register, 854 * otherwise it will occasionally report 0 ports. 855 */ 856 sc->sc_noport = 0; 857 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 858 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 859 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 860 } 861 862 #ifdef OHCI_DEBUG 863 if (ohcidebug > 5) 864 ohci_dumpregs(sc); 865 #endif 866 867 /* Set up the bus struct. */ 868 sc->sc_bus.methods = &ohci_bus_methods; 869 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 870 871 #if defined(__NetBSD__) || defined(__OpenBSD__) 872 sc->sc_control = sc->sc_intre = 0; 873 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 874 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 875 #endif 876 877 usb_callout_init(sc->sc_tmo_rhsc); 878 879 return (USBD_NORMAL_COMPLETION); 880 881 bad5: 882 for (i = 0; i < OHCI_NO_EDS; i++) 883 ohci_free_sed(sc, sc->sc_eds[i]); 884 bad4: 885 ohci_free_sed(sc, sc->sc_isoc_head); 886 bad3: 887 ohci_free_sed(sc, sc->sc_ctrl_head); 888 bad2: 889 ohci_free_sed(sc, sc->sc_bulk_head); 890 bad1: 891 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 892 return (err); 893 } 894 895 usbd_status 896 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 897 { 898 #if defined(__NetBSD__) || defined(__OpenBSD__) 899 struct ohci_softc *sc = (struct ohci_softc *)bus; 900 #endif 901 902 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 903 } 904 905 void 906 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 907 { 908 #if defined(__NetBSD__) || defined(__OpenBSD__) 909 struct ohci_softc *sc = (struct ohci_softc *)bus; 910 #endif 911 912 usb_freemem(&sc->sc_bus, dma); 913 } 914 915 usbd_xfer_handle 916 ohci_allocx(struct usbd_bus *bus) 917 { 918 struct ohci_softc *sc = (struct ohci_softc *)bus; 919 usbd_xfer_handle xfer; 920 921 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 922 if (xfer != NULL) { 923 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 924 #ifdef DIAGNOSTIC 925 if (xfer->busy_free != XFER_FREE) { 926 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 927 xfer->busy_free); 928 } 929 #endif 930 } else { 931 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 932 } 933 if (xfer != NULL) { 934 memset(xfer, 0, sizeof (struct ohci_xfer)); 935 #ifdef DIAGNOSTIC 936 xfer->busy_free = XFER_BUSY; 937 #endif 938 } 939 return (xfer); 940 } 941 942 void 943 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 944 { 945 struct ohci_softc *sc = (struct ohci_softc *)bus; 946 947 #ifdef DIAGNOSTIC 948 if (xfer->busy_free != XFER_BUSY) { 949 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 950 xfer->busy_free); 951 return; 952 } 953 xfer->busy_free = XFER_FREE; 954 #endif 955 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 956 } 957 958 /* 959 * Shut down the controller when the system is going down. 960 */ 961 void 962 ohci_shutdown(void *v) 963 { 964 ohci_softc_t *sc = v; 965 966 DPRINTF(("ohci_shutdown: stopping the HC\n")); 967 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 968 } 969 970 /* 971 * Handle suspend/resume. 972 * 973 * We need to switch to polling mode here, because this routine is 974 * called from an intterupt context. This is all right since we 975 * are almost suspended anyway. 976 */ 977 void 978 ohci_power(int why, void *v) 979 { 980 ohci_softc_t *sc = v; 981 u_int32_t ctl; 982 int s; 983 984 #ifdef OHCI_DEBUG 985 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 986 ohci_dumpregs(sc); 987 #endif 988 989 s = splhardusb(); 990 switch (why) { 991 case PWR_SUSPEND: 992 case PWR_STANDBY: 993 sc->sc_bus.use_polling++; 994 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 995 if (sc->sc_control == 0) { 996 /* 997 * Preserve register values, in case that APM BIOS 998 * does not recover them. 999 */ 1000 sc->sc_control = ctl; 1001 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1002 } 1003 ctl |= OHCI_HCFS_SUSPEND; 1004 OWRITE4(sc, OHCI_CONTROL, ctl); 1005 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1006 sc->sc_bus.use_polling--; 1007 break; 1008 case PWR_RESUME: 1009 sc->sc_bus.use_polling++; 1010 /* Some broken BIOSes do not recover these values */ 1011 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1012 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1013 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1014 if (sc->sc_intre) 1015 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1016 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1017 if (sc->sc_control) 1018 ctl = sc->sc_control; 1019 else 1020 ctl = OREAD4(sc, OHCI_CONTROL); 1021 ctl |= OHCI_HCFS_RESUME; 1022 OWRITE4(sc, OHCI_CONTROL, ctl); 1023 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1024 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1025 OWRITE4(sc, OHCI_CONTROL, ctl); 1026 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1027 sc->sc_control = sc->sc_intre = 0; 1028 sc->sc_bus.use_polling--; 1029 break; 1030 #if defined(__NetBSD__) 1031 case PWR_SOFTSUSPEND: 1032 case PWR_SOFTSTANDBY: 1033 case PWR_SOFTRESUME: 1034 break; 1035 #endif 1036 } 1037 splx(s); 1038 } 1039 1040 #ifdef OHCI_DEBUG 1041 void 1042 ohci_dumpregs(ohci_softc_t *sc) 1043 { 1044 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1045 OREAD4(sc, OHCI_REVISION), 1046 OREAD4(sc, OHCI_CONTROL), 1047 OREAD4(sc, OHCI_COMMAND_STATUS))); 1048 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1049 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1050 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1051 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1052 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1053 OREAD4(sc, OHCI_HCCA), 1054 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1055 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1056 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1057 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1058 OREAD4(sc, OHCI_BULK_HEAD_ED), 1059 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1060 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1061 OREAD4(sc, OHCI_DONE_HEAD), 1062 OREAD4(sc, OHCI_FM_INTERVAL), 1063 OREAD4(sc, OHCI_FM_REMAINING))); 1064 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1065 OREAD4(sc, OHCI_FM_NUMBER), 1066 OREAD4(sc, OHCI_PERIODIC_START), 1067 OREAD4(sc, OHCI_LS_THRESHOLD))); 1068 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1069 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1070 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1071 OREAD4(sc, OHCI_RH_STATUS))); 1072 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1073 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1074 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1075 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1076 le32toh(sc->sc_hcca->hcca_frame_number), 1077 le32toh(sc->sc_hcca->hcca_done_head))); 1078 } 1079 #endif 1080 1081 Static int ohci_intr1(ohci_softc_t *); 1082 1083 int 1084 ohci_intr(void *p) 1085 { 1086 ohci_softc_t *sc = p; 1087 1088 if (sc == NULL || sc->sc_dying) 1089 return (0); 1090 1091 /* If we get an interrupt while polling, then just ignore it. */ 1092 if (sc->sc_bus.use_polling) { 1093 #ifdef DIAGNOSTIC 1094 printf("ohci_intr: ignored interrupt while polling\n"); 1095 #endif 1096 return (0); 1097 } 1098 1099 return (ohci_intr1(sc)); 1100 } 1101 1102 Static int 1103 ohci_intr1(ohci_softc_t *sc) 1104 { 1105 u_int32_t intrs, eintrs; 1106 ohci_physaddr_t done; 1107 1108 DPRINTFN(14,("ohci_intr1: enter\n")); 1109 1110 /* In case the interrupt occurs before initialization has completed. */ 1111 if (sc == NULL || sc->sc_hcca == NULL) { 1112 #ifdef DIAGNOSTIC 1113 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1114 #endif 1115 return (0); 1116 } 1117 1118 intrs = 0; 1119 done = le32toh(sc->sc_hcca->hcca_done_head); 1120 if (done != 0) { 1121 if (done & ~OHCI_DONE_INTRS) 1122 intrs = OHCI_WDH; 1123 if (done & OHCI_DONE_INTRS) 1124 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1125 sc->sc_hcca->hcca_done_head = 0; 1126 } else 1127 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1128 1129 if (!intrs) 1130 return (0); 1131 1132 intrs &= ~OHCI_MIE; 1133 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1134 eintrs = intrs & sc->sc_eintrs; 1135 if (!eintrs) 1136 return (0); 1137 1138 sc->sc_bus.intr_context++; 1139 sc->sc_bus.no_intrs++; 1140 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1141 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1142 (u_int)eintrs)); 1143 1144 if (eintrs & OHCI_SO) { 1145 sc->sc_overrun_cnt++; 1146 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1147 printf("%s: %u scheduling overruns\n", 1148 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1149 sc->sc_overrun_cnt = 0; 1150 } 1151 /* XXX do what */ 1152 eintrs &= ~OHCI_SO; 1153 } 1154 if (eintrs & OHCI_WDH) { 1155 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1156 usb_schedsoftintr(&sc->sc_bus); 1157 eintrs &= ~OHCI_WDH; 1158 } 1159 if (eintrs & OHCI_RD) { 1160 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1161 /* XXX process resume detect */ 1162 } 1163 if (eintrs & OHCI_UE) { 1164 printf("%s: unrecoverable error, controller halted\n", 1165 USBDEVNAME(sc->sc_bus.bdev)); 1166 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1167 /* XXX what else */ 1168 } 1169 if (eintrs & OHCI_RHSC) { 1170 ohci_rhsc(sc, sc->sc_intrxfer); 1171 /* 1172 * Disable RHSC interrupt for now, because it will be 1173 * on until the port has been reset. 1174 */ 1175 ohci_rhsc_able(sc, 0); 1176 DPRINTFN(2, ("%s: rhsc interrupt disabled\n", 1177 USBDEVNAME(sc->sc_bus.bdev))); 1178 1179 /* Do not allow RHSC interrupts > 1 per second */ 1180 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1181 eintrs &= ~OHCI_RHSC; 1182 } 1183 1184 sc->sc_bus.intr_context--; 1185 1186 if (eintrs != 0) { 1187 /* Block unprocessed interrupts. XXX */ 1188 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1189 sc->sc_eintrs &= ~eintrs; 1190 printf("%s: blocking intrs 0x%x\n", 1191 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1192 } 1193 1194 return (1); 1195 } 1196 1197 void 1198 ohci_rhsc_able(ohci_softc_t *sc, int on) 1199 { 1200 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1201 if (on) { 1202 sc->sc_eintrs |= OHCI_RHSC; 1203 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1204 } else { 1205 sc->sc_eintrs &= ~OHCI_RHSC; 1206 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1207 } 1208 } 1209 1210 void 1211 ohci_rhsc_enable(void *v_sc) 1212 { 1213 ohci_softc_t *sc = v_sc; 1214 int s; 1215 1216 ohci_rhsc(sc, sc->sc_intrxfer); 1217 DPRINTFN(2, ("%s: rhsc interrupt enabled\n", 1218 USBDEVNAME(sc->sc_bus.bdev))); 1219 1220 s = splhardusb(); 1221 ohci_rhsc_able(sc, 1); 1222 splx(s); 1223 } 1224 1225 #ifdef OHCI_DEBUG 1226 char *ohci_cc_strs[] = { 1227 "NO_ERROR", 1228 "CRC", 1229 "BIT_STUFFING", 1230 "DATA_TOGGLE_MISMATCH", 1231 "STALL", 1232 "DEVICE_NOT_RESPONDING", 1233 "PID_CHECK_FAILURE", 1234 "UNEXPECTED_PID", 1235 "DATA_OVERRUN", 1236 "DATA_UNDERRUN", 1237 "BUFFER_OVERRUN", 1238 "BUFFER_UNDERRUN", 1239 "reserved", 1240 "reserved", 1241 "NOT_ACCESSED", 1242 "NOT_ACCESSED", 1243 }; 1244 #endif 1245 1246 void 1247 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1248 { 1249 ohci_soft_itd_t *sitd, *sidone, **ip; 1250 ohci_soft_td_t *std, *sdone, **p; 1251 1252 /* Reverse the done list. */ 1253 for (sdone = NULL, sidone = NULL; done != 0; ) { 1254 std = ohci_hash_find_td(sc, done); 1255 if (std != NULL) { 1256 std->dnext = sdone; 1257 done = le32toh(std->td.td_nexttd); 1258 sdone = std; 1259 DPRINTFN(10,("add TD %p\n", std)); 1260 continue; 1261 } 1262 sitd = ohci_hash_find_itd(sc, done); 1263 if (sitd != NULL) { 1264 sitd->dnext = sidone; 1265 done = le32toh(sitd->itd.itd_nextitd); 1266 sidone = sitd; 1267 DPRINTFN(5,("add ITD %p\n", sitd)); 1268 continue; 1269 } 1270 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1271 } 1272 1273 /* sdone & sidone now hold the done lists. */ 1274 /* Put them on the already processed lists. */ 1275 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1276 ; 1277 *p = sdone; 1278 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1279 ; 1280 *ip = sidone; 1281 } 1282 1283 void 1284 ohci_softintr(void *v) 1285 { 1286 ohci_softc_t *sc = v; 1287 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1288 ohci_soft_td_t *std, *sdone, *stdnext; 1289 usbd_xfer_handle xfer; 1290 struct ohci_pipe *opipe; 1291 int len, cc, s; 1292 int i, j, actlen, iframes, uedir; 1293 1294 DPRINTFN(10,("ohci_softintr: enter\n")); 1295 1296 sc->sc_bus.intr_context++; 1297 1298 s = splhardusb(); 1299 sdone = sc->sc_sdone; 1300 sc->sc_sdone = NULL; 1301 sidone = sc->sc_sidone; 1302 sc->sc_sidone = NULL; 1303 splx(s); 1304 1305 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1306 1307 #ifdef OHCI_DEBUG 1308 if (ohcidebug > 10) { 1309 DPRINTF(("ohci_process_done: TD done:\n")); 1310 ohci_dump_tds(sdone); 1311 } 1312 #endif 1313 1314 for (std = sdone; std; std = stdnext) { 1315 xfer = std->xfer; 1316 stdnext = std->dnext; 1317 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1318 std, xfer, xfer ? xfer->hcpriv : 0)); 1319 if (xfer == NULL) { 1320 /* 1321 * xfer == NULL: There seems to be no xfer associated 1322 * with this TD. It is tailp that happened to end up on 1323 * the done queue. 1324 * Shouldn't happen, but some chips are broken(?). 1325 */ 1326 continue; 1327 } 1328 if (xfer->status == USBD_CANCELLED || 1329 xfer->status == USBD_TIMEOUT) { 1330 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1331 xfer)); 1332 /* Handled by abort routine. */ 1333 continue; 1334 } 1335 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1336 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1337 if (cc == OHCI_CC_NO_ERROR) { 1338 len = std->len; 1339 if (std->td.td_cbp != 0) 1340 len -= le32toh(std->td.td_be) - 1341 le32toh(std->td.td_cbp) + 1; 1342 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1343 len, std->flags)); 1344 if (std->flags & OHCI_ADD_LEN) 1345 xfer->actlen += len; 1346 if (std->flags & OHCI_CALL_DONE) { 1347 xfer->status = USBD_NORMAL_COMPLETION; 1348 s = splusb(); 1349 usb_transfer_complete(xfer); 1350 splx(s); 1351 } 1352 ohci_free_std(sc, std); 1353 } else { 1354 /* 1355 * Endpoint is halted. First unlink all the TDs 1356 * belonging to the failed transfer, and then restart 1357 * the endpoint. 1358 */ 1359 ohci_soft_td_t *p, *n; 1360 opipe = (struct ohci_pipe *)xfer->pipe; 1361 1362 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1363 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1364 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1365 1366 /* remove TDs */ 1367 for (p = std; p->xfer == xfer; p = n) { 1368 n = p->nexttd; 1369 ohci_free_std(sc, p); 1370 } 1371 1372 /* clear halt */ 1373 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1374 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1375 1376 if (cc == OHCI_CC_STALL) 1377 xfer->status = USBD_STALLED; 1378 else 1379 xfer->status = USBD_IOERROR; 1380 s = splusb(); 1381 usb_transfer_complete(xfer); 1382 splx(s); 1383 } 1384 } 1385 1386 #ifdef OHCI_DEBUG 1387 if (ohcidebug > 10) { 1388 DPRINTF(("ohci_softintr: ITD done:\n")); 1389 ohci_dump_itds(sidone); 1390 } 1391 #endif 1392 1393 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1394 xfer = sitd->xfer; 1395 sitdnext = sitd->dnext; 1396 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1397 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1398 if (xfer == NULL) 1399 continue; 1400 if (xfer->status == USBD_CANCELLED || 1401 xfer->status == USBD_TIMEOUT) { 1402 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1403 xfer)); 1404 /* Handled by abort routine. */ 1405 continue; 1406 } 1407 #ifdef DIAGNOSTIC 1408 if (sitd->isdone) 1409 printf("ohci_softintr: sitd=%p is done\n", sitd); 1410 sitd->isdone = 1; 1411 #endif 1412 if (sitd->flags & OHCI_CALL_DONE) { 1413 ohci_soft_itd_t *next; 1414 1415 opipe = (struct ohci_pipe *)xfer->pipe; 1416 opipe->u.iso.inuse -= xfer->nframes; 1417 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1418 bEndpointAddress); 1419 xfer->status = USBD_NORMAL_COMPLETION; 1420 actlen = 0; 1421 for (i = 0, sitd = xfer->hcpriv;; 1422 sitd = next) { 1423 next = sitd->nextitd; 1424 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1425 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1426 xfer->status = USBD_IOERROR; 1427 /* For input, update frlengths with actual */ 1428 /* XXX anything necessary for output? */ 1429 if (uedir == UE_DIR_IN && 1430 xfer->status == USBD_NORMAL_COMPLETION) { 1431 iframes = OHCI_ITD_GET_FC(le32toh( 1432 sitd->itd.itd_flags)); 1433 for (j = 0; j < iframes; i++, j++) { 1434 len = le16toh(sitd-> 1435 itd.itd_offset[j]); 1436 len = 1437 (OHCI_ITD_PSW_GET_CC(len) == 1438 OHCI_CC_NOT_ACCESSED) ? 0 : 1439 OHCI_ITD_PSW_LENGTH(len); 1440 xfer->frlengths[i] = len; 1441 actlen += len; 1442 } 1443 } 1444 if (sitd->flags & OHCI_CALL_DONE) 1445 break; 1446 ohci_free_sitd(sc, sitd); 1447 } 1448 ohci_free_sitd(sc, sitd); 1449 if (uedir == UE_DIR_IN && 1450 xfer->status == USBD_NORMAL_COMPLETION) 1451 xfer->actlen = actlen; 1452 1453 s = splusb(); 1454 usb_transfer_complete(xfer); 1455 splx(s); 1456 } 1457 } 1458 1459 #ifdef USB_USE_SOFTINTR 1460 if (sc->sc_softwake) { 1461 sc->sc_softwake = 0; 1462 wakeup(&sc->sc_softwake); 1463 } 1464 #endif /* USB_USE_SOFTINTR */ 1465 1466 sc->sc_bus.intr_context--; 1467 DPRINTFN(10,("ohci_softintr: done:\n")); 1468 } 1469 1470 void 1471 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1472 { 1473 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1474 1475 #ifdef DIAGNOSTIC 1476 if (!(xfer->rqflags & URQ_REQUEST)) { 1477 panic("ohci_ctrl_done: not a request"); 1478 } 1479 #endif 1480 xfer->hcpriv = NULL; 1481 } 1482 1483 void 1484 ohci_device_intr_done(usbd_xfer_handle xfer) 1485 { 1486 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1487 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1488 ohci_soft_ed_t *sed = opipe->sed; 1489 ohci_soft_td_t *data, *tail; 1490 1491 1492 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1493 xfer, xfer->actlen)); 1494 1495 xfer->hcpriv = NULL; 1496 1497 if (xfer->pipe->repeat) { 1498 data = opipe->tail.td; 1499 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1500 if (tail == NULL) { 1501 xfer->status = USBD_NOMEM; 1502 return; 1503 } 1504 tail->xfer = NULL; 1505 1506 data->td.td_flags = htole32( 1507 OHCI_TD_IN | OHCI_TD_NOCC | 1508 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1509 if (xfer->flags & USBD_SHORT_XFER_OK) 1510 data->td.td_flags |= htole32(OHCI_TD_R); 1511 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1512 data->nexttd = tail; 1513 data->td.td_nexttd = htole32(tail->physaddr); 1514 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1515 xfer->length - 1); 1516 data->len = xfer->length; 1517 data->xfer = xfer; 1518 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1519 xfer->hcpriv = data; 1520 xfer->actlen = 0; 1521 1522 sed->ed.ed_tailp = htole32(tail->physaddr); 1523 opipe->tail.td = tail; 1524 } 1525 } 1526 1527 void 1528 ohci_device_bulk_done(usbd_xfer_handle xfer) 1529 { 1530 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1531 xfer, xfer->actlen)); 1532 1533 xfer->hcpriv = NULL; 1534 } 1535 1536 void 1537 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1538 { 1539 usbd_pipe_handle pipe; 1540 struct ohci_pipe *opipe; 1541 u_char *p; 1542 int i, m; 1543 int hstatus; 1544 1545 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1546 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1547 sc, xfer, hstatus)); 1548 1549 if (xfer == NULL) { 1550 /* Just ignore the change. */ 1551 return; 1552 } 1553 1554 pipe = xfer->pipe; 1555 opipe = (struct ohci_pipe *)pipe; 1556 1557 p = KERNADDR(&xfer->dmabuf, 0); 1558 m = min(sc->sc_noport, xfer->length * 8 - 1); 1559 memset(p, 0, xfer->length); 1560 for (i = 1; i <= m; i++) { 1561 /* Pick out CHANGE bits from the status reg. */ 1562 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1563 p[i/8] |= 1 << (i%8); 1564 } 1565 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1566 xfer->actlen = xfer->length; 1567 xfer->status = USBD_NORMAL_COMPLETION; 1568 1569 usb_transfer_complete(xfer); 1570 } 1571 1572 void 1573 ohci_root_intr_done(usbd_xfer_handle xfer) 1574 { 1575 xfer->hcpriv = NULL; 1576 } 1577 1578 void 1579 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1580 { 1581 xfer->hcpriv = NULL; 1582 } 1583 1584 /* 1585 * Wait here until controller claims to have an interrupt. 1586 * Then call ohci_intr and return. Use timeout to avoid waiting 1587 * too long. 1588 */ 1589 void 1590 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1591 { 1592 int timo = xfer->timeout; 1593 int usecs; 1594 u_int32_t intrs; 1595 1596 xfer->status = USBD_IN_PROGRESS; 1597 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1598 usb_delay_ms(&sc->sc_bus, 1); 1599 if (sc->sc_dying) 1600 break; 1601 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1602 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1603 #ifdef OHCI_DEBUG 1604 if (ohcidebug > 15) 1605 ohci_dumpregs(sc); 1606 #endif 1607 if (intrs) { 1608 ohci_intr1(sc); 1609 if (xfer->status != USBD_IN_PROGRESS) 1610 return; 1611 } 1612 } 1613 1614 /* Timeout */ 1615 DPRINTF(("ohci_waitintr: timeout\n")); 1616 xfer->status = USBD_TIMEOUT; 1617 usb_transfer_complete(xfer); 1618 /* XXX should free TD */ 1619 } 1620 1621 void 1622 ohci_poll(struct usbd_bus *bus) 1623 { 1624 ohci_softc_t *sc = (ohci_softc_t *)bus; 1625 #ifdef OHCI_DEBUG 1626 static int last; 1627 int new; 1628 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1629 if (new != last) { 1630 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1631 last = new; 1632 } 1633 #endif 1634 1635 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1636 ohci_intr1(sc); 1637 } 1638 1639 usbd_status 1640 ohci_device_request(usbd_xfer_handle xfer) 1641 { 1642 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1643 usb_device_request_t *req = &xfer->request; 1644 usbd_device_handle dev = opipe->pipe.device; 1645 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1646 int addr = dev->address; 1647 ohci_soft_td_t *setup, *stat, *next, *tail; 1648 ohci_soft_ed_t *sed; 1649 int isread; 1650 int len; 1651 usbd_status err; 1652 int s; 1653 1654 isread = req->bmRequestType & UT_READ; 1655 len = UGETW(req->wLength); 1656 1657 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1658 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1659 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1660 UGETW(req->wIndex), len, addr, 1661 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1662 1663 setup = opipe->tail.td; 1664 stat = ohci_alloc_std(sc); 1665 if (stat == NULL) { 1666 err = USBD_NOMEM; 1667 goto bad1; 1668 } 1669 tail = ohci_alloc_std(sc); 1670 if (tail == NULL) { 1671 err = USBD_NOMEM; 1672 goto bad2; 1673 } 1674 tail->xfer = NULL; 1675 1676 sed = opipe->sed; 1677 opipe->u.ctl.length = len; 1678 1679 /* Update device address and length since they may have changed. */ 1680 /* XXX This only needs to be done once, but it's too early in open. */ 1681 /* XXXX Should not touch ED here! */ 1682 sed->ed.ed_flags = htole32( 1683 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1684 OHCI_ED_SET_FA(addr) | 1685 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1686 1687 next = stat; 1688 1689 /* Set up data transaction */ 1690 if (len != 0) { 1691 ohci_soft_td_t *std = stat; 1692 1693 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1694 std, &stat); 1695 stat = stat->nexttd; /* point at free TD */ 1696 if (err) 1697 goto bad3; 1698 /* Start toggle at 1 and then use the carried toggle. */ 1699 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1700 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1701 } 1702 1703 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1704 1705 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1706 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1707 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1708 setup->nexttd = next; 1709 setup->td.td_nexttd = htole32(next->physaddr); 1710 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1711 setup->len = 0; 1712 setup->xfer = xfer; 1713 setup->flags = 0; 1714 xfer->hcpriv = setup; 1715 1716 stat->td.td_flags = htole32( 1717 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1718 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1719 stat->td.td_cbp = 0; 1720 stat->nexttd = tail; 1721 stat->td.td_nexttd = htole32(tail->physaddr); 1722 stat->td.td_be = 0; 1723 stat->flags = OHCI_CALL_DONE; 1724 stat->len = 0; 1725 stat->xfer = xfer; 1726 1727 #ifdef OHCI_DEBUG 1728 if (ohcidebug > 5) { 1729 DPRINTF(("ohci_device_request:\n")); 1730 ohci_dump_ed(sed); 1731 ohci_dump_tds(setup); 1732 } 1733 #endif 1734 1735 /* Insert ED in schedule */ 1736 s = splusb(); 1737 sed->ed.ed_tailp = htole32(tail->physaddr); 1738 opipe->tail.td = tail; 1739 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1740 if (xfer->timeout && !sc->sc_bus.use_polling) { 1741 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1742 ohci_timeout, xfer); 1743 } 1744 splx(s); 1745 1746 #ifdef OHCI_DEBUG 1747 if (ohcidebug > 20) { 1748 delay(10000); 1749 DPRINTF(("ohci_device_request: status=%x\n", 1750 OREAD4(sc, OHCI_COMMAND_STATUS))); 1751 ohci_dumpregs(sc); 1752 printf("ctrl head:\n"); 1753 ohci_dump_ed(sc->sc_ctrl_head); 1754 printf("sed:\n"); 1755 ohci_dump_ed(sed); 1756 ohci_dump_tds(setup); 1757 } 1758 #endif 1759 1760 return (USBD_NORMAL_COMPLETION); 1761 1762 bad3: 1763 ohci_free_std(sc, tail); 1764 bad2: 1765 ohci_free_std(sc, stat); 1766 bad1: 1767 return (err); 1768 } 1769 1770 /* 1771 * Add an ED to the schedule. Called at splusb(). 1772 */ 1773 void 1774 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1775 { 1776 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1777 1778 SPLUSBCHECK; 1779 sed->next = head->next; 1780 sed->ed.ed_nexted = head->ed.ed_nexted; 1781 head->next = sed; 1782 head->ed.ed_nexted = htole32(sed->physaddr); 1783 } 1784 1785 /* 1786 * Remove an ED from the schedule. Called at splusb(). 1787 */ 1788 void 1789 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1790 { 1791 ohci_soft_ed_t *p; 1792 1793 SPLUSBCHECK; 1794 1795 /* XXX */ 1796 for (p = head; p != NULL && p->next != sed; p = p->next) 1797 ; 1798 if (p == NULL) 1799 panic("ohci_rem_ed: ED not found"); 1800 p->next = sed->next; 1801 p->ed.ed_nexted = sed->ed.ed_nexted; 1802 } 1803 1804 /* 1805 * When a transfer is completed the TD is added to the done queue by 1806 * the host controller. This queue is the processed by software. 1807 * Unfortunately the queue contains the physical address of the TD 1808 * and we have no simple way to translate this back to a kernel address. 1809 * To make the translation possible (and fast) we use a hash table of 1810 * TDs currently in the schedule. The physical address is used as the 1811 * hash value. 1812 */ 1813 1814 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1815 /* Called at splusb() */ 1816 void 1817 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1818 { 1819 int h = HASH(std->physaddr); 1820 1821 SPLUSBCHECK; 1822 1823 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1824 } 1825 1826 /* Called at splusb() */ 1827 void 1828 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1829 { 1830 SPLUSBCHECK; 1831 1832 LIST_REMOVE(std, hnext); 1833 } 1834 1835 ohci_soft_td_t * 1836 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1837 { 1838 int h = HASH(a); 1839 ohci_soft_td_t *std; 1840 1841 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1842 std != NULL; 1843 std = LIST_NEXT(std, hnext)) 1844 if (std->physaddr == a) 1845 return (std); 1846 return (NULL); 1847 } 1848 1849 /* Called at splusb() */ 1850 void 1851 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1852 { 1853 int h = HASH(sitd->physaddr); 1854 1855 SPLUSBCHECK; 1856 1857 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1858 sitd, (u_long)sitd->physaddr)); 1859 1860 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1861 } 1862 1863 /* Called at splusb() */ 1864 void 1865 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1866 { 1867 SPLUSBCHECK; 1868 1869 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1870 sitd, (u_long)sitd->physaddr)); 1871 1872 LIST_REMOVE(sitd, hnext); 1873 } 1874 1875 ohci_soft_itd_t * 1876 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1877 { 1878 int h = HASH(a); 1879 ohci_soft_itd_t *sitd; 1880 1881 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1882 sitd != NULL; 1883 sitd = LIST_NEXT(sitd, hnext)) 1884 if (sitd->physaddr == a) 1885 return (sitd); 1886 return (NULL); 1887 } 1888 1889 void 1890 ohci_timeout(void *addr) 1891 { 1892 struct ohci_xfer *oxfer = addr; 1893 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1894 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1895 1896 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1897 1898 if (sc->sc_dying) { 1899 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1900 return; 1901 } 1902 1903 /* Execute the abort in a process context. */ 1904 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1905 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1906 } 1907 1908 void 1909 ohci_timeout_task(void *addr) 1910 { 1911 usbd_xfer_handle xfer = addr; 1912 int s; 1913 1914 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1915 1916 s = splusb(); 1917 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1918 splx(s); 1919 } 1920 1921 #ifdef OHCI_DEBUG 1922 void 1923 ohci_dump_tds(ohci_soft_td_t *std) 1924 { 1925 for (; std; std = std->nexttd) 1926 ohci_dump_td(std); 1927 } 1928 1929 void 1930 ohci_dump_td(ohci_soft_td_t *std) 1931 { 1932 char sbuf[128]; 1933 1934 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1935 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1936 sbuf, sizeof(sbuf)); 1937 1938 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1939 "nexttd=0x%08lx be=0x%08lx\n", 1940 std, (u_long)std->physaddr, sbuf, 1941 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1942 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1943 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1944 (u_long)le32toh(std->td.td_cbp), 1945 (u_long)le32toh(std->td.td_nexttd), 1946 (u_long)le32toh(std->td.td_be)); 1947 } 1948 1949 void 1950 ohci_dump_itd(ohci_soft_itd_t *sitd) 1951 { 1952 int i; 1953 1954 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1955 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1956 sitd, (u_long)sitd->physaddr, 1957 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1958 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1959 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1960 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1961 (u_long)le32toh(sitd->itd.itd_bp0), 1962 (u_long)le32toh(sitd->itd.itd_nextitd), 1963 (u_long)le32toh(sitd->itd.itd_be)); 1964 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1965 printf("offs[%d]=0x%04x ", i, 1966 (u_int)le16toh(sitd->itd.itd_offset[i])); 1967 printf("\n"); 1968 } 1969 1970 void 1971 ohci_dump_itds(ohci_soft_itd_t *sitd) 1972 { 1973 for (; sitd; sitd = sitd->nextitd) 1974 ohci_dump_itd(sitd); 1975 } 1976 1977 void 1978 ohci_dump_ed(ohci_soft_ed_t *sed) 1979 { 1980 char sbuf[128], sbuf2[128]; 1981 1982 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1983 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1984 sbuf, sizeof(sbuf)); 1985 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1986 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1987 1988 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\n" 1989 "tailp=0x%08lx headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1990 sed, (u_long)sed->physaddr, 1991 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1992 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1993 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1994 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1995 (u_long)le32toh(sed->ed.ed_headp), 1996 (u_long)le32toh(sed->ed.ed_nexted)); 1997 } 1998 #endif 1999 2000 usbd_status 2001 ohci_open(usbd_pipe_handle pipe) 2002 { 2003 usbd_device_handle dev = pipe->device; 2004 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2005 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2006 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2007 u_int8_t addr = dev->address; 2008 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2009 ohci_soft_ed_t *sed; 2010 ohci_soft_td_t *std; 2011 ohci_soft_itd_t *sitd; 2012 ohci_physaddr_t tdphys; 2013 u_int32_t fmt; 2014 usbd_status err; 2015 int s; 2016 int ival; 2017 2018 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2019 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2020 2021 if (sc->sc_dying) 2022 return (USBD_IOERROR); 2023 2024 std = NULL; 2025 sed = NULL; 2026 2027 if (addr == sc->sc_addr) { 2028 switch (ed->bEndpointAddress) { 2029 case USB_CONTROL_ENDPOINT: 2030 pipe->methods = &ohci_root_ctrl_methods; 2031 break; 2032 case UE_DIR_IN | OHCI_INTR_ENDPT: 2033 pipe->methods = &ohci_root_intr_methods; 2034 break; 2035 default: 2036 return (USBD_INVAL); 2037 } 2038 } else { 2039 sed = ohci_alloc_sed(sc); 2040 if (sed == NULL) 2041 goto bad0; 2042 opipe->sed = sed; 2043 if (xfertype == UE_ISOCHRONOUS) { 2044 sitd = ohci_alloc_sitd(sc); 2045 if (sitd == NULL) 2046 goto bad1; 2047 opipe->tail.itd = sitd; 2048 tdphys = sitd->physaddr; 2049 fmt = OHCI_ED_FORMAT_ISO; 2050 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2051 fmt |= OHCI_ED_DIR_IN; 2052 else 2053 fmt |= OHCI_ED_DIR_OUT; 2054 } else { 2055 std = ohci_alloc_std(sc); 2056 if (std == NULL) 2057 goto bad1; 2058 opipe->tail.td = std; 2059 tdphys = std->physaddr; 2060 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2061 } 2062 sed->ed.ed_flags = htole32( 2063 OHCI_ED_SET_FA(addr) | 2064 OHCI_ED_SET_EN(ed->bEndpointAddress) | 2065 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2066 fmt | OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2067 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2068 2069 switch (xfertype) { 2070 case UE_CONTROL: 2071 pipe->methods = &ohci_device_ctrl_methods; 2072 err = usb_allocmem(&sc->sc_bus, 2073 sizeof(usb_device_request_t), 2074 0, &opipe->u.ctl.reqdma); 2075 if (err) 2076 goto bad; 2077 s = splusb(); 2078 ohci_add_ed(sed, sc->sc_ctrl_head); 2079 splx(s); 2080 break; 2081 case UE_INTERRUPT: 2082 pipe->methods = &ohci_device_intr_methods; 2083 ival = pipe->interval; 2084 if (ival == USBD_DEFAULT_INTERVAL) 2085 ival = ed->bInterval; 2086 return (ohci_device_setintr(sc, opipe, ival)); 2087 case UE_ISOCHRONOUS: 2088 pipe->methods = &ohci_device_isoc_methods; 2089 return (ohci_setup_isoc(pipe)); 2090 case UE_BULK: 2091 pipe->methods = &ohci_device_bulk_methods; 2092 s = splusb(); 2093 ohci_add_ed(sed, sc->sc_bulk_head); 2094 splx(s); 2095 break; 2096 } 2097 } 2098 return (USBD_NORMAL_COMPLETION); 2099 2100 bad: 2101 if (std != NULL) 2102 ohci_free_std(sc, std); 2103 bad1: 2104 if (sed != NULL) 2105 ohci_free_sed(sc, sed); 2106 bad0: 2107 return (USBD_NOMEM); 2108 2109 } 2110 2111 /* 2112 * Close a reqular pipe. 2113 * Assumes that there are no pending transactions. 2114 */ 2115 void 2116 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2117 { 2118 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2119 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2120 ohci_soft_ed_t *sed = opipe->sed; 2121 int s; 2122 2123 s = splusb(); 2124 #ifdef DIAGNOSTIC 2125 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2126 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2127 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2128 ohci_soft_td_t *std; 2129 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2130 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2131 "tl=0x%x pipe=%p, std=%p\n", sed, 2132 (int)le32toh(sed->ed.ed_headp), 2133 (int)le32toh(sed->ed.ed_tailp), 2134 pipe, std); 2135 #ifdef USB_DEBUG 2136 usbd_dump_pipe(&opipe->pipe); 2137 #endif 2138 #ifdef OHCI_DEBUG 2139 ohci_dump_ed(sed); 2140 if (std) 2141 ohci_dump_td(std); 2142 #endif 2143 usb_delay_ms(&sc->sc_bus, 2); 2144 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2145 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2146 printf("ohci_close_pipe: pipe still not empty\n"); 2147 } 2148 #endif 2149 ohci_rem_ed(sed, head); 2150 /* Make sure the host controller is not touching this ED */ 2151 usb_delay_ms(&sc->sc_bus, 1); 2152 splx(s); 2153 ohci_free_sed(sc, opipe->sed); 2154 } 2155 2156 /* 2157 * Abort a device request. 2158 * If this routine is called at splusb() it guarantees that the request 2159 * will be removed from the hardware scheduling and that the callback 2160 * for it will be called with USBD_CANCELLED status. 2161 * It's impossible to guarantee that the requested transfer will not 2162 * have happened since the hardware runs concurrently. 2163 * If the transaction has already happened we rely on the ordinary 2164 * interrupt processing to process it. 2165 */ 2166 void 2167 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2168 { 2169 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2170 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2171 ohci_soft_ed_t *sed = opipe->sed; 2172 ohci_soft_td_t *p, *n; 2173 ohci_physaddr_t headp; 2174 int s, hit; 2175 2176 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe, 2177 sed)); 2178 2179 if (sc->sc_dying) { 2180 /* If we're dying, just do the software part. */ 2181 s = splusb(); 2182 xfer->status = status; /* make software ignore it */ 2183 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2184 usb_transfer_complete(xfer); 2185 splx(s); 2186 } 2187 2188 if (xfer->device->bus->intr_context || !curproc) 2189 panic("ohci_abort_xfer: not in process context"); 2190 2191 /* 2192 * Step 1: Make interrupt routine and hardware ignore xfer. 2193 */ 2194 s = splusb(); 2195 xfer->status = status; /* make software ignore it */ 2196 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2197 splx(s); 2198 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2199 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2200 2201 /* 2202 * Step 2: Wait until we know hardware has finished any possible 2203 * use of the xfer. Also make sure the soft interrupt routine 2204 * has run. 2205 */ 2206 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2207 s = splusb(); 2208 #ifdef USB_USE_SOFTINTR 2209 sc->sc_softwake = 1; 2210 #endif /* USB_USE_SOFTINTR */ 2211 usb_schedsoftintr(&sc->sc_bus); 2212 #ifdef USB_USE_SOFTINTR 2213 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2214 #endif /* USB_USE_SOFTINTR */ 2215 splx(s); 2216 2217 /* 2218 * Step 3: Remove any vestiges of the xfer from the hardware. 2219 * The complication here is that the hardware may have executed 2220 * beyond the xfer we're trying to abort. So as we're scanning 2221 * the TDs of this xfer we check if the hardware points to 2222 * any of them. 2223 */ 2224 s = splusb(); /* XXX why? */ 2225 p = xfer->hcpriv; 2226 #ifdef DIAGNOSTIC 2227 if (p == NULL) { 2228 splx(s); 2229 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2230 return; 2231 } 2232 #endif 2233 #ifdef OHCI_DEBUG 2234 if (ohcidebug > 1) { 2235 DPRINTF(("ohci_abort_xfer: sed=\n")); 2236 ohci_dump_ed(sed); 2237 ohci_dump_tds(p); 2238 } 2239 #endif 2240 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2241 hit = 0; 2242 for (; p->xfer == xfer; p = n) { 2243 hit |= headp == p->physaddr; 2244 n = p->nexttd; 2245 ohci_free_std(sc, p); 2246 } 2247 /* Zap headp register if hardware pointed inside the xfer. */ 2248 if (hit) { 2249 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2250 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2251 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2252 } else { 2253 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2254 } 2255 2256 /* 2257 * Step 4: Turn on hardware again. 2258 */ 2259 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2260 2261 /* 2262 * Step 5: Execute callback. 2263 */ 2264 usb_transfer_complete(xfer); 2265 2266 splx(s); 2267 } 2268 2269 /* 2270 * Data structures and routines to emulate the root hub. 2271 */ 2272 Static usb_device_descriptor_t ohci_devd = { 2273 USB_DEVICE_DESCRIPTOR_SIZE, 2274 UDESC_DEVICE, /* type */ 2275 {0x00, 0x01}, /* USB version */ 2276 UDCLASS_HUB, /* class */ 2277 UDSUBCLASS_HUB, /* subclass */ 2278 UDPROTO_FSHUB, 2279 64, /* max packet */ 2280 {0},{0},{0x00,0x01}, /* device id */ 2281 1,2,0, /* string indicies */ 2282 1 /* # of configurations */ 2283 }; 2284 2285 Static usb_config_descriptor_t ohci_confd = { 2286 USB_CONFIG_DESCRIPTOR_SIZE, 2287 UDESC_CONFIG, 2288 {USB_CONFIG_DESCRIPTOR_SIZE + 2289 USB_INTERFACE_DESCRIPTOR_SIZE + 2290 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2291 1, 2292 1, 2293 0, 2294 UC_SELF_POWERED, 2295 0 /* max power */ 2296 }; 2297 2298 Static usb_interface_descriptor_t ohci_ifcd = { 2299 USB_INTERFACE_DESCRIPTOR_SIZE, 2300 UDESC_INTERFACE, 2301 0, 2302 0, 2303 1, 2304 UICLASS_HUB, 2305 UISUBCLASS_HUB, 2306 UIPROTO_FSHUB, 2307 0 2308 }; 2309 2310 Static usb_endpoint_descriptor_t ohci_endpd = { 2311 USB_ENDPOINT_DESCRIPTOR_SIZE, 2312 UDESC_ENDPOINT, 2313 UE_DIR_IN | OHCI_INTR_ENDPT, 2314 UE_INTERRUPT, 2315 {8, 0}, /* max packet */ 2316 255 2317 }; 2318 2319 Static usb_hub_descriptor_t ohci_hubd = { 2320 USB_HUB_DESCRIPTOR_SIZE, 2321 UDESC_HUB, 2322 0, 2323 {0,0}, 2324 0, 2325 0, 2326 {0}, 2327 }; 2328 2329 Static int 2330 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2331 { 2332 int i; 2333 2334 if (l == 0) 2335 return (0); 2336 p->bLength = 2 * strlen(s) + 2; 2337 if (l == 1) 2338 return (1); 2339 p->bDescriptorType = UDESC_STRING; 2340 l -= 2; 2341 for (i = 0; s[i] && l > 1; i++, l -= 2) 2342 USETW2(p->bString[i], 0, s[i]); 2343 return (2*i+2); 2344 } 2345 2346 /* 2347 * Simulate a hardware hub by handling all the necessary requests. 2348 */ 2349 Static usbd_status 2350 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2351 { 2352 usbd_status err; 2353 2354 /* Insert last in queue. */ 2355 err = usb_insert_transfer(xfer); 2356 if (err) 2357 return (err); 2358 2359 /* Pipe isn't running, start first */ 2360 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2361 } 2362 2363 Static usbd_status 2364 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2365 { 2366 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2367 usb_device_request_t *req; 2368 void *buf = NULL; 2369 int port, i; 2370 int s, len, value, index, l, totlen = 0; 2371 usb_port_status_t ps; 2372 usb_hub_descriptor_t hubd; 2373 usbd_status err; 2374 u_int32_t v; 2375 2376 if (sc->sc_dying) 2377 return (USBD_IOERROR); 2378 2379 #ifdef DIAGNOSTIC 2380 if (!(xfer->rqflags & URQ_REQUEST)) 2381 /* XXX panic */ 2382 return (USBD_INVAL); 2383 #endif 2384 req = &xfer->request; 2385 2386 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2387 req->bmRequestType, req->bRequest)); 2388 2389 len = UGETW(req->wLength); 2390 value = UGETW(req->wValue); 2391 index = UGETW(req->wIndex); 2392 2393 if (len != 0) 2394 buf = KERNADDR(&xfer->dmabuf, 0); 2395 2396 #define C(x,y) ((x) | ((y) << 8)) 2397 switch(C(req->bRequest, req->bmRequestType)) { 2398 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2399 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2400 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2401 /* 2402 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2403 * for the integrated root hub. 2404 */ 2405 break; 2406 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2407 if (len > 0) { 2408 *(u_int8_t *)buf = sc->sc_conf; 2409 totlen = 1; 2410 } 2411 break; 2412 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2413 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2414 switch(value >> 8) { 2415 case UDESC_DEVICE: 2416 if ((value & 0xff) != 0) { 2417 err = USBD_IOERROR; 2418 goto ret; 2419 } 2420 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2421 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2422 memcpy(buf, &ohci_devd, l); 2423 break; 2424 case UDESC_CONFIG: 2425 if ((value & 0xff) != 0) { 2426 err = USBD_IOERROR; 2427 goto ret; 2428 } 2429 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2430 memcpy(buf, &ohci_confd, l); 2431 buf = (char *)buf + l; 2432 len -= l; 2433 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2434 totlen += l; 2435 memcpy(buf, &ohci_ifcd, l); 2436 buf = (char *)buf + l; 2437 len -= l; 2438 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2439 totlen += l; 2440 memcpy(buf, &ohci_endpd, l); 2441 break; 2442 case UDESC_STRING: 2443 if (len == 0) 2444 break; 2445 *(u_int8_t *)buf = 0; 2446 totlen = 1; 2447 switch (value & 0xff) { 2448 case 1: /* Vendor */ 2449 totlen = ohci_str(buf, len, sc->sc_vendor); 2450 break; 2451 case 2: /* Product */ 2452 totlen = ohci_str(buf, len, "OHCI root hub"); 2453 break; 2454 } 2455 break; 2456 default: 2457 err = USBD_IOERROR; 2458 goto ret; 2459 } 2460 break; 2461 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2462 if (len > 0) { 2463 *(u_int8_t *)buf = 0; 2464 totlen = 1; 2465 } 2466 break; 2467 case C(UR_GET_STATUS, UT_READ_DEVICE): 2468 if (len > 1) { 2469 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2470 totlen = 2; 2471 } 2472 break; 2473 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2474 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2475 if (len > 1) { 2476 USETW(((usb_status_t *)buf)->wStatus, 0); 2477 totlen = 2; 2478 } 2479 break; 2480 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2481 if (value >= USB_MAX_DEVICES) { 2482 err = USBD_IOERROR; 2483 goto ret; 2484 } 2485 sc->sc_addr = value; 2486 break; 2487 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2488 if (value != 0 && value != 1) { 2489 err = USBD_IOERROR; 2490 goto ret; 2491 } 2492 sc->sc_conf = value; 2493 break; 2494 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2495 break; 2496 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2497 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2498 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2499 err = USBD_IOERROR; 2500 goto ret; 2501 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2502 break; 2503 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2504 break; 2505 /* Hub requests */ 2506 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2507 break; 2508 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2509 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2510 "port=%d feature=%d\n", 2511 index, value)); 2512 if (index < 1 || index > sc->sc_noport) { 2513 err = USBD_IOERROR; 2514 goto ret; 2515 } 2516 port = OHCI_RH_PORT_STATUS(index); 2517 switch(value) { 2518 case UHF_PORT_ENABLE: 2519 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2520 break; 2521 case UHF_PORT_SUSPEND: 2522 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2523 break; 2524 case UHF_PORT_POWER: 2525 /* Yes, writing to the LOW_SPEED bit clears power. */ 2526 OWRITE4(sc, port, UPS_LOW_SPEED); 2527 break; 2528 case UHF_C_PORT_CONNECTION: 2529 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2530 break; 2531 case UHF_C_PORT_ENABLE: 2532 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2533 break; 2534 case UHF_C_PORT_SUSPEND: 2535 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2536 break; 2537 case UHF_C_PORT_OVER_CURRENT: 2538 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2539 break; 2540 case UHF_C_PORT_RESET: 2541 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2542 break; 2543 default: 2544 err = USBD_IOERROR; 2545 goto ret; 2546 } 2547 switch(value) { 2548 case UHF_C_PORT_CONNECTION: 2549 case UHF_C_PORT_ENABLE: 2550 case UHF_C_PORT_SUSPEND: 2551 case UHF_C_PORT_OVER_CURRENT: 2552 case UHF_C_PORT_RESET: 2553 /* Enable RHSC interrupt if condition is cleared. */ 2554 if ((OREAD4(sc, port) >> 16) == 0) 2555 ohci_rhsc_able(sc, 1); 2556 break; 2557 default: 2558 break; 2559 } 2560 break; 2561 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2562 if (value != 0) { 2563 err = USBD_IOERROR; 2564 goto ret; 2565 } 2566 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2567 hubd = ohci_hubd; 2568 hubd.bNbrPorts = sc->sc_noport; 2569 USETW(hubd.wHubCharacteristics, 2570 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2571 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2572 /* XXX overcurrent */ 2573 ); 2574 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2575 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2576 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2577 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2578 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2579 l = min(len, hubd.bDescLength); 2580 totlen = l; 2581 memcpy(buf, &hubd, l); 2582 break; 2583 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2584 if (len != 4) { 2585 err = USBD_IOERROR; 2586 goto ret; 2587 } 2588 memset(buf, 0, len); /* ? XXX */ 2589 totlen = len; 2590 break; 2591 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2592 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2593 index)); 2594 if (index < 1 || index > sc->sc_noport) { 2595 err = USBD_IOERROR; 2596 goto ret; 2597 } 2598 if (len != 4) { 2599 err = USBD_IOERROR; 2600 goto ret; 2601 } 2602 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2603 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2604 v)); 2605 USETW(ps.wPortStatus, v); 2606 USETW(ps.wPortChange, v >> 16); 2607 l = min(len, sizeof ps); 2608 memcpy(buf, &ps, l); 2609 totlen = l; 2610 break; 2611 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2612 err = USBD_IOERROR; 2613 goto ret; 2614 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2615 break; 2616 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2617 if (index < 1 || index > sc->sc_noport) { 2618 err = USBD_IOERROR; 2619 goto ret; 2620 } 2621 port = OHCI_RH_PORT_STATUS(index); 2622 switch(value) { 2623 case UHF_PORT_ENABLE: 2624 OWRITE4(sc, port, UPS_PORT_ENABLED); 2625 break; 2626 case UHF_PORT_SUSPEND: 2627 OWRITE4(sc, port, UPS_SUSPEND); 2628 break; 2629 case UHF_PORT_RESET: 2630 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2631 index)); 2632 OWRITE4(sc, port, UPS_RESET); 2633 for (i = 0; i < 5; i++) { 2634 usb_delay_ms(&sc->sc_bus, 2635 USB_PORT_ROOT_RESET_DELAY); 2636 if (sc->sc_dying) { 2637 err = USBD_IOERROR; 2638 goto ret; 2639 } 2640 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2641 break; 2642 } 2643 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2644 index, OREAD4(sc, port))); 2645 break; 2646 case UHF_PORT_POWER: 2647 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2648 "%d\n", index)); 2649 OWRITE4(sc, port, UPS_PORT_POWER); 2650 break; 2651 default: 2652 err = USBD_IOERROR; 2653 goto ret; 2654 } 2655 break; 2656 default: 2657 err = USBD_IOERROR; 2658 goto ret; 2659 } 2660 xfer->actlen = totlen; 2661 err = USBD_NORMAL_COMPLETION; 2662 ret: 2663 xfer->status = err; 2664 s = splusb(); 2665 usb_transfer_complete(xfer); 2666 splx(s); 2667 return (USBD_IN_PROGRESS); 2668 } 2669 2670 /* Abort a root control request. */ 2671 Static void 2672 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2673 { 2674 /* Nothing to do, all transfers are synchronous. */ 2675 } 2676 2677 /* Close the root pipe. */ 2678 Static void 2679 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2680 { 2681 DPRINTF(("ohci_root_ctrl_close\n")); 2682 /* Nothing to do. */ 2683 } 2684 2685 Static usbd_status 2686 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2687 { 2688 usbd_status err; 2689 2690 /* Insert last in queue. */ 2691 err = usb_insert_transfer(xfer); 2692 if (err) 2693 return (err); 2694 2695 /* Pipe isn't running, start first */ 2696 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2697 } 2698 2699 Static usbd_status 2700 ohci_root_intr_start(usbd_xfer_handle xfer) 2701 { 2702 usbd_pipe_handle pipe = xfer->pipe; 2703 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2704 2705 if (sc->sc_dying) 2706 return (USBD_IOERROR); 2707 2708 sc->sc_intrxfer = xfer; 2709 2710 return (USBD_IN_PROGRESS); 2711 } 2712 2713 /* Abort a root interrupt request. */ 2714 Static void 2715 ohci_root_intr_abort(usbd_xfer_handle xfer) 2716 { 2717 int s; 2718 2719 if (xfer->pipe->intrxfer == xfer) { 2720 DPRINTF(("ohci_root_intr_abort: remove\n")); 2721 xfer->pipe->intrxfer = NULL; 2722 } 2723 xfer->status = USBD_CANCELLED; 2724 s = splusb(); 2725 usb_transfer_complete(xfer); 2726 splx(s); 2727 } 2728 2729 /* Close the root pipe. */ 2730 Static void 2731 ohci_root_intr_close(usbd_pipe_handle pipe) 2732 { 2733 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2734 2735 DPRINTF(("ohci_root_intr_close\n")); 2736 2737 sc->sc_intrxfer = NULL; 2738 } 2739 2740 /************************/ 2741 2742 Static usbd_status 2743 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2744 { 2745 usbd_status err; 2746 2747 /* Insert last in queue. */ 2748 err = usb_insert_transfer(xfer); 2749 if (err) 2750 return (err); 2751 2752 /* Pipe isn't running, start first */ 2753 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2754 } 2755 2756 Static usbd_status 2757 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2758 { 2759 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2760 usbd_status err; 2761 2762 if (sc->sc_dying) 2763 return (USBD_IOERROR); 2764 2765 #ifdef DIAGNOSTIC 2766 if (!(xfer->rqflags & URQ_REQUEST)) { 2767 /* XXX panic */ 2768 printf("ohci_device_ctrl_transfer: not a request\n"); 2769 return (USBD_INVAL); 2770 } 2771 #endif 2772 2773 err = ohci_device_request(xfer); 2774 if (err) 2775 return (err); 2776 2777 if (sc->sc_bus.use_polling) 2778 ohci_waitintr(sc, xfer); 2779 return (USBD_IN_PROGRESS); 2780 } 2781 2782 /* Abort a device control request. */ 2783 Static void 2784 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2785 { 2786 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2787 ohci_abort_xfer(xfer, USBD_CANCELLED); 2788 } 2789 2790 /* Close a device control pipe. */ 2791 Static void 2792 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2793 { 2794 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2795 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2796 2797 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2798 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2799 ohci_free_std(sc, opipe->tail.td); 2800 } 2801 2802 /************************/ 2803 2804 Static void 2805 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2806 { 2807 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2808 2809 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2810 } 2811 2812 Static void 2813 ohci_noop(usbd_pipe_handle pipe) 2814 { 2815 } 2816 2817 Static usbd_status 2818 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2819 { 2820 usbd_status err; 2821 2822 /* Insert last in queue. */ 2823 err = usb_insert_transfer(xfer); 2824 if (err) 2825 return (err); 2826 2827 /* Pipe isn't running, start first */ 2828 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2829 } 2830 2831 Static usbd_status 2832 ohci_device_bulk_start(usbd_xfer_handle xfer) 2833 { 2834 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2835 usbd_device_handle dev = opipe->pipe.device; 2836 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2837 int addr = dev->address; 2838 ohci_soft_td_t *data, *tail, *tdp; 2839 ohci_soft_ed_t *sed; 2840 int s, len, isread, endpt; 2841 usbd_status err; 2842 2843 if (sc->sc_dying) 2844 return (USBD_IOERROR); 2845 2846 #ifdef DIAGNOSTIC 2847 if (xfer->rqflags & URQ_REQUEST) { 2848 /* XXX panic */ 2849 printf("ohci_device_bulk_start: a request\n"); 2850 return (USBD_INVAL); 2851 } 2852 #endif 2853 2854 len = xfer->length; 2855 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2856 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2857 sed = opipe->sed; 2858 2859 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2860 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2861 endpt)); 2862 2863 opipe->u.bulk.isread = isread; 2864 opipe->u.bulk.length = len; 2865 2866 /* Update device address */ 2867 sed->ed.ed_flags = htole32( 2868 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2869 OHCI_ED_SET_FA(addr)); 2870 2871 /* Allocate a chain of new TDs (including a new tail). */ 2872 data = opipe->tail.td; 2873 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2874 data, &tail); 2875 /* We want interrupt at the end of the transfer. */ 2876 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2877 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2878 tail->flags |= OHCI_CALL_DONE; 2879 tail = tail->nexttd; /* point at sentinel */ 2880 if (err) 2881 return (err); 2882 2883 tail->xfer = NULL; 2884 xfer->hcpriv = data; 2885 2886 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2887 "td_cbp=0x%08x td_be=0x%08x\n", 2888 (int)le32toh(sed->ed.ed_flags), 2889 (int)le32toh(data->td.td_flags), 2890 (int)le32toh(data->td.td_cbp), 2891 (int)le32toh(data->td.td_be))); 2892 2893 #ifdef OHCI_DEBUG 2894 if (ohcidebug > 5) { 2895 ohci_dump_ed(sed); 2896 ohci_dump_tds(data); 2897 } 2898 #endif 2899 2900 /* Insert ED in schedule */ 2901 s = splusb(); 2902 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2903 tdp->xfer = xfer; 2904 } 2905 sed->ed.ed_tailp = htole32(tail->physaddr); 2906 opipe->tail.td = tail; 2907 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2908 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2909 if (xfer->timeout && !sc->sc_bus.use_polling) { 2910 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2911 ohci_timeout, xfer); 2912 } 2913 2914 #if 0 2915 /* This goes wrong if we are too slow. */ 2916 if (ohcidebug > 10) { 2917 delay(10000); 2918 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2919 OREAD4(sc, OHCI_COMMAND_STATUS))); 2920 ohci_dump_ed(sed); 2921 ohci_dump_tds(data); 2922 } 2923 #endif 2924 2925 splx(s); 2926 2927 return (USBD_IN_PROGRESS); 2928 } 2929 2930 Static void 2931 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2932 { 2933 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2934 ohci_abort_xfer(xfer, USBD_CANCELLED); 2935 } 2936 2937 /* 2938 * Close a device bulk pipe. 2939 */ 2940 Static void 2941 ohci_device_bulk_close(usbd_pipe_handle pipe) 2942 { 2943 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2944 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2945 2946 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2947 ohci_close_pipe(pipe, sc->sc_bulk_head); 2948 ohci_free_std(sc, opipe->tail.td); 2949 } 2950 2951 /************************/ 2952 2953 Static usbd_status 2954 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2955 { 2956 usbd_status err; 2957 2958 /* Insert last in queue. */ 2959 err = usb_insert_transfer(xfer); 2960 if (err) 2961 return (err); 2962 2963 /* Pipe isn't running, start first */ 2964 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2965 } 2966 2967 Static usbd_status 2968 ohci_device_intr_start(usbd_xfer_handle xfer) 2969 { 2970 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2971 usbd_device_handle dev = opipe->pipe.device; 2972 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2973 ohci_soft_ed_t *sed = opipe->sed; 2974 ohci_soft_td_t *data, *tail; 2975 int len; 2976 int s; 2977 2978 if (sc->sc_dying) 2979 return (USBD_IOERROR); 2980 2981 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2982 "flags=%d priv=%p\n", 2983 xfer, xfer->length, xfer->flags, xfer->priv)); 2984 2985 #ifdef DIAGNOSTIC 2986 if (xfer->rqflags & URQ_REQUEST) 2987 panic("ohci_device_intr_transfer: a request"); 2988 #endif 2989 2990 len = xfer->length; 2991 2992 data = opipe->tail.td; 2993 tail = ohci_alloc_std(sc); 2994 if (tail == NULL) 2995 return (USBD_NOMEM); 2996 tail->xfer = NULL; 2997 2998 data->td.td_flags = htole32( 2999 OHCI_TD_IN | OHCI_TD_NOCC | 3000 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3001 if (xfer->flags & USBD_SHORT_XFER_OK) 3002 data->td.td_flags |= htole32(OHCI_TD_R); 3003 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 3004 data->nexttd = tail; 3005 data->td.td_nexttd = htole32(tail->physaddr); 3006 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 3007 data->len = len; 3008 data->xfer = xfer; 3009 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3010 xfer->hcpriv = data; 3011 3012 #ifdef OHCI_DEBUG 3013 if (ohcidebug > 5) { 3014 DPRINTF(("ohci_device_intr_transfer:\n")); 3015 ohci_dump_ed(sed); 3016 ohci_dump_tds(data); 3017 } 3018 #endif 3019 3020 /* Insert ED in schedule */ 3021 s = splusb(); 3022 sed->ed.ed_tailp = htole32(tail->physaddr); 3023 opipe->tail.td = tail; 3024 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3025 3026 #if 0 3027 /* 3028 * This goes horribly wrong, printing thousands of descriptors, 3029 * because false references are followed due to the fact that the 3030 * TD is gone. 3031 */ 3032 if (ohcidebug > 5) { 3033 usb_delay_ms(&sc->sc_bus, 5); 3034 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3035 OREAD4(sc, OHCI_COMMAND_STATUS))); 3036 ohci_dump_ed(sed); 3037 ohci_dump_tds(data); 3038 } 3039 #endif 3040 splx(s); 3041 3042 return (USBD_IN_PROGRESS); 3043 } 3044 3045 /* Abort a device control request. */ 3046 Static void 3047 ohci_device_intr_abort(usbd_xfer_handle xfer) 3048 { 3049 if (xfer->pipe->intrxfer == xfer) { 3050 DPRINTF(("ohci_device_intr_abort: remove\n")); 3051 xfer->pipe->intrxfer = NULL; 3052 } 3053 ohci_abort_xfer(xfer, USBD_CANCELLED); 3054 } 3055 3056 /* Close a device interrupt pipe. */ 3057 Static void 3058 ohci_device_intr_close(usbd_pipe_handle pipe) 3059 { 3060 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3061 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3062 int nslots = opipe->u.intr.nslots; 3063 int pos = opipe->u.intr.pos; 3064 int j; 3065 ohci_soft_ed_t *p, *sed = opipe->sed; 3066 int s; 3067 3068 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3069 pipe, nslots, pos)); 3070 s = splusb(); 3071 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3072 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3073 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3074 usb_delay_ms(&sc->sc_bus, 2); 3075 3076 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3077 ; 3078 #ifdef DIAGNOSTIC 3079 if (p == NULL) 3080 panic("ohci_device_intr_close: ED not found"); 3081 #endif 3082 p->next = sed->next; 3083 p->ed.ed_nexted = sed->ed.ed_nexted; 3084 splx(s); 3085 3086 for (j = 0; j < nslots; j++) 3087 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3088 3089 ohci_free_std(sc, opipe->tail.td); 3090 ohci_free_sed(sc, opipe->sed); 3091 } 3092 3093 Static usbd_status 3094 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3095 { 3096 int i, j, s, best; 3097 u_int npoll, slow, shigh, nslots; 3098 u_int bestbw, bw; 3099 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3100 3101 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3102 if (ival == 0) { 3103 printf("ohci_setintr: 0 interval\n"); 3104 return (USBD_INVAL); 3105 } 3106 3107 npoll = OHCI_NO_INTRS; 3108 while (npoll > ival) 3109 npoll /= 2; 3110 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3111 3112 /* 3113 * We now know which level in the tree the ED must go into. 3114 * Figure out which slot has most bandwidth left over. 3115 * Slots to examine: 3116 * npoll 3117 * 1 0 3118 * 2 1 2 3119 * 4 3 4 5 6 3120 * 8 7 8 9 10 11 12 13 14 3121 * N (N-1) .. (N-1+N-1) 3122 */ 3123 slow = npoll-1; 3124 shigh = slow + npoll; 3125 nslots = OHCI_NO_INTRS / npoll; 3126 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3127 bw = 0; 3128 for (j = 0; j < nslots; j++) 3129 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3130 if (bw < bestbw) { 3131 best = i; 3132 bestbw = bw; 3133 } 3134 } 3135 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3136 best, slow, shigh, bestbw)); 3137 3138 s = splusb(); 3139 hsed = sc->sc_eds[best]; 3140 sed->next = hsed->next; 3141 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3142 hsed->next = sed; 3143 hsed->ed.ed_nexted = htole32(sed->physaddr); 3144 splx(s); 3145 3146 for (j = 0; j < nslots; j++) 3147 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3148 opipe->u.intr.nslots = nslots; 3149 opipe->u.intr.pos = best; 3150 3151 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3152 return (USBD_NORMAL_COMPLETION); 3153 } 3154 3155 /***********************/ 3156 3157 usbd_status 3158 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3159 { 3160 usbd_status err; 3161 3162 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3163 3164 /* Put it on our queue, */ 3165 err = usb_insert_transfer(xfer); 3166 3167 /* bail out on error, */ 3168 if (err && err != USBD_IN_PROGRESS) 3169 return (err); 3170 3171 /* XXX should check inuse here */ 3172 3173 /* insert into schedule, */ 3174 ohci_device_isoc_enter(xfer); 3175 3176 /* and start if the pipe wasn't running */ 3177 if (!err) 3178 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3179 3180 return (err); 3181 } 3182 3183 void 3184 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3185 { 3186 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3187 usbd_device_handle dev = opipe->pipe.device; 3188 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3189 ohci_soft_ed_t *sed = opipe->sed; 3190 struct iso *iso = &opipe->u.iso; 3191 ohci_soft_itd_t *sitd, *nsitd; 3192 ohci_physaddr_t buf, offs, noffs, bp0; 3193 int i, ncur, nframes; 3194 int s; 3195 3196 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3197 "nframes=%d\n", 3198 iso->inuse, iso->next, xfer, xfer->nframes)); 3199 3200 if (sc->sc_dying) 3201 return; 3202 3203 if (iso->next == -1) { 3204 /* Not in use yet, schedule it a few frames ahead. */ 3205 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3206 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3207 iso->next)); 3208 } 3209 3210 sitd = opipe->tail.itd; 3211 buf = DMAADDR(&xfer->dmabuf, 0); 3212 bp0 = OHCI_PAGE(buf); 3213 offs = OHCI_PAGE_OFFSET(buf); 3214 nframes = xfer->nframes; 3215 xfer->hcpriv = sitd; 3216 for (i = ncur = 0; i < nframes; i++, ncur++) { 3217 noffs = offs + xfer->frlengths[i]; 3218 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3219 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3220 3221 /* Allocate next ITD */ 3222 nsitd = ohci_alloc_sitd(sc); 3223 if (nsitd == NULL) { 3224 /* XXX what now? */ 3225 printf("%s: isoc TD alloc failed\n", 3226 USBDEVNAME(sc->sc_bus.bdev)); 3227 return; 3228 } 3229 3230 /* Fill current ITD */ 3231 sitd->itd.itd_flags = htole32( 3232 OHCI_ITD_NOCC | 3233 OHCI_ITD_SET_SF(iso->next) | 3234 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3235 OHCI_ITD_SET_FC(ncur)); 3236 sitd->itd.itd_bp0 = htole32(bp0); 3237 sitd->nextitd = nsitd; 3238 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3239 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3240 sitd->xfer = xfer; 3241 sitd->flags = 0; 3242 3243 sitd = nsitd; 3244 iso->next = iso->next + ncur; 3245 bp0 = OHCI_PAGE(buf + offs); 3246 ncur = 0; 3247 } 3248 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3249 offs = noffs; 3250 } 3251 nsitd = ohci_alloc_sitd(sc); 3252 if (nsitd == NULL) { 3253 /* XXX what now? */ 3254 printf("%s: isoc TD alloc failed\n", 3255 USBDEVNAME(sc->sc_bus.bdev)); 3256 return; 3257 } 3258 /* Fixup last used ITD */ 3259 sitd->itd.itd_flags = htole32( 3260 OHCI_ITD_NOCC | 3261 OHCI_ITD_SET_SF(iso->next) | 3262 OHCI_ITD_SET_DI(0) | 3263 OHCI_ITD_SET_FC(ncur)); 3264 sitd->itd.itd_bp0 = htole32(bp0); 3265 sitd->nextitd = nsitd; 3266 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3267 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3268 sitd->xfer = xfer; 3269 sitd->flags = OHCI_CALL_DONE; 3270 3271 iso->next = iso->next + ncur; 3272 iso->inuse += nframes; 3273 3274 xfer->actlen = offs; /* XXX pretend we did it all */ 3275 3276 xfer->status = USBD_IN_PROGRESS; 3277 3278 #ifdef OHCI_DEBUG 3279 if (ohcidebug > 5) { 3280 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3281 le32toh(sc->sc_hcca->hcca_frame_number))); 3282 ohci_dump_itds(xfer->hcpriv); 3283 ohci_dump_ed(sed); 3284 } 3285 #endif 3286 3287 s = splusb(); 3288 opipe->tail.itd = nsitd; 3289 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3290 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3291 splx(s); 3292 3293 #ifdef OHCI_DEBUG 3294 if (ohcidebug > 5) { 3295 delay(150000); 3296 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3297 le32toh(sc->sc_hcca->hcca_frame_number))); 3298 ohci_dump_itds(xfer->hcpriv); 3299 ohci_dump_ed(sed); 3300 } 3301 #endif 3302 } 3303 3304 usbd_status 3305 ohci_device_isoc_start(usbd_xfer_handle xfer) 3306 { 3307 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3308 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3309 3310 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3311 3312 if (sc->sc_dying) 3313 return (USBD_IOERROR); 3314 3315 #ifdef DIAGNOSTIC 3316 if (xfer->status != USBD_IN_PROGRESS) 3317 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3318 #endif 3319 3320 /* XXX anything to do? */ 3321 3322 return (USBD_IN_PROGRESS); 3323 } 3324 3325 void 3326 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3327 { 3328 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3329 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3330 ohci_soft_ed_t *sed; 3331 ohci_soft_itd_t *sitd; 3332 int s; 3333 3334 s = splusb(); 3335 3336 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3337 3338 /* Transfer is already done. */ 3339 if (xfer->status != USBD_NOT_STARTED && 3340 xfer->status != USBD_IN_PROGRESS) { 3341 splx(s); 3342 printf("ohci_device_isoc_abort: early return\n"); 3343 return; 3344 } 3345 3346 /* Give xfer the requested abort code. */ 3347 xfer->status = USBD_CANCELLED; 3348 3349 sed = opipe->sed; 3350 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3351 3352 sitd = xfer->hcpriv; 3353 #ifdef DIAGNOSTIC 3354 if (sitd == NULL) { 3355 splx(s); 3356 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3357 return; 3358 } 3359 #endif 3360 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3361 #ifdef DIAGNOSTIC 3362 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3363 sitd->isdone = 1; 3364 #endif 3365 } 3366 3367 splx(s); 3368 3369 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3370 3371 s = splusb(); 3372 3373 /* Run callback. */ 3374 usb_transfer_complete(xfer); 3375 3376 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3377 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3378 3379 splx(s); 3380 } 3381 3382 void 3383 ohci_device_isoc_done(usbd_xfer_handle xfer) 3384 { 3385 3386 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3387 3388 xfer->hcpriv = NULL; 3389 } 3390 3391 usbd_status 3392 ohci_setup_isoc(usbd_pipe_handle pipe) 3393 { 3394 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3395 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3396 struct iso *iso = &opipe->u.iso; 3397 int s; 3398 3399 iso->next = -1; 3400 iso->inuse = 0; 3401 3402 s = splusb(); 3403 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3404 splx(s); 3405 3406 return (USBD_NORMAL_COMPLETION); 3407 } 3408 3409 void 3410 ohci_device_isoc_close(usbd_pipe_handle pipe) 3411 { 3412 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3413 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3414 3415 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3416 ohci_close_pipe(pipe, sc->sc_isoc_head); 3417 #ifdef DIAGNOSTIC 3418 opipe->tail.itd->isdone = 1; 3419 #endif 3420 ohci_free_sitd(sc, opipe->tail.itd); 3421 } 3422