1 /* $OpenBSD: ohci.c,v 1.22 2001/06/13 07:43:36 deraadt Exp $ */ 2 /* $NetBSD: ohci.c,v 1.102 2001/04/01 15:00:29 augustss Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the NetBSD 24 * Foundation, Inc. and its contributors. 25 * 4. Neither the name of The NetBSD Foundation nor the names of its 26 * contributors may be used to endorse or promote products derived 27 * from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 30 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 31 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 32 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 33 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 * POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * USB Open Host Controller driver. 44 * 45 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 46 * USB spec: http://www.usb.org/developers/data/usbspec.zip 47 */ 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/malloc.h> 52 #if defined(__NetBSD__) || defined(__OpenBSD__) 53 #include <sys/kernel.h> 54 #include <sys/device.h> 55 #include <sys/select.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus_pio.h> 60 #include <machine/bus_memio.h> 61 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 62 #include <machine/cpu.h> 63 #endif 64 #endif 65 #include <sys/proc.h> 66 #include <sys/queue.h> 67 68 #include <machine/bus.h> 69 #include <machine/endian.h> 70 71 #include <dev/usb/usb.h> 72 #include <dev/usb/usbdi.h> 73 #include <dev/usb/usbdivar.h> 74 #include <dev/usb/usb_mem.h> 75 #include <dev/usb/usb_quirks.h> 76 77 #include <dev/usb/ohcireg.h> 78 #include <dev/usb/ohcivar.h> 79 80 #if defined(__FreeBSD__) 81 #include <machine/clock.h> 82 83 #define delay(d) DELAY(d) 84 #endif 85 86 #if defined(__OpenBSD__) 87 struct cfdriver ohci_cd = { 88 NULL, "ohci", DV_DULL 89 }; 90 #endif 91 92 #ifdef OHCI_DEBUG 93 #define DPRINTF(x) if (ohcidebug) logprintf x 94 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 95 int ohcidebug = 0; 96 #ifndef __NetBSD__ 97 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 98 #endif 99 #else 100 #define DPRINTF(x) 101 #define DPRINTFN(n,x) 102 #endif 103 104 /* 105 * The OHCI controller is little endian, so on big endian machines 106 * the data strored in memory needs to be swapped. 107 */ 108 #if defined(__FreeBSD__) 109 #if BYTE_ORDER == BIG_ENDIAN 110 #define htole32(x) (bswap32(x)) 111 #define le32toh(x) (bswap32(x)) 112 #else 113 #define htole32(x) (x) 114 #define le32toh(x) (x) 115 #endif 116 #endif 117 118 struct ohci_pipe; 119 120 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 121 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 122 123 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 124 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 125 126 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 127 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 128 129 #if 0 130 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 131 ohci_soft_td_t *); 132 #endif 133 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 134 ohci_softc_t *, int, int, usbd_xfer_handle, 135 ohci_soft_td_t *, ohci_soft_td_t **); 136 137 Static void ohci_shutdown(void *v); 138 Static void ohci_power(int, void *); 139 Static usbd_status ohci_open(usbd_pipe_handle); 140 Static void ohci_poll(struct usbd_bus *); 141 Static void ohci_softintr(struct usbd_bus *); 142 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 143 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 144 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 145 146 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 147 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 149 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 151 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 152 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 154 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 155 156 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 157 Static void ohci_device_isoc_enter(usbd_xfer_handle); 158 159 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 160 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 161 162 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 163 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 164 165 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 166 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 167 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 168 Static void ohci_root_ctrl_close(usbd_pipe_handle); 169 Static void ohci_root_ctrl_done(usbd_xfer_handle); 170 171 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 172 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 173 Static void ohci_root_intr_abort(usbd_xfer_handle); 174 Static void ohci_root_intr_close(usbd_pipe_handle); 175 Static void ohci_root_intr_done(usbd_xfer_handle); 176 177 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 178 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 179 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 180 Static void ohci_device_ctrl_close(usbd_pipe_handle); 181 Static void ohci_device_ctrl_done(usbd_xfer_handle); 182 183 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 184 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 185 Static void ohci_device_bulk_abort(usbd_xfer_handle); 186 Static void ohci_device_bulk_close(usbd_pipe_handle); 187 Static void ohci_device_bulk_done(usbd_xfer_handle); 188 189 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 190 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 191 Static void ohci_device_intr_abort(usbd_xfer_handle); 192 Static void ohci_device_intr_close(usbd_pipe_handle); 193 Static void ohci_device_intr_done(usbd_xfer_handle); 194 195 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 196 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 197 Static void ohci_device_isoc_abort(usbd_xfer_handle); 198 Static void ohci_device_isoc_close(usbd_pipe_handle); 199 Static void ohci_device_isoc_done(usbd_xfer_handle); 200 201 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 202 struct ohci_pipe *pipe, int ival); 203 204 Static int ohci_str(usb_string_descriptor_t *, int, char *); 205 206 Static void ohci_timeout(void *); 207 Static void ohci_rhsc_able(ohci_softc_t *, int); 208 209 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 210 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 211 Static void ohci_abort_xfer_end(void *); 212 213 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 214 Static void ohci_noop(usbd_pipe_handle pipe); 215 216 #ifdef OHCI_DEBUG 217 Static void ohci_dumpregs(ohci_softc_t *); 218 Static void ohci_dump_tds(ohci_soft_td_t *); 219 Static void ohci_dump_td(ohci_soft_td_t *); 220 Static void ohci_dump_ed(ohci_soft_ed_t *); 221 Static void ohci_dump_itd(ohci_soft_itd_t *); 222 Static void ohci_dump_itds(ohci_soft_itd_t *); 223 #endif 224 225 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 226 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 227 #define OWRITE1(sc, r, x) \ 228 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 229 #define OWRITE2(sc, r, x) \ 230 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 231 #define OWRITE4(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 234 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 235 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 236 237 /* Reverse the bits in a value 0 .. 31 */ 238 Static u_int8_t revbits[OHCI_NO_INTRS] = 239 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 240 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 241 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 242 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 243 244 struct ohci_pipe { 245 struct usbd_pipe pipe; 246 ohci_soft_ed_t *sed; 247 union { 248 ohci_soft_td_t *td; 249 ohci_soft_itd_t *itd; 250 } tail; 251 /* Info needed for different pipe kinds. */ 252 union { 253 /* Control pipe */ 254 struct { 255 usb_dma_t reqdma; 256 u_int length; 257 ohci_soft_td_t *setup, *data, *stat; 258 } ctl; 259 /* Interrupt pipe */ 260 struct { 261 int nslots; 262 int pos; 263 } intr; 264 /* Bulk pipe */ 265 struct { 266 u_int length; 267 int isread; 268 } bulk; 269 /* Iso pipe */ 270 struct iso { 271 int next, inuse; 272 } iso; 273 } u; 274 }; 275 276 #define OHCI_INTR_ENDPT 1 277 278 Static struct usbd_bus_methods ohci_bus_methods = { 279 ohci_open, 280 ohci_softintr, 281 ohci_poll, 282 ohci_allocm, 283 ohci_freem, 284 ohci_allocx, 285 ohci_freex, 286 }; 287 288 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 289 ohci_root_ctrl_transfer, 290 ohci_root_ctrl_start, 291 ohci_root_ctrl_abort, 292 ohci_root_ctrl_close, 293 ohci_noop, 294 ohci_root_ctrl_done, 295 }; 296 297 Static struct usbd_pipe_methods ohci_root_intr_methods = { 298 ohci_root_intr_transfer, 299 ohci_root_intr_start, 300 ohci_root_intr_abort, 301 ohci_root_intr_close, 302 ohci_noop, 303 ohci_root_intr_done, 304 }; 305 306 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 307 ohci_device_ctrl_transfer, 308 ohci_device_ctrl_start, 309 ohci_device_ctrl_abort, 310 ohci_device_ctrl_close, 311 ohci_noop, 312 ohci_device_ctrl_done, 313 }; 314 315 Static struct usbd_pipe_methods ohci_device_intr_methods = { 316 ohci_device_intr_transfer, 317 ohci_device_intr_start, 318 ohci_device_intr_abort, 319 ohci_device_intr_close, 320 ohci_device_clear_toggle, 321 ohci_device_intr_done, 322 }; 323 324 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 325 ohci_device_bulk_transfer, 326 ohci_device_bulk_start, 327 ohci_device_bulk_abort, 328 ohci_device_bulk_close, 329 ohci_device_clear_toggle, 330 ohci_device_bulk_done, 331 }; 332 333 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 334 ohci_device_isoc_transfer, 335 ohci_device_isoc_start, 336 ohci_device_isoc_abort, 337 ohci_device_isoc_close, 338 ohci_noop, 339 ohci_device_isoc_done, 340 }; 341 342 #if defined(__NetBSD__) || defined(__OpenBSD__) 343 int 344 ohci_activate(device_ptr_t self, enum devact act) 345 { 346 struct ohci_softc *sc = (struct ohci_softc *)self; 347 int rv = 0; 348 349 switch (act) { 350 case DVACT_ACTIVATE: 351 return (EOPNOTSUPP); 352 break; 353 354 case DVACT_DEACTIVATE: 355 if (sc->sc_child != NULL) 356 rv = config_deactivate(sc->sc_child); 357 sc->sc_dying = 1; 358 break; 359 } 360 return (rv); 361 } 362 363 int 364 ohci_detach(struct ohci_softc *sc, int flags) 365 { 366 int rv = 0; 367 368 if (sc->sc_child != NULL) 369 rv = config_detach(sc->sc_child, flags); 370 371 if (rv != 0) 372 return (rv); 373 374 #if defined(__NetBSD__) || defined(__OpenBSD__) 375 powerhook_disestablish(sc->sc_powerhook); 376 shutdownhook_disestablish(sc->sc_shutdownhook); 377 #endif 378 379 /* free data structures XXX */ 380 381 return (rv); 382 } 383 #endif 384 385 ohci_soft_ed_t * 386 ohci_alloc_sed(ohci_softc_t *sc) 387 { 388 ohci_soft_ed_t *sed; 389 usbd_status err; 390 int i, offs; 391 usb_dma_t dma; 392 393 if (sc->sc_freeeds == NULL) { 394 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 395 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 396 OHCI_ED_ALIGN, &dma); 397 if (err) 398 return (0); 399 for(i = 0; i < OHCI_SED_CHUNK; i++) { 400 offs = i * OHCI_SED_SIZE; 401 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 402 sed->physaddr = DMAADDR(&dma) + offs; 403 sed->next = sc->sc_freeeds; 404 sc->sc_freeeds = sed; 405 } 406 } 407 sed = sc->sc_freeeds; 408 sc->sc_freeeds = sed->next; 409 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 410 sed->next = 0; 411 return (sed); 412 } 413 414 void 415 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 416 { 417 sed->next = sc->sc_freeeds; 418 sc->sc_freeeds = sed; 419 } 420 421 ohci_soft_td_t * 422 ohci_alloc_std(ohci_softc_t *sc) 423 { 424 ohci_soft_td_t *std; 425 usbd_status err; 426 int i, offs; 427 usb_dma_t dma; 428 int s; 429 430 if (sc->sc_freetds == NULL) { 431 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 432 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 433 OHCI_TD_ALIGN, &dma); 434 if (err) 435 return (NULL); 436 s = splusb(); 437 for(i = 0; i < OHCI_STD_CHUNK; i++) { 438 offs = i * OHCI_STD_SIZE; 439 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 440 std->physaddr = DMAADDR(&dma) + offs; 441 std->nexttd = sc->sc_freetds; 442 sc->sc_freetds = std; 443 } 444 splx(s); 445 } 446 447 s = splusb(); 448 std = sc->sc_freetds; 449 sc->sc_freetds = std->nexttd; 450 memset(&std->td, 0, sizeof(ohci_td_t)); 451 std->nexttd = NULL; 452 std->xfer = NULL; 453 ohci_hash_add_td(sc, std); 454 splx(s); 455 456 return (std); 457 } 458 459 void 460 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 461 { 462 int s; 463 464 s = splusb(); 465 ohci_hash_rem_td(sc, std); 466 std->nexttd = sc->sc_freetds; 467 sc->sc_freetds = std; 468 splx(s); 469 } 470 471 usbd_status 472 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 473 int alen, int rd, usbd_xfer_handle xfer, 474 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 475 { 476 ohci_soft_td_t *next, *cur; 477 ohci_physaddr_t dataphys, dataphysend; 478 u_int32_t tdflags; 479 int len, curlen; 480 usb_dma_t *dma = &xfer->dmabuf; 481 u_int16_t flags = xfer->flags; 482 483 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 484 485 len = alen; 486 cur = sp; 487 dataphys = DMAADDR(dma); 488 dataphysend = OHCI_PAGE(dataphys + len - 1); 489 tdflags = htole32( 490 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 491 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 492 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 493 494 for (;;) { 495 next = ohci_alloc_std(sc); 496 if (next == NULL) 497 goto nomem; 498 499 /* The OHCI hardware can handle at most one page crossing. */ 500 if (OHCI_PAGE(dataphys) == dataphysend || 501 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 502 /* we can handle it in this TD */ 503 curlen = len; 504 } else { 505 /* must use multiple TDs, fill as much as possible. */ 506 curlen = 2 * OHCI_PAGE_SIZE - 507 (dataphys & (OHCI_PAGE_SIZE-1)); 508 /* the length must be a multiple of the max size */ 509 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 510 #ifdef DIAGNOSTIC 511 if (curlen == 0) 512 panic("ohci_alloc_std: curlen == 0\n"); 513 #endif 514 } 515 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 516 "dataphysend=0x%08x len=%d curlen=%d\n", 517 dataphys, dataphysend, 518 len, curlen)); 519 len -= curlen; 520 521 cur->td.td_flags = tdflags; 522 cur->td.td_cbp = htole32(dataphys); 523 cur->nexttd = next; 524 cur->td.td_nexttd = htole32(next->physaddr); 525 cur->td.td_be = htole32(dataphys + curlen - 1); 526 cur->len = curlen; 527 cur->flags = OHCI_ADD_LEN; 528 cur->xfer = xfer; 529 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 530 dataphys, dataphys + curlen - 1)); 531 if (len == 0) 532 break; 533 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 534 dataphys += curlen; 535 cur = next; 536 } 537 if ((flags & USBD_FORCE_SHORT_XFER) && 538 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 539 /* Force a 0 length transfer at the end. */ 540 541 cur = next; 542 next = ohci_alloc_std(sc); 543 if (next == NULL) 544 goto nomem; 545 546 cur->td.td_flags = tdflags; 547 cur->td.td_cbp = 0; /* indicate 0 length packet */ 548 cur->nexttd = next; 549 cur->td.td_nexttd = htole32(next->physaddr); 550 cur->td.td_be = ~0; 551 cur->len = 0; 552 cur->flags = 0; 553 cur->xfer = xfer; 554 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 555 } 556 *ep = cur; 557 558 return (USBD_NORMAL_COMPLETION); 559 560 nomem: 561 /* XXX free chain */ 562 return (USBD_NOMEM); 563 } 564 565 #if 0 566 Static void 567 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 568 ohci_soft_td_t *stdend) 569 { 570 ohci_soft_td_t *p; 571 572 for (; std != stdend; std = p) { 573 p = std->nexttd; 574 ohci_free_std(sc, std); 575 } 576 } 577 #endif 578 579 ohci_soft_itd_t * 580 ohci_alloc_sitd(ohci_softc_t *sc) 581 { 582 ohci_soft_itd_t *sitd; 583 usbd_status err; 584 int i, s, offs; 585 usb_dma_t dma; 586 587 if (sc->sc_freeitds == NULL) { 588 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 589 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 590 OHCI_ITD_ALIGN, &dma); 591 if (err) 592 return (NULL); 593 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 594 offs = i * OHCI_SITD_SIZE; 595 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 596 sitd->physaddr = DMAADDR(&dma) + offs; 597 sitd->nextitd = sc->sc_freeitds; 598 sc->sc_freeitds = sitd; 599 } 600 } 601 602 s = splusb(); 603 sitd = sc->sc_freeitds; 604 sc->sc_freeitds = sitd->nextitd; 605 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 606 sitd->nextitd = NULL; 607 sitd->xfer = NULL; 608 ohci_hash_add_itd(sc, sitd); 609 splx(s); 610 611 #ifdef DIAGNOSTIC 612 sitd->isdone = 0; 613 #endif 614 615 return (sitd); 616 } 617 618 void 619 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 620 { 621 int s; 622 623 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 624 625 #ifdef DIAGNOSTIC 626 if (!sitd->isdone) { 627 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 628 return; 629 } 630 #endif 631 632 s = splusb(); 633 ohci_hash_rem_itd(sc, sitd); 634 sitd->nextitd = sc->sc_freeitds; 635 sc->sc_freeitds = sitd; 636 splx(s); 637 } 638 639 usbd_status 640 ohci_init(ohci_softc_t *sc) 641 { 642 ohci_soft_ed_t *sed, *psed; 643 usbd_status err; 644 int i; 645 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 646 647 DPRINTF(("ohci_init: start\n")); 648 #if defined(__OpenBSD__) 649 printf(","); 650 #else 651 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 652 #endif 653 rev = OREAD4(sc, OHCI_REVISION); 654 printf(" OHCI version %d.%d%s", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 655 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 656 printf("\n"); 657 658 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 659 printf("%s: unsupported OHCI revision\n", 660 USBDEVNAME(sc->sc_bus.bdev)); 661 sc->sc_bus.usbrev = USBREV_UNKNOWN; 662 return (USBD_INVAL); 663 } 664 sc->sc_bus.usbrev = USBREV_1_0; 665 666 for (i = 0; i < OHCI_HASH_SIZE; i++) 667 LIST_INIT(&sc->sc_hash_tds[i]); 668 for (i = 0; i < OHCI_HASH_SIZE; i++) 669 LIST_INIT(&sc->sc_hash_itds[i]); 670 671 SIMPLEQ_INIT(&sc->sc_free_xfers); 672 673 /* XXX determine alignment by R/W */ 674 /* Allocate the HCCA area. */ 675 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 676 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 677 if (err) 678 return (err); 679 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 680 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 681 682 sc->sc_eintrs = OHCI_NORMAL_INTRS; 683 684 /* Allocate dummy ED that starts the control list. */ 685 sc->sc_ctrl_head = ohci_alloc_sed(sc); 686 if (sc->sc_ctrl_head == NULL) { 687 err = USBD_NOMEM; 688 goto bad1; 689 } 690 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 691 692 /* Allocate dummy ED that starts the bulk list. */ 693 sc->sc_bulk_head = ohci_alloc_sed(sc); 694 if (sc->sc_bulk_head == NULL) { 695 err = USBD_NOMEM; 696 goto bad2; 697 } 698 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 699 700 /* Allocate dummy ED that starts the isochronous list. */ 701 sc->sc_isoc_head = ohci_alloc_sed(sc); 702 if (sc->sc_isoc_head == NULL) { 703 err = USBD_NOMEM; 704 goto bad3; 705 } 706 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 707 708 /* Allocate all the dummy EDs that make up the interrupt tree. */ 709 for (i = 0; i < OHCI_NO_EDS; i++) { 710 sed = ohci_alloc_sed(sc); 711 if (sed == NULL) { 712 while (--i >= 0) 713 ohci_free_sed(sc, sc->sc_eds[i]); 714 err = USBD_NOMEM; 715 goto bad4; 716 } 717 /* All ED fields are set to 0. */ 718 sc->sc_eds[i] = sed; 719 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 720 if (i != 0) 721 psed = sc->sc_eds[(i-1) / 2]; 722 else 723 psed= sc->sc_isoc_head; 724 sed->next = psed; 725 sed->ed.ed_nexted = htole32(psed->physaddr); 726 } 727 /* 728 * Fill HCCA interrupt table. The bit reversal is to get 729 * the tree set up properly to spread the interrupts. 730 */ 731 for (i = 0; i < OHCI_NO_INTRS; i++) 732 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 733 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 734 735 #ifdef OHCI_DEBUG 736 if (ohcidebug > 15) { 737 for (i = 0; i < OHCI_NO_EDS; i++) { 738 printf("ed#%d ", i); 739 ohci_dump_ed(sc->sc_eds[i]); 740 } 741 printf("iso "); 742 ohci_dump_ed(sc->sc_isoc_head); 743 } 744 #endif 745 746 /* Determine in what context we are running. */ 747 ctl = OREAD4(sc, OHCI_CONTROL); 748 if (ctl & OHCI_IR) { 749 /* SMM active, request change */ 750 DPRINTF(("ohci_init: SMM active, request owner change\n")); 751 s = OREAD4(sc, OHCI_COMMAND_STATUS); 752 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 753 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 754 usb_delay_ms(&sc->sc_bus, 1); 755 ctl = OREAD4(sc, OHCI_CONTROL); 756 } 757 if ((ctl & OHCI_IR) == 0) { 758 printf("%s: SMM does not respond, resetting\n", 759 USBDEVNAME(sc->sc_bus.bdev)); 760 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 761 goto reset; 762 } 763 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 764 /* BIOS started controller. */ 765 DPRINTF(("ohci_init: BIOS active\n")); 766 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 767 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 768 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 769 } 770 } else { 771 DPRINTF(("ohci_init: cold started\n")); 772 reset: 773 /* Controller was cold started. */ 774 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 775 } 776 777 /* 778 * This reset should not be necessary according to the OHCI spec, but 779 * without it some controllers do not start. 780 */ 781 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 782 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 783 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 784 785 /* We now own the host controller and the bus has been reset. */ 786 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 787 788 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 789 /* Nominal time for a reset is 10 us. */ 790 for (i = 0; i < 10; i++) { 791 delay(10); 792 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 793 if (!hcr) 794 break; 795 } 796 if (hcr) { 797 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 798 err = USBD_IOERROR; 799 goto bad5; 800 } 801 #ifdef OHCI_DEBUG 802 if (ohcidebug > 15) 803 ohci_dumpregs(sc); 804 #endif 805 806 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 807 808 /* Set up HC registers. */ 809 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 810 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 811 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 812 /* disable all interrupts and then switch on all desired interrupts */ 813 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 814 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 815 /* switch on desired functional features */ 816 ctl = OREAD4(sc, OHCI_CONTROL); 817 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 818 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 819 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 820 /* And finally start it! */ 821 OWRITE4(sc, OHCI_CONTROL, ctl); 822 823 /* 824 * The controller is now OPERATIONAL. Set a some final 825 * registers that should be set earlier, but that the 826 * controller ignores when in the SUSPEND state. 827 */ 828 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 829 fm |= OHCI_FSMPS(ival) | ival; 830 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 831 per = OHCI_PERIODIC(ival); /* 90% periodic */ 832 OWRITE4(sc, OHCI_PERIODIC_START, per); 833 834 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 835 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 836 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 837 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 838 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 839 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 840 841 /* 842 * The AMD756 requires a delay before re-reading the register, 843 * otherwise it will occasionally report 0 ports. 844 */ 845 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 846 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 847 848 #ifdef OHCI_DEBUG 849 if (ohcidebug > 5) 850 ohci_dumpregs(sc); 851 #endif 852 853 /* Set up the bus struct. */ 854 sc->sc_bus.methods = &ohci_bus_methods; 855 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 856 857 #if defined(__NetBSD__) || defined(__OpenBSD__) 858 sc->sc_control = sc->sc_intre = 0; 859 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 860 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 861 #endif 862 863 return (USBD_NORMAL_COMPLETION); 864 865 bad5: 866 for (i = 0; i < OHCI_NO_EDS; i++) 867 ohci_free_sed(sc, sc->sc_eds[i]); 868 bad4: 869 ohci_free_sed(sc, sc->sc_isoc_head); 870 bad3: 871 ohci_free_sed(sc, sc->sc_ctrl_head); 872 bad2: 873 ohci_free_sed(sc, sc->sc_bulk_head); 874 bad1: 875 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 876 return (err); 877 } 878 879 usbd_status 880 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 881 { 882 #if defined(__NetBSD__) || defined(__OpenBSD__) 883 struct ohci_softc *sc = (struct ohci_softc *)bus; 884 #endif 885 886 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 887 } 888 889 void 890 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 891 { 892 #if defined(__NetBSD__) || defined(__OpenBSD__) 893 struct ohci_softc *sc = (struct ohci_softc *)bus; 894 #endif 895 896 usb_freemem(&sc->sc_bus, dma); 897 } 898 899 usbd_xfer_handle 900 ohci_allocx(struct usbd_bus *bus) 901 { 902 struct ohci_softc *sc = (struct ohci_softc *)bus; 903 usbd_xfer_handle xfer; 904 905 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 906 if (xfer != NULL) 907 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 908 else 909 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 910 if (xfer != NULL) 911 memset(xfer, 0, sizeof *xfer); 912 return (xfer); 913 } 914 915 void 916 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 917 { 918 struct ohci_softc *sc = (struct ohci_softc *)bus; 919 920 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 921 } 922 923 /* 924 * Shut down the controller when the system is going down. 925 */ 926 void 927 ohci_shutdown(void *v) 928 { 929 ohci_softc_t *sc = v; 930 931 DPRINTF(("ohci_shutdown: stopping the HC\n")); 932 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 933 } 934 935 /* 936 * Handle suspend/resume. 937 * 938 * We need to switch to polling mode here, because this routine is 939 * called from an intterupt context. This is all right since we 940 * are almost suspended anyway. 941 */ 942 void 943 ohci_power(int why, void *v) 944 { 945 ohci_softc_t *sc = v; 946 u_int32_t ctl; 947 int s; 948 949 #ifdef OHCI_DEBUG 950 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 951 ohci_dumpregs(sc); 952 #endif 953 954 s = splhardusb(); 955 switch (why) { 956 case PWR_SUSPEND: 957 case PWR_STANDBY: 958 sc->sc_bus.use_polling++; 959 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 960 if (sc->sc_control == 0) { 961 /* 962 * Preserve register values, in case that APM BIOS 963 * does not recover them. 964 */ 965 sc->sc_control = ctl; 966 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 967 } 968 ctl |= OHCI_HCFS_SUSPEND; 969 OWRITE4(sc, OHCI_CONTROL, ctl); 970 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 971 sc->sc_bus.use_polling--; 972 break; 973 case PWR_RESUME: 974 sc->sc_bus.use_polling++; 975 /* Some broken BIOSes do not recover these values */ 976 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 977 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 978 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 979 if (sc->sc_intre) 980 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 981 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 982 if (sc->sc_control) 983 ctl = sc->sc_control; 984 else 985 ctl = OREAD4(sc, OHCI_CONTROL); 986 ctl |= OHCI_HCFS_RESUME; 987 OWRITE4(sc, OHCI_CONTROL, ctl); 988 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 989 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 990 OWRITE4(sc, OHCI_CONTROL, ctl); 991 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 992 sc->sc_control = sc->sc_intre = 0; 993 sc->sc_bus.use_polling--; 994 break; 995 #if defined(__NetBSD__) 996 case PWR_SOFTSUSPEND: 997 case PWR_SOFTSTANDBY: 998 case PWR_SOFTRESUME: 999 break; 1000 #endif 1001 } 1002 splx(s); 1003 } 1004 1005 #ifdef OHCI_DEBUG 1006 void 1007 ohci_dumpregs(ohci_softc_t *sc) 1008 { 1009 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1010 OREAD4(sc, OHCI_REVISION), 1011 OREAD4(sc, OHCI_CONTROL), 1012 OREAD4(sc, OHCI_COMMAND_STATUS))); 1013 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1014 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1015 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1016 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1017 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1018 OREAD4(sc, OHCI_HCCA), 1019 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1020 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1021 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1022 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1023 OREAD4(sc, OHCI_BULK_HEAD_ED), 1024 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1025 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1026 OREAD4(sc, OHCI_DONE_HEAD), 1027 OREAD4(sc, OHCI_FM_INTERVAL), 1028 OREAD4(sc, OHCI_FM_REMAINING))); 1029 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1030 OREAD4(sc, OHCI_FM_NUMBER), 1031 OREAD4(sc, OHCI_PERIODIC_START), 1032 OREAD4(sc, OHCI_LS_THRESHOLD))); 1033 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1034 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1035 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1036 OREAD4(sc, OHCI_RH_STATUS))); 1037 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1038 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1039 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1040 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1041 le32toh(sc->sc_hcca->hcca_frame_number), 1042 le32toh(sc->sc_hcca->hcca_done_head))); 1043 } 1044 #endif 1045 1046 Static int ohci_intr1(ohci_softc_t *); 1047 1048 int 1049 ohci_intr(void *p) 1050 { 1051 ohci_softc_t *sc = p; 1052 1053 /* If we get an interrupt while polling, then just ignore it. */ 1054 if (sc->sc_bus.use_polling) { 1055 #ifdef DIAGNOSTIC 1056 printf("ohci_intr: ignored interrupt while polling\n"); 1057 #endif 1058 return (0); 1059 } 1060 1061 return (ohci_intr1(sc)); 1062 } 1063 1064 Static int 1065 ohci_intr1(ohci_softc_t *sc) 1066 { 1067 u_int32_t intrs, eintrs; 1068 ohci_physaddr_t done; 1069 1070 /* In case the interrupt occurs before initialization has completed. */ 1071 if (sc == NULL || sc->sc_hcca == NULL) { 1072 #ifdef DIAGNOSTIC 1073 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1074 #endif 1075 return (0); 1076 } 1077 1078 intrs = 0; 1079 done = le32toh(sc->sc_hcca->hcca_done_head); 1080 if (done != 0) { 1081 if (done & ~OHCI_DONE_INTRS) 1082 intrs = OHCI_WDH; 1083 if (done & OHCI_DONE_INTRS) 1084 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1085 } else 1086 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1087 1088 if (!intrs) 1089 return (0); 1090 1091 intrs &= ~OHCI_MIE; 1092 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1093 eintrs = intrs & sc->sc_eintrs; 1094 if (!eintrs) 1095 return (0); 1096 1097 sc->sc_bus.intr_context++; 1098 sc->sc_bus.no_intrs++; 1099 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1100 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1101 (u_int)eintrs)); 1102 1103 if (eintrs & OHCI_SO) { 1104 sc->sc_overrun_cnt++; 1105 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1106 printf("%s: %u scheduling overruns\n", 1107 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1108 sc->sc_overrun_cnt = 0; 1109 } 1110 /* XXX do what */ 1111 intrs &= ~OHCI_SO; 1112 } 1113 if (eintrs & OHCI_WDH) { 1114 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1115 sc->sc_hcca->hcca_done_head = 0; 1116 usb_schedsoftintr(&sc->sc_bus); 1117 intrs &= ~OHCI_WDH; 1118 } 1119 if (eintrs & OHCI_RD) { 1120 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1121 /* XXX process resume detect */ 1122 } 1123 if (eintrs & OHCI_UE) { 1124 printf("%s: unrecoverable error, controller halted\n", 1125 USBDEVNAME(sc->sc_bus.bdev)); 1126 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1127 /* XXX what else */ 1128 } 1129 if (eintrs & OHCI_RHSC) { 1130 ohci_rhsc(sc, sc->sc_intrxfer); 1131 intrs &= ~OHCI_RHSC; 1132 1133 /* 1134 * Disable RHSC interrupt for now, because it will be 1135 * on until the port has been reset. 1136 */ 1137 ohci_rhsc_able(sc, 0); 1138 } 1139 1140 sc->sc_bus.intr_context--; 1141 1142 /* Block unprocessed interrupts. XXX */ 1143 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1144 sc->sc_eintrs &= ~intrs; 1145 1146 return (1); 1147 } 1148 1149 void 1150 ohci_rhsc_able(ohci_softc_t *sc, int on) 1151 { 1152 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1153 if (on) { 1154 sc->sc_eintrs |= OHCI_RHSC; 1155 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1156 } else { 1157 sc->sc_eintrs &= ~OHCI_RHSC; 1158 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1159 } 1160 } 1161 1162 #ifdef OHCI_DEBUG 1163 char *ohci_cc_strs[] = { 1164 "NO_ERROR", 1165 "CRC", 1166 "BIT_STUFFING", 1167 "DATA_TOGGLE_MISMATCH", 1168 "STALL", 1169 "DEVICE_NOT_RESPONDING", 1170 "PID_CHECK_FAILURE", 1171 "UNEXPECTED_PID", 1172 "DATA_OVERRUN", 1173 "DATA_UNDERRUN", 1174 "BUFFER_OVERRUN", 1175 "BUFFER_UNDERRUN", 1176 "reserved", 1177 "reserved", 1178 "NOT_ACCESSED", 1179 "NOT_ACCESSED", 1180 }; 1181 #endif 1182 1183 void 1184 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1185 { 1186 ohci_soft_itd_t *sitd, *sidone, **ip; 1187 ohci_soft_td_t *std, *sdone, **p; 1188 1189 /* Reverse the done list. */ 1190 for (sdone = NULL, sidone = NULL; done != 0; ) { 1191 std = ohci_hash_find_td(sc, done); 1192 if (std != NULL) { 1193 std->dnext = sdone; 1194 done = le32toh(std->td.td_nexttd); 1195 sdone = std; 1196 DPRINTFN(10,("add TD %p\n", std)); 1197 continue; 1198 } 1199 sitd = ohci_hash_find_itd(sc, done); 1200 if (sitd != NULL) { 1201 sitd->dnext = sidone; 1202 done = le32toh(sitd->itd.itd_nextitd); 1203 sidone = sitd; 1204 DPRINTFN(5,("add ITD %p\n", sitd)); 1205 continue; 1206 } 1207 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1208 } 1209 1210 /* sdone & sidone now hold the done lists. */ 1211 /* Put them on the already processed lists. */ 1212 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1213 ; 1214 *p = sdone; 1215 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1216 ; 1217 *ip = sidone; 1218 } 1219 1220 void 1221 ohci_softintr(struct usbd_bus *bus) 1222 { 1223 ohci_softc_t *sc = (ohci_softc_t *)bus; 1224 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1225 ohci_soft_td_t *std, *sdone, *stdnext; 1226 usbd_xfer_handle xfer; 1227 int len, cc, s; 1228 1229 sc->sc_bus.intr_context++; 1230 1231 s = splhardusb(); 1232 sdone = sc->sc_sdone; 1233 sc->sc_sdone = NULL; 1234 sidone = sc->sc_sidone; 1235 sc->sc_sidone = NULL; 1236 splx(s); 1237 1238 DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone)); 1239 1240 #ifdef OHCI_DEBUG 1241 if (ohcidebug > 10) { 1242 DPRINTF(("ohci_process_done: TD done:\n")); 1243 ohci_dump_tds(sdone); 1244 } 1245 #endif 1246 1247 for (std = sdone; std; std = stdnext) { 1248 xfer = std->xfer; 1249 stdnext = std->dnext; 1250 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1251 std, xfer, xfer ? xfer->hcpriv : 0)); 1252 if (xfer == NULL) { 1253 /* xfer == NULL: There seems to be no xfer associated 1254 * with this TD. It is tailp that happened to end up on 1255 * the done queue. 1256 */ 1257 continue; 1258 } 1259 if (xfer->status == USBD_CANCELLED || 1260 xfer->status == USBD_TIMEOUT) { 1261 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1262 xfer)); 1263 /* Handled by abort routine. */ 1264 continue; 1265 } 1266 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1267 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1268 if (cc == OHCI_CC_NO_ERROR) { 1269 len = std->len; 1270 if (std->td.td_cbp != 0) 1271 len -= le32toh(std->td.td_be) - 1272 le32toh(std->td.td_cbp) + 1; 1273 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1274 len, std->flags)); 1275 if (std->flags & OHCI_ADD_LEN) 1276 xfer->actlen += len; 1277 if (std->flags & OHCI_CALL_DONE) { 1278 xfer->status = USBD_NORMAL_COMPLETION; 1279 usb_transfer_complete(xfer); 1280 } 1281 ohci_free_std(sc, std); 1282 } else { 1283 /* 1284 * Endpoint is halted. First unlink all the TDs 1285 * belonging to the failed transfer, and then restart 1286 * the endpoint. 1287 */ 1288 ohci_soft_td_t *p, *n; 1289 struct ohci_pipe *opipe = 1290 (struct ohci_pipe *)xfer->pipe; 1291 1292 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1293 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1294 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1295 1296 /* remove TDs */ 1297 for (p = std; p->xfer == xfer; p = n) { 1298 n = p->nexttd; 1299 ohci_free_std(sc, p); 1300 } 1301 1302 /* clear halt */ 1303 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1304 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1305 1306 if (cc == OHCI_CC_STALL) 1307 xfer->status = USBD_STALLED; 1308 else 1309 xfer->status = USBD_IOERROR; 1310 usb_transfer_complete(xfer); 1311 } 1312 } 1313 1314 #ifdef OHCI_DEBUG 1315 if (ohcidebug > 10) { 1316 DPRINTF(("ohci_process_done: ITD done:\n")); 1317 ohci_dump_itds(sidone); 1318 } 1319 #endif 1320 1321 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1322 xfer = sitd->xfer; 1323 sitdnext = sitd->dnext; 1324 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1325 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1326 if (xfer == NULL) 1327 continue; 1328 if (xfer->status == USBD_CANCELLED || 1329 xfer->status == USBD_TIMEOUT) { 1330 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1331 xfer)); 1332 /* Handled by abort routine. */ 1333 continue; 1334 } 1335 #ifdef DIAGNOSTIC 1336 if (sitd->isdone) 1337 printf("ohci_softintr: sitd=%p is done\n", sitd); 1338 sitd->isdone = 1; 1339 #endif 1340 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1341 if (cc == OHCI_CC_NO_ERROR) { 1342 /* XXX compute length for input */ 1343 struct ohci_pipe *opipe = 1344 (struct ohci_pipe *)xfer->pipe; 1345 if (sitd->flags & OHCI_CALL_DONE) { 1346 opipe->u.iso.inuse -= xfer->nframes; 1347 /* XXX update frlengths with actual length */ 1348 /* XXX xfer->actlen = actlen; */ 1349 xfer->status = USBD_NORMAL_COMPLETION; 1350 usb_transfer_complete(xfer); 1351 } 1352 } else { 1353 /* XXX Do more */ 1354 xfer->status = USBD_IOERROR; 1355 usb_transfer_complete(xfer); 1356 } 1357 } 1358 1359 sc->sc_bus.intr_context--; 1360 } 1361 1362 void 1363 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1364 { 1365 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1366 1367 #ifdef DIAGNOSTIC 1368 if (!(xfer->rqflags & URQ_REQUEST)) { 1369 panic("ohci_ctrl_done: not a request\n"); 1370 } 1371 #endif 1372 xfer->hcpriv = NULL; 1373 } 1374 1375 void 1376 ohci_device_intr_done(usbd_xfer_handle xfer) 1377 { 1378 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1379 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1380 ohci_soft_ed_t *sed = opipe->sed; 1381 ohci_soft_td_t *data, *tail; 1382 1383 1384 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1385 xfer, xfer->actlen)); 1386 1387 xfer->hcpriv = NULL; 1388 1389 if (xfer->pipe->repeat) { 1390 data = opipe->tail.td; 1391 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1392 if (tail == NULL) { 1393 xfer->status = USBD_NOMEM; 1394 return; 1395 } 1396 tail->xfer = NULL; 1397 1398 data->td.td_flags = htole32( 1399 OHCI_TD_IN | OHCI_TD_NOCC | 1400 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1401 if (xfer->flags & USBD_SHORT_XFER_OK) 1402 data->td.td_flags |= htole32(OHCI_TD_R); 1403 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1404 data->nexttd = tail; 1405 data->td.td_nexttd = htole32(tail->physaddr); 1406 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1407 xfer->length - 1); 1408 data->len = xfer->length; 1409 data->xfer = xfer; 1410 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1411 xfer->hcpriv = data; 1412 xfer->actlen = 0; 1413 1414 sed->ed.ed_tailp = htole32(tail->physaddr); 1415 opipe->tail.td = tail; 1416 } 1417 } 1418 1419 void 1420 ohci_device_bulk_done(usbd_xfer_handle xfer) 1421 { 1422 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1423 xfer, xfer->actlen)); 1424 1425 xfer->hcpriv = NULL; 1426 } 1427 1428 void 1429 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1430 { 1431 usbd_pipe_handle pipe; 1432 struct ohci_pipe *opipe; 1433 u_char *p; 1434 int i, m; 1435 int hstatus; 1436 1437 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1438 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1439 sc, xfer, hstatus)); 1440 1441 if (xfer == NULL) { 1442 /* Just ignore the change. */ 1443 return; 1444 } 1445 1446 pipe = xfer->pipe; 1447 opipe = (struct ohci_pipe *)pipe; 1448 1449 p = KERNADDR(&xfer->dmabuf); 1450 m = min(sc->sc_noport, xfer->length * 8 - 1); 1451 memset(p, 0, xfer->length); 1452 for (i = 1; i <= m; i++) { 1453 /* Pick out CHANGE bits from the status reg. */ 1454 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1455 p[i/8] |= 1 << (i%8); 1456 } 1457 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1458 xfer->actlen = xfer->length; 1459 xfer->status = USBD_NORMAL_COMPLETION; 1460 1461 usb_transfer_complete(xfer); 1462 } 1463 1464 void 1465 ohci_root_intr_done(usbd_xfer_handle xfer) 1466 { 1467 xfer->hcpriv = NULL; 1468 } 1469 1470 void 1471 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1472 { 1473 xfer->hcpriv = NULL; 1474 } 1475 1476 /* 1477 * Wait here until controller claims to have an interrupt. 1478 * Then call ohci_intr and return. Use timeout to avoid waiting 1479 * too long. 1480 */ 1481 void 1482 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1483 { 1484 int timo = xfer->timeout; 1485 int usecs; 1486 u_int32_t intrs; 1487 1488 xfer->status = USBD_IN_PROGRESS; 1489 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1490 usb_delay_ms(&sc->sc_bus, 1); 1491 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1492 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1493 #ifdef OHCI_DEBUG 1494 if (ohcidebug > 15) 1495 ohci_dumpregs(sc); 1496 #endif 1497 if (intrs) { 1498 ohci_intr1(sc); 1499 if (xfer->status != USBD_IN_PROGRESS) 1500 return; 1501 } 1502 } 1503 1504 /* Timeout */ 1505 DPRINTF(("ohci_waitintr: timeout\n")); 1506 xfer->status = USBD_TIMEOUT; 1507 usb_transfer_complete(xfer); 1508 /* XXX should free TD */ 1509 } 1510 1511 void 1512 ohci_poll(struct usbd_bus *bus) 1513 { 1514 ohci_softc_t *sc = (ohci_softc_t *)bus; 1515 1516 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1517 ohci_intr1(sc); 1518 } 1519 1520 usbd_status 1521 ohci_device_request(usbd_xfer_handle xfer) 1522 { 1523 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1524 usb_device_request_t *req = &xfer->request; 1525 usbd_device_handle dev = opipe->pipe.device; 1526 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1527 int addr = dev->address; 1528 ohci_soft_td_t *setup, *stat, *next, *tail; 1529 ohci_soft_ed_t *sed; 1530 int isread; 1531 int len; 1532 usbd_status err; 1533 int s; 1534 1535 isread = req->bmRequestType & UT_READ; 1536 len = UGETW(req->wLength); 1537 1538 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1539 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1540 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1541 UGETW(req->wIndex), len, addr, 1542 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1543 1544 setup = opipe->tail.td; 1545 stat = ohci_alloc_std(sc); 1546 if (stat == NULL) { 1547 err = USBD_NOMEM; 1548 goto bad1; 1549 } 1550 tail = ohci_alloc_std(sc); 1551 if (tail == NULL) { 1552 err = USBD_NOMEM; 1553 goto bad2; 1554 } 1555 tail->xfer = NULL; 1556 1557 sed = opipe->sed; 1558 opipe->u.ctl.length = len; 1559 1560 /* Update device address and length since they may have changed. */ 1561 /* XXX This only needs to be done once, but it's too early in open. */ 1562 /* XXXX Should not touch ED here! */ 1563 sed->ed.ed_flags = htole32( 1564 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1565 OHCI_ED_SET_FA(addr) | 1566 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1567 1568 next = stat; 1569 1570 /* Set up data transaction */ 1571 if (len != 0) { 1572 ohci_soft_td_t *std = stat; 1573 1574 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1575 std, &stat); 1576 stat = stat->nexttd; /* point at free TD */ 1577 if (err) 1578 goto bad3; 1579 /* Start toggle at 1 and then use the carried toggle. */ 1580 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1581 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1582 } 1583 1584 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1585 1586 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1587 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1588 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1589 setup->nexttd = next; 1590 setup->td.td_nexttd = htole32(next->physaddr); 1591 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1592 setup->len = 0; 1593 setup->xfer = xfer; 1594 setup->flags = 0; 1595 xfer->hcpriv = setup; 1596 1597 stat->td.td_flags = htole32( 1598 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1599 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1600 stat->td.td_cbp = 0; 1601 stat->nexttd = tail; 1602 stat->td.td_nexttd = htole32(tail->physaddr); 1603 stat->td.td_be = 0; 1604 stat->flags = OHCI_CALL_DONE; 1605 stat->len = 0; 1606 stat->xfer = xfer; 1607 1608 #ifdef OHCI_DEBUG 1609 if (ohcidebug > 5) { 1610 DPRINTF(("ohci_device_request:\n")); 1611 ohci_dump_ed(sed); 1612 ohci_dump_tds(setup); 1613 } 1614 #endif 1615 1616 /* Insert ED in schedule */ 1617 s = splusb(); 1618 sed->ed.ed_tailp = htole32(tail->physaddr); 1619 opipe->tail.td = tail; 1620 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1621 if (xfer->timeout && !sc->sc_bus.use_polling) { 1622 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1623 ohci_timeout, xfer); 1624 } 1625 splx(s); 1626 1627 #if 0 1628 if (ohcidebug > 10) { 1629 delay(10000); 1630 DPRINTF(("ohci_device_request: status=%x\n", 1631 OREAD4(sc, OHCI_COMMAND_STATUS))); 1632 ohci_dump_ed(sed); 1633 ohci_dump_tds(setup); 1634 } 1635 #endif 1636 1637 return (USBD_NORMAL_COMPLETION); 1638 1639 bad3: 1640 ohci_free_std(sc, tail); 1641 bad2: 1642 ohci_free_std(sc, stat); 1643 bad1: 1644 return (err); 1645 } 1646 1647 /* 1648 * Add an ED to the schedule. Called at splusb(). 1649 */ 1650 void 1651 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1652 { 1653 SPLUSBCHECK; 1654 sed->next = head->next; 1655 sed->ed.ed_nexted = head->ed.ed_nexted; 1656 head->next = sed; 1657 head->ed.ed_nexted = htole32(sed->physaddr); 1658 } 1659 1660 /* 1661 * Remove an ED from the schedule. Called at splusb(). 1662 */ 1663 void 1664 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1665 { 1666 ohci_soft_ed_t *p; 1667 1668 SPLUSBCHECK; 1669 1670 /* XXX */ 1671 for (p = head; p == NULL && p->next != sed; p = p->next) 1672 ; 1673 if (p == NULL) 1674 panic("ohci_rem_ed: ED not found\n"); 1675 p->next = sed->next; 1676 p->ed.ed_nexted = sed->ed.ed_nexted; 1677 } 1678 1679 /* 1680 * When a transfer is completed the TD is added to the done queue by 1681 * the host controller. This queue is the processed by software. 1682 * Unfortunately the queue contains the physical address of the TD 1683 * and we have no simple way to translate this back to a kernel address. 1684 * To make the translation possible (and fast) we use a hash table of 1685 * TDs currently in the schedule. The physical address is used as the 1686 * hash value. 1687 */ 1688 1689 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1690 /* Called at splusb() */ 1691 void 1692 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1693 { 1694 int h = HASH(std->physaddr); 1695 1696 SPLUSBCHECK; 1697 1698 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1699 } 1700 1701 /* Called at splusb() */ 1702 void 1703 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1704 { 1705 SPLUSBCHECK; 1706 1707 LIST_REMOVE(std, hnext); 1708 } 1709 1710 ohci_soft_td_t * 1711 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1712 { 1713 int h = HASH(a); 1714 ohci_soft_td_t *std; 1715 1716 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1717 std != NULL; 1718 std = LIST_NEXT(std, hnext)) 1719 if (std->physaddr == a) 1720 return (std); 1721 return (NULL); 1722 } 1723 1724 /* Called at splusb() */ 1725 void 1726 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1727 { 1728 int h = HASH(sitd->physaddr); 1729 1730 SPLUSBCHECK; 1731 1732 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1733 sitd, (u_long)sitd->physaddr)); 1734 1735 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1736 } 1737 1738 /* Called at splusb() */ 1739 void 1740 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1741 { 1742 SPLUSBCHECK; 1743 1744 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1745 sitd, (u_long)sitd->physaddr)); 1746 1747 LIST_REMOVE(sitd, hnext); 1748 } 1749 1750 ohci_soft_itd_t * 1751 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1752 { 1753 int h = HASH(a); 1754 ohci_soft_itd_t *sitd; 1755 1756 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1757 sitd != NULL; 1758 sitd = LIST_NEXT(sitd, hnext)) 1759 if (sitd->physaddr == a) 1760 return (sitd); 1761 return (NULL); 1762 } 1763 1764 void 1765 ohci_timeout(void *addr) 1766 { 1767 usbd_xfer_handle xfer = addr; 1768 int s; 1769 1770 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1771 1772 s = splusb(); 1773 xfer->device->bus->intr_context++; 1774 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1775 xfer->device->bus->intr_context--; 1776 splx(s); 1777 } 1778 1779 #ifdef OHCI_DEBUG 1780 void 1781 ohci_dump_tds(ohci_soft_td_t *std) 1782 { 1783 for (; std; std = std->nexttd) 1784 ohci_dump_td(std); 1785 } 1786 1787 void 1788 ohci_dump_td(ohci_soft_td_t *std) 1789 { 1790 char sbuf[128]; 1791 1792 bitmask_snprintf((int)le32toh(std->td.td_flags), 1793 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1794 sbuf, sizeof(sbuf)); 1795 1796 DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1797 "nexttd=0x%08lx be=0x%08lx\n", 1798 std, (u_long)std->physaddr, sbuf, 1799 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1800 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1801 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1802 (u_long)le32toh(std->td.td_cbp), 1803 (u_long)le32toh(std->td.td_nexttd), 1804 (u_long)le32toh(std->td.td_be))); 1805 } 1806 1807 void 1808 ohci_dump_itd(ohci_soft_itd_t *sitd) 1809 { 1810 int i; 1811 1812 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1813 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1814 sitd, (u_long)sitd->physaddr, 1815 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1816 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1817 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1818 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1819 (u_long)le32toh(sitd->itd.itd_bp0), 1820 (u_long)le32toh(sitd->itd.itd_nextitd), 1821 (u_long)le32toh(sitd->itd.itd_be))); 1822 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1823 DPRINTF(("offs[%d]=0x%04x ", i, 1824 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1825 DPRINTF(("\n")); 1826 } 1827 1828 void 1829 ohci_dump_itds(ohci_soft_itd_t *sitd) 1830 { 1831 for (; sitd; sitd = sitd->nextitd) 1832 ohci_dump_itd(sitd); 1833 } 1834 1835 void 1836 ohci_dump_ed(ohci_soft_ed_t *sed) 1837 { 1838 char sbuf[128], sbuf2[128]; 1839 1840 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1841 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1842 sbuf, sizeof(sbuf)); 1843 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1844 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1845 1846 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx " 1847 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1848 sed, (u_long)sed->physaddr, 1849 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1850 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1851 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1852 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1853 (u_long)le32toh(sed->ed.ed_headp), 1854 (u_long)le32toh(sed->ed.ed_nexted))); 1855 } 1856 #endif 1857 1858 usbd_status 1859 ohci_open(usbd_pipe_handle pipe) 1860 { 1861 usbd_device_handle dev = pipe->device; 1862 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1863 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1864 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1865 u_int8_t addr = dev->address; 1866 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1867 ohci_soft_ed_t *sed; 1868 ohci_soft_td_t *std; 1869 ohci_soft_itd_t *sitd; 1870 ohci_physaddr_t tdphys; 1871 u_int32_t fmt; 1872 usbd_status err; 1873 int s; 1874 int ival; 1875 1876 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1877 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1878 1879 std = NULL; 1880 sed = NULL; 1881 1882 if (addr == sc->sc_addr) { 1883 switch (ed->bEndpointAddress) { 1884 case USB_CONTROL_ENDPOINT: 1885 pipe->methods = &ohci_root_ctrl_methods; 1886 break; 1887 case UE_DIR_IN | OHCI_INTR_ENDPT: 1888 pipe->methods = &ohci_root_intr_methods; 1889 break; 1890 default: 1891 return (USBD_INVAL); 1892 } 1893 } else { 1894 sed = ohci_alloc_sed(sc); 1895 if (sed == NULL) 1896 goto bad0; 1897 opipe->sed = sed; 1898 if (xfertype == UE_ISOCHRONOUS) { 1899 sitd = ohci_alloc_sitd(sc); 1900 if (sitd == NULL) { 1901 ohci_free_sitd(sc, sitd); 1902 goto bad1; 1903 } 1904 opipe->tail.itd = sitd; 1905 tdphys = sitd->physaddr; 1906 fmt = OHCI_ED_FORMAT_ISO; 1907 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1908 fmt |= OHCI_ED_DIR_IN; 1909 else 1910 fmt |= OHCI_ED_DIR_OUT; 1911 } else { 1912 std = ohci_alloc_std(sc); 1913 if (std == NULL) { 1914 ohci_free_std(sc, std); 1915 goto bad1; 1916 } 1917 opipe->tail.td = std; 1918 tdphys = std->physaddr; 1919 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1920 } 1921 sed->ed.ed_flags = htole32( 1922 OHCI_ED_SET_FA(addr) | 1923 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1924 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1925 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1926 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1927 1928 switch (xfertype) { 1929 case UE_CONTROL: 1930 pipe->methods = &ohci_device_ctrl_methods; 1931 err = usb_allocmem(&sc->sc_bus, 1932 sizeof(usb_device_request_t), 1933 0, &opipe->u.ctl.reqdma); 1934 if (err) 1935 goto bad; 1936 s = splusb(); 1937 ohci_add_ed(sed, sc->sc_ctrl_head); 1938 splx(s); 1939 break; 1940 case UE_INTERRUPT: 1941 pipe->methods = &ohci_device_intr_methods; 1942 ival = pipe->interval; 1943 if (ival == USBD_DEFAULT_INTERVAL) 1944 ival = ed->bInterval; 1945 return (ohci_device_setintr(sc, opipe, ival)); 1946 case UE_ISOCHRONOUS: 1947 pipe->methods = &ohci_device_isoc_methods; 1948 return (ohci_setup_isoc(pipe)); 1949 case UE_BULK: 1950 pipe->methods = &ohci_device_bulk_methods; 1951 s = splusb(); 1952 ohci_add_ed(sed, sc->sc_bulk_head); 1953 splx(s); 1954 break; 1955 } 1956 } 1957 return (USBD_NORMAL_COMPLETION); 1958 1959 bad: 1960 if (std != NULL) 1961 ohci_free_std(sc, std); 1962 bad1: 1963 if (sed != NULL) 1964 ohci_free_sed(sc, sed); 1965 bad0: 1966 return (USBD_NOMEM); 1967 1968 } 1969 1970 /* 1971 * Close a reqular pipe. 1972 * Assumes that there are no pending transactions. 1973 */ 1974 void 1975 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 1976 { 1977 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1978 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1979 ohci_soft_ed_t *sed = opipe->sed; 1980 int s; 1981 1982 s = splusb(); 1983 #ifdef DIAGNOSTIC 1984 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1985 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1986 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 1987 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 1988 ohci_soft_td_t *std; 1989 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1990 std != NULL; 1991 std = LIST_NEXT(std, hnext)) 1992 if (std->physaddr == td) 1993 break; 1994 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1995 "tl=0x%x pipe=%p, std=%p\n", sed, 1996 (int)le32toh(sed->ed.ed_headp), 1997 (int)le32toh(sed->ed.ed_tailp), 1998 pipe, std); 1999 usb_delay_ms(&sc->sc_bus, 2); 2000 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2001 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2002 printf("ohci_close_pipe: pipe still not empty\n"); 2003 } 2004 #endif 2005 ohci_rem_ed(sed, head); 2006 splx(s); 2007 ohci_free_sed(sc, opipe->sed); 2008 } 2009 2010 /* 2011 * Abort a device request. 2012 * If this routine is called at splusb() it guarantees that the request 2013 * will be removed from the hardware scheduling and that the callback 2014 * for it will be called with USBD_CANCELLED status. 2015 * It's impossible to guarantee that the requested transfer will not 2016 * have happened since the hardware runs concurrently. 2017 * If the transaction has already happened we rely on the ordinary 2018 * interrupt processing to process it. 2019 */ 2020 void 2021 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2022 { 2023 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2024 ohci_soft_ed_t *sed; 2025 2026 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 2027 2028 xfer->status = status; 2029 2030 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2031 2032 sed = opipe->sed; 2033 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2034 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2035 2036 #if 1 2037 if (xfer->device->bus->intr_context) { 2038 /* We have no process context, so we can't use tsleep(). */ 2039 usb_callout(xfer->pipe->abort_handle, 2040 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 2041 } else { 2042 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 2043 KASSERT(intr_nesting_level == 0, 2044 ("ohci_abort_req in interrupt context")); 2045 #endif 2046 usb_delay_ms(opipe->pipe.device->bus, 1); 2047 ohci_abort_xfer_end(xfer); 2048 } 2049 #else 2050 delay(1000); 2051 ohci_abort_xfer_end(xfer); 2052 #endif 2053 } 2054 2055 void 2056 ohci_abort_xfer_end(void *v) 2057 { 2058 usbd_xfer_handle xfer = v; 2059 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2060 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2061 ohci_soft_ed_t *sed; 2062 ohci_soft_td_t *p, *n; 2063 int s; 2064 2065 s = splusb(); 2066 2067 p = xfer->hcpriv; 2068 #ifdef DIAGNOSTIC 2069 if (p == NULL) { 2070 printf("ohci_abort_xfer: hcpriv==0\n"); 2071 splx(s); 2072 return; 2073 } 2074 #endif 2075 for (; p->xfer == xfer; p = n) { 2076 n = p->nexttd; 2077 ohci_free_std(sc, p); 2078 } 2079 2080 sed = opipe->sed; 2081 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2082 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2083 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2084 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2085 2086 usb_transfer_complete(xfer); 2087 2088 splx(s); 2089 } 2090 2091 /* 2092 * Data structures and routines to emulate the root hub. 2093 */ 2094 Static usb_device_descriptor_t ohci_devd = { 2095 USB_DEVICE_DESCRIPTOR_SIZE, 2096 UDESC_DEVICE, /* type */ 2097 {0x00, 0x01}, /* USB version */ 2098 UDCLASS_HUB, /* class */ 2099 UDSUBCLASS_HUB, /* subclass */ 2100 0, /* protocol */ 2101 64, /* max packet */ 2102 {0},{0},{0x00,0x01}, /* device id */ 2103 1,2,0, /* string indicies */ 2104 1 /* # of configurations */ 2105 }; 2106 2107 Static usb_config_descriptor_t ohci_confd = { 2108 USB_CONFIG_DESCRIPTOR_SIZE, 2109 UDESC_CONFIG, 2110 {USB_CONFIG_DESCRIPTOR_SIZE + 2111 USB_INTERFACE_DESCRIPTOR_SIZE + 2112 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2113 1, 2114 1, 2115 0, 2116 UC_SELF_POWERED, 2117 0 /* max power */ 2118 }; 2119 2120 Static usb_interface_descriptor_t ohci_ifcd = { 2121 USB_INTERFACE_DESCRIPTOR_SIZE, 2122 UDESC_INTERFACE, 2123 0, 2124 0, 2125 1, 2126 UICLASS_HUB, 2127 UISUBCLASS_HUB, 2128 0, 2129 0 2130 }; 2131 2132 Static usb_endpoint_descriptor_t ohci_endpd = { 2133 USB_ENDPOINT_DESCRIPTOR_SIZE, 2134 UDESC_ENDPOINT, 2135 UE_DIR_IN | OHCI_INTR_ENDPT, 2136 UE_INTERRUPT, 2137 {8, 0}, /* max packet */ 2138 255 2139 }; 2140 2141 Static usb_hub_descriptor_t ohci_hubd = { 2142 USB_HUB_DESCRIPTOR_SIZE, 2143 UDESC_HUB, 2144 0, 2145 {0,0}, 2146 0, 2147 0, 2148 {0}, 2149 }; 2150 2151 Static int 2152 ohci_str(p, l, s) 2153 usb_string_descriptor_t *p; 2154 int l; 2155 char *s; 2156 { 2157 int i; 2158 2159 if (l == 0) 2160 return (0); 2161 p->bLength = 2 * strlen(s) + 2; 2162 if (l == 1) 2163 return (1); 2164 p->bDescriptorType = UDESC_STRING; 2165 l -= 2; 2166 for (i = 0; s[i] && l > 1; i++, l -= 2) 2167 USETW2(p->bString[i], 0, s[i]); 2168 return (2*i+2); 2169 } 2170 2171 /* 2172 * Simulate a hardware hub by handling all the necessary requests. 2173 */ 2174 Static usbd_status 2175 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2176 { 2177 usbd_status err; 2178 2179 /* Insert last in queue. */ 2180 err = usb_insert_transfer(xfer); 2181 if (err) 2182 return (err); 2183 2184 /* Pipe isn't running, start first */ 2185 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2186 } 2187 2188 Static usbd_status 2189 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2190 { 2191 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2192 usb_device_request_t *req; 2193 void *buf = NULL; 2194 int port, i; 2195 int s, len, value, index, l, totlen = 0; 2196 usb_port_status_t ps; 2197 usb_hub_descriptor_t hubd; 2198 usbd_status err; 2199 u_int32_t v; 2200 2201 if (sc->sc_dying) 2202 return (USBD_IOERROR); 2203 2204 #ifdef DIAGNOSTIC 2205 if (!(xfer->rqflags & URQ_REQUEST)) 2206 /* XXX panic */ 2207 return (USBD_INVAL); 2208 #endif 2209 req = &xfer->request; 2210 2211 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2212 req->bmRequestType, req->bRequest)); 2213 2214 len = UGETW(req->wLength); 2215 value = UGETW(req->wValue); 2216 index = UGETW(req->wIndex); 2217 2218 if (len != 0) 2219 buf = KERNADDR(&xfer->dmabuf); 2220 2221 #define C(x,y) ((x) | ((y) << 8)) 2222 switch(C(req->bRequest, req->bmRequestType)) { 2223 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2224 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2225 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2226 /* 2227 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2228 * for the integrated root hub. 2229 */ 2230 break; 2231 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2232 if (len > 0) { 2233 *(u_int8_t *)buf = sc->sc_conf; 2234 totlen = 1; 2235 } 2236 break; 2237 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2238 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2239 switch(value >> 8) { 2240 case UDESC_DEVICE: 2241 if ((value & 0xff) != 0) { 2242 err = USBD_IOERROR; 2243 goto ret; 2244 } 2245 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2246 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2247 memcpy(buf, &ohci_devd, l); 2248 break; 2249 case UDESC_CONFIG: 2250 if ((value & 0xff) != 0) { 2251 err = USBD_IOERROR; 2252 goto ret; 2253 } 2254 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2255 memcpy(buf, &ohci_confd, l); 2256 buf = (char *)buf + l; 2257 len -= l; 2258 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2259 totlen += l; 2260 memcpy(buf, &ohci_ifcd, l); 2261 buf = (char *)buf + l; 2262 len -= l; 2263 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2264 totlen += l; 2265 memcpy(buf, &ohci_endpd, l); 2266 break; 2267 case UDESC_STRING: 2268 if (len == 0) 2269 break; 2270 *(u_int8_t *)buf = 0; 2271 totlen = 1; 2272 switch (value & 0xff) { 2273 case 1: /* Vendor */ 2274 totlen = ohci_str(buf, len, sc->sc_vendor); 2275 break; 2276 case 2: /* Product */ 2277 totlen = ohci_str(buf, len, "OHCI root hub"); 2278 break; 2279 } 2280 break; 2281 default: 2282 err = USBD_IOERROR; 2283 goto ret; 2284 } 2285 break; 2286 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2287 if (len > 0) { 2288 *(u_int8_t *)buf = 0; 2289 totlen = 1; 2290 } 2291 break; 2292 case C(UR_GET_STATUS, UT_READ_DEVICE): 2293 if (len > 1) { 2294 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2295 totlen = 2; 2296 } 2297 break; 2298 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2299 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2300 if (len > 1) { 2301 USETW(((usb_status_t *)buf)->wStatus, 0); 2302 totlen = 2; 2303 } 2304 break; 2305 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2306 if (value >= USB_MAX_DEVICES) { 2307 err = USBD_IOERROR; 2308 goto ret; 2309 } 2310 sc->sc_addr = value; 2311 break; 2312 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2313 if (value != 0 && value != 1) { 2314 err = USBD_IOERROR; 2315 goto ret; 2316 } 2317 sc->sc_conf = value; 2318 break; 2319 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2320 break; 2321 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2322 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2323 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2324 err = USBD_IOERROR; 2325 goto ret; 2326 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2327 break; 2328 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2329 break; 2330 /* Hub requests */ 2331 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2332 break; 2333 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2334 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2335 "port=%d feature=%d\n", 2336 index, value)); 2337 if (index < 1 || index > sc->sc_noport) { 2338 err = USBD_IOERROR; 2339 goto ret; 2340 } 2341 port = OHCI_RH_PORT_STATUS(index); 2342 switch(value) { 2343 case UHF_PORT_ENABLE: 2344 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2345 break; 2346 case UHF_PORT_SUSPEND: 2347 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2348 break; 2349 case UHF_PORT_POWER: 2350 /* Yes, writing to the LOW_SPEED bit clears power. */ 2351 OWRITE4(sc, port, UPS_LOW_SPEED); 2352 break; 2353 case UHF_C_PORT_CONNECTION: 2354 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2355 break; 2356 case UHF_C_PORT_ENABLE: 2357 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2358 break; 2359 case UHF_C_PORT_SUSPEND: 2360 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2361 break; 2362 case UHF_C_PORT_OVER_CURRENT: 2363 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2364 break; 2365 case UHF_C_PORT_RESET: 2366 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2367 break; 2368 default: 2369 err = USBD_IOERROR; 2370 goto ret; 2371 } 2372 switch(value) { 2373 case UHF_C_PORT_CONNECTION: 2374 case UHF_C_PORT_ENABLE: 2375 case UHF_C_PORT_SUSPEND: 2376 case UHF_C_PORT_OVER_CURRENT: 2377 case UHF_C_PORT_RESET: 2378 /* Enable RHSC interrupt if condition is cleared. */ 2379 if ((OREAD4(sc, port) >> 16) == 0) 2380 ohci_rhsc_able(sc, 1); 2381 break; 2382 default: 2383 break; 2384 } 2385 break; 2386 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2387 if (value != 0) { 2388 err = USBD_IOERROR; 2389 goto ret; 2390 } 2391 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2392 hubd = ohci_hubd; 2393 hubd.bNbrPorts = sc->sc_noport; 2394 USETW(hubd.wHubCharacteristics, 2395 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2396 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2397 /* XXX overcurrent */ 2398 ); 2399 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2400 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2401 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2402 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2403 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2404 l = min(len, hubd.bDescLength); 2405 totlen = l; 2406 memcpy(buf, &hubd, l); 2407 break; 2408 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2409 if (len != 4) { 2410 err = USBD_IOERROR; 2411 goto ret; 2412 } 2413 memset(buf, 0, len); /* ? XXX */ 2414 totlen = len; 2415 break; 2416 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2417 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2418 index)); 2419 if (index < 1 || index > sc->sc_noport) { 2420 err = USBD_IOERROR; 2421 goto ret; 2422 } 2423 if (len != 4) { 2424 err = USBD_IOERROR; 2425 goto ret; 2426 } 2427 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2428 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2429 v)); 2430 USETW(ps.wPortStatus, v); 2431 USETW(ps.wPortChange, v >> 16); 2432 l = min(len, sizeof ps); 2433 memcpy(buf, &ps, l); 2434 totlen = l; 2435 break; 2436 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2437 err = USBD_IOERROR; 2438 goto ret; 2439 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2440 break; 2441 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2442 if (index < 1 || index > sc->sc_noport) { 2443 err = USBD_IOERROR; 2444 goto ret; 2445 } 2446 port = OHCI_RH_PORT_STATUS(index); 2447 switch(value) { 2448 case UHF_PORT_ENABLE: 2449 OWRITE4(sc, port, UPS_PORT_ENABLED); 2450 break; 2451 case UHF_PORT_SUSPEND: 2452 OWRITE4(sc, port, UPS_SUSPEND); 2453 break; 2454 case UHF_PORT_RESET: 2455 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2456 index)); 2457 OWRITE4(sc, port, UPS_RESET); 2458 for (i = 0; i < 10; i++) { 2459 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2460 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2461 break; 2462 } 2463 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2464 index, OREAD4(sc, port))); 2465 break; 2466 case UHF_PORT_POWER: 2467 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2468 "%d\n", index)); 2469 OWRITE4(sc, port, UPS_PORT_POWER); 2470 break; 2471 default: 2472 err = USBD_IOERROR; 2473 goto ret; 2474 } 2475 break; 2476 default: 2477 err = USBD_IOERROR; 2478 goto ret; 2479 } 2480 xfer->actlen = totlen; 2481 err = USBD_NORMAL_COMPLETION; 2482 ret: 2483 xfer->status = err; 2484 s = splusb(); 2485 usb_transfer_complete(xfer); 2486 splx(s); 2487 return (USBD_IN_PROGRESS); 2488 } 2489 2490 /* Abort a root control request. */ 2491 Static void 2492 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2493 { 2494 /* Nothing to do, all transfers are synchronous. */ 2495 } 2496 2497 /* Close the root pipe. */ 2498 Static void 2499 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2500 { 2501 DPRINTF(("ohci_root_ctrl_close\n")); 2502 /* Nothing to do. */ 2503 } 2504 2505 Static usbd_status 2506 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2507 { 2508 usbd_status err; 2509 2510 /* Insert last in queue. */ 2511 err = usb_insert_transfer(xfer); 2512 if (err) 2513 return (err); 2514 2515 /* Pipe isn't running, start first */ 2516 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2517 } 2518 2519 Static usbd_status 2520 ohci_root_intr_start(usbd_xfer_handle xfer) 2521 { 2522 usbd_pipe_handle pipe = xfer->pipe; 2523 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2524 2525 if (sc->sc_dying) 2526 return (USBD_IOERROR); 2527 2528 sc->sc_intrxfer = xfer; 2529 2530 return (USBD_IN_PROGRESS); 2531 } 2532 2533 /* Abort a root interrupt request. */ 2534 Static void 2535 ohci_root_intr_abort(usbd_xfer_handle xfer) 2536 { 2537 int s; 2538 2539 if (xfer->pipe->intrxfer == xfer) { 2540 DPRINTF(("ohci_root_intr_abort: remove\n")); 2541 xfer->pipe->intrxfer = NULL; 2542 } 2543 xfer->status = USBD_CANCELLED; 2544 s = splusb(); 2545 usb_transfer_complete(xfer); 2546 splx(s); 2547 } 2548 2549 /* Close the root pipe. */ 2550 Static void 2551 ohci_root_intr_close(usbd_pipe_handle pipe) 2552 { 2553 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2554 2555 DPRINTF(("ohci_root_intr_close\n")); 2556 2557 sc->sc_intrxfer = NULL; 2558 } 2559 2560 /************************/ 2561 2562 Static usbd_status 2563 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2564 { 2565 usbd_status err; 2566 2567 /* Insert last in queue. */ 2568 err = usb_insert_transfer(xfer); 2569 if (err) 2570 return (err); 2571 2572 /* Pipe isn't running, start first */ 2573 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2574 } 2575 2576 Static usbd_status 2577 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2578 { 2579 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2580 usbd_status err; 2581 2582 if (sc->sc_dying) 2583 return (USBD_IOERROR); 2584 2585 #ifdef DIAGNOSTIC 2586 if (!(xfer->rqflags & URQ_REQUEST)) { 2587 /* XXX panic */ 2588 printf("ohci_device_ctrl_transfer: not a request\n"); 2589 return (USBD_INVAL); 2590 } 2591 #endif 2592 2593 err = ohci_device_request(xfer); 2594 if (err) 2595 return (err); 2596 2597 if (sc->sc_bus.use_polling) 2598 ohci_waitintr(sc, xfer); 2599 return (USBD_IN_PROGRESS); 2600 } 2601 2602 /* Abort a device control request. */ 2603 Static void 2604 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2605 { 2606 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2607 ohci_abort_xfer(xfer, USBD_CANCELLED); 2608 } 2609 2610 /* Close a device control pipe. */ 2611 Static void 2612 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2613 { 2614 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2615 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2616 2617 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2618 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2619 ohci_free_std(sc, opipe->tail.td); 2620 } 2621 2622 /************************/ 2623 2624 Static void 2625 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2626 { 2627 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2628 2629 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2630 } 2631 2632 Static void 2633 ohci_noop(usbd_pipe_handle pipe) 2634 { 2635 } 2636 2637 Static usbd_status 2638 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2639 { 2640 usbd_status err; 2641 2642 /* Insert last in queue. */ 2643 err = usb_insert_transfer(xfer); 2644 if (err) 2645 return (err); 2646 2647 /* Pipe isn't running, start first */ 2648 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2649 } 2650 2651 Static usbd_status 2652 ohci_device_bulk_start(usbd_xfer_handle xfer) 2653 { 2654 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2655 usbd_device_handle dev = opipe->pipe.device; 2656 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2657 int addr = dev->address; 2658 ohci_soft_td_t *data, *tail, *tdp; 2659 ohci_soft_ed_t *sed; 2660 int s, len, isread, endpt; 2661 usbd_status err; 2662 2663 if (sc->sc_dying) 2664 return (USBD_IOERROR); 2665 2666 #ifdef DIAGNOSTIC 2667 if (xfer->rqflags & URQ_REQUEST) { 2668 /* XXX panic */ 2669 printf("ohci_device_bulk_start: a request\n"); 2670 return (USBD_INVAL); 2671 } 2672 #endif 2673 2674 len = xfer->length; 2675 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2676 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2677 sed = opipe->sed; 2678 2679 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2680 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2681 endpt)); 2682 2683 opipe->u.bulk.isread = isread; 2684 opipe->u.bulk.length = len; 2685 2686 /* Update device address */ 2687 sed->ed.ed_flags = htole32( 2688 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2689 OHCI_ED_SET_FA(addr)); 2690 2691 /* Allocate a chain of new TDs (including a new tail). */ 2692 data = opipe->tail.td; 2693 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2694 data, &tail); 2695 /* We want interrupt at the end of the transfer. */ 2696 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2697 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2698 tail->flags |= OHCI_CALL_DONE; 2699 tail = tail->nexttd; /* point at sentinel */ 2700 if (err) 2701 return (err); 2702 2703 tail->xfer = NULL; 2704 xfer->hcpriv = data; 2705 2706 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2707 "td_cbp=0x%08x td_be=0x%08x\n", 2708 (int)le32toh(sed->ed.ed_flags), 2709 (int)le32toh(data->td.td_flags), 2710 (int)le32toh(data->td.td_cbp), 2711 (int)le32toh(data->td.td_be))); 2712 2713 #ifdef OHCI_DEBUG 2714 if (ohcidebug > 5) { 2715 ohci_dump_ed(sed); 2716 ohci_dump_tds(data); 2717 } 2718 #endif 2719 2720 /* Insert ED in schedule */ 2721 s = splusb(); 2722 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2723 tdp->xfer = xfer; 2724 } 2725 sed->ed.ed_tailp = htole32(tail->physaddr); 2726 opipe->tail.td = tail; 2727 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2728 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2729 if (xfer->timeout && !sc->sc_bus.use_polling) { 2730 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2731 ohci_timeout, xfer); 2732 } 2733 2734 #if 0 2735 /* This goes wrong if we are too slow. */ 2736 if (ohcidebug > 10) { 2737 delay(10000); 2738 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2739 OREAD4(sc, OHCI_COMMAND_STATUS))); 2740 ohci_dump_ed(sed); 2741 ohci_dump_tds(data); 2742 } 2743 #endif 2744 2745 splx(s); 2746 2747 return (USBD_IN_PROGRESS); 2748 } 2749 2750 Static void 2751 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2752 { 2753 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2754 ohci_abort_xfer(xfer, USBD_CANCELLED); 2755 } 2756 2757 /* 2758 * Close a device bulk pipe. 2759 */ 2760 Static void 2761 ohci_device_bulk_close(usbd_pipe_handle pipe) 2762 { 2763 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2764 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2765 2766 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2767 ohci_close_pipe(pipe, sc->sc_bulk_head); 2768 ohci_free_std(sc, opipe->tail.td); 2769 } 2770 2771 /************************/ 2772 2773 Static usbd_status 2774 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2775 { 2776 usbd_status err; 2777 2778 /* Insert last in queue. */ 2779 err = usb_insert_transfer(xfer); 2780 if (err) 2781 return (err); 2782 2783 /* Pipe isn't running, start first */ 2784 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2785 } 2786 2787 Static usbd_status 2788 ohci_device_intr_start(usbd_xfer_handle xfer) 2789 { 2790 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2791 usbd_device_handle dev = opipe->pipe.device; 2792 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2793 ohci_soft_ed_t *sed = opipe->sed; 2794 ohci_soft_td_t *data, *tail; 2795 int len; 2796 int s; 2797 2798 if (sc->sc_dying) 2799 return (USBD_IOERROR); 2800 2801 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2802 "flags=%d priv=%p\n", 2803 xfer, xfer->length, xfer->flags, xfer->priv)); 2804 2805 #ifdef DIAGNOSTIC 2806 if (xfer->rqflags & URQ_REQUEST) 2807 panic("ohci_device_intr_transfer: a request\n"); 2808 #endif 2809 2810 len = xfer->length; 2811 2812 data = opipe->tail.td; 2813 tail = ohci_alloc_std(sc); 2814 if (tail == NULL) 2815 return (USBD_NOMEM); 2816 tail->xfer = NULL; 2817 2818 data->td.td_flags = htole32( 2819 OHCI_TD_IN | OHCI_TD_NOCC | 2820 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2821 if (xfer->flags & USBD_SHORT_XFER_OK) 2822 data->td.td_flags |= htole32(OHCI_TD_R); 2823 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2824 data->nexttd = tail; 2825 data->td.td_nexttd = htole32(tail->physaddr); 2826 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2827 data->len = len; 2828 data->xfer = xfer; 2829 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2830 xfer->hcpriv = data; 2831 2832 #ifdef OHCI_DEBUG 2833 if (ohcidebug > 5) { 2834 DPRINTF(("ohci_device_intr_transfer:\n")); 2835 ohci_dump_ed(sed); 2836 ohci_dump_tds(data); 2837 } 2838 #endif 2839 2840 /* Insert ED in schedule */ 2841 s = splusb(); 2842 sed->ed.ed_tailp = htole32(tail->physaddr); 2843 opipe->tail.td = tail; 2844 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2845 2846 #if 0 2847 /* 2848 * This goes horribly wrong, printing thousands of descriptors, 2849 * because false references are followed due to the fact that the 2850 * TD is gone. 2851 */ 2852 if (ohcidebug > 5) { 2853 usb_delay_ms(&sc->sc_bus, 5); 2854 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2855 OREAD4(sc, OHCI_COMMAND_STATUS))); 2856 ohci_dump_ed(sed); 2857 ohci_dump_tds(data); 2858 } 2859 #endif 2860 splx(s); 2861 2862 return (USBD_IN_PROGRESS); 2863 } 2864 2865 /* Abort a device control request. */ 2866 Static void 2867 ohci_device_intr_abort(usbd_xfer_handle xfer) 2868 { 2869 if (xfer->pipe->intrxfer == xfer) { 2870 DPRINTF(("ohci_device_intr_abort: remove\n")); 2871 xfer->pipe->intrxfer = NULL; 2872 } 2873 ohci_abort_xfer(xfer, USBD_CANCELLED); 2874 } 2875 2876 /* Close a device interrupt pipe. */ 2877 Static void 2878 ohci_device_intr_close(usbd_pipe_handle pipe) 2879 { 2880 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2881 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2882 int nslots = opipe->u.intr.nslots; 2883 int pos = opipe->u.intr.pos; 2884 int j; 2885 ohci_soft_ed_t *p, *sed = opipe->sed; 2886 int s; 2887 2888 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2889 pipe, nslots, pos)); 2890 s = splusb(); 2891 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2892 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2893 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2894 usb_delay_ms(&sc->sc_bus, 2); 2895 2896 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2897 ; 2898 #ifdef DIAGNOSTIC 2899 if (p == NULL) 2900 panic("ohci_device_intr_close: ED not found\n"); 2901 #endif 2902 p->next = sed->next; 2903 p->ed.ed_nexted = sed->ed.ed_nexted; 2904 splx(s); 2905 2906 for (j = 0; j < nslots; j++) 2907 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2908 2909 ohci_free_std(sc, opipe->tail.td); 2910 ohci_free_sed(sc, opipe->sed); 2911 } 2912 2913 Static usbd_status 2914 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2915 { 2916 int i, j, s, best; 2917 u_int npoll, slow, shigh, nslots; 2918 u_int bestbw, bw; 2919 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2920 2921 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2922 if (ival == 0) { 2923 printf("ohci_setintr: 0 interval\n"); 2924 return (USBD_INVAL); 2925 } 2926 2927 npoll = OHCI_NO_INTRS; 2928 while (npoll > ival) 2929 npoll /= 2; 2930 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2931 2932 /* 2933 * We now know which level in the tree the ED must go into. 2934 * Figure out which slot has most bandwidth left over. 2935 * Slots to examine: 2936 * npoll 2937 * 1 0 2938 * 2 1 2 2939 * 4 3 4 5 6 2940 * 8 7 8 9 10 11 12 13 14 2941 * N (N-1) .. (N-1+N-1) 2942 */ 2943 slow = npoll-1; 2944 shigh = slow + npoll; 2945 nslots = OHCI_NO_INTRS / npoll; 2946 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2947 bw = 0; 2948 for (j = 0; j < nslots; j++) 2949 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2950 if (bw < bestbw) { 2951 best = i; 2952 bestbw = bw; 2953 } 2954 } 2955 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2956 best, slow, shigh, bestbw)); 2957 2958 s = splusb(); 2959 hsed = sc->sc_eds[best]; 2960 sed->next = hsed->next; 2961 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2962 hsed->next = sed; 2963 hsed->ed.ed_nexted = htole32(sed->physaddr); 2964 splx(s); 2965 2966 for (j = 0; j < nslots; j++) 2967 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2968 opipe->u.intr.nslots = nslots; 2969 opipe->u.intr.pos = best; 2970 2971 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2972 return (USBD_NORMAL_COMPLETION); 2973 } 2974 2975 /***********************/ 2976 2977 usbd_status 2978 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 2979 { 2980 usbd_status err; 2981 2982 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2983 2984 /* Put it on our queue, */ 2985 err = usb_insert_transfer(xfer); 2986 2987 /* bail out on error, */ 2988 if (err && err != USBD_IN_PROGRESS) 2989 return (err); 2990 2991 /* XXX should check inuse here */ 2992 2993 /* insert into schedule, */ 2994 ohci_device_isoc_enter(xfer); 2995 2996 /* and start if the pipe wasn't running */ 2997 if (!err) 2998 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2999 3000 return (err); 3001 } 3002 3003 void 3004 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3005 { 3006 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3007 usbd_device_handle dev = opipe->pipe.device; 3008 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3009 ohci_soft_ed_t *sed = opipe->sed; 3010 struct iso *iso = &opipe->u.iso; 3011 ohci_soft_itd_t *sitd, *nsitd; 3012 ohci_physaddr_t buf, offs, noffs, bp0; 3013 int i, ncur, nframes; 3014 int s; 3015 3016 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3017 "nframes=%d\n", 3018 iso->inuse, iso->next, xfer, xfer->nframes)); 3019 3020 if (sc->sc_dying) 3021 return; 3022 3023 if (iso->next == -1) { 3024 /* Not in use yet, schedule it a few frames ahead. */ 3025 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3026 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3027 iso->next)); 3028 } 3029 3030 sitd = opipe->tail.itd; 3031 buf = DMAADDR(&xfer->dmabuf); 3032 bp0 = OHCI_PAGE(buf); 3033 offs = OHCI_PAGE_OFFSET(buf); 3034 nframes = xfer->nframes; 3035 xfer->hcpriv = sitd; 3036 for (i = ncur = 0; i < nframes; i++, ncur++) { 3037 noffs = offs + xfer->frlengths[i]; 3038 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3039 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3040 3041 /* Allocate next ITD */ 3042 nsitd = ohci_alloc_sitd(sc); 3043 if (nsitd == NULL) { 3044 /* XXX what now? */ 3045 printf("%s: isoc TD alloc failed\n", 3046 USBDEVNAME(sc->sc_bus.bdev)); 3047 return; 3048 } 3049 3050 /* Fill current ITD */ 3051 sitd->itd.itd_flags = htole32( 3052 OHCI_ITD_NOCC | 3053 OHCI_ITD_SET_SF(iso->next) | 3054 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3055 OHCI_ITD_SET_FC(ncur)); 3056 sitd->itd.itd_bp0 = htole32(bp0); 3057 sitd->nextitd = nsitd; 3058 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3059 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3060 sitd->xfer = xfer; 3061 sitd->flags = 0; 3062 3063 sitd = nsitd; 3064 iso->next = iso->next + ncur; 3065 bp0 = OHCI_PAGE(buf + offs); 3066 ncur = 0; 3067 } 3068 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3069 offs = noffs; 3070 } 3071 nsitd = ohci_alloc_sitd(sc); 3072 if (nsitd == NULL) { 3073 /* XXX what now? */ 3074 printf("%s: isoc TD alloc failed\n", 3075 USBDEVNAME(sc->sc_bus.bdev)); 3076 return; 3077 } 3078 /* Fixup last used ITD */ 3079 sitd->itd.itd_flags = htole32( 3080 OHCI_ITD_NOCC | 3081 OHCI_ITD_SET_SF(iso->next) | 3082 OHCI_ITD_SET_DI(0) | 3083 OHCI_ITD_SET_FC(ncur)); 3084 sitd->itd.itd_bp0 = htole32(bp0); 3085 sitd->nextitd = nsitd; 3086 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3087 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3088 sitd->xfer = xfer; 3089 sitd->flags = OHCI_CALL_DONE; 3090 3091 iso->next = iso->next + ncur; 3092 iso->inuse += nframes; 3093 3094 xfer->actlen = offs; /* XXX pretend we did it all */ 3095 3096 xfer->status = USBD_IN_PROGRESS; 3097 3098 #ifdef OHCI_DEBUG 3099 if (ohcidebug > 5) { 3100 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3101 le32toh(sc->sc_hcca->hcca_frame_number))); 3102 ohci_dump_itds(xfer->hcpriv); 3103 ohci_dump_ed(sed); 3104 } 3105 #endif 3106 3107 s = splusb(); 3108 opipe->tail.itd = nsitd; 3109 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3110 splx(s); 3111 3112 #ifdef OHCI_DEBUG 3113 if (ohcidebug > 5) { 3114 delay(150000); 3115 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3116 le32toh(sc->sc_hcca->hcca_frame_number))); 3117 ohci_dump_itds(xfer->hcpriv); 3118 ohci_dump_ed(sed); 3119 } 3120 #endif 3121 } 3122 3123 usbd_status 3124 ohci_device_isoc_start(usbd_xfer_handle xfer) 3125 { 3126 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3127 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3128 3129 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3130 3131 if (sc->sc_dying) 3132 return (USBD_IOERROR); 3133 3134 #ifdef DIAGNOSTIC 3135 if (xfer->status != USBD_IN_PROGRESS) 3136 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3137 #endif 3138 3139 /* XXX anything to do? */ 3140 3141 return (USBD_IN_PROGRESS); 3142 } 3143 3144 void 3145 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3146 { 3147 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3148 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3149 ohci_soft_ed_t *sed; 3150 ohci_soft_itd_t *sitd; 3151 int s; 3152 3153 s = splusb(); 3154 3155 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3156 3157 /* Transfer is already done. */ 3158 if (xfer->status != USBD_NOT_STARTED && 3159 xfer->status != USBD_IN_PROGRESS) { 3160 splx(s); 3161 printf("ohci_device_isoc_abort: early return\n"); 3162 return; 3163 } 3164 3165 /* Give xfer the requested abort code. */ 3166 xfer->status = USBD_CANCELLED; 3167 3168 sed = opipe->sed; 3169 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3170 3171 sitd = xfer->hcpriv; 3172 #ifdef DIAGNOSTIC 3173 if (sitd == NULL) { 3174 splx(s); 3175 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3176 return; 3177 } 3178 #endif 3179 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3180 #ifdef DIAGNOSTIC 3181 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3182 sitd->isdone = 1; 3183 #endif 3184 } 3185 3186 splx(s); 3187 3188 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3189 3190 s = splusb(); 3191 3192 /* Run callback. */ 3193 usb_transfer_complete(xfer); 3194 3195 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3196 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3197 3198 splx(s); 3199 } 3200 3201 void 3202 ohci_device_isoc_done(usbd_xfer_handle xfer) 3203 { 3204 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3205 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3206 ohci_soft_itd_t *sitd, *nsitd; 3207 3208 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3209 3210 for (sitd = xfer->hcpriv; 3211 !(sitd->flags & OHCI_CALL_DONE); 3212 sitd = nsitd) { 3213 nsitd = sitd->nextitd; 3214 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3215 ohci_free_sitd(sc, sitd); 3216 } 3217 ohci_free_sitd(sc, sitd); 3218 xfer->hcpriv = NULL; 3219 } 3220 3221 usbd_status 3222 ohci_setup_isoc(usbd_pipe_handle pipe) 3223 { 3224 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3225 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3226 struct iso *iso = &opipe->u.iso; 3227 int s; 3228 3229 iso->next = -1; 3230 iso->inuse = 0; 3231 3232 s = splusb(); 3233 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3234 splx(s); 3235 3236 return (USBD_NORMAL_COMPLETION); 3237 } 3238 3239 void 3240 ohci_device_isoc_close(usbd_pipe_handle pipe) 3241 { 3242 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3243 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3244 int s; 3245 3246 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3247 3248 s = splusb(); 3249 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3250 splx(s); 3251 ohci_close_pipe(pipe, sc->sc_isoc_head); 3252 #ifdef DIAGNOSTIC 3253 opipe->tail.itd->isdone = 1; 3254 #endif 3255 ohci_free_sitd(sc, opipe->tail.itd); 3256 } 3257