1 /* $OpenBSD: ohci.c,v 1.136 2014/07/12 20:13:48 mpi Exp $ */ 2 /* $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/queue.h> 41 #include <sys/timeout.h> 42 #include <sys/pool.h> 43 44 #include <machine/bus.h> 45 #include <machine/endian.h> 46 47 #include <dev/usb/usb.h> 48 #include <dev/usb/usbdi.h> 49 #include <dev/usb/usbdivar.h> 50 #include <dev/usb/usb_mem.h> 51 52 #include <dev/usb/ohcireg.h> 53 #include <dev/usb/ohcivar.h> 54 55 struct cfdriver ohci_cd = { 56 NULL, "ohci", DV_DULL 57 }; 58 59 #ifdef OHCI_DEBUG 60 #define DPRINTF(x) do { if (ohcidebug) printf x; } while (0) 61 #define DPRINTFN(n,x) do { if (ohcidebug>(n)) printf x; } while (0) 62 int ohcidebug = 0; 63 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 64 #else 65 #define DPRINTF(x) 66 #define DPRINTFN(n,x) 67 #endif 68 69 struct pool *ohcixfer; 70 71 struct ohci_pipe; 72 73 struct ohci_soft_ed *ohci_alloc_sed(struct ohci_softc *); 74 void ohci_free_sed(struct ohci_softc *, struct ohci_soft_ed *); 75 76 struct ohci_soft_td *ohci_alloc_std(struct ohci_softc *); 77 void ohci_free_std(struct ohci_softc *, struct ohci_soft_td *); 78 79 struct ohci_soft_itd *ohci_alloc_sitd(struct ohci_softc *); 80 void ohci_free_sitd(struct ohci_softc *, struct ohci_soft_itd *); 81 82 #if 0 83 void ohci_free_std_chain(struct ohci_softc *, struct ohci_soft_td *, 84 struct ohci_soft_td *); 85 #endif 86 usbd_status ohci_alloc_std_chain(struct ohci_softc *, u_int, 87 struct usbd_xfer *, struct ohci_soft_td *, 88 struct ohci_soft_td **); 89 90 usbd_status ohci_open(struct usbd_pipe *); 91 void ohci_poll(struct usbd_bus *); 92 void ohci_softintr(void *); 93 void ohci_waitintr(struct ohci_softc *, struct usbd_xfer *); 94 void ohci_add_done(struct ohci_softc *, ohci_physaddr_t); 95 void ohci_rhsc(struct ohci_softc *, struct usbd_xfer *); 96 97 usbd_status ohci_device_request(struct usbd_xfer *xfer); 98 void ohci_add_ed(struct ohci_soft_ed *, struct ohci_soft_ed *); 99 void ohci_rem_ed(struct ohci_soft_ed *, struct ohci_soft_ed *); 100 void ohci_hash_add_td(struct ohci_softc *, struct ohci_soft_td *); 101 struct ohci_soft_td *ohci_hash_find_td(struct ohci_softc *, ohci_physaddr_t); 102 void ohci_hash_add_itd(struct ohci_softc *, struct ohci_soft_itd *); 103 void ohci_hash_rem_itd(struct ohci_softc *, struct ohci_soft_itd *); 104 struct ohci_soft_itd *ohci_hash_find_itd(struct ohci_softc *, ohci_physaddr_t); 105 106 usbd_status ohci_setup_isoc(struct usbd_pipe *pipe); 107 void ohci_device_isoc_enter(struct usbd_xfer *); 108 109 struct usbd_xfer *ohci_allocx(struct usbd_bus *); 110 void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 111 112 usbd_status ohci_root_ctrl_transfer(struct usbd_xfer *); 113 usbd_status ohci_root_ctrl_start(struct usbd_xfer *); 114 void ohci_root_ctrl_abort(struct usbd_xfer *); 115 void ohci_root_ctrl_close(struct usbd_pipe *); 116 void ohci_root_ctrl_done(struct usbd_xfer *); 117 118 usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 119 usbd_status ohci_root_intr_start(struct usbd_xfer *); 120 void ohci_root_intr_abort(struct usbd_xfer *); 121 void ohci_root_intr_close(struct usbd_pipe *); 122 void ohci_root_intr_done(struct usbd_xfer *); 123 124 usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 125 usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 126 void ohci_device_ctrl_abort(struct usbd_xfer *); 127 void ohci_device_ctrl_close(struct usbd_pipe *); 128 void ohci_device_ctrl_done(struct usbd_xfer *); 129 130 usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 131 usbd_status ohci_device_bulk_start(struct usbd_xfer *); 132 void ohci_device_bulk_abort(struct usbd_xfer *); 133 void ohci_device_bulk_close(struct usbd_pipe *); 134 void ohci_device_bulk_done(struct usbd_xfer *); 135 136 usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 137 usbd_status ohci_device_intr_start(struct usbd_xfer *); 138 void ohci_device_intr_abort(struct usbd_xfer *); 139 void ohci_device_intr_close(struct usbd_pipe *); 140 void ohci_device_intr_done(struct usbd_xfer *); 141 142 usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 143 usbd_status ohci_device_isoc_start(struct usbd_xfer *); 144 void ohci_device_isoc_abort(struct usbd_xfer *); 145 void ohci_device_isoc_close(struct usbd_pipe *); 146 void ohci_device_isoc_done(struct usbd_xfer *); 147 148 usbd_status ohci_device_setintr(struct ohci_softc *sc, 149 struct ohci_pipe *pipe, int ival); 150 151 void ohci_timeout(void *); 152 void ohci_timeout_task(void *); 153 void ohci_rhsc_able(struct ohci_softc *, int); 154 void ohci_rhsc_enable(void *); 155 156 void ohci_close_pipe(struct usbd_pipe *, struct ohci_soft_ed *); 157 void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 158 159 void ohci_device_clear_toggle(struct usbd_pipe *pipe); 160 161 #ifdef OHCI_DEBUG 162 void ohci_dumpregs(struct ohci_softc *); 163 void ohci_dump_tds(struct ohci_soft_td *); 164 void ohci_dump_td(struct ohci_soft_td *); 165 void ohci_dump_ed(struct ohci_soft_ed *); 166 void ohci_dump_itd(struct ohci_soft_itd *); 167 void ohci_dump_itds(struct ohci_soft_itd *); 168 #endif 169 170 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 171 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 172 #define OWRITE1(sc, r, x) \ 173 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 174 #define OWRITE2(sc, r, x) \ 175 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 176 #define OWRITE4(sc, r, x) \ 177 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 178 179 __unused static __inline u_int8_t 180 OREAD1(struct ohci_softc *sc, bus_size_t r) 181 { 182 OBARR(sc); 183 return bus_space_read_1(sc->iot, sc->ioh, r); 184 } 185 186 __unused static __inline u_int16_t 187 OREAD2(struct ohci_softc *sc, bus_size_t r) 188 { 189 OBARR(sc); 190 return bus_space_read_2(sc->iot, sc->ioh, r); 191 } 192 193 __unused static __inline u_int32_t 194 OREAD4(struct ohci_softc *sc, bus_size_t r) 195 { 196 OBARR(sc); 197 return bus_space_read_4(sc->iot, sc->ioh, r); 198 } 199 200 /* Reverse the bits in a value 0 .. 31 */ 201 u_int8_t revbits[OHCI_NO_INTRS] = 202 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 203 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 204 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 205 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 206 207 struct ohci_pipe { 208 struct usbd_pipe pipe; 209 struct ohci_soft_ed *sed; 210 union { 211 struct ohci_soft_td *td; 212 struct ohci_soft_itd *itd; 213 } tail; 214 union { 215 /* Control pipe */ 216 struct { 217 struct usb_dma reqdma; 218 } ctl; 219 /* Interrupt pipe */ 220 struct { 221 int nslots; 222 int pos; 223 } intr; 224 /* Iso pipe */ 225 struct iso { 226 int next, inuse; 227 } iso; 228 } u; 229 }; 230 231 #define OHCI_INTR_ENDPT 1 232 233 struct usbd_bus_methods ohci_bus_methods = { 234 .open_pipe = ohci_open, 235 .dev_setaddr = usbd_set_address, 236 .soft_intr = ohci_softintr, 237 .do_poll = ohci_poll, 238 .allocx = ohci_allocx, 239 .freex = ohci_freex, 240 }; 241 242 struct usbd_pipe_methods ohci_root_ctrl_methods = { 243 .transfer = ohci_root_ctrl_transfer, 244 .start = ohci_root_ctrl_start, 245 .abort = ohci_root_ctrl_abort, 246 .close = ohci_root_ctrl_close, 247 .done = ohci_root_ctrl_done, 248 }; 249 250 struct usbd_pipe_methods ohci_root_intr_methods = { 251 .transfer = ohci_root_intr_transfer, 252 .start = ohci_root_intr_start, 253 .abort = ohci_root_intr_abort, 254 .close = ohci_root_intr_close, 255 .done = ohci_root_intr_done, 256 }; 257 258 struct usbd_pipe_methods ohci_device_ctrl_methods = { 259 .transfer = ohci_device_ctrl_transfer, 260 .start = ohci_device_ctrl_start, 261 .abort = ohci_device_ctrl_abort, 262 .close = ohci_device_ctrl_close, 263 .done = ohci_device_ctrl_done, 264 }; 265 266 struct usbd_pipe_methods ohci_device_intr_methods = { 267 .transfer = ohci_device_intr_transfer, 268 .start = ohci_device_intr_start, 269 .abort = ohci_device_intr_abort, 270 .close = ohci_device_intr_close, 271 .cleartoggle = ohci_device_clear_toggle, 272 .done = ohci_device_intr_done, 273 }; 274 275 struct usbd_pipe_methods ohci_device_bulk_methods = { 276 .transfer = ohci_device_bulk_transfer, 277 .start = ohci_device_bulk_start, 278 .abort = ohci_device_bulk_abort, 279 .close = ohci_device_bulk_close, 280 .cleartoggle = ohci_device_clear_toggle, 281 .done = ohci_device_bulk_done, 282 }; 283 284 struct usbd_pipe_methods ohci_device_isoc_methods = { 285 .transfer = ohci_device_isoc_transfer, 286 .start = ohci_device_isoc_start, 287 .abort = ohci_device_isoc_abort, 288 .close = ohci_device_isoc_close, 289 .done = ohci_device_isoc_done, 290 }; 291 292 int 293 ohci_activate(struct device *self, int act) 294 { 295 struct ohci_softc *sc = (struct ohci_softc *)self; 296 u_int32_t reg; 297 int rv = 0; 298 299 switch (act) { 300 case DVACT_SUSPEND: 301 rv = config_activate_children(self, act); 302 sc->sc_bus.use_polling++; 303 reg = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 304 if (sc->sc_control == 0) { 305 /* 306 * Preserve register values, in case that APM BIOS 307 * does not recover them. 308 */ 309 sc->sc_control = reg; 310 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 311 sc->sc_ival = OHCI_GET_IVAL(OREAD4(sc, 312 OHCI_FM_INTERVAL)); 313 } 314 reg |= OHCI_HCFS_SUSPEND; 315 OWRITE4(sc, OHCI_CONTROL, reg); 316 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 317 sc->sc_bus.use_polling--; 318 break; 319 case DVACT_RESUME: 320 sc->sc_bus.use_polling++; 321 322 /* Some broken BIOSes do not recover these values */ 323 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 324 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 325 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 326 if (sc->sc_intre) 327 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 328 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 329 if (sc->sc_control) 330 reg = sc->sc_control; 331 else 332 reg = OREAD4(sc, OHCI_CONTROL); 333 reg |= OHCI_HCFS_RESUME; 334 OWRITE4(sc, OHCI_CONTROL, reg); 335 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 336 reg = (reg & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 337 OWRITE4(sc, OHCI_CONTROL, reg); 338 339 reg = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT; 340 reg |= OHCI_FSMPS(sc->sc_ival) | sc->sc_ival; 341 OWRITE4(sc, OHCI_FM_INTERVAL, reg); 342 OWRITE4(sc, OHCI_PERIODIC_START, OHCI_PERIODIC(sc->sc_ival)); 343 344 /* Fiddle the No OverCurrent Protection to avoid a chip bug */ 345 reg = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 346 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg | OHCI_NOCP); 347 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 348 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 349 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg); 350 351 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 352 sc->sc_control = sc->sc_intre = sc->sc_ival = 0; 353 sc->sc_bus.use_polling--; 354 rv = config_activate_children(self, act); 355 break; 356 case DVACT_POWERDOWN: 357 rv = config_activate_children(self, act); 358 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 359 break; 360 default: 361 rv = config_activate_children(self, act); 362 break; 363 } 364 return (rv); 365 } 366 367 int 368 ohci_detach(struct device *self, int flags) 369 { 370 struct ohci_softc *sc = (struct ohci_softc *)self; 371 int rv; 372 373 rv = config_detach_children(self, flags); 374 if (rv != 0) 375 return (rv); 376 377 timeout_del(&sc->sc_tmo_rhsc); 378 379 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 380 381 /* free data structures XXX */ 382 383 return (rv); 384 } 385 386 struct ohci_soft_ed * 387 ohci_alloc_sed(struct ohci_softc *sc) 388 { 389 struct ohci_soft_ed *sed = NULL; 390 usbd_status err; 391 int i, offs; 392 struct usb_dma dma; 393 int s; 394 395 s = splusb(); 396 if (sc->sc_freeeds == NULL) { 397 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 398 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 399 OHCI_ED_ALIGN, &dma); 400 if (err) 401 goto out; 402 for (i = 0; i < OHCI_SED_CHUNK; i++) { 403 offs = i * OHCI_SED_SIZE; 404 sed = KERNADDR(&dma, offs); 405 sed->physaddr = DMAADDR(&dma, offs); 406 sed->next = sc->sc_freeeds; 407 sc->sc_freeeds = sed; 408 } 409 } 410 sed = sc->sc_freeeds; 411 sc->sc_freeeds = sed->next; 412 memset(&sed->ed, 0, sizeof(struct ohci_ed)); 413 sed->next = NULL; 414 415 out: 416 splx(s); 417 return (sed); 418 } 419 420 void 421 ohci_free_sed(struct ohci_softc *sc, struct ohci_soft_ed *sed) 422 { 423 int s; 424 425 s = splusb(); 426 sed->next = sc->sc_freeeds; 427 sc->sc_freeeds = sed; 428 splx(s); 429 } 430 431 struct ohci_soft_td * 432 ohci_alloc_std(struct ohci_softc *sc) 433 { 434 struct ohci_soft_td *std = NULL; 435 usbd_status err; 436 int i, offs; 437 struct usb_dma dma; 438 int s; 439 440 s = splusb(); 441 if (sc->sc_freetds == NULL) { 442 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 443 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 444 OHCI_TD_ALIGN, &dma); 445 if (err) 446 goto out; 447 for (i = 0; i < OHCI_STD_CHUNK; i++) { 448 offs = i * OHCI_STD_SIZE; 449 std = KERNADDR(&dma, offs); 450 std->physaddr = DMAADDR(&dma, offs); 451 std->nexttd = sc->sc_freetds; 452 sc->sc_freetds = std; 453 } 454 } 455 456 std = sc->sc_freetds; 457 sc->sc_freetds = std->nexttd; 458 memset(&std->td, 0, sizeof(struct ohci_td)); 459 std->nexttd = NULL; 460 std->xfer = NULL; 461 ohci_hash_add_td(sc, std); 462 463 out: 464 splx(s); 465 return (std); 466 } 467 468 void 469 ohci_free_std(struct ohci_softc *sc, struct ohci_soft_td *std) 470 { 471 int s; 472 473 s = splusb(); 474 LIST_REMOVE(std, hnext); 475 std->nexttd = sc->sc_freetds; 476 sc->sc_freetds = std; 477 splx(s); 478 } 479 480 usbd_status 481 ohci_alloc_std_chain(struct ohci_softc *sc, u_int alen, struct usbd_xfer *xfer, 482 struct ohci_soft_td *sp, struct ohci_soft_td **ep) 483 { 484 struct ohci_soft_td *next, *cur, *end; 485 ohci_physaddr_t dataphys, dataphysend; 486 u_int32_t tdflags; 487 u_int len, curlen; 488 int mps; 489 int rd = usbd_xfer_isread(xfer); 490 struct usb_dma *dma = &xfer->dmabuf; 491 u_int16_t flags = xfer->flags; 492 493 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%u\n", alen)); 494 495 len = alen; 496 cur = sp; 497 end = NULL; 498 499 dataphys = DMAADDR(dma, 0); 500 dataphysend = OHCI_PAGE(dataphys + len - 1); 501 tdflags = htole32( 502 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 503 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 504 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 505 mps = UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 506 507 while (len > 0) { 508 next = ohci_alloc_std(sc); 509 if (next == NULL) 510 goto nomem; 511 512 /* The OHCI hardware can handle at most one page crossing. */ 513 if (OHCI_PAGE(dataphys) == dataphysend || 514 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 515 /* we can handle it in this TD */ 516 curlen = len; 517 } else { 518 /* must use multiple TDs, fill as much as possible. */ 519 curlen = 2 * OHCI_PAGE_SIZE - 520 (dataphys & (OHCI_PAGE_SIZE-1)); 521 /* the length must be a multiple of the max size */ 522 curlen -= curlen % mps; 523 #ifdef DIAGNOSTIC 524 if (curlen == 0) 525 panic("ohci_alloc_std: curlen == 0"); 526 #endif 527 } 528 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 529 "dataphysend=0x%08x len=%u curlen=%u\n", 530 dataphys, dataphysend, 531 len, curlen)); 532 len -= curlen; 533 534 cur->td.td_flags = tdflags; 535 cur->td.td_cbp = htole32(dataphys); 536 cur->nexttd = next; 537 cur->td.td_nexttd = htole32(next->physaddr); 538 cur->td.td_be = htole32(dataphys + curlen - 1); 539 cur->len = curlen; 540 cur->flags = OHCI_ADD_LEN; 541 cur->xfer = xfer; 542 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 543 dataphys, dataphys + curlen - 1)); 544 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 545 dataphys += curlen; 546 end = cur; 547 cur = next; 548 } 549 if (!rd && ((flags & USBD_FORCE_SHORT_XFER) || alen == 0) && 550 alen % mps == 0) { 551 /* Force a 0 length transfer at the end. */ 552 553 next = ohci_alloc_std(sc); 554 if (next == NULL) 555 goto nomem; 556 557 cur->td.td_flags = tdflags; 558 cur->td.td_cbp = 0; /* indicate 0 length packet */ 559 cur->nexttd = next; 560 cur->td.td_nexttd = htole32(next->physaddr); 561 cur->td.td_be = ~0; 562 cur->len = 0; 563 cur->flags = 0; 564 cur->xfer = xfer; 565 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 566 end = cur; 567 } 568 *ep = end; 569 570 return (USBD_NORMAL_COMPLETION); 571 572 nomem: 573 /* XXX free chain */ 574 return (USBD_NOMEM); 575 } 576 577 #if 0 578 void 579 ohci_free_std_chain(struct ohci_softc *sc, struct ohci_soft_td *std, 580 struct ohci_soft_td *stdend) 581 { 582 struct ohci_soft_td *p; 583 584 for (; std != stdend; std = p) { 585 p = std->nexttd; 586 ohci_free_std(sc, std); 587 } 588 } 589 #endif 590 591 struct ohci_soft_itd * 592 ohci_alloc_sitd(struct ohci_softc *sc) 593 { 594 struct ohci_soft_itd *sitd; 595 usbd_status err; 596 int i, s, offs; 597 struct usb_dma dma; 598 599 if (sc->sc_freeitds == NULL) { 600 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 601 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 602 OHCI_ITD_ALIGN, &dma); 603 if (err) 604 return (NULL); 605 s = splusb(); 606 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 607 offs = i * OHCI_SITD_SIZE; 608 sitd = KERNADDR(&dma, offs); 609 sitd->physaddr = DMAADDR(&dma, offs); 610 sitd->nextitd = sc->sc_freeitds; 611 sc->sc_freeitds = sitd; 612 } 613 splx(s); 614 } 615 616 s = splusb(); 617 sitd = sc->sc_freeitds; 618 sc->sc_freeitds = sitd->nextitd; 619 memset(&sitd->itd, 0, sizeof(struct ohci_itd)); 620 sitd->nextitd = NULL; 621 sitd->xfer = NULL; 622 ohci_hash_add_itd(sc, sitd); 623 splx(s); 624 625 #ifdef DIAGNOSTIC 626 sitd->isdone = 0; 627 #endif 628 629 return (sitd); 630 } 631 632 void 633 ohci_free_sitd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 634 { 635 int s; 636 637 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 638 639 #ifdef DIAGNOSTIC 640 if (!sitd->isdone) { 641 panic("ohci_free_sitd: sitd=%p not done", sitd); 642 return; 643 } 644 /* Warn double free */ 645 sitd->isdone = 0; 646 #endif 647 648 s = splusb(); 649 ohci_hash_rem_itd(sc, sitd); 650 sitd->nextitd = sc->sc_freeitds; 651 sc->sc_freeitds = sitd; 652 splx(s); 653 } 654 655 usbd_status 656 ohci_checkrev(struct ohci_softc *sc) 657 { 658 u_int32_t rev; 659 660 printf(","); 661 rev = OREAD4(sc, OHCI_REVISION); 662 printf(" version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 663 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 664 665 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 666 printf("%s: unsupported OHCI revision\n", 667 sc->sc_bus.bdev.dv_xname); 668 sc->sc_bus.usbrev = USBREV_UNKNOWN; 669 return (USBD_INVAL); 670 } 671 sc->sc_bus.usbrev = USBREV_1_0; 672 673 return (USBD_NORMAL_COMPLETION); 674 } 675 676 usbd_status 677 ohci_handover(struct ohci_softc *sc) 678 { 679 u_int32_t s, ctl; 680 int i; 681 682 ctl = OREAD4(sc, OHCI_CONTROL); 683 if (ctl & OHCI_IR) { 684 /* SMM active, request change */ 685 DPRINTF(("ohci_handover: SMM active, request owner change\n")); 686 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 687 (OHCI_OC | OHCI_MIE)) 688 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 689 s = OREAD4(sc, OHCI_COMMAND_STATUS); 690 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 691 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 692 usb_delay_ms(&sc->sc_bus, 1); 693 ctl = OREAD4(sc, OHCI_CONTROL); 694 } 695 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 696 if (ctl & OHCI_IR) { 697 printf("%s: SMM does not respond, will reset\n", 698 sc->sc_bus.bdev.dv_xname); 699 } 700 } 701 702 return (USBD_NORMAL_COMPLETION); 703 } 704 705 usbd_status 706 ohci_init(struct ohci_softc *sc) 707 { 708 struct ohci_soft_ed *sed, *psed; 709 usbd_status err; 710 int i; 711 u_int32_t ctl, rwc, ival, hcr, fm, per, desca, descb; 712 713 DPRINTF(("ohci_init: start\n")); 714 715 for (i = 0; i < OHCI_HASH_SIZE; i++) 716 LIST_INIT(&sc->sc_hash_tds[i]); 717 for (i = 0; i < OHCI_HASH_SIZE; i++) 718 LIST_INIT(&sc->sc_hash_itds[i]); 719 720 if (ohcixfer == NULL) { 721 ohcixfer = malloc(sizeof(struct pool), M_DEVBUF, M_NOWAIT); 722 if (ohcixfer == NULL) { 723 printf("%s: unable to allocate pool descriptor\n", 724 sc->sc_bus.bdev.dv_xname); 725 return (ENOMEM); 726 } 727 pool_init(ohcixfer, sizeof(struct ohci_xfer), 0, 0, 0, 728 "ohcixfer", NULL); 729 } 730 731 /* XXX determine alignment by R/W */ 732 /* Allocate the HCCA area. */ 733 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 734 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 735 if (err) 736 return (err); 737 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 738 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 739 740 sc->sc_eintrs = OHCI_NORMAL_INTRS; 741 742 /* Allocate dummy ED that starts the control list. */ 743 sc->sc_ctrl_head = ohci_alloc_sed(sc); 744 if (sc->sc_ctrl_head == NULL) { 745 err = USBD_NOMEM; 746 goto bad1; 747 } 748 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 749 750 /* Allocate dummy ED that starts the bulk list. */ 751 sc->sc_bulk_head = ohci_alloc_sed(sc); 752 if (sc->sc_bulk_head == NULL) { 753 err = USBD_NOMEM; 754 goto bad2; 755 } 756 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 757 758 /* Allocate dummy ED that starts the isochronous list. */ 759 sc->sc_isoc_head = ohci_alloc_sed(sc); 760 if (sc->sc_isoc_head == NULL) { 761 err = USBD_NOMEM; 762 goto bad3; 763 } 764 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 765 766 /* Allocate all the dummy EDs that make up the interrupt tree. */ 767 for (i = 0; i < OHCI_NO_EDS; i++) { 768 sed = ohci_alloc_sed(sc); 769 if (sed == NULL) { 770 while (--i >= 0) 771 ohci_free_sed(sc, sc->sc_eds[i]); 772 err = USBD_NOMEM; 773 goto bad4; 774 } 775 /* All ED fields are set to 0. */ 776 sc->sc_eds[i] = sed; 777 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 778 if (i != 0) 779 psed = sc->sc_eds[(i-1) / 2]; 780 else 781 psed= sc->sc_isoc_head; 782 sed->next = psed; 783 sed->ed.ed_nexted = htole32(psed->physaddr); 784 } 785 /* 786 * Fill HCCA interrupt table. The bit reversal is to get 787 * the tree set up properly to spread the interrupts. 788 */ 789 for (i = 0; i < OHCI_NO_INTRS; i++) 790 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 791 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 792 793 #ifdef OHCI_DEBUG 794 if (ohcidebug > 15) { 795 for (i = 0; i < OHCI_NO_EDS; i++) { 796 printf("ed#%d ", i); 797 ohci_dump_ed(sc->sc_eds[i]); 798 } 799 printf("iso "); 800 ohci_dump_ed(sc->sc_isoc_head); 801 } 802 #endif 803 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 804 ctl = OREAD4(sc, OHCI_CONTROL); 805 rwc = ctl & OHCI_RWC; 806 fm = OREAD4(sc, OHCI_FM_INTERVAL); 807 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 808 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 809 810 /* Determine in what context we are running. */ 811 if (ctl & OHCI_IR) { 812 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 813 goto reset; 814 #if 0 815 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 816 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 817 /* BIOS started controller. */ 818 DPRINTF(("ohci_init: BIOS active\n")); 819 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 820 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 821 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 822 } 823 #endif 824 } else { 825 DPRINTF(("ohci_init: cold started\n")); 826 reset: 827 /* Controller was cold started. */ 828 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 829 } 830 831 /* 832 * This reset should not be necessary according to the OHCI spec, but 833 * without it some controllers do not start. 834 */ 835 DPRINTF(("%s: resetting\n", sc->sc_bus.bdev.dv_xname)); 836 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 837 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 838 839 /* We now own the host controller and the bus has been reset. */ 840 841 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 842 /* Nominal time for a reset is 10 us. */ 843 for (i = 0; i < 10; i++) { 844 delay(10); 845 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 846 if (!hcr) 847 break; 848 } 849 if (hcr) { 850 printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname); 851 err = USBD_IOERROR; 852 goto bad5; 853 } 854 #ifdef OHCI_DEBUG 855 if (ohcidebug > 15) 856 ohci_dumpregs(sc); 857 #endif 858 859 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 860 861 /* Set up HC registers. */ 862 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 863 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 864 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 865 /* disable all interrupts and then switch on all desired interrupts */ 866 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 867 /* switch on desired functional features */ 868 ctl = OREAD4(sc, OHCI_CONTROL); 869 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 870 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 871 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 872 /* And finally start it! */ 873 OWRITE4(sc, OHCI_CONTROL, ctl); 874 875 /* 876 * The controller is now OPERATIONAL. Set a some final 877 * registers that should be set earlier, but that the 878 * controller ignores when in the SUSPEND state. 879 */ 880 ival = OHCI_GET_IVAL(fm); 881 fm = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT; 882 fm |= OHCI_FSMPS(ival) | ival; 883 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 884 per = OHCI_PERIODIC(ival); /* 90% periodic */ 885 OWRITE4(sc, OHCI_PERIODIC_START, per); 886 887 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 888 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 889 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 890 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 891 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 892 OWRITE4(sc, OHCI_RH_DESCRIPTOR_B, descb); 893 usb_delay_ms(&sc->sc_bus, OHCI_GET_POTPGT(desca) * UHD_PWRON_FACTOR); 894 895 /* 896 * The AMD756 requires a delay before re-reading the register, 897 * otherwise it will occasionally report 0 ports. 898 */ 899 sc->sc_noport = 0; 900 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 901 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 902 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 903 } 904 905 #ifdef OHCI_DEBUG 906 if (ohcidebug > 5) 907 ohci_dumpregs(sc); 908 #endif 909 910 /* Set up the bus struct. */ 911 sc->sc_bus.methods = &ohci_bus_methods; 912 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 913 914 sc->sc_control = sc->sc_intre = 0; 915 916 timeout_set(&sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 917 918 /* Finally, turn on interrupts. */ 919 DPRINTFN(1,("ohci_init: enabling\n")); 920 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 921 922 return (USBD_NORMAL_COMPLETION); 923 924 bad5: 925 for (i = 0; i < OHCI_NO_EDS; i++) 926 ohci_free_sed(sc, sc->sc_eds[i]); 927 bad4: 928 ohci_free_sed(sc, sc->sc_isoc_head); 929 bad3: 930 ohci_free_sed(sc, sc->sc_bulk_head); 931 bad2: 932 ohci_free_sed(sc, sc->sc_ctrl_head); 933 bad1: 934 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 935 return (err); 936 } 937 938 struct usbd_xfer * 939 ohci_allocx(struct usbd_bus *bus) 940 { 941 struct ohci_xfer *ox; 942 943 ox = pool_get(ohcixfer, PR_NOWAIT | PR_ZERO); 944 #ifdef DIAGNOSTIC 945 if (ox != NULL) { 946 ox->xfer.busy_free = XFER_BUSY; 947 } 948 #endif 949 return ((struct usbd_xfer *)ox); 950 } 951 952 void 953 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 954 { 955 struct ohci_xfer *ox = (struct ohci_xfer*)xfer; 956 957 #ifdef DIAGNOSTIC 958 if (xfer->busy_free != XFER_BUSY) { 959 printf("%s: xfer=%p not busy, 0x%08x\n", __func__, xfer, 960 xfer->busy_free); 961 return; 962 } 963 #endif 964 pool_put(ohcixfer, ox); 965 } 966 967 #ifdef OHCI_DEBUG 968 void 969 ohci_dumpregs(struct ohci_softc *sc) 970 { 971 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 972 OREAD4(sc, OHCI_REVISION), 973 OREAD4(sc, OHCI_CONTROL), 974 OREAD4(sc, OHCI_COMMAND_STATUS))); 975 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 976 OREAD4(sc, OHCI_INTERRUPT_STATUS), 977 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 978 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 979 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 980 OREAD4(sc, OHCI_HCCA), 981 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 982 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 983 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 984 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 985 OREAD4(sc, OHCI_BULK_HEAD_ED), 986 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 987 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 988 OREAD4(sc, OHCI_DONE_HEAD), 989 OREAD4(sc, OHCI_FM_INTERVAL), 990 OREAD4(sc, OHCI_FM_REMAINING))); 991 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 992 OREAD4(sc, OHCI_FM_NUMBER), 993 OREAD4(sc, OHCI_PERIODIC_START), 994 OREAD4(sc, OHCI_LS_THRESHOLD))); 995 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 996 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 997 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 998 OREAD4(sc, OHCI_RH_STATUS))); 999 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1000 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1001 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1002 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1003 letoh32(sc->sc_hcca->hcca_frame_number), 1004 letoh32(sc->sc_hcca->hcca_done_head))); 1005 } 1006 #endif 1007 1008 int ohci_intr1(struct ohci_softc *); 1009 1010 int 1011 ohci_intr(void *p) 1012 { 1013 struct ohci_softc *sc = p; 1014 1015 if (sc == NULL || sc->sc_bus.dying) 1016 return (0); 1017 1018 /* If we get an interrupt while polling, then just ignore it. */ 1019 if (sc->sc_bus.use_polling) { 1020 #ifdef DIAGNOSTIC 1021 static struct timeval ohci_intr_tv; 1022 if ((OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) && 1023 usbd_ratecheck(&ohci_intr_tv)) 1024 DPRINTFN(16, 1025 ("ohci_intr: ignored interrupt while polling\n")); 1026 #endif 1027 return (0); 1028 } 1029 1030 return (ohci_intr1(sc)); 1031 } 1032 1033 int 1034 ohci_intr1(struct ohci_softc *sc) 1035 { 1036 u_int32_t intrs, eintrs; 1037 ohci_physaddr_t done; 1038 1039 DPRINTFN(14,("ohci_intr1: enter\n")); 1040 1041 /* In case the interrupt occurs before initialization has completed. */ 1042 if (sc == NULL || sc->sc_hcca == NULL) { 1043 #ifdef DIAGNOSTIC 1044 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1045 #endif 1046 return (0); 1047 } 1048 1049 intrs = 0; 1050 done = letoh32(sc->sc_hcca->hcca_done_head); 1051 if (done != 0) { 1052 if (done & ~OHCI_DONE_INTRS) 1053 intrs = OHCI_WDH; 1054 if (done & OHCI_DONE_INTRS) 1055 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1056 sc->sc_hcca->hcca_done_head = 0; 1057 } else { 1058 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1059 /* If we've flushed out a WDH then reread */ 1060 if (intrs & OHCI_WDH) { 1061 done = letoh32(sc->sc_hcca->hcca_done_head); 1062 sc->sc_hcca->hcca_done_head = 0; 1063 } 1064 } 1065 1066 if (intrs == 0xffffffff) { 1067 sc->sc_bus.dying = 1; 1068 return (0); 1069 } 1070 1071 if (!intrs) 1072 return (0); 1073 1074 intrs &= ~OHCI_MIE; 1075 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1076 eintrs = intrs & sc->sc_eintrs; 1077 if (!eintrs) 1078 return (0); 1079 1080 sc->sc_bus.intr_context++; 1081 sc->sc_bus.no_intrs++; 1082 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1083 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1084 (u_int)eintrs)); 1085 1086 if (eintrs & OHCI_SO) { 1087 sc->sc_overrun_cnt++; 1088 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1089 printf("%s: %u scheduling overruns\n", 1090 sc->sc_bus.bdev.dv_xname, sc->sc_overrun_cnt); 1091 sc->sc_overrun_cnt = 0; 1092 } 1093 /* XXX do what */ 1094 eintrs &= ~OHCI_SO; 1095 } 1096 if (eintrs & OHCI_WDH) { 1097 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1098 usb_schedsoftintr(&sc->sc_bus); 1099 eintrs &= ~OHCI_WDH; 1100 } 1101 if (eintrs & OHCI_RD) { 1102 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 1103 /* XXX process resume detect */ 1104 } 1105 if (eintrs & OHCI_UE) { 1106 printf("%s: unrecoverable error, controller halted\n", 1107 sc->sc_bus.bdev.dv_xname); 1108 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1109 /* XXX what else */ 1110 } 1111 if (eintrs & OHCI_RHSC) { 1112 ohci_rhsc(sc, sc->sc_intrxfer); 1113 /* 1114 * Disable RHSC interrupt for now, because it will be 1115 * on until the port has been reset. 1116 */ 1117 ohci_rhsc_able(sc, 0); 1118 DPRINTFN(2, ("%s: rhsc interrupt disabled\n", 1119 sc->sc_bus.bdev.dv_xname)); 1120 1121 /* Do not allow RHSC interrupts > 1 per second */ 1122 timeout_add_sec(&sc->sc_tmo_rhsc, 1); 1123 eintrs &= ~OHCI_RHSC; 1124 } 1125 1126 sc->sc_bus.intr_context--; 1127 1128 if (eintrs != 0) { 1129 /* Block unprocessed interrupts. XXX */ 1130 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1131 sc->sc_eintrs &= ~eintrs; 1132 printf("%s: blocking intrs 0x%x\n", 1133 sc->sc_bus.bdev.dv_xname, eintrs); 1134 } 1135 1136 return (1); 1137 } 1138 1139 void 1140 ohci_rhsc_able(struct ohci_softc *sc, int on) 1141 { 1142 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1143 if (on) { 1144 sc->sc_eintrs |= OHCI_RHSC; 1145 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1146 } else { 1147 sc->sc_eintrs &= ~OHCI_RHSC; 1148 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1149 } 1150 } 1151 1152 void 1153 ohci_rhsc_enable(void *v_sc) 1154 { 1155 struct ohci_softc *sc = v_sc; 1156 int s; 1157 1158 if (sc->sc_bus.dying) 1159 return; 1160 1161 s = splhardusb(); 1162 ohci_rhsc(sc, sc->sc_intrxfer); 1163 DPRINTFN(2, ("%s: rhsc interrupt enabled\n", 1164 sc->sc_bus.bdev.dv_xname)); 1165 1166 ohci_rhsc_able(sc, 1); 1167 splx(s); 1168 } 1169 1170 #ifdef OHCI_DEBUG 1171 char *ohci_cc_strs[] = { 1172 "NO_ERROR", 1173 "CRC", 1174 "BIT_STUFFING", 1175 "DATA_TOGGLE_MISMATCH", 1176 "STALL", 1177 "DEVICE_NOT_RESPONDING", 1178 "PID_CHECK_FAILURE", 1179 "UNEXPECTED_PID", 1180 "DATA_OVERRUN", 1181 "DATA_UNDERRUN", 1182 "BUFFER_OVERRUN", 1183 "BUFFER_UNDERRUN", 1184 "reserved", 1185 "reserved", 1186 "NOT_ACCESSED", 1187 "NOT_ACCESSED", 1188 }; 1189 #endif 1190 1191 void 1192 ohci_add_done(struct ohci_softc *sc, ohci_physaddr_t done) 1193 { 1194 struct ohci_soft_itd *sitd, *sidone, **ip; 1195 struct ohci_soft_td *std, *sdone, **p; 1196 1197 /* Reverse the done list. */ 1198 for (sdone = NULL, sidone = NULL; done != 0; ) { 1199 std = ohci_hash_find_td(sc, done); 1200 if (std != NULL) { 1201 std->dnext = sdone; 1202 done = letoh32(std->td.td_nexttd); 1203 sdone = std; 1204 DPRINTFN(10,("add TD %p\n", std)); 1205 continue; 1206 } 1207 sitd = ohci_hash_find_itd(sc, done); 1208 if (sitd != NULL) { 1209 sitd->dnext = sidone; 1210 done = letoh32(sitd->itd.itd_nextitd); 1211 sidone = sitd; 1212 DPRINTFN(5,("add ITD %p\n", sitd)); 1213 continue; 1214 } 1215 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1216 } 1217 1218 /* sdone & sidone now hold the done lists. */ 1219 /* Put them on the already processed lists. */ 1220 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1221 ; 1222 *p = sdone; 1223 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1224 ; 1225 *ip = sidone; 1226 } 1227 1228 void 1229 ohci_softintr(void *v) 1230 { 1231 struct ohci_softc *sc = v; 1232 struct ohci_soft_itd *sitd, *sidone, *sitdnext; 1233 struct ohci_soft_td *std, *sdone, *stdnext; 1234 struct usbd_xfer *xfer; 1235 struct ohci_pipe *opipe; 1236 int len, cc, s; 1237 int i, j, actlen, iframes, uedir; 1238 1239 DPRINTFN(10,("ohci_softintr: enter\n")); 1240 1241 if (sc->sc_bus.dying) 1242 return; 1243 1244 sc->sc_bus.intr_context++; 1245 1246 s = splhardusb(); 1247 sdone = sc->sc_sdone; 1248 sc->sc_sdone = NULL; 1249 sidone = sc->sc_sidone; 1250 sc->sc_sidone = NULL; 1251 splx(s); 1252 1253 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1254 1255 #ifdef OHCI_DEBUG 1256 if (ohcidebug > 10) { 1257 DPRINTF(("ohci_process_done: TD done:\n")); 1258 ohci_dump_tds(sdone); 1259 } 1260 #endif 1261 1262 for (std = sdone; std; std = stdnext) { 1263 xfer = std->xfer; 1264 stdnext = std->dnext; 1265 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1266 std, xfer, xfer ? xfer->hcpriv : 0)); 1267 if (xfer == NULL) { 1268 /* 1269 * xfer == NULL: There seems to be no xfer associated 1270 * with this TD. It is tailp that happened to end up on 1271 * the done queue. 1272 * Shouldn't happen, but some chips are broken(?). 1273 */ 1274 continue; 1275 } 1276 if (xfer->status == USBD_CANCELLED || 1277 xfer->status == USBD_TIMEOUT) { 1278 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1279 xfer)); 1280 /* Handled by abort routine. */ 1281 continue; 1282 } 1283 timeout_del(&xfer->timeout_handle); 1284 usb_rem_task(xfer->device, &xfer->abort_task); 1285 1286 len = std->len; 1287 if (std->td.td_cbp != 0) 1288 len -= letoh32(std->td.td_be) - 1289 letoh32(std->td.td_cbp) + 1; 1290 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1291 std->flags)); 1292 if (std->flags & OHCI_ADD_LEN) 1293 xfer->actlen += len; 1294 1295 cc = OHCI_TD_GET_CC(letoh32(std->td.td_flags)); 1296 if (cc == OHCI_CC_NO_ERROR) { 1297 if (std->flags & OHCI_CALL_DONE) { 1298 xfer->status = USBD_NORMAL_COMPLETION; 1299 s = splusb(); 1300 usb_transfer_complete(xfer); 1301 splx(s); 1302 } 1303 ohci_free_std(sc, std); 1304 } else { 1305 /* 1306 * Endpoint is halted. First unlink all the TDs 1307 * belonging to the failed transfer, and then restart 1308 * the endpoint. 1309 */ 1310 struct ohci_soft_td *p, *n; 1311 opipe = (struct ohci_pipe *)xfer->pipe; 1312 1313 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1314 OHCI_TD_GET_CC(letoh32(std->td.td_flags)), 1315 ohci_cc_strs[OHCI_TD_GET_CC(letoh32(std->td.td_flags))])); 1316 1317 /* remove TDs */ 1318 for (p = std; p->xfer == xfer; p = n) { 1319 n = p->nexttd; 1320 ohci_free_std(sc, p); 1321 } 1322 1323 /* clear halt */ 1324 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1325 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1326 1327 if (cc == OHCI_CC_STALL) 1328 xfer->status = USBD_STALLED; 1329 else 1330 xfer->status = USBD_IOERROR; 1331 s = splusb(); 1332 usb_transfer_complete(xfer); 1333 splx(s); 1334 } 1335 } 1336 1337 #ifdef OHCI_DEBUG 1338 if (ohcidebug > 10) { 1339 DPRINTF(("ohci_softintr: ITD done:\n")); 1340 ohci_dump_itds(sidone); 1341 } 1342 #endif 1343 1344 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1345 xfer = sitd->xfer; 1346 sitdnext = sitd->dnext; 1347 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1348 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1349 if (xfer == NULL) 1350 continue; 1351 if (xfer->status == USBD_CANCELLED || 1352 xfer->status == USBD_TIMEOUT) { 1353 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1354 xfer)); 1355 /* Handled by abort routine. */ 1356 continue; 1357 } 1358 #ifdef DIAGNOSTIC 1359 if (sitd->isdone) 1360 printf("ohci_softintr: sitd=%p is done\n", sitd); 1361 sitd->isdone = 1; 1362 #endif 1363 if (sitd->flags & OHCI_CALL_DONE) { 1364 struct ohci_soft_itd *next; 1365 1366 opipe = (struct ohci_pipe *)xfer->pipe; 1367 opipe->u.iso.inuse -= xfer->nframes; 1368 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1369 bEndpointAddress); 1370 xfer->status = USBD_NORMAL_COMPLETION; 1371 actlen = 0; 1372 for (i = 0, sitd = xfer->hcpriv; ; 1373 sitd = next) { 1374 next = sitd->nextitd; 1375 if (OHCI_ITD_GET_CC(letoh32(sitd-> 1376 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1377 xfer->status = USBD_IOERROR; 1378 /* For input, update frlengths with actual */ 1379 /* XXX anything necessary for output? */ 1380 if (uedir == UE_DIR_IN && 1381 xfer->status == USBD_NORMAL_COMPLETION) { 1382 iframes = OHCI_ITD_GET_FC(letoh32( 1383 sitd->itd.itd_flags)); 1384 for (j = 0; j < iframes; i++, j++) { 1385 len = letoh16(sitd-> 1386 itd.itd_offset[j]); 1387 if ((OHCI_ITD_PSW_GET_CC(len) & 1388 OHCI_CC_NOT_ACCESSED_MASK) 1389 == OHCI_CC_NOT_ACCESSED) 1390 len = 0; 1391 else 1392 len = OHCI_ITD_PSW_LENGTH(len); 1393 xfer->frlengths[i] = len; 1394 actlen += len; 1395 } 1396 } 1397 if (sitd->flags & OHCI_CALL_DONE) 1398 break; 1399 ohci_free_sitd(sc, sitd); 1400 } 1401 ohci_free_sitd(sc, sitd); 1402 if (uedir == UE_DIR_IN && 1403 xfer->status == USBD_NORMAL_COMPLETION) 1404 xfer->actlen = actlen; 1405 xfer->hcpriv = NULL; 1406 1407 s = splusb(); 1408 usb_transfer_complete(xfer); 1409 splx(s); 1410 } 1411 } 1412 1413 if (sc->sc_softwake) { 1414 sc->sc_softwake = 0; 1415 wakeup(&sc->sc_softwake); 1416 } 1417 1418 sc->sc_bus.intr_context--; 1419 DPRINTFN(10,("ohci_softintr: done:\n")); 1420 } 1421 1422 void 1423 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1424 { 1425 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1426 1427 #ifdef DIAGNOSTIC 1428 if (!(xfer->rqflags & URQ_REQUEST)) { 1429 panic("ohci_device_ctrl_done: not a request"); 1430 } 1431 #endif 1432 } 1433 1434 void 1435 ohci_device_intr_done(struct usbd_xfer *xfer) 1436 { 1437 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1438 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1439 struct ohci_soft_ed *sed = opipe->sed; 1440 struct ohci_soft_td *data, *tail; 1441 1442 1443 DPRINTFN(10, ("ohci_device_intr_done: xfer=%p, actlen=%d\n", xfer, 1444 xfer->actlen)); 1445 1446 if (xfer->pipe->repeat) { 1447 data = opipe->tail.td; 1448 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1449 if (tail == NULL) { 1450 xfer->status = USBD_NOMEM; 1451 return; 1452 } 1453 tail->xfer = NULL; 1454 1455 data->td.td_flags = htole32( 1456 OHCI_TD_IN | OHCI_TD_NOCC | 1457 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1458 if (xfer->flags & USBD_SHORT_XFER_OK) 1459 data->td.td_flags |= htole32(OHCI_TD_R); 1460 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1461 data->nexttd = tail; 1462 data->td.td_nexttd = htole32(tail->physaddr); 1463 data->td.td_be = htole32(letoh32(data->td.td_cbp) + 1464 xfer->length - 1); 1465 data->len = xfer->length; 1466 data->xfer = xfer; 1467 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1468 xfer->hcpriv = data; 1469 xfer->actlen = 0; 1470 1471 sed->ed.ed_tailp = htole32(tail->physaddr); 1472 opipe->tail.td = tail; 1473 } 1474 } 1475 1476 void 1477 ohci_device_bulk_done(struct usbd_xfer *xfer) 1478 { 1479 DPRINTFN(10, ("ohci_device_bulk_done: xfer=%p, actlen=%d\n", xfer, 1480 xfer->actlen)); 1481 } 1482 1483 void 1484 ohci_rhsc(struct ohci_softc *sc, struct usbd_xfer *xfer) 1485 { 1486 u_char *p; 1487 int i, m; 1488 int hstatus; 1489 1490 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1491 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1492 sc, xfer, hstatus)); 1493 1494 if (xfer == NULL) { 1495 /* Just ignore the change. */ 1496 return; 1497 } 1498 1499 p = KERNADDR(&xfer->dmabuf, 0); 1500 m = min(sc->sc_noport, xfer->length * 8 - 1); 1501 memset(p, 0, xfer->length); 1502 for (i = 1; i <= m; i++) { 1503 /* Pick out CHANGE bits from the status reg. */ 1504 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1505 p[i/8] |= 1 << (i%8); 1506 } 1507 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1508 xfer->actlen = xfer->length; 1509 xfer->status = USBD_NORMAL_COMPLETION; 1510 1511 usb_transfer_complete(xfer); 1512 } 1513 1514 void 1515 ohci_root_intr_done(struct usbd_xfer *xfer) 1516 { 1517 } 1518 1519 void 1520 ohci_root_ctrl_done(struct usbd_xfer *xfer) 1521 { 1522 } 1523 1524 /* 1525 * Wait here until controller claims to have an interrupt. 1526 * Then call ohci_intr and return. Use timeout to avoid waiting 1527 * too long. 1528 */ 1529 void 1530 ohci_waitintr(struct ohci_softc *sc, struct usbd_xfer *xfer) 1531 { 1532 int timo; 1533 u_int32_t intrs; 1534 1535 xfer->status = USBD_IN_PROGRESS; 1536 for (timo = xfer->timeout; timo >= 0; timo--) { 1537 usb_delay_ms(&sc->sc_bus, 1); 1538 if (sc->sc_bus.dying) 1539 break; 1540 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1541 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1542 #ifdef OHCI_DEBUG 1543 if (ohcidebug > 15) 1544 ohci_dumpregs(sc); 1545 #endif 1546 if (intrs) { 1547 ohci_intr1(sc); 1548 if (xfer->status != USBD_IN_PROGRESS) 1549 return; 1550 } 1551 } 1552 1553 /* Timeout */ 1554 DPRINTF(("ohci_waitintr: timeout\n")); 1555 xfer->status = USBD_TIMEOUT; 1556 usb_transfer_complete(xfer); 1557 /* XXX should free TD */ 1558 } 1559 1560 void 1561 ohci_poll(struct usbd_bus *bus) 1562 { 1563 struct ohci_softc *sc = (struct ohci_softc *)bus; 1564 #ifdef OHCI_DEBUG 1565 static int last; 1566 int new; 1567 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1568 if (new != last) { 1569 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1570 last = new; 1571 } 1572 #endif 1573 1574 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1575 ohci_intr1(sc); 1576 } 1577 1578 usbd_status 1579 ohci_device_request(struct usbd_xfer *xfer) 1580 { 1581 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1582 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1583 usb_device_request_t *req = &xfer->request; 1584 struct ohci_soft_td *setup, *stat, *next, *tail; 1585 struct ohci_soft_ed *sed; 1586 u_int len; 1587 usbd_status err; 1588 int s; 1589 1590 len = UGETW(req->wLength); 1591 1592 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1593 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n", 1594 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1595 UGETW(req->wIndex), len, xfer->device->address, 1596 xfer->pipe->endpoint->edesc->bEndpointAddress)); 1597 1598 setup = opipe->tail.td; 1599 stat = ohci_alloc_std(sc); 1600 if (stat == NULL) { 1601 err = USBD_NOMEM; 1602 goto bad1; 1603 } 1604 tail = ohci_alloc_std(sc); 1605 if (tail == NULL) { 1606 err = USBD_NOMEM; 1607 goto bad2; 1608 } 1609 tail->xfer = NULL; 1610 1611 sed = opipe->sed; 1612 1613 next = stat; 1614 1615 /* Set up data transaction */ 1616 if (len != 0) { 1617 struct ohci_soft_td *std = stat; 1618 1619 err = ohci_alloc_std_chain(sc, len, xfer, std, &stat); 1620 stat = stat->nexttd; /* point at free TD */ 1621 if (err) 1622 goto bad3; 1623 /* Start toggle at 1 and then use the carried toggle. */ 1624 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1625 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1626 } 1627 1628 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1629 1630 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1631 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1632 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1633 setup->nexttd = next; 1634 setup->td.td_nexttd = htole32(next->physaddr); 1635 setup->td.td_be = htole32(letoh32(setup->td.td_cbp) + sizeof *req - 1); 1636 setup->len = 0; 1637 setup->xfer = xfer; 1638 setup->flags = 0; 1639 xfer->hcpriv = setup; 1640 1641 stat->td.td_flags = htole32( 1642 (usbd_xfer_isread(xfer) ? OHCI_TD_OUT : OHCI_TD_IN) | 1643 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1644 stat->td.td_cbp = 0; 1645 stat->nexttd = tail; 1646 stat->td.td_nexttd = htole32(tail->physaddr); 1647 stat->td.td_be = 0; 1648 stat->flags = OHCI_CALL_DONE; 1649 stat->len = 0; 1650 stat->xfer = xfer; 1651 1652 #ifdef OHCI_DEBUG 1653 if (ohcidebug > 5) { 1654 DPRINTF(("ohci_device_request:\n")); 1655 ohci_dump_ed(sed); 1656 ohci_dump_tds(setup); 1657 } 1658 #endif 1659 1660 /* Insert ED in schedule */ 1661 s = splusb(); 1662 sed->ed.ed_tailp = htole32(tail->physaddr); 1663 opipe->tail.td = tail; 1664 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1665 if (xfer->timeout && !sc->sc_bus.use_polling) { 1666 timeout_del(&xfer->timeout_handle); 1667 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer); 1668 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 1669 } 1670 splx(s); 1671 1672 #ifdef OHCI_DEBUG 1673 if (ohcidebug > 20) { 1674 delay(10000); 1675 DPRINTF(("ohci_device_request: status=%x\n", 1676 OREAD4(sc, OHCI_COMMAND_STATUS))); 1677 ohci_dumpregs(sc); 1678 printf("ctrl head:\n"); 1679 ohci_dump_ed(sc->sc_ctrl_head); 1680 printf("sed:\n"); 1681 ohci_dump_ed(sed); 1682 ohci_dump_tds(setup); 1683 } 1684 #endif 1685 1686 return (USBD_NORMAL_COMPLETION); 1687 1688 bad3: 1689 ohci_free_std(sc, tail); 1690 bad2: 1691 ohci_free_std(sc, stat); 1692 bad1: 1693 return (err); 1694 } 1695 1696 /* 1697 * Add an ED to the schedule. Called at splusb(). 1698 */ 1699 void 1700 ohci_add_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head) 1701 { 1702 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1703 1704 SPLUSBCHECK; 1705 sed->next = head->next; 1706 sed->ed.ed_nexted = head->ed.ed_nexted; 1707 head->next = sed; 1708 head->ed.ed_nexted = htole32(sed->physaddr); 1709 } 1710 1711 /* 1712 * Remove an ED from the schedule. Called at splusb(). 1713 */ 1714 void 1715 ohci_rem_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head) 1716 { 1717 struct ohci_soft_ed *p; 1718 1719 SPLUSBCHECK; 1720 1721 /* XXX */ 1722 for (p = head; p != NULL && p->next != sed; p = p->next) 1723 ; 1724 if (p == NULL) 1725 panic("ohci_rem_ed: ED not found"); 1726 p->next = sed->next; 1727 p->ed.ed_nexted = sed->ed.ed_nexted; 1728 } 1729 1730 /* 1731 * When a transfer is completed the TD is added to the done queue by 1732 * the host controller. This queue is the processed by software. 1733 * Unfortunately the queue contains the physical address of the TD 1734 * and we have no simple way to translate this back to a kernel address. 1735 * To make the translation possible (and fast) we use a hash table of 1736 * TDs currently in the schedule. The physical address is used as the 1737 * hash value. 1738 */ 1739 1740 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1741 /* Called at splusb() */ 1742 void 1743 ohci_hash_add_td(struct ohci_softc *sc, struct ohci_soft_td *std) 1744 { 1745 int h = HASH(std->physaddr); 1746 1747 SPLUSBCHECK; 1748 1749 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1750 } 1751 1752 struct ohci_soft_td * 1753 ohci_hash_find_td(struct ohci_softc *sc, ohci_physaddr_t a) 1754 { 1755 int h = HASH(a); 1756 struct ohci_soft_td *std; 1757 1758 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1759 std != NULL; 1760 std = LIST_NEXT(std, hnext)) 1761 if (std->physaddr == a) 1762 return (std); 1763 return (NULL); 1764 } 1765 1766 /* Called at splusb() */ 1767 void 1768 ohci_hash_add_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 1769 { 1770 int h = HASH(sitd->physaddr); 1771 1772 SPLUSBCHECK; 1773 1774 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1775 sitd, (u_long)sitd->physaddr)); 1776 1777 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1778 } 1779 1780 /* Called at splusb() */ 1781 void 1782 ohci_hash_rem_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 1783 { 1784 SPLUSBCHECK; 1785 1786 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1787 sitd, (u_long)sitd->physaddr)); 1788 1789 LIST_REMOVE(sitd, hnext); 1790 } 1791 1792 struct ohci_soft_itd * 1793 ohci_hash_find_itd(struct ohci_softc *sc, ohci_physaddr_t a) 1794 { 1795 int h = HASH(a); 1796 struct ohci_soft_itd *sitd; 1797 1798 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1799 sitd != NULL; 1800 sitd = LIST_NEXT(sitd, hnext)) 1801 if (sitd->physaddr == a) 1802 return (sitd); 1803 return (NULL); 1804 } 1805 1806 void 1807 ohci_timeout(void *addr) 1808 { 1809 struct usbd_xfer *xfer = addr; 1810 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1811 1812 if (sc->sc_bus.dying) { 1813 ohci_timeout_task(addr); 1814 return; 1815 } 1816 1817 usb_init_task(&xfer->abort_task, ohci_timeout_task, addr, 1818 USB_TASK_TYPE_ABORT); 1819 usb_add_task(xfer->device, &xfer->abort_task); 1820 } 1821 1822 void 1823 ohci_timeout_task(void *addr) 1824 { 1825 struct usbd_xfer *xfer = addr; 1826 int s; 1827 1828 DPRINTF(("%s: xfer=%p\n", __func__, xfer)); 1829 1830 s = splusb(); 1831 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1832 splx(s); 1833 } 1834 1835 #ifdef OHCI_DEBUG 1836 void 1837 ohci_dump_tds(struct ohci_soft_td *std) 1838 { 1839 for (; std; std = std->nexttd) 1840 ohci_dump_td(std); 1841 } 1842 1843 void 1844 ohci_dump_td(struct ohci_soft_td *std) 1845 { 1846 char sbuf[128]; 1847 1848 bitmask_snprintf((u_int32_t)letoh32(std->td.td_flags), 1849 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1850 sbuf, sizeof(sbuf)); 1851 1852 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1853 "nexttd=0x%08lx be=0x%08lx\n", 1854 std, (u_long)std->physaddr, sbuf, 1855 OHCI_TD_GET_DI(letoh32(std->td.td_flags)), 1856 OHCI_TD_GET_EC(letoh32(std->td.td_flags)), 1857 OHCI_TD_GET_CC(letoh32(std->td.td_flags)), 1858 (u_long)letoh32(std->td.td_cbp), 1859 (u_long)letoh32(std->td.td_nexttd), 1860 (u_long)letoh32(std->td.td_be)); 1861 } 1862 1863 void 1864 ohci_dump_itd(struct ohci_soft_itd *sitd) 1865 { 1866 int i; 1867 1868 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1869 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1870 sitd, (u_long)sitd->physaddr, 1871 OHCI_ITD_GET_SF(letoh32(sitd->itd.itd_flags)), 1872 OHCI_ITD_GET_DI(letoh32(sitd->itd.itd_flags)), 1873 OHCI_ITD_GET_FC(letoh32(sitd->itd.itd_flags)), 1874 OHCI_ITD_GET_CC(letoh32(sitd->itd.itd_flags)), 1875 (u_long)letoh32(sitd->itd.itd_bp0), 1876 (u_long)letoh32(sitd->itd.itd_nextitd), 1877 (u_long)letoh32(sitd->itd.itd_be)); 1878 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1879 printf("offs[%d]=0x%04x ", i, 1880 (u_int)letoh16(sitd->itd.itd_offset[i])); 1881 printf("\n"); 1882 } 1883 1884 void 1885 ohci_dump_itds(struct ohci_soft_itd *sitd) 1886 { 1887 for (; sitd; sitd = sitd->nextitd) 1888 ohci_dump_itd(sitd); 1889 } 1890 1891 void 1892 ohci_dump_ed(struct ohci_soft_ed *sed) 1893 { 1894 char sbuf[128], sbuf2[128]; 1895 1896 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_flags), 1897 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1898 sbuf, sizeof(sbuf)); 1899 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_headp), 1900 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1901 1902 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\n" 1903 "tailp=0x%08lx headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1904 sed, (u_long)sed->physaddr, 1905 OHCI_ED_GET_FA(letoh32(sed->ed.ed_flags)), 1906 OHCI_ED_GET_EN(letoh32(sed->ed.ed_flags)), 1907 OHCI_ED_GET_MAXP(letoh32(sed->ed.ed_flags)), sbuf, 1908 (u_long)letoh32(sed->ed.ed_tailp), sbuf2, 1909 (u_long)letoh32(sed->ed.ed_headp), 1910 (u_long)letoh32(sed->ed.ed_nexted)); 1911 } 1912 #endif 1913 1914 usbd_status 1915 ohci_open(struct usbd_pipe *pipe) 1916 { 1917 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 1918 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1919 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1920 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1921 struct ohci_soft_ed *sed = NULL; 1922 struct ohci_soft_td *std = NULL; 1923 struct ohci_soft_itd *sitd; 1924 ohci_physaddr_t tdphys; 1925 u_int32_t fmt; 1926 usbd_status err; 1927 int s; 1928 int ival; 1929 1930 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d\n", 1931 pipe, pipe->device->address, ed->bEndpointAddress)); 1932 1933 if (sc->sc_bus.dying) 1934 return (USBD_IOERROR); 1935 1936 /* Root Hub */ 1937 if (pipe->device->depth == 0) { 1938 switch (ed->bEndpointAddress) { 1939 case USB_CONTROL_ENDPOINT: 1940 pipe->methods = &ohci_root_ctrl_methods; 1941 break; 1942 case UE_DIR_IN | OHCI_INTR_ENDPT: 1943 pipe->methods = &ohci_root_intr_methods; 1944 break; 1945 default: 1946 return (USBD_INVAL); 1947 } 1948 } else { 1949 sed = ohci_alloc_sed(sc); 1950 if (sed == NULL) 1951 goto bad0; 1952 opipe->sed = sed; 1953 if (xfertype == UE_ISOCHRONOUS) { 1954 sitd = ohci_alloc_sitd(sc); 1955 if (sitd == NULL) 1956 goto bad1; 1957 opipe->tail.itd = sitd; 1958 tdphys = sitd->physaddr; 1959 fmt = OHCI_ED_FORMAT_ISO; 1960 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1961 fmt |= OHCI_ED_DIR_IN; 1962 else 1963 fmt |= OHCI_ED_DIR_OUT; 1964 } else { 1965 std = ohci_alloc_std(sc); 1966 if (std == NULL) 1967 goto bad1; 1968 opipe->tail.td = std; 1969 tdphys = std->physaddr; 1970 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1971 } 1972 sed->ed.ed_flags = htole32( 1973 OHCI_ED_SET_FA(pipe->device->address) | 1974 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 1975 (pipe->device->speed == USB_SPEED_LOW ? 1976 OHCI_ED_SPEED : 0) | 1977 fmt | OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1978 sed->ed.ed_headp = htole32(tdphys | 1979 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0)); 1980 sed->ed.ed_tailp = htole32(tdphys); 1981 1982 switch (xfertype) { 1983 case UE_CONTROL: 1984 pipe->methods = &ohci_device_ctrl_methods; 1985 err = usb_allocmem(&sc->sc_bus, 1986 sizeof(usb_device_request_t), 1987 0, &opipe->u.ctl.reqdma); 1988 if (err) 1989 goto bad; 1990 s = splusb(); 1991 ohci_add_ed(sed, sc->sc_ctrl_head); 1992 splx(s); 1993 break; 1994 case UE_INTERRUPT: 1995 pipe->methods = &ohci_device_intr_methods; 1996 ival = pipe->interval; 1997 if (ival == USBD_DEFAULT_INTERVAL) 1998 ival = ed->bInterval; 1999 return (ohci_device_setintr(sc, opipe, ival)); 2000 case UE_ISOCHRONOUS: 2001 pipe->methods = &ohci_device_isoc_methods; 2002 return (ohci_setup_isoc(pipe)); 2003 case UE_BULK: 2004 pipe->methods = &ohci_device_bulk_methods; 2005 s = splusb(); 2006 ohci_add_ed(sed, sc->sc_bulk_head); 2007 splx(s); 2008 break; 2009 } 2010 } 2011 return (USBD_NORMAL_COMPLETION); 2012 2013 bad: 2014 if (std != NULL) 2015 ohci_free_std(sc, std); 2016 bad1: 2017 if (sed != NULL) 2018 ohci_free_sed(sc, sed); 2019 bad0: 2020 return (USBD_NOMEM); 2021 2022 } 2023 2024 /* 2025 * Close a reqular pipe. 2026 * Assumes that there are no pending transactions. 2027 */ 2028 void 2029 ohci_close_pipe(struct usbd_pipe *pipe, struct ohci_soft_ed *head) 2030 { 2031 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2032 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2033 struct ohci_soft_ed *sed = opipe->sed; 2034 int s; 2035 2036 s = splusb(); 2037 #ifdef DIAGNOSTIC 2038 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2039 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2040 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2041 struct ohci_soft_td *std; 2042 std = ohci_hash_find_td(sc, letoh32(sed->ed.ed_headp)); 2043 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2044 "tl=0x%x pipe=%p, std=%p\n", sed, 2045 (int)letoh32(sed->ed.ed_headp), 2046 (int)letoh32(sed->ed.ed_tailp), 2047 pipe, std); 2048 #ifdef USB_DEBUG 2049 usbd_dump_pipe(pipe); 2050 #endif 2051 #ifdef OHCI_DEBUG 2052 ohci_dump_ed(sed); 2053 if (std) 2054 ohci_dump_td(std); 2055 #endif 2056 usb_delay_ms(&sc->sc_bus, 2); 2057 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2058 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) 2059 printf("ohci_close_pipe: pipe still not empty\n"); 2060 } 2061 #endif 2062 ohci_rem_ed(sed, head); 2063 /* Make sure the host controller is not touching this ED */ 2064 usb_delay_ms(&sc->sc_bus, 1); 2065 splx(s); 2066 pipe->endpoint->savedtoggle = 2067 (letoh32(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2068 ohci_free_sed(sc, opipe->sed); 2069 } 2070 2071 /* 2072 * Abort a device request. 2073 * If this routine is called at splusb() it guarantees that the request 2074 * will be removed from the hardware scheduling and that the callback 2075 * for it will be called with USBD_CANCELLED status. 2076 * It's impossible to guarantee that the requested transfer will not 2077 * have happened since the hardware runs concurrently. 2078 * If the transaction has already happened we rely on the ordinary 2079 * interrupt processing to process it. 2080 */ 2081 void 2082 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2083 { 2084 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2085 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2086 struct ohci_soft_ed *sed = opipe->sed; 2087 struct ohci_soft_td *p, *n; 2088 ohci_physaddr_t headp; 2089 int s, hit; 2090 2091 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe, 2092 sed)); 2093 2094 if (sc->sc_bus.dying) { 2095 /* If we're dying, just do the software part. */ 2096 s = splusb(); 2097 xfer->status = status; /* make software ignore it */ 2098 timeout_del(&xfer->timeout_handle); 2099 usb_rem_task(xfer->device, &xfer->abort_task); 2100 usb_transfer_complete(xfer); 2101 splx(s); 2102 return; 2103 } 2104 2105 if (xfer->device->bus->intr_context || !curproc) 2106 panic("ohci_abort_xfer: not in process context"); 2107 2108 /* 2109 * Step 1: Make interrupt routine and hardware ignore xfer. 2110 */ 2111 s = splusb(); 2112 xfer->status = status; /* make software ignore it */ 2113 timeout_del(&xfer->timeout_handle); 2114 usb_rem_task(xfer->device, &xfer->abort_task); 2115 splx(s); 2116 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2117 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2118 2119 /* 2120 * Step 2: Wait until we know hardware has finished any possible 2121 * use of the xfer. Also make sure the soft interrupt routine 2122 * has run. 2123 */ 2124 usb_delay_ms(xfer->device->bus, 20); /* Hardware finishes in 1ms */ 2125 s = splusb(); 2126 sc->sc_softwake = 1; 2127 usb_schedsoftintr(&sc->sc_bus); 2128 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2129 splx(s); 2130 2131 /* 2132 * Step 3: Remove any vestiges of the xfer from the hardware. 2133 * The complication here is that the hardware may have executed 2134 * beyond the xfer we're trying to abort. So as we're scanning 2135 * the TDs of this xfer we check if the hardware points to 2136 * any of them. 2137 */ 2138 s = splusb(); /* XXX why? */ 2139 p = xfer->hcpriv; 2140 #ifdef DIAGNOSTIC 2141 if (p == NULL) { 2142 splx(s); 2143 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2144 return; 2145 } 2146 #endif 2147 #ifdef OHCI_DEBUG 2148 if (ohcidebug > 1) { 2149 DPRINTF(("ohci_abort_xfer: sed=\n")); 2150 ohci_dump_ed(sed); 2151 ohci_dump_tds(p); 2152 } 2153 #endif 2154 headp = letoh32(sed->ed.ed_headp) & OHCI_HEADMASK; 2155 hit = 0; 2156 for (; p->xfer == xfer; p = n) { 2157 hit |= headp == p->physaddr; 2158 n = p->nexttd; 2159 if (OHCI_TD_GET_CC(letoh32(p->td.td_flags)) == 2160 OHCI_CC_NOT_ACCESSED) 2161 ohci_free_std(sc, p); 2162 } 2163 /* Zap headp register if hardware pointed inside the xfer. */ 2164 if (hit) { 2165 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2166 (int)p->physaddr, (int)letoh32(sed->ed.ed_tailp))); 2167 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2168 } else { 2169 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2170 } 2171 2172 /* 2173 * Step 4: Turn on hardware again. 2174 */ 2175 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2176 2177 /* 2178 * Step 5: Execute callback. 2179 */ 2180 usb_transfer_complete(xfer); 2181 2182 splx(s); 2183 } 2184 2185 /* 2186 * Data structures and routines to emulate the root hub. 2187 */ 2188 usb_device_descriptor_t ohci_devd = { 2189 USB_DEVICE_DESCRIPTOR_SIZE, 2190 UDESC_DEVICE, /* type */ 2191 {0x00, 0x01}, /* USB version */ 2192 UDCLASS_HUB, /* class */ 2193 UDSUBCLASS_HUB, /* subclass */ 2194 UDPROTO_FSHUB, 2195 64, /* max packet */ 2196 {0},{0},{0x00,0x01}, /* device id */ 2197 1,2,0, /* string indices */ 2198 1 /* # of configurations */ 2199 }; 2200 2201 usb_config_descriptor_t ohci_confd = { 2202 USB_CONFIG_DESCRIPTOR_SIZE, 2203 UDESC_CONFIG, 2204 {USB_CONFIG_DESCRIPTOR_SIZE + 2205 USB_INTERFACE_DESCRIPTOR_SIZE + 2206 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2207 1, 2208 1, 2209 0, 2210 UC_SELF_POWERED, 2211 0 /* max power */ 2212 }; 2213 2214 usb_interface_descriptor_t ohci_ifcd = { 2215 USB_INTERFACE_DESCRIPTOR_SIZE, 2216 UDESC_INTERFACE, 2217 0, 2218 0, 2219 1, 2220 UICLASS_HUB, 2221 UISUBCLASS_HUB, 2222 UIPROTO_FSHUB, 2223 0 2224 }; 2225 2226 usb_endpoint_descriptor_t ohci_endpd = { 2227 USB_ENDPOINT_DESCRIPTOR_SIZE, 2228 UDESC_ENDPOINT, 2229 UE_DIR_IN | OHCI_INTR_ENDPT, 2230 UE_INTERRUPT, 2231 {8, 0}, /* max packet */ 2232 255 2233 }; 2234 2235 usb_hub_descriptor_t ohci_hubd = { 2236 USB_HUB_DESCRIPTOR_SIZE, 2237 UDESC_HUB, 2238 0, 2239 {0,0}, 2240 0, 2241 0, 2242 {0}, 2243 }; 2244 2245 /* 2246 * Simulate a hardware hub by handling all the necessary requests. 2247 */ 2248 usbd_status 2249 ohci_root_ctrl_transfer(struct usbd_xfer *xfer) 2250 { 2251 usbd_status err; 2252 2253 /* Insert last in queue. */ 2254 err = usb_insert_transfer(xfer); 2255 if (err) 2256 return (err); 2257 2258 /* Pipe isn't running, start first */ 2259 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2260 } 2261 2262 usbd_status 2263 ohci_root_ctrl_start(struct usbd_xfer *xfer) 2264 { 2265 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2266 usb_device_request_t *req; 2267 void *buf = NULL; 2268 int port, i; 2269 int s, len, value, index, l, totlen = 0; 2270 usb_port_status_t ps; 2271 usb_hub_descriptor_t hubd; 2272 usbd_status err; 2273 u_int32_t v; 2274 2275 if (sc->sc_bus.dying) 2276 return (USBD_IOERROR); 2277 2278 #ifdef DIAGNOSTIC 2279 if (!(xfer->rqflags & URQ_REQUEST)) 2280 /* XXX panic */ 2281 return (USBD_INVAL); 2282 #endif 2283 req = &xfer->request; 2284 2285 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2286 req->bmRequestType, req->bRequest)); 2287 2288 len = UGETW(req->wLength); 2289 value = UGETW(req->wValue); 2290 index = UGETW(req->wIndex); 2291 2292 if (len != 0) 2293 buf = KERNADDR(&xfer->dmabuf, 0); 2294 2295 #define C(x,y) ((x) | ((y) << 8)) 2296 switch(C(req->bRequest, req->bmRequestType)) { 2297 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2298 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2299 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2300 /* 2301 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2302 * for the integrated root hub. 2303 */ 2304 break; 2305 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2306 if (len > 0) { 2307 *(u_int8_t *)buf = sc->sc_conf; 2308 totlen = 1; 2309 } 2310 break; 2311 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2312 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2313 switch(value >> 8) { 2314 case UDESC_DEVICE: 2315 if ((value & 0xff) != 0) { 2316 err = USBD_IOERROR; 2317 goto ret; 2318 } 2319 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2320 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2321 memcpy(buf, &ohci_devd, l); 2322 break; 2323 case UDESC_CONFIG: 2324 if ((value & 0xff) != 0) { 2325 err = USBD_IOERROR; 2326 goto ret; 2327 } 2328 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2329 memcpy(buf, &ohci_confd, l); 2330 buf = (char *)buf + l; 2331 len -= l; 2332 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2333 totlen += l; 2334 memcpy(buf, &ohci_ifcd, l); 2335 buf = (char *)buf + l; 2336 len -= l; 2337 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2338 totlen += l; 2339 memcpy(buf, &ohci_endpd, l); 2340 break; 2341 case UDESC_STRING: 2342 if (len == 0) 2343 break; 2344 *(u_int8_t *)buf = 0; 2345 totlen = 1; 2346 switch (value & 0xff) { 2347 case 0: /* Language table */ 2348 totlen = usbd_str(buf, len, "\001"); 2349 break; 2350 case 1: /* Vendor */ 2351 totlen = usbd_str(buf, len, sc->sc_vendor); 2352 break; 2353 case 2: /* Product */ 2354 totlen = usbd_str(buf, len, "OHCI root hub"); 2355 break; 2356 } 2357 break; 2358 default: 2359 err = USBD_IOERROR; 2360 goto ret; 2361 } 2362 break; 2363 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2364 if (len > 0) { 2365 *(u_int8_t *)buf = 0; 2366 totlen = 1; 2367 } 2368 break; 2369 case C(UR_GET_STATUS, UT_READ_DEVICE): 2370 if (len > 1) { 2371 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2372 totlen = 2; 2373 } 2374 break; 2375 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2376 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2377 if (len > 1) { 2378 USETW(((usb_status_t *)buf)->wStatus, 0); 2379 totlen = 2; 2380 } 2381 break; 2382 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2383 if (value >= USB_MAX_DEVICES) { 2384 err = USBD_IOERROR; 2385 goto ret; 2386 } 2387 break; 2388 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2389 if (value != 0 && value != 1) { 2390 err = USBD_IOERROR; 2391 goto ret; 2392 } 2393 sc->sc_conf = value; 2394 break; 2395 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2396 break; 2397 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2398 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2399 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2400 err = USBD_IOERROR; 2401 goto ret; 2402 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2403 break; 2404 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2405 break; 2406 /* Hub requests */ 2407 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2408 break; 2409 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2410 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2411 "port=%d feature=%d\n", 2412 index, value)); 2413 if (index < 1 || index > sc->sc_noport) { 2414 err = USBD_IOERROR; 2415 goto ret; 2416 } 2417 port = OHCI_RH_PORT_STATUS(index); 2418 switch(value) { 2419 case UHF_PORT_ENABLE: 2420 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2421 break; 2422 case UHF_PORT_SUSPEND: 2423 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2424 break; 2425 case UHF_PORT_POWER: 2426 /* Yes, writing to the LOW_SPEED bit clears power. */ 2427 OWRITE4(sc, port, UPS_LOW_SPEED); 2428 break; 2429 case UHF_C_PORT_CONNECTION: 2430 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2431 break; 2432 case UHF_C_PORT_ENABLE: 2433 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2434 break; 2435 case UHF_C_PORT_SUSPEND: 2436 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2437 break; 2438 case UHF_C_PORT_OVER_CURRENT: 2439 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2440 break; 2441 case UHF_C_PORT_RESET: 2442 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2443 break; 2444 default: 2445 err = USBD_IOERROR; 2446 goto ret; 2447 } 2448 switch(value) { 2449 case UHF_C_PORT_CONNECTION: 2450 case UHF_C_PORT_ENABLE: 2451 case UHF_C_PORT_SUSPEND: 2452 case UHF_C_PORT_OVER_CURRENT: 2453 case UHF_C_PORT_RESET: 2454 /* Enable RHSC interrupt if condition is cleared. */ 2455 if ((OREAD4(sc, port) >> 16) == 0) 2456 ohci_rhsc_able(sc, 1); 2457 break; 2458 default: 2459 break; 2460 } 2461 break; 2462 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2463 if ((value & 0xff) != 0) { 2464 err = USBD_IOERROR; 2465 goto ret; 2466 } 2467 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2468 hubd = ohci_hubd; 2469 hubd.bNbrPorts = sc->sc_noport; 2470 USETW(hubd.wHubCharacteristics, 2471 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2472 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2473 /* XXX overcurrent */ 2474 ); 2475 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2476 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2477 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2478 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2479 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2480 l = min(len, hubd.bDescLength); 2481 totlen = l; 2482 memcpy(buf, &hubd, l); 2483 break; 2484 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2485 if (len != 4) { 2486 err = USBD_IOERROR; 2487 goto ret; 2488 } 2489 memset(buf, 0, len); /* ? XXX */ 2490 totlen = len; 2491 break; 2492 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2493 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2494 index)); 2495 if (index < 1 || index > sc->sc_noport) { 2496 err = USBD_IOERROR; 2497 goto ret; 2498 } 2499 if (len != 4) { 2500 err = USBD_IOERROR; 2501 goto ret; 2502 } 2503 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2504 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2505 v)); 2506 USETW(ps.wPortStatus, v); 2507 USETW(ps.wPortChange, v >> 16); 2508 l = min(len, sizeof ps); 2509 memcpy(buf, &ps, l); 2510 totlen = l; 2511 break; 2512 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2513 err = USBD_IOERROR; 2514 goto ret; 2515 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2516 break; 2517 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2518 if (index < 1 || index > sc->sc_noport) { 2519 err = USBD_IOERROR; 2520 goto ret; 2521 } 2522 port = OHCI_RH_PORT_STATUS(index); 2523 switch(value) { 2524 case UHF_PORT_ENABLE: 2525 OWRITE4(sc, port, UPS_PORT_ENABLED); 2526 break; 2527 case UHF_PORT_SUSPEND: 2528 OWRITE4(sc, port, UPS_SUSPEND); 2529 break; 2530 case UHF_PORT_RESET: 2531 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2532 index)); 2533 OWRITE4(sc, port, UPS_RESET); 2534 for (i = 0; i < 5; i++) { 2535 usb_delay_ms(&sc->sc_bus, 2536 USB_PORT_ROOT_RESET_DELAY); 2537 if (sc->sc_bus.dying) { 2538 err = USBD_IOERROR; 2539 goto ret; 2540 } 2541 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2542 break; 2543 } 2544 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2545 index, OREAD4(sc, port))); 2546 break; 2547 case UHF_PORT_POWER: 2548 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2549 "%d\n", index)); 2550 OWRITE4(sc, port, UPS_PORT_POWER); 2551 break; 2552 case UHF_PORT_DISOWN_TO_1_1: 2553 /* accept, but do nothing */ 2554 break; 2555 default: 2556 err = USBD_IOERROR; 2557 goto ret; 2558 } 2559 break; 2560 default: 2561 err = USBD_IOERROR; 2562 goto ret; 2563 } 2564 xfer->actlen = totlen; 2565 err = USBD_NORMAL_COMPLETION; 2566 ret: 2567 xfer->status = err; 2568 s = splusb(); 2569 usb_transfer_complete(xfer); 2570 splx(s); 2571 return (USBD_IN_PROGRESS); 2572 } 2573 2574 /* Abort a root control request. */ 2575 void 2576 ohci_root_ctrl_abort(struct usbd_xfer *xfer) 2577 { 2578 /* Nothing to do, all transfers are synchronous. */ 2579 } 2580 2581 /* Close the root pipe. */ 2582 void 2583 ohci_root_ctrl_close(struct usbd_pipe *pipe) 2584 { 2585 DPRINTF(("ohci_root_ctrl_close\n")); 2586 /* Nothing to do. */ 2587 } 2588 2589 usbd_status 2590 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2591 { 2592 usbd_status err; 2593 2594 /* Insert last in queue. */ 2595 err = usb_insert_transfer(xfer); 2596 if (err) 2597 return (err); 2598 2599 /* Pipe isn't running, start first */ 2600 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2601 } 2602 2603 usbd_status 2604 ohci_root_intr_start(struct usbd_xfer *xfer) 2605 { 2606 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2607 2608 if (sc->sc_bus.dying) 2609 return (USBD_IOERROR); 2610 2611 sc->sc_intrxfer = xfer; 2612 2613 return (USBD_IN_PROGRESS); 2614 } 2615 2616 void 2617 ohci_root_intr_abort(struct usbd_xfer *xfer) 2618 { 2619 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2620 int s; 2621 2622 sc->sc_intrxfer = NULL; 2623 2624 xfer->status = USBD_CANCELLED; 2625 s = splusb(); 2626 usb_transfer_complete(xfer); 2627 splx(s); 2628 } 2629 2630 void 2631 ohci_root_intr_close(struct usbd_pipe *pipe) 2632 { 2633 } 2634 2635 usbd_status 2636 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2637 { 2638 usbd_status err; 2639 2640 /* Insert last in queue. */ 2641 err = usb_insert_transfer(xfer); 2642 if (err) 2643 return (err); 2644 2645 /* Pipe isn't running, start first */ 2646 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2647 } 2648 2649 usbd_status 2650 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2651 { 2652 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2653 usbd_status err; 2654 2655 if (sc->sc_bus.dying) 2656 return (USBD_IOERROR); 2657 2658 #ifdef DIAGNOSTIC 2659 if (!(xfer->rqflags & URQ_REQUEST)) { 2660 /* XXX panic */ 2661 printf("ohci_device_ctrl_transfer: not a request\n"); 2662 return (USBD_INVAL); 2663 } 2664 #endif 2665 2666 err = ohci_device_request(xfer); 2667 if (err) 2668 return (err); 2669 2670 if (sc->sc_bus.use_polling) 2671 ohci_waitintr(sc, xfer); 2672 2673 return (USBD_IN_PROGRESS); 2674 } 2675 2676 /* Abort a device control request. */ 2677 void 2678 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2679 { 2680 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2681 ohci_abort_xfer(xfer, USBD_CANCELLED); 2682 } 2683 2684 /* Close a device control pipe. */ 2685 void 2686 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2687 { 2688 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2689 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2690 2691 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2692 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2693 ohci_free_std(sc, opipe->tail.td); 2694 } 2695 2696 /************************/ 2697 2698 void 2699 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2700 { 2701 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2702 2703 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2704 } 2705 2706 usbd_status 2707 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2708 { 2709 usbd_status err; 2710 2711 /* Insert last in queue. */ 2712 err = usb_insert_transfer(xfer); 2713 if (err) 2714 return (err); 2715 2716 /* Pipe isn't running, start first */ 2717 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2718 } 2719 2720 usbd_status 2721 ohci_device_bulk_start(struct usbd_xfer *xfer) 2722 { 2723 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2724 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2725 struct ohci_soft_td *data, *tail, *tdp; 2726 struct ohci_soft_ed *sed; 2727 u_int len; 2728 int s, endpt; 2729 usbd_status err; 2730 2731 if (sc->sc_bus.dying) 2732 return (USBD_IOERROR); 2733 2734 #ifdef DIAGNOSTIC 2735 if (xfer->rqflags & URQ_REQUEST) { 2736 /* XXX panic */ 2737 printf("ohci_device_bulk_start: a request\n"); 2738 return (USBD_INVAL); 2739 } 2740 #endif 2741 2742 len = xfer->length; 2743 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2744 sed = opipe->sed; 2745 2746 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%u " 2747 "flags=%d endpt=%d\n", xfer, len, xfer->flags, endpt)); 2748 2749 /* Update device address */ 2750 sed->ed.ed_flags = htole32( 2751 (letoh32(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2752 OHCI_ED_SET_FA(xfer->device->address)); 2753 2754 /* Allocate a chain of new TDs (including a new tail). */ 2755 data = opipe->tail.td; 2756 err = ohci_alloc_std_chain(sc, len, xfer, data, &tail); 2757 /* We want interrupt at the end of the transfer. */ 2758 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2759 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2760 tail->flags |= OHCI_CALL_DONE; 2761 tail = tail->nexttd; /* point at sentinel */ 2762 if (err) 2763 return (err); 2764 2765 tail->xfer = NULL; 2766 xfer->hcpriv = data; 2767 2768 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2769 "td_cbp=0x%08x td_be=0x%08x\n", 2770 (int)letoh32(sed->ed.ed_flags), 2771 (int)letoh32(data->td.td_flags), 2772 (int)letoh32(data->td.td_cbp), 2773 (int)letoh32(data->td.td_be))); 2774 2775 #ifdef OHCI_DEBUG 2776 if (ohcidebug > 5) { 2777 ohci_dump_ed(sed); 2778 ohci_dump_tds(data); 2779 } 2780 #endif 2781 2782 /* Insert ED in schedule */ 2783 s = splusb(); 2784 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2785 tdp->xfer = xfer; 2786 } 2787 sed->ed.ed_tailp = htole32(tail->physaddr); 2788 opipe->tail.td = tail; 2789 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2790 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2791 if (xfer->timeout && !sc->sc_bus.use_polling) { 2792 timeout_del(&xfer->timeout_handle); 2793 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer); 2794 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 2795 } 2796 2797 #if 0 2798 /* This goes wrong if we are too slow. */ 2799 if (ohcidebug > 10) { 2800 delay(10000); 2801 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2802 OREAD4(sc, OHCI_COMMAND_STATUS))); 2803 ohci_dump_ed(sed); 2804 ohci_dump_tds(data); 2805 } 2806 #endif 2807 2808 splx(s); 2809 2810 if (sc->sc_bus.use_polling) 2811 ohci_waitintr(sc, xfer); 2812 2813 return (USBD_IN_PROGRESS); 2814 } 2815 2816 void 2817 ohci_device_bulk_abort(struct usbd_xfer *xfer) 2818 { 2819 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2820 ohci_abort_xfer(xfer, USBD_CANCELLED); 2821 } 2822 2823 /* 2824 * Close a device bulk pipe. 2825 */ 2826 void 2827 ohci_device_bulk_close(struct usbd_pipe *pipe) 2828 { 2829 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2830 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2831 2832 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2833 ohci_close_pipe(pipe, sc->sc_bulk_head); 2834 ohci_free_std(sc, opipe->tail.td); 2835 } 2836 2837 /************************/ 2838 2839 usbd_status 2840 ohci_device_intr_transfer(struct usbd_xfer *xfer) 2841 { 2842 usbd_status err; 2843 2844 /* Insert last in queue. */ 2845 err = usb_insert_transfer(xfer); 2846 if (err) 2847 return (err); 2848 2849 /* Pipe isn't running, start first */ 2850 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2851 } 2852 2853 usbd_status 2854 ohci_device_intr_start(struct usbd_xfer *xfer) 2855 { 2856 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2857 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2858 struct ohci_soft_ed *sed = opipe->sed; 2859 struct ohci_soft_td *data, *tail; 2860 int s, len, endpt; 2861 2862 if (sc->sc_bus.dying) 2863 return (USBD_IOERROR); 2864 2865 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%u " 2866 "flags=%d priv=%p\n", 2867 xfer, xfer->length, xfer->flags, xfer->priv)); 2868 2869 #ifdef DIAGNOSTIC 2870 if (xfer->rqflags & URQ_REQUEST) 2871 panic("ohci_device_intr_transfer: a request"); 2872 #endif 2873 2874 len = xfer->length; 2875 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2876 2877 data = opipe->tail.td; 2878 tail = ohci_alloc_std(sc); 2879 if (tail == NULL) 2880 return (USBD_NOMEM); 2881 tail->xfer = NULL; 2882 2883 data->td.td_flags = htole32( 2884 usbd_xfer_isread(xfer) ? OHCI_TD_IN : OHCI_TD_OUT | 2885 OHCI_TD_NOCC | 2886 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2887 if (xfer->flags & USBD_SHORT_XFER_OK) 2888 data->td.td_flags |= htole32(OHCI_TD_R); 2889 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2890 data->nexttd = tail; 2891 data->td.td_nexttd = htole32(tail->physaddr); 2892 data->td.td_be = htole32(letoh32(data->td.td_cbp) + len - 1); 2893 data->len = len; 2894 data->xfer = xfer; 2895 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2896 xfer->hcpriv = data; 2897 2898 #ifdef OHCI_DEBUG 2899 if (ohcidebug > 5) { 2900 DPRINTF(("ohci_device_intr_transfer:\n")); 2901 ohci_dump_ed(sed); 2902 ohci_dump_tds(data); 2903 } 2904 #endif 2905 2906 /* Insert ED in schedule */ 2907 s = splusb(); 2908 sed->ed.ed_tailp = htole32(tail->physaddr); 2909 opipe->tail.td = tail; 2910 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2911 2912 #if 0 2913 /* 2914 * This goes horribly wrong, printing thousands of descriptors, 2915 * because false references are followed due to the fact that the 2916 * TD is gone. 2917 */ 2918 if (ohcidebug > 5) { 2919 usb_delay_ms(&sc->sc_bus, 5); 2920 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2921 OREAD4(sc, OHCI_COMMAND_STATUS))); 2922 ohci_dump_ed(sed); 2923 ohci_dump_tds(data); 2924 } 2925 #endif 2926 splx(s); 2927 2928 if (sc->sc_bus.use_polling) 2929 ohci_waitintr(sc, xfer); 2930 2931 return (USBD_IN_PROGRESS); 2932 } 2933 2934 void 2935 ohci_device_intr_abort(struct usbd_xfer *xfer) 2936 { 2937 KASSERT(xfer->pipe->intrxfer == xfer); 2938 2939 ohci_abort_xfer(xfer, USBD_CANCELLED); 2940 } 2941 2942 /* Close a device interrupt pipe. */ 2943 void 2944 ohci_device_intr_close(struct usbd_pipe *pipe) 2945 { 2946 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2947 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2948 int nslots = opipe->u.intr.nslots; 2949 int pos = opipe->u.intr.pos; 2950 int j; 2951 struct ohci_soft_ed *p, *sed = opipe->sed; 2952 int s; 2953 2954 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2955 pipe, nslots, pos)); 2956 s = splusb(); 2957 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2958 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2959 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) 2960 usb_delay_ms(&sc->sc_bus, 2); 2961 2962 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2963 ; 2964 #ifdef DIAGNOSTIC 2965 if (p == NULL) 2966 panic("ohci_device_intr_close: ED not found"); 2967 #endif 2968 p->next = sed->next; 2969 p->ed.ed_nexted = sed->ed.ed_nexted; 2970 splx(s); 2971 2972 for (j = 0; j < nslots; j++) 2973 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2974 2975 ohci_free_std(sc, opipe->tail.td); 2976 ohci_free_sed(sc, opipe->sed); 2977 } 2978 2979 usbd_status 2980 ohci_device_setintr(struct ohci_softc *sc, struct ohci_pipe *opipe, int ival) 2981 { 2982 int i, j, s, best; 2983 u_int npoll, slow, shigh, nslots; 2984 u_int bestbw, bw; 2985 struct ohci_soft_ed *hsed, *sed = opipe->sed; 2986 2987 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2988 if (ival == 0) { 2989 printf("ohci_setintr: 0 interval\n"); 2990 return (USBD_INVAL); 2991 } 2992 2993 npoll = OHCI_NO_INTRS; 2994 while (npoll > ival) 2995 npoll /= 2; 2996 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2997 2998 /* 2999 * We now know which level in the tree the ED must go into. 3000 * Figure out which slot has most bandwidth left over. 3001 * Slots to examine: 3002 * npoll 3003 * 1 0 3004 * 2 1 2 3005 * 4 3 4 5 6 3006 * 8 7 8 9 10 11 12 13 14 3007 * N (N-1) .. (N-1+N-1) 3008 */ 3009 slow = npoll-1; 3010 shigh = slow + npoll; 3011 nslots = OHCI_NO_INTRS / npoll; 3012 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3013 bw = 0; 3014 for (j = 0; j < nslots; j++) 3015 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3016 if (bw < bestbw) { 3017 best = i; 3018 bestbw = bw; 3019 } 3020 } 3021 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3022 best, slow, shigh, bestbw)); 3023 3024 s = splusb(); 3025 hsed = sc->sc_eds[best]; 3026 sed->next = hsed->next; 3027 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3028 hsed->next = sed; 3029 hsed->ed.ed_nexted = htole32(sed->physaddr); 3030 splx(s); 3031 3032 for (j = 0; j < nslots; j++) 3033 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3034 opipe->u.intr.nslots = nslots; 3035 opipe->u.intr.pos = best; 3036 3037 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3038 return (USBD_NORMAL_COMPLETION); 3039 } 3040 3041 /***********************/ 3042 3043 usbd_status 3044 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3045 { 3046 usbd_status err; 3047 3048 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3049 3050 /* Put it on our queue, */ 3051 err = usb_insert_transfer(xfer); 3052 3053 /* bail out on error, */ 3054 if (err && err != USBD_IN_PROGRESS) 3055 return (err); 3056 3057 /* XXX should check inuse here */ 3058 3059 /* insert into schedule, */ 3060 ohci_device_isoc_enter(xfer); 3061 3062 /* and start if the pipe wasn't running */ 3063 if (!err) 3064 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3065 3066 return (err); 3067 } 3068 3069 void 3070 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3071 { 3072 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3073 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3074 struct ohci_soft_ed *sed = opipe->sed; 3075 struct iso *iso = &opipe->u.iso; 3076 struct ohci_soft_itd *sitd, *nsitd; 3077 ohci_physaddr_t buf, offs, noffs, bp0; 3078 int i, ncur, nframes; 3079 int s; 3080 3081 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3082 "nframes=%d\n", 3083 iso->inuse, iso->next, xfer, xfer->nframes)); 3084 3085 if (sc->sc_bus.dying) 3086 return; 3087 3088 if (iso->next == -1) { 3089 /* Not in use yet, schedule it a few frames ahead. */ 3090 iso->next = letoh32(sc->sc_hcca->hcca_frame_number) + 5; 3091 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3092 iso->next)); 3093 } 3094 3095 sitd = opipe->tail.itd; 3096 buf = DMAADDR(&xfer->dmabuf, 0); 3097 bp0 = OHCI_PAGE(buf); 3098 offs = OHCI_PAGE_OFFSET(buf); 3099 nframes = xfer->nframes; 3100 xfer->hcpriv = sitd; 3101 for (i = ncur = 0; i < nframes; i++, ncur++) { 3102 noffs = offs + xfer->frlengths[i]; 3103 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3104 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3105 3106 /* Allocate next ITD */ 3107 nsitd = ohci_alloc_sitd(sc); 3108 if (nsitd == NULL) { 3109 /* XXX what now? */ 3110 printf("%s: isoc TD alloc failed\n", 3111 sc->sc_bus.bdev.dv_xname); 3112 return; 3113 } 3114 3115 /* Fill current ITD */ 3116 sitd->itd.itd_flags = htole32( 3117 OHCI_ITD_NOCC | 3118 OHCI_ITD_SET_SF(iso->next) | 3119 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3120 OHCI_ITD_SET_FC(ncur)); 3121 sitd->itd.itd_bp0 = htole32(bp0); 3122 sitd->nextitd = nsitd; 3123 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3124 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3125 sitd->xfer = xfer; 3126 sitd->flags = 0; 3127 3128 sitd = nsitd; 3129 iso->next = iso->next + ncur; 3130 bp0 = OHCI_PAGE(buf + offs); 3131 ncur = 0; 3132 } 3133 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3134 offs = noffs; 3135 } 3136 nsitd = ohci_alloc_sitd(sc); 3137 if (nsitd == NULL) { 3138 /* XXX what now? */ 3139 printf("%s: isoc TD alloc failed\n", 3140 sc->sc_bus.bdev.dv_xname); 3141 return; 3142 } 3143 /* Fixup last used ITD */ 3144 sitd->itd.itd_flags = htole32( 3145 OHCI_ITD_NOCC | 3146 OHCI_ITD_SET_SF(iso->next) | 3147 OHCI_ITD_SET_DI(0) | 3148 OHCI_ITD_SET_FC(ncur)); 3149 sitd->itd.itd_bp0 = htole32(bp0); 3150 sitd->nextitd = nsitd; 3151 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3152 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3153 sitd->xfer = xfer; 3154 sitd->flags = OHCI_CALL_DONE; 3155 3156 iso->next = iso->next + ncur; 3157 iso->inuse += nframes; 3158 3159 xfer->actlen = offs; /* XXX pretend we did it all */ 3160 3161 xfer->status = USBD_IN_PROGRESS; 3162 3163 #ifdef OHCI_DEBUG 3164 if (ohcidebug > 5) { 3165 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3166 letoh32(sc->sc_hcca->hcca_frame_number))); 3167 ohci_dump_itds(xfer->hcpriv); 3168 ohci_dump_ed(sed); 3169 } 3170 #endif 3171 3172 s = splusb(); 3173 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3174 opipe->tail.itd = nsitd; 3175 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3176 splx(s); 3177 3178 #ifdef OHCI_DEBUG 3179 if (ohcidebug > 5) { 3180 delay(150000); 3181 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3182 letoh32(sc->sc_hcca->hcca_frame_number))); 3183 ohci_dump_itds(xfer->hcpriv); 3184 ohci_dump_ed(sed); 3185 } 3186 #endif 3187 } 3188 3189 usbd_status 3190 ohci_device_isoc_start(struct usbd_xfer *xfer) 3191 { 3192 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3193 3194 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3195 3196 if (sc->sc_bus.dying) 3197 return (USBD_IOERROR); 3198 3199 #ifdef DIAGNOSTIC 3200 if (xfer->status != USBD_IN_PROGRESS) 3201 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3202 #endif 3203 3204 /* XXX anything to do? */ 3205 3206 if (sc->sc_bus.use_polling) { 3207 DPRINTF(("Starting ohci isoc xfer with polling. Bad idea?\n")); 3208 ohci_waitintr(sc, xfer); 3209 } 3210 3211 return (USBD_IN_PROGRESS); 3212 } 3213 3214 void 3215 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3216 { 3217 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3218 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3219 struct ohci_soft_ed *sed; 3220 struct ohci_soft_itd *sitd; 3221 int s; 3222 3223 s = splusb(); 3224 3225 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3226 3227 /* Transfer is already done. */ 3228 if (xfer->status != USBD_NOT_STARTED && 3229 xfer->status != USBD_IN_PROGRESS) { 3230 splx(s); 3231 printf("ohci_device_isoc_abort: early return\n"); 3232 return; 3233 } 3234 3235 /* Give xfer the requested abort code. */ 3236 xfer->status = USBD_CANCELLED; 3237 3238 sed = opipe->sed; 3239 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3240 3241 sitd = xfer->hcpriv; 3242 #ifdef DIAGNOSTIC 3243 if (sitd == NULL) { 3244 splx(s); 3245 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3246 return; 3247 } 3248 #endif 3249 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3250 #ifdef DIAGNOSTIC 3251 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3252 sitd->isdone = 1; 3253 #endif 3254 } 3255 3256 splx(s); 3257 3258 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3259 3260 s = splusb(); 3261 3262 /* Run callback. */ 3263 usb_transfer_complete(xfer); 3264 3265 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3266 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3267 3268 splx(s); 3269 } 3270 3271 void 3272 ohci_device_isoc_done(struct usbd_xfer *xfer) 3273 { 3274 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3275 } 3276 3277 usbd_status 3278 ohci_setup_isoc(struct usbd_pipe *pipe) 3279 { 3280 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3281 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 3282 struct iso *iso = &opipe->u.iso; 3283 int s; 3284 3285 iso->next = -1; 3286 iso->inuse = 0; 3287 3288 s = splusb(); 3289 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3290 splx(s); 3291 3292 return (USBD_NORMAL_COMPLETION); 3293 } 3294 3295 void 3296 ohci_device_isoc_close(struct usbd_pipe *pipe) 3297 { 3298 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3299 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 3300 3301 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3302 ohci_close_pipe(pipe, sc->sc_isoc_head); 3303 #ifdef DIAGNOSTIC 3304 opipe->tail.itd->isdone = 1; 3305 #endif 3306 ohci_free_sitd(sc, opipe->tail.itd); 3307 } 3308