1 /* $OpenBSD: ohci.c,v 1.156 2019/03/11 17:50:08 mpi Exp $ */ 2 /* $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/device.h> 39 #include <sys/queue.h> 40 #include <sys/timeout.h> 41 #include <sys/pool.h> 42 #include <sys/endian.h> 43 44 #include <machine/bus.h> 45 46 #include <dev/usb/usb.h> 47 #include <dev/usb/usbdi.h> 48 #include <dev/usb/usbdivar.h> 49 #include <dev/usb/usb_mem.h> 50 51 #include <dev/usb/ohcireg.h> 52 #include <dev/usb/ohcivar.h> 53 54 struct cfdriver ohci_cd = { 55 NULL, "ohci", DV_DULL 56 }; 57 58 #ifdef OHCI_DEBUG 59 #define DPRINTF(x) do { if (ohcidebug) printf x; } while (0) 60 #define DPRINTFN(n,x) do { if (ohcidebug>(n)) printf x; } while (0) 61 int ohcidebug = 0; 62 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 63 #else 64 #define DPRINTF(x) 65 #define DPRINTFN(n,x) 66 #endif 67 68 struct pool *ohcixfer; 69 70 struct ohci_pipe; 71 72 struct ohci_soft_ed *ohci_alloc_sed(struct ohci_softc *); 73 void ohci_free_sed(struct ohci_softc *, struct ohci_soft_ed *); 74 75 struct ohci_soft_td *ohci_alloc_std(struct ohci_softc *); 76 void ohci_free_std(struct ohci_softc *, struct ohci_soft_td *); 77 78 struct ohci_soft_itd *ohci_alloc_sitd(struct ohci_softc *); 79 void ohci_free_sitd(struct ohci_softc *, struct ohci_soft_itd *); 80 81 #if 0 82 void ohci_free_std_chain(struct ohci_softc *, struct ohci_soft_td *, 83 struct ohci_soft_td *); 84 #endif 85 usbd_status ohci_alloc_std_chain(struct ohci_softc *, u_int, 86 struct usbd_xfer *, struct ohci_soft_td *, 87 struct ohci_soft_td **); 88 89 usbd_status ohci_open(struct usbd_pipe *); 90 int ohci_setaddr(struct usbd_device *, int); 91 void ohci_poll(struct usbd_bus *); 92 void ohci_softintr(void *); 93 void ohci_add_done(struct ohci_softc *, ohci_physaddr_t); 94 void ohci_rhsc(struct ohci_softc *, struct usbd_xfer *); 95 96 usbd_status ohci_device_request(struct usbd_xfer *xfer); 97 void ohci_add_ed(struct ohci_soft_ed *, struct ohci_soft_ed *); 98 void ohci_rem_ed(struct ohci_soft_ed *, struct ohci_soft_ed *); 99 void ohci_hash_add_td(struct ohci_softc *, struct ohci_soft_td *); 100 struct ohci_soft_td *ohci_hash_find_td(struct ohci_softc *, ohci_physaddr_t); 101 void ohci_hash_add_itd(struct ohci_softc *, struct ohci_soft_itd *); 102 void ohci_hash_rem_itd(struct ohci_softc *, struct ohci_soft_itd *); 103 struct ohci_soft_itd *ohci_hash_find_itd(struct ohci_softc *, ohci_physaddr_t); 104 105 usbd_status ohci_setup_isoc(struct usbd_pipe *pipe); 106 void ohci_device_isoc_enter(struct usbd_xfer *); 107 108 struct usbd_xfer *ohci_allocx(struct usbd_bus *); 109 void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 110 111 usbd_status ohci_root_ctrl_transfer(struct usbd_xfer *); 112 usbd_status ohci_root_ctrl_start(struct usbd_xfer *); 113 void ohci_root_ctrl_abort(struct usbd_xfer *); 114 void ohci_root_ctrl_close(struct usbd_pipe *); 115 void ohci_root_ctrl_done(struct usbd_xfer *); 116 117 usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 118 usbd_status ohci_root_intr_start(struct usbd_xfer *); 119 void ohci_root_intr_abort(struct usbd_xfer *); 120 void ohci_root_intr_close(struct usbd_pipe *); 121 void ohci_root_intr_done(struct usbd_xfer *); 122 123 usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 124 usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 125 void ohci_device_ctrl_abort(struct usbd_xfer *); 126 void ohci_device_ctrl_close(struct usbd_pipe *); 127 void ohci_device_ctrl_done(struct usbd_xfer *); 128 129 usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 130 usbd_status ohci_device_bulk_start(struct usbd_xfer *); 131 void ohci_device_bulk_abort(struct usbd_xfer *); 132 void ohci_device_bulk_close(struct usbd_pipe *); 133 void ohci_device_bulk_done(struct usbd_xfer *); 134 135 usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 136 usbd_status ohci_device_intr_start(struct usbd_xfer *); 137 void ohci_device_intr_abort(struct usbd_xfer *); 138 void ohci_device_intr_close(struct usbd_pipe *); 139 void ohci_device_intr_done(struct usbd_xfer *); 140 141 usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 142 usbd_status ohci_device_isoc_start(struct usbd_xfer *); 143 void ohci_device_isoc_abort(struct usbd_xfer *); 144 void ohci_device_isoc_close(struct usbd_pipe *); 145 void ohci_device_isoc_done(struct usbd_xfer *); 146 147 usbd_status ohci_device_setintr(struct ohci_softc *sc, 148 struct ohci_pipe *pipe, int ival); 149 150 void ohci_timeout(void *); 151 void ohci_timeout_task(void *); 152 void ohci_rhsc_able(struct ohci_softc *, int); 153 void ohci_rhsc_enable(void *); 154 155 void ohci_close_pipe(struct usbd_pipe *, struct ohci_soft_ed *); 156 void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 157 158 void ohci_device_clear_toggle(struct usbd_pipe *pipe); 159 160 #ifdef OHCI_DEBUG 161 void ohci_dumpregs(struct ohci_softc *); 162 void ohci_dump_tds(struct ohci_soft_td *); 163 void ohci_dump_td(struct ohci_soft_td *); 164 void ohci_dump_ed(struct ohci_soft_ed *); 165 void ohci_dump_itd(struct ohci_soft_itd *); 166 void ohci_dump_itds(struct ohci_soft_itd *); 167 #endif 168 169 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 170 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 171 #define OWRITE1(sc, r, x) \ 172 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 173 #define OWRITE2(sc, r, x) \ 174 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 175 #define OWRITE4(sc, r, x) \ 176 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 177 178 __unused static __inline u_int8_t 179 OREAD1(struct ohci_softc *sc, bus_size_t r) 180 { 181 OBARR(sc); 182 return bus_space_read_1(sc->iot, sc->ioh, r); 183 } 184 185 __unused static __inline u_int16_t 186 OREAD2(struct ohci_softc *sc, bus_size_t r) 187 { 188 OBARR(sc); 189 return bus_space_read_2(sc->iot, sc->ioh, r); 190 } 191 192 __unused static __inline u_int32_t 193 OREAD4(struct ohci_softc *sc, bus_size_t r) 194 { 195 OBARR(sc); 196 return bus_space_read_4(sc->iot, sc->ioh, r); 197 } 198 199 /* Reverse the bits in a value 0 .. 31 */ 200 u_int8_t revbits[OHCI_NO_INTRS] = 201 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 202 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 203 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 204 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 205 206 struct ohci_pipe { 207 struct usbd_pipe pipe; 208 struct ohci_soft_ed *sed; 209 union { 210 struct ohci_soft_td *td; 211 struct ohci_soft_itd *itd; 212 } tail; 213 union { 214 /* Control pipe */ 215 struct { 216 struct usb_dma reqdma; 217 } ctl; 218 /* Interrupt pipe */ 219 struct { 220 int nslots; 221 int pos; 222 } intr; 223 /* Iso pipe */ 224 struct iso { 225 int next, inuse; 226 } iso; 227 } u; 228 }; 229 230 #define OHCI_INTR_ENDPT 1 231 232 struct usbd_bus_methods ohci_bus_methods = { 233 .open_pipe = ohci_open, 234 .dev_setaddr = ohci_setaddr, 235 .soft_intr = ohci_softintr, 236 .do_poll = ohci_poll, 237 .allocx = ohci_allocx, 238 .freex = ohci_freex, 239 }; 240 241 struct usbd_pipe_methods ohci_root_ctrl_methods = { 242 .transfer = ohci_root_ctrl_transfer, 243 .start = ohci_root_ctrl_start, 244 .abort = ohci_root_ctrl_abort, 245 .close = ohci_root_ctrl_close, 246 .done = ohci_root_ctrl_done, 247 }; 248 249 struct usbd_pipe_methods ohci_root_intr_methods = { 250 .transfer = ohci_root_intr_transfer, 251 .start = ohci_root_intr_start, 252 .abort = ohci_root_intr_abort, 253 .close = ohci_root_intr_close, 254 .done = ohci_root_intr_done, 255 }; 256 257 struct usbd_pipe_methods ohci_device_ctrl_methods = { 258 .transfer = ohci_device_ctrl_transfer, 259 .start = ohci_device_ctrl_start, 260 .abort = ohci_device_ctrl_abort, 261 .close = ohci_device_ctrl_close, 262 .done = ohci_device_ctrl_done, 263 }; 264 265 struct usbd_pipe_methods ohci_device_intr_methods = { 266 .transfer = ohci_device_intr_transfer, 267 .start = ohci_device_intr_start, 268 .abort = ohci_device_intr_abort, 269 .close = ohci_device_intr_close, 270 .cleartoggle = ohci_device_clear_toggle, 271 .done = ohci_device_intr_done, 272 }; 273 274 struct usbd_pipe_methods ohci_device_bulk_methods = { 275 .transfer = ohci_device_bulk_transfer, 276 .start = ohci_device_bulk_start, 277 .abort = ohci_device_bulk_abort, 278 .close = ohci_device_bulk_close, 279 .cleartoggle = ohci_device_clear_toggle, 280 .done = ohci_device_bulk_done, 281 }; 282 283 struct usbd_pipe_methods ohci_device_isoc_methods = { 284 .transfer = ohci_device_isoc_transfer, 285 .start = ohci_device_isoc_start, 286 .abort = ohci_device_isoc_abort, 287 .close = ohci_device_isoc_close, 288 .done = ohci_device_isoc_done, 289 }; 290 291 int 292 ohci_activate(struct device *self, int act) 293 { 294 struct ohci_softc *sc = (struct ohci_softc *)self; 295 u_int32_t reg; 296 int rv = 0; 297 298 switch (act) { 299 case DVACT_SUSPEND: 300 rv = config_activate_children(self, act); 301 sc->sc_bus.use_polling++; 302 reg = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 303 if (sc->sc_control == 0) { 304 /* 305 * Preserve register values, in case that APM BIOS 306 * does not recover them. 307 */ 308 sc->sc_control = reg; 309 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 310 sc->sc_ival = OHCI_GET_IVAL(OREAD4(sc, 311 OHCI_FM_INTERVAL)); 312 } 313 reg |= OHCI_HCFS_SUSPEND; 314 OWRITE4(sc, OHCI_CONTROL, reg); 315 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 316 sc->sc_bus.use_polling--; 317 break; 318 case DVACT_RESUME: 319 sc->sc_bus.use_polling++; 320 321 /* Some broken BIOSes do not recover these values */ 322 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 323 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 324 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 325 if (sc->sc_intre) 326 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 327 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 328 if (sc->sc_control) 329 reg = sc->sc_control; 330 else 331 reg = OREAD4(sc, OHCI_CONTROL); 332 reg |= OHCI_HCFS_RESUME; 333 OWRITE4(sc, OHCI_CONTROL, reg); 334 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 335 reg = (reg & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 336 OWRITE4(sc, OHCI_CONTROL, reg); 337 338 reg = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT; 339 reg |= OHCI_FSMPS(sc->sc_ival) | sc->sc_ival; 340 OWRITE4(sc, OHCI_FM_INTERVAL, reg); 341 OWRITE4(sc, OHCI_PERIODIC_START, OHCI_PERIODIC(sc->sc_ival)); 342 343 /* Fiddle the No OverCurrent Protection to avoid a chip bug */ 344 reg = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 345 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg | OHCI_NOCP); 346 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 347 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 348 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg); 349 350 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 351 sc->sc_control = sc->sc_intre = sc->sc_ival = 0; 352 sc->sc_bus.use_polling--; 353 rv = config_activate_children(self, act); 354 break; 355 case DVACT_POWERDOWN: 356 rv = config_activate_children(self, act); 357 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 358 break; 359 default: 360 rv = config_activate_children(self, act); 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct device *self, int flags) 368 { 369 struct ohci_softc *sc = (struct ohci_softc *)self; 370 int rv; 371 372 rv = config_detach_children(self, flags); 373 if (rv != 0) 374 return (rv); 375 376 timeout_del(&sc->sc_tmo_rhsc); 377 378 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 379 380 /* free data structures XXX */ 381 382 return (rv); 383 } 384 385 struct ohci_soft_ed * 386 ohci_alloc_sed(struct ohci_softc *sc) 387 { 388 struct ohci_soft_ed *sed = NULL; 389 usbd_status err; 390 int i, offs; 391 struct usb_dma dma; 392 int s; 393 394 s = splusb(); 395 if (sc->sc_freeeds == NULL) { 396 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 397 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 398 OHCI_ED_ALIGN, &dma); 399 if (err) 400 goto out; 401 for (i = 0; i < OHCI_SED_CHUNK; i++) { 402 offs = i * OHCI_SED_SIZE; 403 sed = KERNADDR(&dma, offs); 404 sed->physaddr = DMAADDR(&dma, offs); 405 sed->next = sc->sc_freeeds; 406 sc->sc_freeeds = sed; 407 } 408 } 409 sed = sc->sc_freeeds; 410 sc->sc_freeeds = sed->next; 411 memset(&sed->ed, 0, sizeof(struct ohci_ed)); 412 sed->next = NULL; 413 414 out: 415 splx(s); 416 return (sed); 417 } 418 419 void 420 ohci_free_sed(struct ohci_softc *sc, struct ohci_soft_ed *sed) 421 { 422 int s; 423 424 s = splusb(); 425 sed->next = sc->sc_freeeds; 426 sc->sc_freeeds = sed; 427 splx(s); 428 } 429 430 struct ohci_soft_td * 431 ohci_alloc_std(struct ohci_softc *sc) 432 { 433 struct ohci_soft_td *std = NULL; 434 usbd_status err; 435 int i, offs; 436 struct usb_dma dma; 437 int s; 438 439 s = splusb(); 440 if (sc->sc_freetds == NULL) { 441 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 442 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 443 OHCI_TD_ALIGN, &dma); 444 if (err) 445 goto out; 446 for (i = 0; i < OHCI_STD_CHUNK; i++) { 447 offs = i * OHCI_STD_SIZE; 448 std = KERNADDR(&dma, offs); 449 std->physaddr = DMAADDR(&dma, offs); 450 std->nexttd = sc->sc_freetds; 451 sc->sc_freetds = std; 452 } 453 } 454 455 std = sc->sc_freetds; 456 sc->sc_freetds = std->nexttd; 457 memset(&std->td, 0, sizeof(struct ohci_td)); 458 std->nexttd = NULL; 459 std->xfer = NULL; 460 ohci_hash_add_td(sc, std); 461 462 out: 463 splx(s); 464 return (std); 465 } 466 467 void 468 ohci_free_std(struct ohci_softc *sc, struct ohci_soft_td *std) 469 { 470 int s; 471 472 s = splusb(); 473 LIST_REMOVE(std, hnext); 474 std->nexttd = sc->sc_freetds; 475 sc->sc_freetds = std; 476 splx(s); 477 } 478 479 usbd_status 480 ohci_alloc_std_chain(struct ohci_softc *sc, u_int alen, struct usbd_xfer *xfer, 481 struct ohci_soft_td *sp, struct ohci_soft_td **ep) 482 { 483 struct ohci_soft_td *next, *cur, *end; 484 ohci_physaddr_t dataphys, dataphysend; 485 u_int32_t tdflags; 486 u_int len, curlen; 487 int mps; 488 int rd = usbd_xfer_isread(xfer); 489 struct usb_dma *dma = &xfer->dmabuf; 490 u_int16_t flags = xfer->flags; 491 492 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%u\n", alen)); 493 494 len = alen; 495 cur = sp; 496 end = NULL; 497 498 dataphys = DMAADDR(dma, 0); 499 dataphysend = OHCI_PAGE(dataphys + len - 1); 500 tdflags = htole32( 501 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 502 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 503 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 504 mps = UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 505 506 while (len > 0) { 507 next = ohci_alloc_std(sc); 508 if (next == NULL) 509 goto nomem; 510 511 /* The OHCI hardware can handle at most one page crossing. */ 512 if (OHCI_PAGE(dataphys) == dataphysend || 513 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 514 /* we can handle it in this TD */ 515 curlen = len; 516 } else { 517 /* must use multiple TDs, fill as much as possible. */ 518 curlen = 2 * OHCI_PAGE_SIZE - 519 (dataphys & (OHCI_PAGE_SIZE-1)); 520 /* the length must be a multiple of the max size */ 521 curlen -= curlen % mps; 522 #ifdef DIAGNOSTIC 523 if (curlen == 0) 524 panic("ohci_alloc_std: curlen == 0"); 525 #endif 526 } 527 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 528 "dataphysend=0x%08x len=%u curlen=%u\n", 529 dataphys, dataphysend, 530 len, curlen)); 531 len -= curlen; 532 533 cur->td.td_flags = tdflags; 534 cur->td.td_cbp = htole32(dataphys); 535 cur->nexttd = next; 536 cur->td.td_nexttd = htole32(next->physaddr); 537 cur->td.td_be = htole32(dataphys + curlen - 1); 538 cur->len = curlen; 539 cur->flags = OHCI_ADD_LEN; 540 cur->xfer = xfer; 541 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 542 dataphys, dataphys + curlen - 1)); 543 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 544 dataphys += curlen; 545 end = cur; 546 cur = next; 547 } 548 if (!rd && ((flags & USBD_FORCE_SHORT_XFER) || alen == 0) && 549 alen % mps == 0) { 550 /* Force a 0 length transfer at the end. */ 551 552 next = ohci_alloc_std(sc); 553 if (next == NULL) 554 goto nomem; 555 556 cur->td.td_flags = tdflags; 557 cur->td.td_cbp = 0; /* indicate 0 length packet */ 558 cur->nexttd = next; 559 cur->td.td_nexttd = htole32(next->physaddr); 560 cur->td.td_be = ~0; 561 cur->len = 0; 562 cur->flags = 0; 563 cur->xfer = xfer; 564 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 565 end = cur; 566 } 567 *ep = end; 568 569 return (USBD_NORMAL_COMPLETION); 570 571 nomem: 572 /* XXX free chain */ 573 return (USBD_NOMEM); 574 } 575 576 #if 0 577 void 578 ohci_free_std_chain(struct ohci_softc *sc, struct ohci_soft_td *std, 579 struct ohci_soft_td *stdend) 580 { 581 struct ohci_soft_td *p; 582 583 for (; std != stdend; std = p) { 584 p = std->nexttd; 585 ohci_free_std(sc, std); 586 } 587 } 588 #endif 589 590 struct ohci_soft_itd * 591 ohci_alloc_sitd(struct ohci_softc *sc) 592 { 593 struct ohci_soft_itd *sitd; 594 usbd_status err; 595 int i, s, offs; 596 struct usb_dma dma; 597 598 if (sc->sc_freeitds == NULL) { 599 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 600 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 601 OHCI_ITD_ALIGN, &dma); 602 if (err) 603 return (NULL); 604 s = splusb(); 605 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 606 offs = i * OHCI_SITD_SIZE; 607 sitd = KERNADDR(&dma, offs); 608 sitd->physaddr = DMAADDR(&dma, offs); 609 sitd->nextitd = sc->sc_freeitds; 610 sc->sc_freeitds = sitd; 611 } 612 splx(s); 613 } 614 615 s = splusb(); 616 sitd = sc->sc_freeitds; 617 sc->sc_freeitds = sitd->nextitd; 618 memset(&sitd->itd, 0, sizeof(struct ohci_itd)); 619 sitd->nextitd = NULL; 620 sitd->xfer = NULL; 621 ohci_hash_add_itd(sc, sitd); 622 splx(s); 623 624 #ifdef DIAGNOSTIC 625 sitd->isdone = 0; 626 #endif 627 628 return (sitd); 629 } 630 631 void 632 ohci_free_sitd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 633 { 634 int s; 635 636 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 637 638 #ifdef DIAGNOSTIC 639 if (!sitd->isdone) { 640 panic("ohci_free_sitd: sitd=%p not done", sitd); 641 return; 642 } 643 /* Warn double free */ 644 sitd->isdone = 0; 645 #endif 646 647 s = splusb(); 648 ohci_hash_rem_itd(sc, sitd); 649 sitd->nextitd = sc->sc_freeitds; 650 sc->sc_freeitds = sitd; 651 splx(s); 652 } 653 654 usbd_status 655 ohci_checkrev(struct ohci_softc *sc) 656 { 657 u_int32_t rev; 658 659 rev = OREAD4(sc, OHCI_REVISION); 660 printf("version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 661 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 662 663 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 664 printf("%s: unsupported OHCI revision\n", 665 sc->sc_bus.bdev.dv_xname); 666 sc->sc_bus.usbrev = USBREV_UNKNOWN; 667 return (USBD_INVAL); 668 } 669 sc->sc_bus.usbrev = USBREV_1_0; 670 671 return (USBD_NORMAL_COMPLETION); 672 } 673 674 usbd_status 675 ohci_handover(struct ohci_softc *sc) 676 { 677 u_int32_t s, ctl; 678 int i; 679 680 ctl = OREAD4(sc, OHCI_CONTROL); 681 if (ctl & OHCI_IR) { 682 /* SMM active, request change */ 683 DPRINTF(("ohci_handover: SMM active, request owner change\n")); 684 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 685 (OHCI_OC | OHCI_MIE)) 686 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 687 s = OREAD4(sc, OHCI_COMMAND_STATUS); 688 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 689 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 690 usb_delay_ms(&sc->sc_bus, 1); 691 ctl = OREAD4(sc, OHCI_CONTROL); 692 } 693 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 694 if (ctl & OHCI_IR) { 695 printf("%s: SMM does not respond, will reset\n", 696 sc->sc_bus.bdev.dv_xname); 697 } 698 } 699 700 return (USBD_NORMAL_COMPLETION); 701 } 702 703 usbd_status 704 ohci_init(struct ohci_softc *sc) 705 { 706 struct ohci_soft_ed *sed, *psed; 707 usbd_status err; 708 int i; 709 u_int32_t ctl, rwc, ival, hcr, fm, per, desca, descb; 710 711 DPRINTF(("ohci_init: start\n")); 712 713 for (i = 0; i < OHCI_HASH_SIZE; i++) 714 LIST_INIT(&sc->sc_hash_tds[i]); 715 for (i = 0; i < OHCI_HASH_SIZE; i++) 716 LIST_INIT(&sc->sc_hash_itds[i]); 717 718 if (ohcixfer == NULL) { 719 ohcixfer = malloc(sizeof(struct pool), M_DEVBUF, M_NOWAIT); 720 if (ohcixfer == NULL) { 721 printf("%s: unable to allocate pool descriptor\n", 722 sc->sc_bus.bdev.dv_xname); 723 return (ENOMEM); 724 } 725 pool_init(ohcixfer, sizeof(struct ohci_xfer), 0, IPL_SOFTUSB, 726 0, "ohcixfer", NULL); 727 } 728 729 /* XXX determine alignment by R/W */ 730 /* Allocate the HCCA area. */ 731 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 732 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 733 if (err) 734 return (err); 735 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 736 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 737 738 sc->sc_eintrs = OHCI_NORMAL_INTRS; 739 740 /* Allocate dummy ED that starts the control list. */ 741 sc->sc_ctrl_head = ohci_alloc_sed(sc); 742 if (sc->sc_ctrl_head == NULL) { 743 err = USBD_NOMEM; 744 goto bad1; 745 } 746 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 747 748 /* Allocate dummy ED that starts the bulk list. */ 749 sc->sc_bulk_head = ohci_alloc_sed(sc); 750 if (sc->sc_bulk_head == NULL) { 751 err = USBD_NOMEM; 752 goto bad2; 753 } 754 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 755 756 /* Allocate dummy ED that starts the isochronous list. */ 757 sc->sc_isoc_head = ohci_alloc_sed(sc); 758 if (sc->sc_isoc_head == NULL) { 759 err = USBD_NOMEM; 760 goto bad3; 761 } 762 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 763 764 /* Allocate all the dummy EDs that make up the interrupt tree. */ 765 for (i = 0; i < OHCI_NO_EDS; i++) { 766 sed = ohci_alloc_sed(sc); 767 if (sed == NULL) { 768 while (--i >= 0) 769 ohci_free_sed(sc, sc->sc_eds[i]); 770 err = USBD_NOMEM; 771 goto bad4; 772 } 773 /* All ED fields are set to 0. */ 774 sc->sc_eds[i] = sed; 775 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 776 if (i != 0) 777 psed = sc->sc_eds[(i-1) / 2]; 778 else 779 psed= sc->sc_isoc_head; 780 sed->next = psed; 781 sed->ed.ed_nexted = htole32(psed->physaddr); 782 } 783 /* 784 * Fill HCCA interrupt table. The bit reversal is to get 785 * the tree set up properly to spread the interrupts. 786 */ 787 for (i = 0; i < OHCI_NO_INTRS; i++) 788 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 789 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 790 791 #ifdef OHCI_DEBUG 792 if (ohcidebug > 15) { 793 for (i = 0; i < OHCI_NO_EDS; i++) { 794 printf("ed#%d ", i); 795 ohci_dump_ed(sc->sc_eds[i]); 796 } 797 printf("iso "); 798 ohci_dump_ed(sc->sc_isoc_head); 799 } 800 #endif 801 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 802 ctl = OREAD4(sc, OHCI_CONTROL); 803 rwc = ctl & OHCI_RWC; 804 fm = OREAD4(sc, OHCI_FM_INTERVAL); 805 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 806 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 807 808 /* Determine in what context we are running. */ 809 if (ctl & OHCI_IR) { 810 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 811 goto reset; 812 #if 0 813 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 814 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 815 /* BIOS started controller. */ 816 DPRINTF(("ohci_init: BIOS active\n")); 817 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 818 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 819 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 820 } 821 #endif 822 } else { 823 DPRINTF(("ohci_init: cold started\n")); 824 reset: 825 /* Controller was cold started. */ 826 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 827 } 828 829 /* 830 * This reset should not be necessary according to the OHCI spec, but 831 * without it some controllers do not start. 832 */ 833 DPRINTF(("%s: resetting\n", sc->sc_bus.bdev.dv_xname)); 834 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 835 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 836 837 /* We now own the host controller and the bus has been reset. */ 838 839 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 840 /* Nominal time for a reset is 10 us. */ 841 for (i = 0; i < 10; i++) { 842 delay(10); 843 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 844 if (!hcr) 845 break; 846 } 847 if (hcr) { 848 printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname); 849 err = USBD_IOERROR; 850 goto bad5; 851 } 852 #ifdef OHCI_DEBUG 853 if (ohcidebug > 15) 854 ohci_dumpregs(sc); 855 #endif 856 857 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 858 859 /* Set up HC registers. */ 860 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 861 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 862 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 863 /* disable all interrupts and then switch on all desired interrupts */ 864 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 865 /* switch on desired functional features */ 866 ctl = OREAD4(sc, OHCI_CONTROL); 867 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 868 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 869 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 870 /* And finally start it! */ 871 OWRITE4(sc, OHCI_CONTROL, ctl); 872 873 /* 874 * The controller is now OPERATIONAL. Set a some final 875 * registers that should be set earlier, but that the 876 * controller ignores when in the SUSPEND state. 877 */ 878 ival = OHCI_GET_IVAL(fm); 879 fm = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT; 880 fm |= OHCI_FSMPS(ival) | ival; 881 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 882 per = OHCI_PERIODIC(ival); /* 90% periodic */ 883 OWRITE4(sc, OHCI_PERIODIC_START, per); 884 885 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 886 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 887 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 888 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 889 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 890 OWRITE4(sc, OHCI_RH_DESCRIPTOR_B, descb); 891 usb_delay_ms(&sc->sc_bus, OHCI_GET_POTPGT(desca) * UHD_PWRON_FACTOR); 892 893 /* 894 * The AMD756 requires a delay before re-reading the register, 895 * otherwise it will occasionally report 0 ports. 896 */ 897 sc->sc_noport = 0; 898 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 899 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 900 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 901 } 902 903 #ifdef OHCI_DEBUG 904 if (ohcidebug > 5) 905 ohci_dumpregs(sc); 906 #endif 907 908 /* Set up the bus struct. */ 909 sc->sc_bus.methods = &ohci_bus_methods; 910 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 911 912 sc->sc_control = sc->sc_intre = 0; 913 914 timeout_set(&sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 915 916 /* Finally, turn on interrupts. */ 917 DPRINTFN(1,("ohci_init: enabling\n")); 918 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 919 920 return (USBD_NORMAL_COMPLETION); 921 922 bad5: 923 for (i = 0; i < OHCI_NO_EDS; i++) 924 ohci_free_sed(sc, sc->sc_eds[i]); 925 bad4: 926 ohci_free_sed(sc, sc->sc_isoc_head); 927 bad3: 928 ohci_free_sed(sc, sc->sc_bulk_head); 929 bad2: 930 ohci_free_sed(sc, sc->sc_ctrl_head); 931 bad1: 932 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 933 return (err); 934 } 935 936 struct usbd_xfer * 937 ohci_allocx(struct usbd_bus *bus) 938 { 939 return (pool_get(ohcixfer, PR_NOWAIT | PR_ZERO)); 940 } 941 942 void 943 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 944 { 945 pool_put(ohcixfer, xfer); 946 } 947 948 #ifdef OHCI_DEBUG 949 void 950 ohci_dumpregs(struct ohci_softc *sc) 951 { 952 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 953 OREAD4(sc, OHCI_REVISION), 954 OREAD4(sc, OHCI_CONTROL), 955 OREAD4(sc, OHCI_COMMAND_STATUS))); 956 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 957 OREAD4(sc, OHCI_INTERRUPT_STATUS), 958 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 959 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 960 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 961 OREAD4(sc, OHCI_HCCA), 962 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 963 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 964 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 965 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 966 OREAD4(sc, OHCI_BULK_HEAD_ED), 967 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 968 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 969 OREAD4(sc, OHCI_DONE_HEAD), 970 OREAD4(sc, OHCI_FM_INTERVAL), 971 OREAD4(sc, OHCI_FM_REMAINING))); 972 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 973 OREAD4(sc, OHCI_FM_NUMBER), 974 OREAD4(sc, OHCI_PERIODIC_START), 975 OREAD4(sc, OHCI_LS_THRESHOLD))); 976 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 977 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 978 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 979 OREAD4(sc, OHCI_RH_STATUS))); 980 DPRINTF((" port1=0x%08x port2=0x%08x\n", 981 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 982 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 983 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 984 letoh32(sc->sc_hcca->hcca_frame_number), 985 letoh32(sc->sc_hcca->hcca_done_head))); 986 } 987 #endif 988 989 int ohci_intr1(struct ohci_softc *); 990 991 int 992 ohci_intr(void *p) 993 { 994 struct ohci_softc *sc = p; 995 996 if (sc == NULL || sc->sc_bus.dying) 997 return (0); 998 999 /* If we get an interrupt while polling, then just ignore it. */ 1000 if (sc->sc_bus.use_polling) { 1001 #ifdef DIAGNOSTIC 1002 static struct timeval ohci_intr_tv; 1003 if ((OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) && 1004 usbd_ratecheck(&ohci_intr_tv)) 1005 DPRINTFN(16, 1006 ("ohci_intr: ignored interrupt while polling\n")); 1007 #endif 1008 return (0); 1009 } 1010 1011 return (ohci_intr1(sc)); 1012 } 1013 1014 int 1015 ohci_intr1(struct ohci_softc *sc) 1016 { 1017 u_int32_t intrs, eintrs; 1018 ohci_physaddr_t done; 1019 1020 DPRINTFN(14,("ohci_intr1: enter\n")); 1021 1022 /* In case the interrupt occurs before initialization has completed. */ 1023 if (sc == NULL || sc->sc_hcca == NULL) { 1024 #ifdef DIAGNOSTIC 1025 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1026 #endif 1027 return (0); 1028 } 1029 1030 intrs = 0; 1031 done = letoh32(sc->sc_hcca->hcca_done_head); 1032 if (done != 0) { 1033 if (done & ~OHCI_DONE_INTRS) 1034 intrs = OHCI_WDH; 1035 if (done & OHCI_DONE_INTRS) 1036 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1037 sc->sc_hcca->hcca_done_head = 0; 1038 } else { 1039 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1040 /* If we've flushed out a WDH then reread */ 1041 if (intrs & OHCI_WDH) { 1042 done = letoh32(sc->sc_hcca->hcca_done_head); 1043 sc->sc_hcca->hcca_done_head = 0; 1044 } 1045 } 1046 1047 if (intrs == 0xffffffff) { 1048 sc->sc_bus.dying = 1; 1049 return (0); 1050 } 1051 1052 if (!intrs) 1053 return (0); 1054 1055 intrs &= ~OHCI_MIE; 1056 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1057 eintrs = intrs & sc->sc_eintrs; 1058 if (!eintrs) 1059 return (0); 1060 1061 sc->sc_bus.intr_context++; 1062 sc->sc_bus.no_intrs++; 1063 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1064 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1065 (u_int)eintrs)); 1066 1067 if (eintrs & OHCI_SO) { 1068 sc->sc_overrun_cnt++; 1069 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1070 printf("%s: %u scheduling overruns\n", 1071 sc->sc_bus.bdev.dv_xname, sc->sc_overrun_cnt); 1072 sc->sc_overrun_cnt = 0; 1073 } 1074 /* XXX do what */ 1075 eintrs &= ~OHCI_SO; 1076 } 1077 if (eintrs & OHCI_WDH) { 1078 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1079 usb_schedsoftintr(&sc->sc_bus); 1080 eintrs &= ~OHCI_WDH; 1081 } 1082 if (eintrs & OHCI_RD) { 1083 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 1084 /* XXX process resume detect */ 1085 } 1086 if (eintrs & OHCI_UE) { 1087 printf("%s: unrecoverable error, controller halted\n", 1088 sc->sc_bus.bdev.dv_xname); 1089 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1090 /* XXX what else */ 1091 } 1092 if (eintrs & OHCI_RHSC) { 1093 ohci_rhsc(sc, sc->sc_intrxfer); 1094 /* 1095 * Disable RHSC interrupt for now, because it will be 1096 * on until the port has been reset. 1097 */ 1098 ohci_rhsc_able(sc, 0); 1099 DPRINTFN(2, ("%s: rhsc interrupt disabled\n", 1100 sc->sc_bus.bdev.dv_xname)); 1101 1102 /* Do not allow RHSC interrupts > 1 per second */ 1103 timeout_add_sec(&sc->sc_tmo_rhsc, 1); 1104 eintrs &= ~OHCI_RHSC; 1105 } 1106 1107 sc->sc_bus.intr_context--; 1108 1109 if (eintrs != 0) { 1110 /* Block unprocessed interrupts. XXX */ 1111 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1112 sc->sc_eintrs &= ~eintrs; 1113 printf("%s: blocking intrs 0x%x\n", 1114 sc->sc_bus.bdev.dv_xname, eintrs); 1115 } 1116 1117 return (1); 1118 } 1119 1120 void 1121 ohci_rhsc_able(struct ohci_softc *sc, int on) 1122 { 1123 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1124 if (on) { 1125 sc->sc_eintrs |= OHCI_RHSC; 1126 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1127 } else { 1128 sc->sc_eintrs &= ~OHCI_RHSC; 1129 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1130 } 1131 } 1132 1133 void 1134 ohci_rhsc_enable(void *v_sc) 1135 { 1136 struct ohci_softc *sc = v_sc; 1137 int s; 1138 1139 if (sc->sc_bus.dying) 1140 return; 1141 1142 s = splhardusb(); 1143 ohci_rhsc(sc, sc->sc_intrxfer); 1144 DPRINTFN(2, ("%s: rhsc interrupt enabled\n", 1145 sc->sc_bus.bdev.dv_xname)); 1146 1147 ohci_rhsc_able(sc, 1); 1148 splx(s); 1149 } 1150 1151 #ifdef OHCI_DEBUG 1152 char *ohci_cc_strs[] = { 1153 "NO_ERROR", 1154 "CRC", 1155 "BIT_STUFFING", 1156 "DATA_TOGGLE_MISMATCH", 1157 "STALL", 1158 "DEVICE_NOT_RESPONDING", 1159 "PID_CHECK_FAILURE", 1160 "UNEXPECTED_PID", 1161 "DATA_OVERRUN", 1162 "DATA_UNDERRUN", 1163 "BUFFER_OVERRUN", 1164 "BUFFER_UNDERRUN", 1165 "reserved", 1166 "reserved", 1167 "NOT_ACCESSED", 1168 "NOT_ACCESSED", 1169 }; 1170 #endif 1171 1172 void 1173 ohci_add_done(struct ohci_softc *sc, ohci_physaddr_t done) 1174 { 1175 struct ohci_soft_itd *sitd, *sidone, **ip; 1176 struct ohci_soft_td *std, *sdone, **p; 1177 1178 /* Reverse the done list. */ 1179 for (sdone = NULL, sidone = NULL; done != 0; ) { 1180 std = ohci_hash_find_td(sc, done); 1181 if (std != NULL) { 1182 std->dnext = sdone; 1183 done = letoh32(std->td.td_nexttd); 1184 sdone = std; 1185 DPRINTFN(10,("add TD %p\n", std)); 1186 continue; 1187 } 1188 sitd = ohci_hash_find_itd(sc, done); 1189 if (sitd != NULL) { 1190 sitd->dnext = sidone; 1191 done = letoh32(sitd->itd.itd_nextitd); 1192 sidone = sitd; 1193 DPRINTFN(5,("add ITD %p\n", sitd)); 1194 continue; 1195 } 1196 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1197 } 1198 1199 /* sdone & sidone now hold the done lists. */ 1200 /* Put them on the already processed lists. */ 1201 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1202 ; 1203 *p = sdone; 1204 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1205 ; 1206 *ip = sidone; 1207 } 1208 1209 void 1210 ohci_softintr(void *v) 1211 { 1212 struct ohci_softc *sc = v; 1213 struct ohci_soft_itd *sitd, *sidone, *sitdnext; 1214 struct ohci_soft_td *std, *sdone, *stdnext; 1215 struct usbd_xfer *xfer; 1216 struct ohci_pipe *opipe; 1217 int len, cc, s; 1218 int i, j, actlen, iframes, uedir; 1219 1220 DPRINTFN(10,("ohci_softintr: enter\n")); 1221 1222 if (sc->sc_bus.dying) 1223 return; 1224 1225 sc->sc_bus.intr_context++; 1226 1227 s = splhardusb(); 1228 sdone = sc->sc_sdone; 1229 sc->sc_sdone = NULL; 1230 sidone = sc->sc_sidone; 1231 sc->sc_sidone = NULL; 1232 splx(s); 1233 1234 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1235 1236 #ifdef OHCI_DEBUG 1237 if (ohcidebug > 10) { 1238 DPRINTF(("ohci_process_done: TD done:\n")); 1239 ohci_dump_tds(sdone); 1240 } 1241 #endif 1242 1243 for (std = sdone; std; std = stdnext) { 1244 xfer = std->xfer; 1245 stdnext = std->dnext; 1246 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1247 std, xfer, xfer ? xfer->hcpriv : 0)); 1248 if (xfer == NULL) { 1249 /* 1250 * xfer == NULL: There seems to be no xfer associated 1251 * with this TD. It is tailp that happened to end up on 1252 * the done queue. 1253 * Shouldn't happen, but some chips are broken(?). 1254 */ 1255 continue; 1256 } 1257 if (xfer->status == USBD_CANCELLED || 1258 xfer->status == USBD_TIMEOUT) { 1259 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1260 xfer)); 1261 /* Handled by abort routine. */ 1262 continue; 1263 } 1264 timeout_del(&xfer->timeout_handle); 1265 usb_rem_task(xfer->device, &xfer->abort_task); 1266 1267 len = std->len; 1268 if (std->td.td_cbp != 0) 1269 len -= letoh32(std->td.td_be) - 1270 letoh32(std->td.td_cbp) + 1; 1271 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1272 std->flags)); 1273 if (std->flags & OHCI_ADD_LEN) 1274 xfer->actlen += len; 1275 1276 cc = OHCI_TD_GET_CC(letoh32(std->td.td_flags)); 1277 if (cc == OHCI_CC_NO_ERROR) { 1278 int done = (std->flags & OHCI_CALL_DONE); 1279 1280 ohci_free_std(sc, std); 1281 if (done) { 1282 xfer->status = USBD_NORMAL_COMPLETION; 1283 s = splusb(); 1284 usb_transfer_complete(xfer); 1285 splx(s); 1286 } 1287 } else { 1288 /* 1289 * Endpoint is halted. First unlink all the TDs 1290 * belonging to the failed transfer, and then restart 1291 * the endpoint. 1292 */ 1293 struct ohci_soft_td *p, *n; 1294 opipe = (struct ohci_pipe *)xfer->pipe; 1295 1296 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1297 OHCI_TD_GET_CC(letoh32(std->td.td_flags)), 1298 ohci_cc_strs[OHCI_TD_GET_CC(letoh32(std->td.td_flags))])); 1299 1300 /* remove TDs */ 1301 for (p = std; p->xfer == xfer; p = n) { 1302 n = p->nexttd; 1303 ohci_free_std(sc, p); 1304 } 1305 1306 /* clear halt */ 1307 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1308 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1309 1310 if (cc == OHCI_CC_STALL) 1311 xfer->status = USBD_STALLED; 1312 else if (cc == OHCI_CC_DATA_UNDERRUN) 1313 xfer->status = USBD_NORMAL_COMPLETION; 1314 else 1315 xfer->status = USBD_IOERROR; 1316 s = splusb(); 1317 usb_transfer_complete(xfer); 1318 splx(s); 1319 } 1320 } 1321 1322 #ifdef OHCI_DEBUG 1323 if (ohcidebug > 10) { 1324 DPRINTF(("ohci_softintr: ITD done:\n")); 1325 ohci_dump_itds(sidone); 1326 } 1327 #endif 1328 1329 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1330 xfer = sitd->xfer; 1331 sitdnext = sitd->dnext; 1332 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1333 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1334 if (xfer == NULL) 1335 continue; 1336 if (xfer->status == USBD_CANCELLED || 1337 xfer->status == USBD_TIMEOUT) { 1338 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1339 xfer)); 1340 /* Handled by abort routine. */ 1341 continue; 1342 } 1343 #ifdef DIAGNOSTIC 1344 if (sitd->isdone) 1345 printf("ohci_softintr: sitd=%p is done\n", sitd); 1346 sitd->isdone = 1; 1347 #endif 1348 if (sitd->flags & OHCI_CALL_DONE) { 1349 struct ohci_soft_itd *next; 1350 1351 opipe = (struct ohci_pipe *)xfer->pipe; 1352 opipe->u.iso.inuse -= xfer->nframes; 1353 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1354 bEndpointAddress); 1355 xfer->status = USBD_NORMAL_COMPLETION; 1356 actlen = 0; 1357 for (i = 0, sitd = xfer->hcpriv; ; 1358 sitd = next) { 1359 next = sitd->nextitd; 1360 if (OHCI_ITD_GET_CC(letoh32(sitd-> 1361 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1362 xfer->status = USBD_IOERROR; 1363 /* For input, update frlengths with actual */ 1364 /* XXX anything necessary for output? */ 1365 if (uedir == UE_DIR_IN && 1366 xfer->status == USBD_NORMAL_COMPLETION) { 1367 iframes = OHCI_ITD_GET_FC(letoh32( 1368 sitd->itd.itd_flags)); 1369 for (j = 0; j < iframes; i++, j++) { 1370 len = letoh16(sitd-> 1371 itd.itd_offset[j]); 1372 if ((OHCI_ITD_PSW_GET_CC(len) & 1373 OHCI_CC_NOT_ACCESSED_MASK) 1374 == OHCI_CC_NOT_ACCESSED) 1375 len = 0; 1376 else 1377 len = OHCI_ITD_PSW_LENGTH(len); 1378 xfer->frlengths[i] = len; 1379 actlen += len; 1380 } 1381 } 1382 if (sitd->flags & OHCI_CALL_DONE) 1383 break; 1384 ohci_free_sitd(sc, sitd); 1385 } 1386 ohci_free_sitd(sc, sitd); 1387 if (uedir == UE_DIR_IN && 1388 xfer->status == USBD_NORMAL_COMPLETION) 1389 xfer->actlen = actlen; 1390 xfer->hcpriv = NULL; 1391 1392 s = splusb(); 1393 usb_transfer_complete(xfer); 1394 splx(s); 1395 } 1396 } 1397 1398 if (sc->sc_softwake) { 1399 sc->sc_softwake = 0; 1400 wakeup(&sc->sc_softwake); 1401 } 1402 1403 sc->sc_bus.intr_context--; 1404 DPRINTFN(10,("ohci_softintr: done:\n")); 1405 } 1406 1407 void 1408 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1409 { 1410 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1411 1412 #ifdef DIAGNOSTIC 1413 if (!(xfer->rqflags & URQ_REQUEST)) { 1414 panic("ohci_device_ctrl_done: not a request"); 1415 } 1416 #endif 1417 } 1418 1419 void 1420 ohci_device_intr_done(struct usbd_xfer *xfer) 1421 { 1422 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1423 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1424 struct ohci_soft_ed *sed = opipe->sed; 1425 struct ohci_soft_td *data, *tail; 1426 1427 1428 DPRINTFN(10, ("ohci_device_intr_done: xfer=%p, actlen=%d\n", xfer, 1429 xfer->actlen)); 1430 1431 if (xfer->pipe->repeat) { 1432 data = opipe->tail.td; 1433 tail = ohci_alloc_std(sc); 1434 if (tail == NULL) { 1435 xfer->status = USBD_NOMEM; 1436 return; 1437 } 1438 tail->xfer = NULL; 1439 1440 data->td.td_flags = htole32( 1441 OHCI_TD_IN | OHCI_TD_NOCC | 1442 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1443 if (xfer->flags & USBD_SHORT_XFER_OK) 1444 data->td.td_flags |= htole32(OHCI_TD_R); 1445 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1446 data->nexttd = tail; 1447 data->td.td_nexttd = htole32(tail->physaddr); 1448 data->td.td_be = htole32(letoh32(data->td.td_cbp) + 1449 xfer->length - 1); 1450 data->len = xfer->length; 1451 data->xfer = xfer; 1452 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1453 xfer->hcpriv = data; 1454 xfer->actlen = 0; 1455 1456 sed->ed.ed_tailp = htole32(tail->physaddr); 1457 opipe->tail.td = tail; 1458 } 1459 } 1460 1461 void 1462 ohci_device_bulk_done(struct usbd_xfer *xfer) 1463 { 1464 DPRINTFN(10, ("ohci_device_bulk_done: xfer=%p, actlen=%d\n", xfer, 1465 xfer->actlen)); 1466 } 1467 1468 void 1469 ohci_rhsc(struct ohci_softc *sc, struct usbd_xfer *xfer) 1470 { 1471 u_char *p; 1472 int i, m; 1473 int hstatus; 1474 1475 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1476 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1477 sc, xfer, hstatus)); 1478 1479 if (xfer == NULL) { 1480 /* Just ignore the change. */ 1481 return; 1482 } 1483 1484 p = KERNADDR(&xfer->dmabuf, 0); 1485 m = min(sc->sc_noport, xfer->length * 8 - 1); 1486 memset(p, 0, xfer->length); 1487 for (i = 1; i <= m; i++) { 1488 /* Pick out CHANGE bits from the status reg. */ 1489 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1490 p[i/8] |= 1 << (i%8); 1491 } 1492 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1493 xfer->actlen = xfer->length; 1494 xfer->status = USBD_NORMAL_COMPLETION; 1495 1496 usb_transfer_complete(xfer); 1497 } 1498 1499 void 1500 ohci_root_intr_done(struct usbd_xfer *xfer) 1501 { 1502 } 1503 1504 void 1505 ohci_root_ctrl_done(struct usbd_xfer *xfer) 1506 { 1507 } 1508 1509 void 1510 ohci_poll(struct usbd_bus *bus) 1511 { 1512 struct ohci_softc *sc = (struct ohci_softc *)bus; 1513 #ifdef OHCI_DEBUG 1514 static int last; 1515 int new; 1516 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1517 if (new != last) { 1518 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1519 last = new; 1520 } 1521 #endif 1522 1523 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1524 ohci_intr1(sc); 1525 } 1526 1527 usbd_status 1528 ohci_device_request(struct usbd_xfer *xfer) 1529 { 1530 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1531 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1532 usb_device_request_t *req = &xfer->request; 1533 struct ohci_soft_td *setup, *stat, *next, *tail; 1534 struct ohci_soft_ed *sed; 1535 u_int len; 1536 usbd_status err; 1537 int s; 1538 1539 len = UGETW(req->wLength); 1540 1541 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1542 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n", 1543 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1544 UGETW(req->wIndex), len, xfer->device->address, 1545 xfer->pipe->endpoint->edesc->bEndpointAddress)); 1546 1547 setup = opipe->tail.td; 1548 stat = ohci_alloc_std(sc); 1549 if (stat == NULL) { 1550 err = USBD_NOMEM; 1551 goto bad1; 1552 } 1553 tail = ohci_alloc_std(sc); 1554 if (tail == NULL) { 1555 err = USBD_NOMEM; 1556 goto bad2; 1557 } 1558 tail->xfer = NULL; 1559 1560 sed = opipe->sed; 1561 1562 next = stat; 1563 1564 /* Set up data transaction */ 1565 if (len != 0) { 1566 struct ohci_soft_td *std = stat; 1567 1568 err = ohci_alloc_std_chain(sc, len, xfer, std, &stat); 1569 stat = stat->nexttd; /* point at free TD */ 1570 if (err) 1571 goto bad3; 1572 /* Start toggle at 1 and then use the carried toggle. */ 1573 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1574 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1575 } 1576 1577 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1578 1579 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1580 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1581 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1582 setup->nexttd = next; 1583 setup->td.td_nexttd = htole32(next->physaddr); 1584 setup->td.td_be = htole32(letoh32(setup->td.td_cbp) + sizeof *req - 1); 1585 setup->len = 0; 1586 setup->xfer = xfer; 1587 setup->flags = 0; 1588 xfer->hcpriv = setup; 1589 1590 stat->td.td_flags = htole32( 1591 (usbd_xfer_isread(xfer) ? OHCI_TD_OUT : OHCI_TD_IN) | 1592 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1593 stat->td.td_cbp = 0; 1594 stat->nexttd = tail; 1595 stat->td.td_nexttd = htole32(tail->physaddr); 1596 stat->td.td_be = 0; 1597 stat->flags = OHCI_CALL_DONE; 1598 stat->len = 0; 1599 stat->xfer = xfer; 1600 1601 #ifdef OHCI_DEBUG 1602 if (ohcidebug > 5) { 1603 DPRINTF(("ohci_device_request:\n")); 1604 ohci_dump_ed(sed); 1605 ohci_dump_tds(setup); 1606 } 1607 #endif 1608 1609 /* Insert ED in schedule */ 1610 s = splusb(); 1611 sed->ed.ed_tailp = htole32(tail->physaddr); 1612 opipe->tail.td = tail; 1613 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1614 if (xfer->timeout && !sc->sc_bus.use_polling) { 1615 timeout_del(&xfer->timeout_handle); 1616 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer); 1617 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 1618 } 1619 splx(s); 1620 1621 #ifdef OHCI_DEBUG 1622 if (ohcidebug > 20) { 1623 delay(10000); 1624 DPRINTF(("ohci_device_request: status=%x\n", 1625 OREAD4(sc, OHCI_COMMAND_STATUS))); 1626 ohci_dumpregs(sc); 1627 printf("ctrl head:\n"); 1628 ohci_dump_ed(sc->sc_ctrl_head); 1629 printf("sed:\n"); 1630 ohci_dump_ed(sed); 1631 ohci_dump_tds(setup); 1632 } 1633 #endif 1634 1635 return (USBD_NORMAL_COMPLETION); 1636 1637 bad3: 1638 ohci_free_std(sc, tail); 1639 bad2: 1640 ohci_free_std(sc, stat); 1641 bad1: 1642 return (err); 1643 } 1644 1645 /* 1646 * Add an ED to the schedule. Called at splusb(). 1647 */ 1648 void 1649 ohci_add_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head) 1650 { 1651 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1652 1653 splsoftassert(IPL_SOFTUSB); 1654 sed->next = head->next; 1655 sed->ed.ed_nexted = head->ed.ed_nexted; 1656 head->next = sed; 1657 head->ed.ed_nexted = htole32(sed->physaddr); 1658 } 1659 1660 /* 1661 * Remove an ED from the schedule. Called at splusb(). 1662 */ 1663 void 1664 ohci_rem_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head) 1665 { 1666 struct ohci_soft_ed *p; 1667 1668 splsoftassert(IPL_SOFTUSB); 1669 1670 /* XXX */ 1671 for (p = head; p != NULL && p->next != sed; p = p->next) 1672 ; 1673 if (p == NULL) 1674 panic("ohci_rem_ed: ED not found"); 1675 p->next = sed->next; 1676 p->ed.ed_nexted = sed->ed.ed_nexted; 1677 } 1678 1679 /* 1680 * When a transfer is completed the TD is added to the done queue by 1681 * the host controller. This queue is the processed by software. 1682 * Unfortunately the queue contains the physical address of the TD 1683 * and we have no simple way to translate this back to a kernel address. 1684 * To make the translation possible (and fast) we use a hash table of 1685 * TDs currently in the schedule. The physical address is used as the 1686 * hash value. 1687 */ 1688 1689 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1690 /* Called at splusb() */ 1691 void 1692 ohci_hash_add_td(struct ohci_softc *sc, struct ohci_soft_td *std) 1693 { 1694 int h = HASH(std->physaddr); 1695 1696 splsoftassert(IPL_SOFTUSB); 1697 1698 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1699 } 1700 1701 struct ohci_soft_td * 1702 ohci_hash_find_td(struct ohci_softc *sc, ohci_physaddr_t a) 1703 { 1704 int h = HASH(a); 1705 struct ohci_soft_td *std; 1706 1707 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1708 std != NULL; 1709 std = LIST_NEXT(std, hnext)) 1710 if (std->physaddr == a) 1711 return (std); 1712 return (NULL); 1713 } 1714 1715 /* Called at splusb() */ 1716 void 1717 ohci_hash_add_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 1718 { 1719 int h = HASH(sitd->physaddr); 1720 1721 splsoftassert(IPL_SOFTUSB); 1722 1723 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1724 sitd, (u_long)sitd->physaddr)); 1725 1726 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1727 } 1728 1729 /* Called at splusb() */ 1730 void 1731 ohci_hash_rem_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 1732 { 1733 splsoftassert(IPL_SOFTUSB); 1734 1735 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1736 sitd, (u_long)sitd->physaddr)); 1737 1738 LIST_REMOVE(sitd, hnext); 1739 } 1740 1741 struct ohci_soft_itd * 1742 ohci_hash_find_itd(struct ohci_softc *sc, ohci_physaddr_t a) 1743 { 1744 int h = HASH(a); 1745 struct ohci_soft_itd *sitd; 1746 1747 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1748 sitd != NULL; 1749 sitd = LIST_NEXT(sitd, hnext)) 1750 if (sitd->physaddr == a) 1751 return (sitd); 1752 return (NULL); 1753 } 1754 1755 void 1756 ohci_timeout(void *addr) 1757 { 1758 struct usbd_xfer *xfer = addr; 1759 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1760 1761 if (sc->sc_bus.dying) { 1762 ohci_timeout_task(addr); 1763 return; 1764 } 1765 1766 usb_init_task(&xfer->abort_task, ohci_timeout_task, addr, 1767 USB_TASK_TYPE_ABORT); 1768 usb_add_task(xfer->device, &xfer->abort_task); 1769 } 1770 1771 void 1772 ohci_timeout_task(void *addr) 1773 { 1774 struct usbd_xfer *xfer = addr; 1775 int s; 1776 1777 DPRINTF(("%s: xfer=%p\n", __func__, xfer)); 1778 1779 s = splusb(); 1780 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1781 splx(s); 1782 } 1783 1784 #ifdef OHCI_DEBUG 1785 void 1786 ohci_dump_tds(struct ohci_soft_td *std) 1787 { 1788 for (; std; std = std->nexttd) 1789 ohci_dump_td(std); 1790 } 1791 1792 void 1793 ohci_dump_td(struct ohci_soft_td *std) 1794 { 1795 char sbuf[128]; 1796 1797 bitmask_snprintf((u_int32_t)letoh32(std->td.td_flags), 1798 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1799 sbuf, sizeof(sbuf)); 1800 1801 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1802 "nexttd=0x%08lx be=0x%08lx\n", 1803 std, (u_long)std->physaddr, sbuf, 1804 OHCI_TD_GET_DI(letoh32(std->td.td_flags)), 1805 OHCI_TD_GET_EC(letoh32(std->td.td_flags)), 1806 OHCI_TD_GET_CC(letoh32(std->td.td_flags)), 1807 (u_long)letoh32(std->td.td_cbp), 1808 (u_long)letoh32(std->td.td_nexttd), 1809 (u_long)letoh32(std->td.td_be)); 1810 } 1811 1812 void 1813 ohci_dump_itd(struct ohci_soft_itd *sitd) 1814 { 1815 int i; 1816 1817 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1818 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1819 sitd, (u_long)sitd->physaddr, 1820 OHCI_ITD_GET_SF(letoh32(sitd->itd.itd_flags)), 1821 OHCI_ITD_GET_DI(letoh32(sitd->itd.itd_flags)), 1822 OHCI_ITD_GET_FC(letoh32(sitd->itd.itd_flags)), 1823 OHCI_ITD_GET_CC(letoh32(sitd->itd.itd_flags)), 1824 (u_long)letoh32(sitd->itd.itd_bp0), 1825 (u_long)letoh32(sitd->itd.itd_nextitd), 1826 (u_long)letoh32(sitd->itd.itd_be)); 1827 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1828 printf("offs[%d]=0x%04x ", i, 1829 (u_int)letoh16(sitd->itd.itd_offset[i])); 1830 printf("\n"); 1831 } 1832 1833 void 1834 ohci_dump_itds(struct ohci_soft_itd *sitd) 1835 { 1836 for (; sitd; sitd = sitd->nextitd) 1837 ohci_dump_itd(sitd); 1838 } 1839 1840 void 1841 ohci_dump_ed(struct ohci_soft_ed *sed) 1842 { 1843 char sbuf[128], sbuf2[128]; 1844 1845 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_flags), 1846 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1847 sbuf, sizeof(sbuf)); 1848 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_headp), 1849 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1850 1851 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\n" 1852 "tailp=0x%08lx headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1853 sed, (u_long)sed->physaddr, 1854 OHCI_ED_GET_FA(letoh32(sed->ed.ed_flags)), 1855 OHCI_ED_GET_EN(letoh32(sed->ed.ed_flags)), 1856 OHCI_ED_GET_MAXP(letoh32(sed->ed.ed_flags)), sbuf, 1857 (u_long)letoh32(sed->ed.ed_tailp), sbuf2, 1858 (u_long)letoh32(sed->ed.ed_headp), 1859 (u_long)letoh32(sed->ed.ed_nexted)); 1860 } 1861 #endif 1862 1863 usbd_status 1864 ohci_open(struct usbd_pipe *pipe) 1865 { 1866 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 1867 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1868 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1869 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1870 struct ohci_soft_ed *sed = NULL; 1871 struct ohci_soft_td *std = NULL; 1872 struct ohci_soft_itd *sitd; 1873 ohci_physaddr_t tdphys; 1874 u_int32_t fmt; 1875 usbd_status err; 1876 int s; 1877 int ival; 1878 1879 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d\n", 1880 pipe, pipe->device->address, ed->bEndpointAddress)); 1881 1882 if (sc->sc_bus.dying) 1883 return (USBD_IOERROR); 1884 1885 /* Root Hub */ 1886 if (pipe->device->depth == 0) { 1887 switch (ed->bEndpointAddress) { 1888 case USB_CONTROL_ENDPOINT: 1889 pipe->methods = &ohci_root_ctrl_methods; 1890 break; 1891 case UE_DIR_IN | OHCI_INTR_ENDPT: 1892 pipe->methods = &ohci_root_intr_methods; 1893 break; 1894 default: 1895 return (USBD_INVAL); 1896 } 1897 } else { 1898 sed = ohci_alloc_sed(sc); 1899 if (sed == NULL) 1900 goto bad0; 1901 opipe->sed = sed; 1902 if (xfertype == UE_ISOCHRONOUS) { 1903 sitd = ohci_alloc_sitd(sc); 1904 if (sitd == NULL) 1905 goto bad1; 1906 opipe->tail.itd = sitd; 1907 tdphys = sitd->physaddr; 1908 fmt = OHCI_ED_FORMAT_ISO; 1909 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1910 fmt |= OHCI_ED_DIR_IN; 1911 else 1912 fmt |= OHCI_ED_DIR_OUT; 1913 } else { 1914 std = ohci_alloc_std(sc); 1915 if (std == NULL) 1916 goto bad1; 1917 opipe->tail.td = std; 1918 tdphys = std->physaddr; 1919 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1920 } 1921 sed->ed.ed_flags = htole32( 1922 OHCI_ED_SET_FA(pipe->device->address) | 1923 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 1924 (pipe->device->speed == USB_SPEED_LOW ? 1925 OHCI_ED_SPEED : 0) | 1926 fmt | OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1927 sed->ed.ed_headp = htole32(tdphys | 1928 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0)); 1929 sed->ed.ed_tailp = htole32(tdphys); 1930 1931 switch (xfertype) { 1932 case UE_CONTROL: 1933 pipe->methods = &ohci_device_ctrl_methods; 1934 err = usb_allocmem(&sc->sc_bus, 1935 sizeof(usb_device_request_t), 1936 0, &opipe->u.ctl.reqdma); 1937 if (err) 1938 goto bad; 1939 s = splusb(); 1940 ohci_add_ed(sed, sc->sc_ctrl_head); 1941 splx(s); 1942 break; 1943 case UE_INTERRUPT: 1944 pipe->methods = &ohci_device_intr_methods; 1945 ival = pipe->interval; 1946 if (ival == USBD_DEFAULT_INTERVAL) 1947 ival = ed->bInterval; 1948 return (ohci_device_setintr(sc, opipe, ival)); 1949 case UE_ISOCHRONOUS: 1950 pipe->methods = &ohci_device_isoc_methods; 1951 return (ohci_setup_isoc(pipe)); 1952 case UE_BULK: 1953 pipe->methods = &ohci_device_bulk_methods; 1954 s = splusb(); 1955 ohci_add_ed(sed, sc->sc_bulk_head); 1956 splx(s); 1957 break; 1958 } 1959 } 1960 return (USBD_NORMAL_COMPLETION); 1961 1962 bad: 1963 if (std != NULL) 1964 ohci_free_std(sc, std); 1965 bad1: 1966 if (sed != NULL) 1967 ohci_free_sed(sc, sed); 1968 bad0: 1969 return (USBD_NOMEM); 1970 1971 } 1972 1973 /* 1974 * Work around the half configured control (default) pipe when setting 1975 * the address of a device. 1976 * 1977 * Because a single ED is setup per endpoint in ohci_open(), and the 1978 * control pipe is configured before we could have set the address 1979 * of the device or read the wMaxPacketSize of the endpoint, we have 1980 * to re-open the pipe twice here. 1981 */ 1982 int 1983 ohci_setaddr(struct usbd_device *dev, int addr) 1984 { 1985 /* Root Hub */ 1986 if (dev->depth == 0) 1987 return (0); 1988 1989 /* Re-establish the default pipe with the new max packet size. */ 1990 ohci_device_ctrl_close(dev->default_pipe); 1991 if (ohci_open(dev->default_pipe)) 1992 return (EINVAL); 1993 1994 if (usbd_set_address(dev, addr)) 1995 return (1); 1996 1997 dev->address = addr; 1998 1999 /* Re-establish the default pipe with the new address. */ 2000 ohci_device_ctrl_close(dev->default_pipe); 2001 if (ohci_open(dev->default_pipe)) 2002 return (EINVAL); 2003 2004 return (0); 2005 } 2006 2007 /* 2008 * Close a reqular pipe. 2009 * Assumes that there are no pending transactions. 2010 */ 2011 void 2012 ohci_close_pipe(struct usbd_pipe *pipe, struct ohci_soft_ed *head) 2013 { 2014 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2015 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2016 struct ohci_soft_ed *sed = opipe->sed; 2017 int s; 2018 2019 s = splusb(); 2020 #ifdef DIAGNOSTIC 2021 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2022 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2023 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2024 struct ohci_soft_td *std; 2025 std = ohci_hash_find_td(sc, letoh32(sed->ed.ed_headp)); 2026 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2027 "tl=0x%x pipe=%p, std=%p\n", sed, 2028 (int)letoh32(sed->ed.ed_headp), 2029 (int)letoh32(sed->ed.ed_tailp), 2030 pipe, std); 2031 #ifdef OHCI_DEBUG 2032 ohci_dump_ed(sed); 2033 if (std) 2034 ohci_dump_td(std); 2035 #endif 2036 usb_delay_ms(&sc->sc_bus, 2); 2037 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2038 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) 2039 printf("ohci_close_pipe: pipe still not empty\n"); 2040 } 2041 #endif 2042 ohci_rem_ed(sed, head); 2043 /* Make sure the host controller is not touching this ED */ 2044 usb_delay_ms(&sc->sc_bus, 1); 2045 splx(s); 2046 pipe->endpoint->savedtoggle = 2047 (letoh32(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2048 ohci_free_sed(sc, opipe->sed); 2049 } 2050 2051 /* 2052 * Abort a device request. 2053 * If this routine is called at splusb() it guarantees that the request 2054 * will be removed from the hardware scheduling and that the callback 2055 * for it will be called with USBD_CANCELLED status. 2056 * It's impossible to guarantee that the requested transfer will not 2057 * have happened since the hardware runs concurrently. 2058 * If the transaction has already happened we rely on the ordinary 2059 * interrupt processing to process it. 2060 */ 2061 void 2062 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2063 { 2064 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2065 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2066 struct ohci_soft_ed *sed = opipe->sed; 2067 struct ohci_soft_td *p, *n; 2068 ohci_physaddr_t headp; 2069 int s, hit; 2070 2071 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe, 2072 sed)); 2073 2074 if (sc->sc_bus.dying) { 2075 /* If we're dying, just do the software part. */ 2076 s = splusb(); 2077 xfer->status = status; /* make software ignore it */ 2078 timeout_del(&xfer->timeout_handle); 2079 usb_rem_task(xfer->device, &xfer->abort_task); 2080 usb_transfer_complete(xfer); 2081 splx(s); 2082 return; 2083 } 2084 2085 if (xfer->device->bus->intr_context || !curproc) 2086 panic("ohci_abort_xfer: not in process context"); 2087 2088 /* 2089 * Step 1: Make interrupt routine and hardware ignore xfer. 2090 */ 2091 s = splusb(); 2092 xfer->status = status; /* make software ignore it */ 2093 timeout_del(&xfer->timeout_handle); 2094 usb_rem_task(xfer->device, &xfer->abort_task); 2095 splx(s); 2096 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2097 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2098 2099 /* 2100 * Step 2: Wait until we know hardware has finished any possible 2101 * use of the xfer. Also make sure the soft interrupt routine 2102 * has run. 2103 */ 2104 usb_delay_ms(xfer->device->bus, 20); /* Hardware finishes in 1ms */ 2105 s = splusb(); 2106 sc->sc_softwake = 1; 2107 usb_schedsoftintr(&sc->sc_bus); 2108 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2109 splx(s); 2110 2111 /* 2112 * Step 3: Remove any vestiges of the xfer from the hardware. 2113 * The complication here is that the hardware may have executed 2114 * beyond the xfer we're trying to abort. So as we're scanning 2115 * the TDs of this xfer we check if the hardware points to 2116 * any of them. 2117 */ 2118 s = splusb(); /* XXX why? */ 2119 p = xfer->hcpriv; 2120 #ifdef DIAGNOSTIC 2121 if (p == NULL) { 2122 splx(s); 2123 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2124 return; 2125 } 2126 #endif 2127 #ifdef OHCI_DEBUG 2128 if (ohcidebug > 1) { 2129 DPRINTF(("ohci_abort_xfer: sed=\n")); 2130 ohci_dump_ed(sed); 2131 ohci_dump_tds(p); 2132 } 2133 #endif 2134 headp = letoh32(sed->ed.ed_headp) & OHCI_HEADMASK; 2135 hit = 0; 2136 for (; p->xfer == xfer; p = n) { 2137 hit |= headp == p->physaddr; 2138 n = p->nexttd; 2139 if (OHCI_TD_GET_CC(letoh32(p->td.td_flags)) == 2140 OHCI_CC_NOT_ACCESSED) 2141 ohci_free_std(sc, p); 2142 } 2143 /* Zap headp register if hardware pointed inside the xfer. */ 2144 if (hit) { 2145 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2146 (int)p->physaddr, (int)letoh32(sed->ed.ed_tailp))); 2147 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2148 } else { 2149 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2150 } 2151 2152 /* 2153 * Step 4: Turn on hardware again. 2154 */ 2155 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2156 2157 /* 2158 * Step 5: Execute callback. 2159 */ 2160 usb_transfer_complete(xfer); 2161 2162 splx(s); 2163 } 2164 2165 /* 2166 * Data structures and routines to emulate the root hub. 2167 */ 2168 usb_device_descriptor_t ohci_devd = { 2169 USB_DEVICE_DESCRIPTOR_SIZE, 2170 UDESC_DEVICE, /* type */ 2171 {0x00, 0x01}, /* USB version */ 2172 UDCLASS_HUB, /* class */ 2173 UDSUBCLASS_HUB, /* subclass */ 2174 UDPROTO_FSHUB, 2175 64, /* max packet */ 2176 {0},{0},{0x00,0x01}, /* device id */ 2177 1,2,0, /* string indices */ 2178 1 /* # of configurations */ 2179 }; 2180 2181 usb_config_descriptor_t ohci_confd = { 2182 USB_CONFIG_DESCRIPTOR_SIZE, 2183 UDESC_CONFIG, 2184 {USB_CONFIG_DESCRIPTOR_SIZE + 2185 USB_INTERFACE_DESCRIPTOR_SIZE + 2186 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2187 1, 2188 1, 2189 0, 2190 UC_BUS_POWERED | UC_SELF_POWERED, 2191 0 /* max power */ 2192 }; 2193 2194 usb_interface_descriptor_t ohci_ifcd = { 2195 USB_INTERFACE_DESCRIPTOR_SIZE, 2196 UDESC_INTERFACE, 2197 0, 2198 0, 2199 1, 2200 UICLASS_HUB, 2201 UISUBCLASS_HUB, 2202 UIPROTO_FSHUB, 2203 0 2204 }; 2205 2206 usb_endpoint_descriptor_t ohci_endpd = { 2207 USB_ENDPOINT_DESCRIPTOR_SIZE, 2208 UDESC_ENDPOINT, 2209 UE_DIR_IN | OHCI_INTR_ENDPT, 2210 UE_INTERRUPT, 2211 {8, 0}, /* max packet */ 2212 255 2213 }; 2214 2215 usb_hub_descriptor_t ohci_hubd = { 2216 USB_HUB_DESCRIPTOR_SIZE, 2217 UDESC_HUB, 2218 0, 2219 {0,0}, 2220 0, 2221 0, 2222 {0}, 2223 }; 2224 2225 /* 2226 * Simulate a hardware hub by handling all the necessary requests. 2227 */ 2228 usbd_status 2229 ohci_root_ctrl_transfer(struct usbd_xfer *xfer) 2230 { 2231 usbd_status err; 2232 2233 /* Insert last in queue. */ 2234 err = usb_insert_transfer(xfer); 2235 if (err) 2236 return (err); 2237 2238 /* Pipe isn't running, start first */ 2239 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2240 } 2241 2242 usbd_status 2243 ohci_root_ctrl_start(struct usbd_xfer *xfer) 2244 { 2245 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2246 usb_device_request_t *req; 2247 void *buf = NULL; 2248 int port, i; 2249 int s, len, value, index, l, totlen = 0; 2250 usb_port_status_t ps; 2251 usb_hub_descriptor_t hubd; 2252 usbd_status err; 2253 u_int32_t v; 2254 2255 if (sc->sc_bus.dying) 2256 return (USBD_IOERROR); 2257 2258 #ifdef DIAGNOSTIC 2259 if (!(xfer->rqflags & URQ_REQUEST)) 2260 /* XXX panic */ 2261 return (USBD_INVAL); 2262 #endif 2263 req = &xfer->request; 2264 2265 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2266 req->bmRequestType, req->bRequest)); 2267 2268 len = UGETW(req->wLength); 2269 value = UGETW(req->wValue); 2270 index = UGETW(req->wIndex); 2271 2272 if (len != 0) 2273 buf = KERNADDR(&xfer->dmabuf, 0); 2274 2275 #define C(x,y) ((x) | ((y) << 8)) 2276 switch(C(req->bRequest, req->bmRequestType)) { 2277 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2278 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2279 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2280 /* 2281 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2282 * for the integrated root hub. 2283 */ 2284 break; 2285 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2286 if (len > 0) { 2287 *(u_int8_t *)buf = sc->sc_conf; 2288 totlen = 1; 2289 } 2290 break; 2291 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2292 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2293 switch(value >> 8) { 2294 case UDESC_DEVICE: 2295 if ((value & 0xff) != 0) { 2296 err = USBD_IOERROR; 2297 goto ret; 2298 } 2299 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2300 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2301 memcpy(buf, &ohci_devd, l); 2302 break; 2303 case UDESC_CONFIG: 2304 if ((value & 0xff) != 0) { 2305 err = USBD_IOERROR; 2306 goto ret; 2307 } 2308 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2309 memcpy(buf, &ohci_confd, l); 2310 buf = (char *)buf + l; 2311 len -= l; 2312 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2313 totlen += l; 2314 memcpy(buf, &ohci_ifcd, l); 2315 buf = (char *)buf + l; 2316 len -= l; 2317 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2318 totlen += l; 2319 memcpy(buf, &ohci_endpd, l); 2320 break; 2321 case UDESC_STRING: 2322 if (len == 0) 2323 break; 2324 *(u_int8_t *)buf = 0; 2325 totlen = 1; 2326 switch (value & 0xff) { 2327 case 0: /* Language table */ 2328 totlen = usbd_str(buf, len, "\001"); 2329 break; 2330 case 1: /* Vendor */ 2331 totlen = usbd_str(buf, len, sc->sc_vendor); 2332 break; 2333 case 2: /* Product */ 2334 totlen = usbd_str(buf, len, "OHCI root hub"); 2335 break; 2336 } 2337 break; 2338 default: 2339 err = USBD_IOERROR; 2340 goto ret; 2341 } 2342 break; 2343 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2344 if (len > 0) { 2345 *(u_int8_t *)buf = 0; 2346 totlen = 1; 2347 } 2348 break; 2349 case C(UR_GET_STATUS, UT_READ_DEVICE): 2350 if (len > 1) { 2351 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2352 totlen = 2; 2353 } 2354 break; 2355 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2356 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2357 if (len > 1) { 2358 USETW(((usb_status_t *)buf)->wStatus, 0); 2359 totlen = 2; 2360 } 2361 break; 2362 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2363 if (value >= USB_MAX_DEVICES) { 2364 err = USBD_IOERROR; 2365 goto ret; 2366 } 2367 break; 2368 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2369 if (value != 0 && value != 1) { 2370 err = USBD_IOERROR; 2371 goto ret; 2372 } 2373 sc->sc_conf = value; 2374 break; 2375 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2376 break; 2377 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2378 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2379 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2380 err = USBD_IOERROR; 2381 goto ret; 2382 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2383 break; 2384 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2385 break; 2386 /* Hub requests */ 2387 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2388 break; 2389 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2390 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2391 "port=%d feature=%d\n", 2392 index, value)); 2393 if (index < 1 || index > sc->sc_noport) { 2394 err = USBD_IOERROR; 2395 goto ret; 2396 } 2397 port = OHCI_RH_PORT_STATUS(index); 2398 switch(value) { 2399 case UHF_PORT_ENABLE: 2400 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2401 break; 2402 case UHF_PORT_SUSPEND: 2403 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2404 break; 2405 case UHF_PORT_POWER: 2406 /* Yes, writing to the LOW_SPEED bit clears power. */ 2407 OWRITE4(sc, port, UPS_LOW_SPEED); 2408 break; 2409 case UHF_C_PORT_CONNECTION: 2410 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2411 break; 2412 case UHF_C_PORT_ENABLE: 2413 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2414 break; 2415 case UHF_C_PORT_SUSPEND: 2416 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2417 break; 2418 case UHF_C_PORT_OVER_CURRENT: 2419 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2420 break; 2421 case UHF_C_PORT_RESET: 2422 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2423 break; 2424 default: 2425 err = USBD_IOERROR; 2426 goto ret; 2427 } 2428 switch(value) { 2429 case UHF_C_PORT_CONNECTION: 2430 case UHF_C_PORT_ENABLE: 2431 case UHF_C_PORT_SUSPEND: 2432 case UHF_C_PORT_OVER_CURRENT: 2433 case UHF_C_PORT_RESET: 2434 /* Enable RHSC interrupt if condition is cleared. */ 2435 if ((OREAD4(sc, port) >> 16) == 0) 2436 ohci_rhsc_able(sc, 1); 2437 break; 2438 default: 2439 break; 2440 } 2441 break; 2442 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2443 if ((value & 0xff) != 0) { 2444 err = USBD_IOERROR; 2445 goto ret; 2446 } 2447 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2448 hubd = ohci_hubd; 2449 hubd.bNbrPorts = sc->sc_noport; 2450 USETW(hubd.wHubCharacteristics, 2451 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2452 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2453 /* XXX overcurrent */ 2454 ); 2455 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2456 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2457 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2458 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2459 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2460 l = min(len, hubd.bDescLength); 2461 totlen = l; 2462 memcpy(buf, &hubd, l); 2463 break; 2464 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2465 if (len != 4) { 2466 err = USBD_IOERROR; 2467 goto ret; 2468 } 2469 memset(buf, 0, len); /* ? XXX */ 2470 totlen = len; 2471 break; 2472 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2473 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2474 index)); 2475 if (index < 1 || index > sc->sc_noport) { 2476 err = USBD_IOERROR; 2477 goto ret; 2478 } 2479 if (len != 4) { 2480 err = USBD_IOERROR; 2481 goto ret; 2482 } 2483 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2484 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2485 v)); 2486 USETW(ps.wPortStatus, v); 2487 USETW(ps.wPortChange, v >> 16); 2488 l = min(len, sizeof ps); 2489 memcpy(buf, &ps, l); 2490 totlen = l; 2491 break; 2492 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2493 err = USBD_IOERROR; 2494 goto ret; 2495 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2496 break; 2497 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2498 if (index < 1 || index > sc->sc_noport) { 2499 err = USBD_IOERROR; 2500 goto ret; 2501 } 2502 port = OHCI_RH_PORT_STATUS(index); 2503 switch(value) { 2504 case UHF_PORT_ENABLE: 2505 OWRITE4(sc, port, UPS_PORT_ENABLED); 2506 break; 2507 case UHF_PORT_SUSPEND: 2508 OWRITE4(sc, port, UPS_SUSPEND); 2509 break; 2510 case UHF_PORT_RESET: 2511 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2512 index)); 2513 OWRITE4(sc, port, UPS_RESET); 2514 for (i = 0; i < 5; i++) { 2515 usb_delay_ms(&sc->sc_bus, 2516 USB_PORT_ROOT_RESET_DELAY); 2517 if (sc->sc_bus.dying) { 2518 err = USBD_IOERROR; 2519 goto ret; 2520 } 2521 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2522 break; 2523 } 2524 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2525 index, OREAD4(sc, port))); 2526 break; 2527 case UHF_PORT_POWER: 2528 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2529 "%d\n", index)); 2530 OWRITE4(sc, port, UPS_PORT_POWER); 2531 break; 2532 case UHF_PORT_DISOWN_TO_1_1: 2533 /* accept, but do nothing */ 2534 break; 2535 default: 2536 err = USBD_IOERROR; 2537 goto ret; 2538 } 2539 break; 2540 default: 2541 err = USBD_IOERROR; 2542 goto ret; 2543 } 2544 xfer->actlen = totlen; 2545 err = USBD_NORMAL_COMPLETION; 2546 ret: 2547 xfer->status = err; 2548 s = splusb(); 2549 usb_transfer_complete(xfer); 2550 splx(s); 2551 return (err); 2552 } 2553 2554 /* Abort a root control request. */ 2555 void 2556 ohci_root_ctrl_abort(struct usbd_xfer *xfer) 2557 { 2558 /* Nothing to do, all transfers are synchronous. */ 2559 } 2560 2561 /* Close the root pipe. */ 2562 void 2563 ohci_root_ctrl_close(struct usbd_pipe *pipe) 2564 { 2565 DPRINTF(("ohci_root_ctrl_close\n")); 2566 /* Nothing to do. */ 2567 } 2568 2569 usbd_status 2570 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2571 { 2572 usbd_status err; 2573 2574 /* Insert last in queue. */ 2575 err = usb_insert_transfer(xfer); 2576 if (err) 2577 return (err); 2578 2579 /* Pipe isn't running, start first */ 2580 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2581 } 2582 2583 usbd_status 2584 ohci_root_intr_start(struct usbd_xfer *xfer) 2585 { 2586 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2587 2588 if (sc->sc_bus.dying) 2589 return (USBD_IOERROR); 2590 2591 sc->sc_intrxfer = xfer; 2592 2593 return (USBD_IN_PROGRESS); 2594 } 2595 2596 void 2597 ohci_root_intr_abort(struct usbd_xfer *xfer) 2598 { 2599 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2600 int s; 2601 2602 sc->sc_intrxfer = NULL; 2603 2604 xfer->status = USBD_CANCELLED; 2605 s = splusb(); 2606 usb_transfer_complete(xfer); 2607 splx(s); 2608 } 2609 2610 void 2611 ohci_root_intr_close(struct usbd_pipe *pipe) 2612 { 2613 } 2614 2615 usbd_status 2616 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2617 { 2618 usbd_status err; 2619 2620 /* Insert last in queue. */ 2621 err = usb_insert_transfer(xfer); 2622 if (err) 2623 return (err); 2624 2625 /* Pipe isn't running, start first */ 2626 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2627 } 2628 2629 usbd_status 2630 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2631 { 2632 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2633 usbd_status err; 2634 2635 if (sc->sc_bus.dying) 2636 return (USBD_IOERROR); 2637 2638 #ifdef DIAGNOSTIC 2639 if (!(xfer->rqflags & URQ_REQUEST)) { 2640 /* XXX panic */ 2641 printf("ohci_device_ctrl_transfer: not a request\n"); 2642 return (USBD_INVAL); 2643 } 2644 #endif 2645 2646 err = ohci_device_request(xfer); 2647 if (err) 2648 return (err); 2649 2650 return (USBD_IN_PROGRESS); 2651 } 2652 2653 /* Abort a device control request. */ 2654 void 2655 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2656 { 2657 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2658 ohci_abort_xfer(xfer, USBD_CANCELLED); 2659 } 2660 2661 /* Close a device control pipe. */ 2662 void 2663 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2664 { 2665 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2666 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2667 2668 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2669 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2670 ohci_free_std(sc, opipe->tail.td); 2671 } 2672 2673 /************************/ 2674 2675 void 2676 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2677 { 2678 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2679 2680 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2681 } 2682 2683 usbd_status 2684 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2685 { 2686 usbd_status err; 2687 2688 /* Insert last in queue. */ 2689 err = usb_insert_transfer(xfer); 2690 if (err) 2691 return (err); 2692 2693 /* Pipe isn't running, start first */ 2694 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2695 } 2696 2697 usbd_status 2698 ohci_device_bulk_start(struct usbd_xfer *xfer) 2699 { 2700 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2701 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2702 struct ohci_soft_td *data, *tail, *tdp; 2703 struct ohci_soft_ed *sed; 2704 u_int len; 2705 int s, endpt; 2706 usbd_status err; 2707 2708 if (sc->sc_bus.dying) 2709 return (USBD_IOERROR); 2710 2711 #ifdef DIAGNOSTIC 2712 if (xfer->rqflags & URQ_REQUEST) { 2713 /* XXX panic */ 2714 printf("ohci_device_bulk_start: a request\n"); 2715 return (USBD_INVAL); 2716 } 2717 #endif 2718 2719 len = xfer->length; 2720 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2721 sed = opipe->sed; 2722 2723 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%u " 2724 "flags=%d endpt=%d\n", xfer, len, xfer->flags, endpt)); 2725 2726 /* Update device address */ 2727 sed->ed.ed_flags = htole32( 2728 (letoh32(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2729 OHCI_ED_SET_FA(xfer->device->address)); 2730 2731 /* Allocate a chain of new TDs (including a new tail). */ 2732 data = opipe->tail.td; 2733 err = ohci_alloc_std_chain(sc, len, xfer, data, &tail); 2734 /* We want interrupt at the end of the transfer. */ 2735 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2736 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2737 tail->flags |= OHCI_CALL_DONE; 2738 tail = tail->nexttd; /* point at sentinel */ 2739 if (err) 2740 return (err); 2741 2742 tail->xfer = NULL; 2743 xfer->hcpriv = data; 2744 2745 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2746 "td_cbp=0x%08x td_be=0x%08x\n", 2747 (int)letoh32(sed->ed.ed_flags), 2748 (int)letoh32(data->td.td_flags), 2749 (int)letoh32(data->td.td_cbp), 2750 (int)letoh32(data->td.td_be))); 2751 2752 #ifdef OHCI_DEBUG 2753 if (ohcidebug > 5) { 2754 ohci_dump_ed(sed); 2755 ohci_dump_tds(data); 2756 } 2757 #endif 2758 2759 /* Insert ED in schedule */ 2760 s = splusb(); 2761 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2762 tdp->xfer = xfer; 2763 } 2764 sed->ed.ed_tailp = htole32(tail->physaddr); 2765 opipe->tail.td = tail; 2766 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2767 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2768 if (xfer->timeout && !sc->sc_bus.use_polling) { 2769 timeout_del(&xfer->timeout_handle); 2770 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer); 2771 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 2772 } 2773 2774 #if 0 2775 /* This goes wrong if we are too slow. */ 2776 if (ohcidebug > 10) { 2777 delay(10000); 2778 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2779 OREAD4(sc, OHCI_COMMAND_STATUS))); 2780 ohci_dump_ed(sed); 2781 ohci_dump_tds(data); 2782 } 2783 #endif 2784 2785 splx(s); 2786 2787 return (USBD_IN_PROGRESS); 2788 } 2789 2790 void 2791 ohci_device_bulk_abort(struct usbd_xfer *xfer) 2792 { 2793 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2794 ohci_abort_xfer(xfer, USBD_CANCELLED); 2795 } 2796 2797 /* 2798 * Close a device bulk pipe. 2799 */ 2800 void 2801 ohci_device_bulk_close(struct usbd_pipe *pipe) 2802 { 2803 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2804 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2805 2806 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2807 ohci_close_pipe(pipe, sc->sc_bulk_head); 2808 ohci_free_std(sc, opipe->tail.td); 2809 } 2810 2811 /************************/ 2812 2813 usbd_status 2814 ohci_device_intr_transfer(struct usbd_xfer *xfer) 2815 { 2816 usbd_status err; 2817 2818 /* Insert last in queue. */ 2819 err = usb_insert_transfer(xfer); 2820 if (err) 2821 return (err); 2822 2823 /* Pipe isn't running, start first */ 2824 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2825 } 2826 2827 usbd_status 2828 ohci_device_intr_start(struct usbd_xfer *xfer) 2829 { 2830 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2831 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2832 struct ohci_soft_ed *sed = opipe->sed; 2833 struct ohci_soft_td *data, *tail; 2834 int s, len, endpt; 2835 2836 if (sc->sc_bus.dying) 2837 return (USBD_IOERROR); 2838 2839 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%u " 2840 "flags=%d priv=%p\n", 2841 xfer, xfer->length, xfer->flags, xfer->priv)); 2842 2843 #ifdef DIAGNOSTIC 2844 if (xfer->rqflags & URQ_REQUEST) 2845 panic("ohci_device_intr_transfer: a request"); 2846 #endif 2847 2848 len = xfer->length; 2849 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2850 2851 data = opipe->tail.td; 2852 tail = ohci_alloc_std(sc); 2853 if (tail == NULL) 2854 return (USBD_NOMEM); 2855 tail->xfer = NULL; 2856 2857 data->td.td_flags = htole32( 2858 (usbd_xfer_isread(xfer) ? OHCI_TD_IN : OHCI_TD_OUT) | 2859 OHCI_TD_NOCC | 2860 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2861 if (xfer->flags & USBD_SHORT_XFER_OK) 2862 data->td.td_flags |= htole32(OHCI_TD_R); 2863 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2864 data->nexttd = tail; 2865 data->td.td_nexttd = htole32(tail->physaddr); 2866 data->td.td_be = htole32(letoh32(data->td.td_cbp) + len - 1); 2867 data->len = len; 2868 data->xfer = xfer; 2869 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2870 xfer->hcpriv = data; 2871 2872 #ifdef OHCI_DEBUG 2873 if (ohcidebug > 5) { 2874 DPRINTF(("ohci_device_intr_transfer:\n")); 2875 ohci_dump_ed(sed); 2876 ohci_dump_tds(data); 2877 } 2878 #endif 2879 2880 /* Insert ED in schedule */ 2881 s = splusb(); 2882 sed->ed.ed_tailp = htole32(tail->physaddr); 2883 opipe->tail.td = tail; 2884 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2885 2886 #if 0 2887 /* 2888 * This goes horribly wrong, printing thousands of descriptors, 2889 * because false references are followed due to the fact that the 2890 * TD is gone. 2891 */ 2892 if (ohcidebug > 5) { 2893 usb_delay_ms(&sc->sc_bus, 5); 2894 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2895 OREAD4(sc, OHCI_COMMAND_STATUS))); 2896 ohci_dump_ed(sed); 2897 ohci_dump_tds(data); 2898 } 2899 #endif 2900 splx(s); 2901 2902 return (USBD_IN_PROGRESS); 2903 } 2904 2905 void 2906 ohci_device_intr_abort(struct usbd_xfer *xfer) 2907 { 2908 KASSERT(!xfer->pipe->repeat || xfer->pipe->intrxfer == xfer); 2909 2910 ohci_abort_xfer(xfer, USBD_CANCELLED); 2911 } 2912 2913 /* Close a device interrupt pipe. */ 2914 void 2915 ohci_device_intr_close(struct usbd_pipe *pipe) 2916 { 2917 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2918 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2919 int nslots = opipe->u.intr.nslots; 2920 int pos = opipe->u.intr.pos; 2921 int j; 2922 struct ohci_soft_ed *p, *sed = opipe->sed; 2923 int s; 2924 2925 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2926 pipe, nslots, pos)); 2927 s = splusb(); 2928 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2929 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2930 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) 2931 usb_delay_ms(&sc->sc_bus, 2); 2932 2933 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2934 ; 2935 #ifdef DIAGNOSTIC 2936 if (p == NULL) 2937 panic("ohci_device_intr_close: ED not found"); 2938 #endif 2939 p->next = sed->next; 2940 p->ed.ed_nexted = sed->ed.ed_nexted; 2941 splx(s); 2942 2943 for (j = 0; j < nslots; j++) 2944 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2945 2946 ohci_free_std(sc, opipe->tail.td); 2947 ohci_free_sed(sc, opipe->sed); 2948 } 2949 2950 usbd_status 2951 ohci_device_setintr(struct ohci_softc *sc, struct ohci_pipe *opipe, int ival) 2952 { 2953 int i, j, s, best; 2954 u_int npoll, slow, shigh, nslots; 2955 u_int bestbw, bw; 2956 struct ohci_soft_ed *hsed, *sed = opipe->sed; 2957 2958 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2959 if (ival == 0) { 2960 printf("ohci_setintr: 0 interval\n"); 2961 return (USBD_INVAL); 2962 } 2963 2964 npoll = OHCI_NO_INTRS; 2965 while (npoll > ival) 2966 npoll /= 2; 2967 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2968 2969 /* 2970 * We now know which level in the tree the ED must go into. 2971 * Figure out which slot has most bandwidth left over. 2972 * Slots to examine: 2973 * npoll 2974 * 1 0 2975 * 2 1 2 2976 * 4 3 4 5 6 2977 * 8 7 8 9 10 11 12 13 14 2978 * N (N-1) .. (N-1+N-1) 2979 */ 2980 slow = npoll-1; 2981 shigh = slow + npoll; 2982 nslots = OHCI_NO_INTRS / npoll; 2983 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2984 bw = 0; 2985 for (j = 0; j < nslots; j++) 2986 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2987 if (bw < bestbw) { 2988 best = i; 2989 bestbw = bw; 2990 } 2991 } 2992 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2993 best, slow, shigh, bestbw)); 2994 2995 s = splusb(); 2996 hsed = sc->sc_eds[best]; 2997 sed->next = hsed->next; 2998 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2999 hsed->next = sed; 3000 hsed->ed.ed_nexted = htole32(sed->physaddr); 3001 splx(s); 3002 3003 for (j = 0; j < nslots; j++) 3004 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3005 opipe->u.intr.nslots = nslots; 3006 opipe->u.intr.pos = best; 3007 3008 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3009 return (USBD_NORMAL_COMPLETION); 3010 } 3011 3012 /***********************/ 3013 3014 usbd_status 3015 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3016 { 3017 usbd_status err; 3018 3019 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3020 3021 /* Put it on our queue, */ 3022 err = usb_insert_transfer(xfer); 3023 3024 /* bail out on error, */ 3025 if (err && err != USBD_IN_PROGRESS) 3026 return (err); 3027 3028 /* XXX should check inuse here */ 3029 3030 /* insert into schedule, */ 3031 ohci_device_isoc_enter(xfer); 3032 3033 /* and start if the pipe wasn't running */ 3034 if (!err) 3035 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3036 3037 return (err); 3038 } 3039 3040 void 3041 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3042 { 3043 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3044 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3045 struct ohci_soft_ed *sed = opipe->sed; 3046 struct iso *iso = &opipe->u.iso; 3047 struct ohci_soft_itd *sitd, *nsitd; 3048 ohci_physaddr_t buf, offs, noffs, bp0; 3049 int i, ncur, nframes; 3050 int s; 3051 3052 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3053 "nframes=%d\n", 3054 iso->inuse, iso->next, xfer, xfer->nframes)); 3055 3056 if (sc->sc_bus.dying) 3057 return; 3058 3059 if (iso->next == -1) { 3060 /* Not in use yet, schedule it a few frames ahead. */ 3061 iso->next = letoh32(sc->sc_hcca->hcca_frame_number) + 5; 3062 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3063 iso->next)); 3064 } 3065 3066 sitd = opipe->tail.itd; 3067 buf = DMAADDR(&xfer->dmabuf, 0); 3068 bp0 = OHCI_PAGE(buf); 3069 offs = OHCI_PAGE_OFFSET(buf); 3070 nframes = xfer->nframes; 3071 xfer->hcpriv = sitd; 3072 for (i = ncur = 0; i < nframes; i++, ncur++) { 3073 noffs = offs + xfer->frlengths[i]; 3074 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3075 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3076 3077 /* Allocate next ITD */ 3078 nsitd = ohci_alloc_sitd(sc); 3079 if (nsitd == NULL) { 3080 /* XXX what now? */ 3081 printf("%s: isoc TD alloc failed\n", 3082 sc->sc_bus.bdev.dv_xname); 3083 return; 3084 } 3085 3086 /* Fill current ITD */ 3087 sitd->itd.itd_flags = htole32( 3088 OHCI_ITD_NOCC | 3089 OHCI_ITD_SET_SF(iso->next) | 3090 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3091 OHCI_ITD_SET_FC(ncur)); 3092 sitd->itd.itd_bp0 = htole32(bp0); 3093 sitd->nextitd = nsitd; 3094 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3095 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3096 sitd->xfer = xfer; 3097 sitd->flags = 0; 3098 3099 sitd = nsitd; 3100 iso->next = iso->next + ncur; 3101 bp0 = OHCI_PAGE(buf + offs); 3102 ncur = 0; 3103 } 3104 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3105 offs = noffs; 3106 } 3107 nsitd = ohci_alloc_sitd(sc); 3108 if (nsitd == NULL) { 3109 /* XXX what now? */ 3110 printf("%s: isoc TD alloc failed\n", 3111 sc->sc_bus.bdev.dv_xname); 3112 return; 3113 } 3114 /* Fixup last used ITD */ 3115 sitd->itd.itd_flags = htole32( 3116 OHCI_ITD_NOCC | 3117 OHCI_ITD_SET_SF(iso->next) | 3118 OHCI_ITD_SET_DI(0) | 3119 OHCI_ITD_SET_FC(ncur)); 3120 sitd->itd.itd_bp0 = htole32(bp0); 3121 sitd->nextitd = nsitd; 3122 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3123 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3124 sitd->xfer = xfer; 3125 sitd->flags = OHCI_CALL_DONE; 3126 3127 iso->next = iso->next + ncur; 3128 iso->inuse += nframes; 3129 3130 xfer->actlen = offs; /* XXX pretend we did it all */ 3131 3132 xfer->status = USBD_IN_PROGRESS; 3133 3134 #ifdef OHCI_DEBUG 3135 if (ohcidebug > 5) { 3136 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3137 letoh32(sc->sc_hcca->hcca_frame_number))); 3138 ohci_dump_itds(xfer->hcpriv); 3139 ohci_dump_ed(sed); 3140 } 3141 #endif 3142 3143 s = splusb(); 3144 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3145 opipe->tail.itd = nsitd; 3146 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3147 splx(s); 3148 3149 #ifdef OHCI_DEBUG 3150 if (ohcidebug > 5) { 3151 delay(150000); 3152 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3153 letoh32(sc->sc_hcca->hcca_frame_number))); 3154 ohci_dump_itds(xfer->hcpriv); 3155 ohci_dump_ed(sed); 3156 } 3157 #endif 3158 } 3159 3160 usbd_status 3161 ohci_device_isoc_start(struct usbd_xfer *xfer) 3162 { 3163 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3164 3165 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3166 3167 if (sc->sc_bus.dying) 3168 return (USBD_IOERROR); 3169 3170 #ifdef DIAGNOSTIC 3171 if (xfer->status != USBD_IN_PROGRESS) 3172 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3173 #endif 3174 3175 return (USBD_IN_PROGRESS); 3176 } 3177 3178 void 3179 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3180 { 3181 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3182 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3183 struct ohci_soft_ed *sed; 3184 struct ohci_soft_itd *sitd; 3185 int s; 3186 3187 s = splusb(); 3188 3189 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3190 3191 /* Transfer is already done. */ 3192 if (xfer->status != USBD_NOT_STARTED && 3193 xfer->status != USBD_IN_PROGRESS) { 3194 splx(s); 3195 printf("ohci_device_isoc_abort: early return\n"); 3196 return; 3197 } 3198 3199 /* Give xfer the requested abort code. */ 3200 xfer->status = USBD_CANCELLED; 3201 3202 sed = opipe->sed; 3203 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3204 3205 sitd = xfer->hcpriv; 3206 #ifdef DIAGNOSTIC 3207 if (sitd == NULL) { 3208 splx(s); 3209 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3210 return; 3211 } 3212 #endif 3213 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3214 #ifdef DIAGNOSTIC 3215 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3216 sitd->isdone = 1; 3217 #endif 3218 } 3219 3220 splx(s); 3221 3222 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3223 3224 s = splusb(); 3225 3226 /* Run callback. */ 3227 usb_transfer_complete(xfer); 3228 3229 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3230 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3231 3232 splx(s); 3233 } 3234 3235 void 3236 ohci_device_isoc_done(struct usbd_xfer *xfer) 3237 { 3238 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3239 } 3240 3241 usbd_status 3242 ohci_setup_isoc(struct usbd_pipe *pipe) 3243 { 3244 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3245 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 3246 struct iso *iso = &opipe->u.iso; 3247 int s; 3248 3249 iso->next = -1; 3250 iso->inuse = 0; 3251 3252 s = splusb(); 3253 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3254 splx(s); 3255 3256 return (USBD_NORMAL_COMPLETION); 3257 } 3258 3259 void 3260 ohci_device_isoc_close(struct usbd_pipe *pipe) 3261 { 3262 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3263 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 3264 3265 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3266 ohci_close_pipe(pipe, sc->sc_isoc_head); 3267 #ifdef DIAGNOSTIC 3268 opipe->tail.itd->isdone = 1; 3269 #endif 3270 ohci_free_sitd(sc, opipe->tail.itd); 3271 } 3272