1 /* $OpenBSD: ohci.c,v 1.24 2001/10/31 04:24:44 nate Exp $ */ 2 /* $NetBSD: ohci.c,v 1.104 2001/09/28 23:57:21 augustss Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the NetBSD 24 * Foundation, Inc. and its contributors. 25 * 4. Neither the name of The NetBSD Foundation nor the names of its 26 * contributors may be used to endorse or promote products derived 27 * from this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 30 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 31 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 32 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 33 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 * POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42 /* 43 * USB Open Host Controller driver. 44 * 45 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 46 * USB spec: http://www.usb.org/developers/data/usbspec.zip 47 */ 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/malloc.h> 52 #if defined(__NetBSD__) || defined(__OpenBSD__) 53 #include <sys/kernel.h> 54 #include <sys/device.h> 55 #include <sys/select.h> 56 #elif defined(__FreeBSD__) 57 #include <sys/module.h> 58 #include <sys/bus.h> 59 #include <machine/bus_pio.h> 60 #include <machine/bus_memio.h> 61 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 62 #include <machine/cpu.h> 63 #endif 64 #endif 65 #include <sys/proc.h> 66 #include <sys/queue.h> 67 68 #include <machine/bus.h> 69 #include <machine/endian.h> 70 71 #include <dev/usb/usb.h> 72 #include <dev/usb/usbdi.h> 73 #include <dev/usb/usbdivar.h> 74 #include <dev/usb/usb_mem.h> 75 #include <dev/usb/usb_quirks.h> 76 77 #include <dev/usb/ohcireg.h> 78 #include <dev/usb/ohcivar.h> 79 80 #if defined(__FreeBSD__) 81 #include <machine/clock.h> 82 83 #define delay(d) DELAY(d) 84 #endif 85 86 #if defined(__OpenBSD__) 87 struct cfdriver ohci_cd = { 88 NULL, "ohci", DV_DULL 89 }; 90 #endif 91 92 #ifdef OHCI_DEBUG 93 #define DPRINTF(x) if (ohcidebug) logprintf x 94 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 95 int ohcidebug = 0; 96 #ifndef __NetBSD__ 97 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 98 #endif 99 #else 100 #define DPRINTF(x) 101 #define DPRINTFN(n,x) 102 #endif 103 104 /* 105 * The OHCI controller is little endian, so on big endian machines 106 * the data strored in memory needs to be swapped. 107 */ 108 #if defined(__FreeBSD__) 109 #if BYTE_ORDER == BIG_ENDIAN 110 #define htole32(x) (bswap32(x)) 111 #define le32toh(x) (bswap32(x)) 112 #else 113 #define htole32(x) (x) 114 #define le32toh(x) (x) 115 #endif 116 #endif 117 118 struct ohci_pipe; 119 120 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 121 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 122 123 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 124 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 125 126 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 127 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 128 129 #if 0 130 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 131 ohci_soft_td_t *); 132 #endif 133 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 134 ohci_softc_t *, int, int, usbd_xfer_handle, 135 ohci_soft_td_t *, ohci_soft_td_t **); 136 137 Static void ohci_shutdown(void *v); 138 Static void ohci_power(int, void *); 139 Static usbd_status ohci_open(usbd_pipe_handle); 140 Static void ohci_poll(struct usbd_bus *); 141 Static void ohci_softintr(void *); 142 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 143 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 144 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 145 146 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 147 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 149 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 151 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 152 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 154 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 155 156 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 157 Static void ohci_device_isoc_enter(usbd_xfer_handle); 158 159 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 160 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 161 162 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 163 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 164 165 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 166 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 167 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 168 Static void ohci_root_ctrl_close(usbd_pipe_handle); 169 Static void ohci_root_ctrl_done(usbd_xfer_handle); 170 171 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 172 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 173 Static void ohci_root_intr_abort(usbd_xfer_handle); 174 Static void ohci_root_intr_close(usbd_pipe_handle); 175 Static void ohci_root_intr_done(usbd_xfer_handle); 176 177 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 178 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 179 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 180 Static void ohci_device_ctrl_close(usbd_pipe_handle); 181 Static void ohci_device_ctrl_done(usbd_xfer_handle); 182 183 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 184 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 185 Static void ohci_device_bulk_abort(usbd_xfer_handle); 186 Static void ohci_device_bulk_close(usbd_pipe_handle); 187 Static void ohci_device_bulk_done(usbd_xfer_handle); 188 189 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 190 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 191 Static void ohci_device_intr_abort(usbd_xfer_handle); 192 Static void ohci_device_intr_close(usbd_pipe_handle); 193 Static void ohci_device_intr_done(usbd_xfer_handle); 194 195 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 196 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 197 Static void ohci_device_isoc_abort(usbd_xfer_handle); 198 Static void ohci_device_isoc_close(usbd_pipe_handle); 199 Static void ohci_device_isoc_done(usbd_xfer_handle); 200 201 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 202 struct ohci_pipe *pipe, int ival); 203 204 Static int ohci_str(usb_string_descriptor_t *, int, char *); 205 206 Static void ohci_timeout(void *); 207 Static void ohci_rhsc_able(ohci_softc_t *, int); 208 209 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 210 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 211 Static void ohci_abort_xfer_end(void *); 212 213 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 214 Static void ohci_noop(usbd_pipe_handle pipe); 215 216 #ifdef OHCI_DEBUG 217 Static void ohci_dumpregs(ohci_softc_t *); 218 Static void ohci_dump_tds(ohci_soft_td_t *); 219 Static void ohci_dump_td(ohci_soft_td_t *); 220 Static void ohci_dump_ed(ohci_soft_ed_t *); 221 Static void ohci_dump_itd(ohci_soft_itd_t *); 222 Static void ohci_dump_itds(ohci_soft_itd_t *); 223 #endif 224 225 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 226 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 227 #define OWRITE1(sc, r, x) \ 228 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 229 #define OWRITE2(sc, r, x) \ 230 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 231 #define OWRITE4(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 234 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 235 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 236 237 /* Reverse the bits in a value 0 .. 31 */ 238 Static u_int8_t revbits[OHCI_NO_INTRS] = 239 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 240 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 241 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 242 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 243 244 struct ohci_pipe { 245 struct usbd_pipe pipe; 246 ohci_soft_ed_t *sed; 247 union { 248 ohci_soft_td_t *td; 249 ohci_soft_itd_t *itd; 250 } tail; 251 /* Info needed for different pipe kinds. */ 252 union { 253 /* Control pipe */ 254 struct { 255 usb_dma_t reqdma; 256 u_int length; 257 ohci_soft_td_t *setup, *data, *stat; 258 } ctl; 259 /* Interrupt pipe */ 260 struct { 261 int nslots; 262 int pos; 263 } intr; 264 /* Bulk pipe */ 265 struct { 266 u_int length; 267 int isread; 268 } bulk; 269 /* Iso pipe */ 270 struct iso { 271 int next, inuse; 272 } iso; 273 } u; 274 }; 275 276 #define OHCI_INTR_ENDPT 1 277 278 Static struct usbd_bus_methods ohci_bus_methods = { 279 ohci_open, 280 ohci_softintr, 281 ohci_poll, 282 ohci_allocm, 283 ohci_freem, 284 ohci_allocx, 285 ohci_freex, 286 }; 287 288 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 289 ohci_root_ctrl_transfer, 290 ohci_root_ctrl_start, 291 ohci_root_ctrl_abort, 292 ohci_root_ctrl_close, 293 ohci_noop, 294 ohci_root_ctrl_done, 295 }; 296 297 Static struct usbd_pipe_methods ohci_root_intr_methods = { 298 ohci_root_intr_transfer, 299 ohci_root_intr_start, 300 ohci_root_intr_abort, 301 ohci_root_intr_close, 302 ohci_noop, 303 ohci_root_intr_done, 304 }; 305 306 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 307 ohci_device_ctrl_transfer, 308 ohci_device_ctrl_start, 309 ohci_device_ctrl_abort, 310 ohci_device_ctrl_close, 311 ohci_noop, 312 ohci_device_ctrl_done, 313 }; 314 315 Static struct usbd_pipe_methods ohci_device_intr_methods = { 316 ohci_device_intr_transfer, 317 ohci_device_intr_start, 318 ohci_device_intr_abort, 319 ohci_device_intr_close, 320 ohci_device_clear_toggle, 321 ohci_device_intr_done, 322 }; 323 324 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 325 ohci_device_bulk_transfer, 326 ohci_device_bulk_start, 327 ohci_device_bulk_abort, 328 ohci_device_bulk_close, 329 ohci_device_clear_toggle, 330 ohci_device_bulk_done, 331 }; 332 333 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 334 ohci_device_isoc_transfer, 335 ohci_device_isoc_start, 336 ohci_device_isoc_abort, 337 ohci_device_isoc_close, 338 ohci_noop, 339 ohci_device_isoc_done, 340 }; 341 342 #if defined(__NetBSD__) || defined(__OpenBSD__) 343 int 344 ohci_activate(device_ptr_t self, enum devact act) 345 { 346 struct ohci_softc *sc = (struct ohci_softc *)self; 347 int rv = 0; 348 349 switch (act) { 350 case DVACT_ACTIVATE: 351 return (EOPNOTSUPP); 352 break; 353 354 case DVACT_DEACTIVATE: 355 if (sc->sc_child != NULL) 356 rv = config_deactivate(sc->sc_child); 357 sc->sc_dying = 1; 358 break; 359 } 360 return (rv); 361 } 362 363 int 364 ohci_detach(struct ohci_softc *sc, int flags) 365 { 366 int rv = 0; 367 368 if (sc->sc_child != NULL) 369 rv = config_detach(sc->sc_child, flags); 370 371 if (rv != 0) 372 return (rv); 373 374 #if defined(__NetBSD__) || defined(__OpenBSD__) 375 powerhook_disestablish(sc->sc_powerhook); 376 shutdownhook_disestablish(sc->sc_shutdownhook); 377 #endif 378 379 /* free data structures XXX */ 380 381 return (rv); 382 } 383 #endif 384 385 ohci_soft_ed_t * 386 ohci_alloc_sed(ohci_softc_t *sc) 387 { 388 ohci_soft_ed_t *sed; 389 usbd_status err; 390 int i, offs; 391 usb_dma_t dma; 392 393 if (sc->sc_freeeds == NULL) { 394 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 395 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 396 OHCI_ED_ALIGN, &dma); 397 if (err) 398 return (0); 399 for(i = 0; i < OHCI_SED_CHUNK; i++) { 400 offs = i * OHCI_SED_SIZE; 401 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 402 sed->physaddr = DMAADDR(&dma) + offs; 403 sed->next = sc->sc_freeeds; 404 sc->sc_freeeds = sed; 405 } 406 } 407 sed = sc->sc_freeeds; 408 sc->sc_freeeds = sed->next; 409 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 410 sed->next = 0; 411 return (sed); 412 } 413 414 void 415 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 416 { 417 sed->next = sc->sc_freeeds; 418 sc->sc_freeeds = sed; 419 } 420 421 ohci_soft_td_t * 422 ohci_alloc_std(ohci_softc_t *sc) 423 { 424 ohci_soft_td_t *std; 425 usbd_status err; 426 int i, offs; 427 usb_dma_t dma; 428 int s; 429 430 if (sc->sc_freetds == NULL) { 431 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 432 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 433 OHCI_TD_ALIGN, &dma); 434 if (err) 435 return (NULL); 436 s = splusb(); 437 for(i = 0; i < OHCI_STD_CHUNK; i++) { 438 offs = i * OHCI_STD_SIZE; 439 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 440 std->physaddr = DMAADDR(&dma) + offs; 441 std->nexttd = sc->sc_freetds; 442 sc->sc_freetds = std; 443 } 444 splx(s); 445 } 446 447 s = splusb(); 448 std = sc->sc_freetds; 449 sc->sc_freetds = std->nexttd; 450 memset(&std->td, 0, sizeof(ohci_td_t)); 451 std->nexttd = NULL; 452 std->xfer = NULL; 453 ohci_hash_add_td(sc, std); 454 splx(s); 455 456 return (std); 457 } 458 459 void 460 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 461 { 462 int s; 463 464 s = splusb(); 465 ohci_hash_rem_td(sc, std); 466 std->nexttd = sc->sc_freetds; 467 sc->sc_freetds = std; 468 splx(s); 469 } 470 471 usbd_status 472 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 473 int alen, int rd, usbd_xfer_handle xfer, 474 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 475 { 476 ohci_soft_td_t *next, *cur; 477 ohci_physaddr_t dataphys, dataphysend; 478 u_int32_t tdflags; 479 int len, curlen; 480 usb_dma_t *dma = &xfer->dmabuf; 481 u_int16_t flags = xfer->flags; 482 483 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 484 485 len = alen; 486 cur = sp; 487 dataphys = DMAADDR(dma); 488 dataphysend = OHCI_PAGE(dataphys + len - 1); 489 tdflags = htole32( 490 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 491 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 492 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 493 494 for (;;) { 495 next = ohci_alloc_std(sc); 496 if (next == NULL) 497 goto nomem; 498 499 /* The OHCI hardware can handle at most one page crossing. */ 500 if (OHCI_PAGE(dataphys) == dataphysend || 501 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 502 /* we can handle it in this TD */ 503 curlen = len; 504 } else { 505 /* must use multiple TDs, fill as much as possible. */ 506 curlen = 2 * OHCI_PAGE_SIZE - 507 (dataphys & (OHCI_PAGE_SIZE-1)); 508 /* the length must be a multiple of the max size */ 509 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 510 #ifdef DIAGNOSTIC 511 if (curlen == 0) 512 panic("ohci_alloc_std: curlen == 0\n"); 513 #endif 514 } 515 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 516 "dataphysend=0x%08x len=%d curlen=%d\n", 517 dataphys, dataphysend, 518 len, curlen)); 519 len -= curlen; 520 521 cur->td.td_flags = tdflags; 522 cur->td.td_cbp = htole32(dataphys); 523 cur->nexttd = next; 524 cur->td.td_nexttd = htole32(next->physaddr); 525 cur->td.td_be = htole32(dataphys + curlen - 1); 526 cur->len = curlen; 527 cur->flags = OHCI_ADD_LEN; 528 cur->xfer = xfer; 529 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 530 dataphys, dataphys + curlen - 1)); 531 if (len == 0) 532 break; 533 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 534 dataphys += curlen; 535 cur = next; 536 } 537 if ((flags & USBD_FORCE_SHORT_XFER) && 538 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 539 /* Force a 0 length transfer at the end. */ 540 541 cur = next; 542 next = ohci_alloc_std(sc); 543 if (next == NULL) 544 goto nomem; 545 546 cur->td.td_flags = tdflags; 547 cur->td.td_cbp = 0; /* indicate 0 length packet */ 548 cur->nexttd = next; 549 cur->td.td_nexttd = htole32(next->physaddr); 550 cur->td.td_be = ~0; 551 cur->len = 0; 552 cur->flags = 0; 553 cur->xfer = xfer; 554 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 555 } 556 *ep = cur; 557 558 return (USBD_NORMAL_COMPLETION); 559 560 nomem: 561 /* XXX free chain */ 562 return (USBD_NOMEM); 563 } 564 565 #if 0 566 Static void 567 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 568 ohci_soft_td_t *stdend) 569 { 570 ohci_soft_td_t *p; 571 572 for (; std != stdend; std = p) { 573 p = std->nexttd; 574 ohci_free_std(sc, std); 575 } 576 } 577 #endif 578 579 ohci_soft_itd_t * 580 ohci_alloc_sitd(ohci_softc_t *sc) 581 { 582 ohci_soft_itd_t *sitd; 583 usbd_status err; 584 int i, s, offs; 585 usb_dma_t dma; 586 587 if (sc->sc_freeitds == NULL) { 588 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 589 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 590 OHCI_ITD_ALIGN, &dma); 591 if (err) 592 return (NULL); 593 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 594 offs = i * OHCI_SITD_SIZE; 595 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 596 sitd->physaddr = DMAADDR(&dma) + offs; 597 sitd->nextitd = sc->sc_freeitds; 598 sc->sc_freeitds = sitd; 599 } 600 } 601 602 s = splusb(); 603 sitd = sc->sc_freeitds; 604 sc->sc_freeitds = sitd->nextitd; 605 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 606 sitd->nextitd = NULL; 607 sitd->xfer = NULL; 608 ohci_hash_add_itd(sc, sitd); 609 splx(s); 610 611 #ifdef DIAGNOSTIC 612 sitd->isdone = 0; 613 #endif 614 615 return (sitd); 616 } 617 618 void 619 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 620 { 621 int s; 622 623 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 624 625 #ifdef DIAGNOSTIC 626 if (!sitd->isdone) { 627 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 628 return; 629 } 630 #endif 631 632 s = splusb(); 633 ohci_hash_rem_itd(sc, sitd); 634 sitd->nextitd = sc->sc_freeitds; 635 sc->sc_freeitds = sitd; 636 splx(s); 637 } 638 639 usbd_status 640 ohci_init(ohci_softc_t *sc) 641 { 642 ohci_soft_ed_t *sed, *psed; 643 usbd_status err; 644 int i; 645 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 646 647 DPRINTF(("ohci_init: start\n")); 648 #if defined(__OpenBSD__) 649 printf(","); 650 #else 651 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 652 #endif 653 rev = OREAD4(sc, OHCI_REVISION); 654 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 655 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 656 657 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 658 printf("%s: unsupported OHCI revision\n", 659 USBDEVNAME(sc->sc_bus.bdev)); 660 sc->sc_bus.usbrev = USBREV_UNKNOWN; 661 return (USBD_INVAL); 662 } 663 sc->sc_bus.usbrev = USBREV_1_0; 664 665 for (i = 0; i < OHCI_HASH_SIZE; i++) 666 LIST_INIT(&sc->sc_hash_tds[i]); 667 for (i = 0; i < OHCI_HASH_SIZE; i++) 668 LIST_INIT(&sc->sc_hash_itds[i]); 669 670 SIMPLEQ_INIT(&sc->sc_free_xfers); 671 672 /* XXX determine alignment by R/W */ 673 /* Allocate the HCCA area. */ 674 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 675 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 676 if (err) 677 return (err); 678 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 679 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 680 681 sc->sc_eintrs = OHCI_NORMAL_INTRS; 682 683 /* Allocate dummy ED that starts the control list. */ 684 sc->sc_ctrl_head = ohci_alloc_sed(sc); 685 if (sc->sc_ctrl_head == NULL) { 686 err = USBD_NOMEM; 687 goto bad1; 688 } 689 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 690 691 /* Allocate dummy ED that starts the bulk list. */ 692 sc->sc_bulk_head = ohci_alloc_sed(sc); 693 if (sc->sc_bulk_head == NULL) { 694 err = USBD_NOMEM; 695 goto bad2; 696 } 697 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 698 699 /* Allocate dummy ED that starts the isochronous list. */ 700 sc->sc_isoc_head = ohci_alloc_sed(sc); 701 if (sc->sc_isoc_head == NULL) { 702 err = USBD_NOMEM; 703 goto bad3; 704 } 705 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 706 707 /* Allocate all the dummy EDs that make up the interrupt tree. */ 708 for (i = 0; i < OHCI_NO_EDS; i++) { 709 sed = ohci_alloc_sed(sc); 710 if (sed == NULL) { 711 while (--i >= 0) 712 ohci_free_sed(sc, sc->sc_eds[i]); 713 err = USBD_NOMEM; 714 goto bad4; 715 } 716 /* All ED fields are set to 0. */ 717 sc->sc_eds[i] = sed; 718 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 719 if (i != 0) 720 psed = sc->sc_eds[(i-1) / 2]; 721 else 722 psed= sc->sc_isoc_head; 723 sed->next = psed; 724 sed->ed.ed_nexted = htole32(psed->physaddr); 725 } 726 /* 727 * Fill HCCA interrupt table. The bit reversal is to get 728 * the tree set up properly to spread the interrupts. 729 */ 730 for (i = 0; i < OHCI_NO_INTRS; i++) 731 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 732 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 733 734 #ifdef OHCI_DEBUG 735 if (ohcidebug > 15) { 736 for (i = 0; i < OHCI_NO_EDS; i++) { 737 printf("ed#%d ", i); 738 ohci_dump_ed(sc->sc_eds[i]); 739 } 740 printf("iso "); 741 ohci_dump_ed(sc->sc_isoc_head); 742 } 743 #endif 744 745 /* Determine in what context we are running. */ 746 ctl = OREAD4(sc, OHCI_CONTROL); 747 if (ctl & OHCI_IR) { 748 /* SMM active, request change */ 749 DPRINTF(("ohci_init: SMM active, request owner change\n")); 750 s = OREAD4(sc, OHCI_COMMAND_STATUS); 751 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 752 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 753 usb_delay_ms(&sc->sc_bus, 1); 754 ctl = OREAD4(sc, OHCI_CONTROL); 755 } 756 if ((ctl & OHCI_IR) == 0) { 757 printf("%s: SMM does not respond, resetting\n", 758 USBDEVNAME(sc->sc_bus.bdev)); 759 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 760 goto reset; 761 } 762 #if 0 763 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 764 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 765 /* BIOS started controller. */ 766 DPRINTF(("ohci_init: BIOS active\n")); 767 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 768 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 769 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 770 } 771 #endif 772 } else { 773 DPRINTF(("ohci_init: cold started\n")); 774 reset: 775 /* Controller was cold started. */ 776 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 777 } 778 779 /* 780 * This reset should not be necessary according to the OHCI spec, but 781 * without it some controllers do not start. 782 */ 783 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 784 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 785 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 786 787 /* We now own the host controller and the bus has been reset. */ 788 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 789 790 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 791 /* Nominal time for a reset is 10 us. */ 792 for (i = 0; i < 10; i++) { 793 delay(10); 794 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 795 if (!hcr) 796 break; 797 } 798 if (hcr) { 799 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 800 err = USBD_IOERROR; 801 goto bad5; 802 } 803 #ifdef OHCI_DEBUG 804 if (ohcidebug > 15) 805 ohci_dumpregs(sc); 806 #endif 807 808 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 809 810 /* Set up HC registers. */ 811 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 812 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 813 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 814 /* disable all interrupts and then switch on all desired interrupts */ 815 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 816 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 817 /* switch on desired functional features */ 818 ctl = OREAD4(sc, OHCI_CONTROL); 819 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 820 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 821 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 822 /* And finally start it! */ 823 OWRITE4(sc, OHCI_CONTROL, ctl); 824 825 /* 826 * The controller is now OPERATIONAL. Set a some final 827 * registers that should be set earlier, but that the 828 * controller ignores when in the SUSPEND state. 829 */ 830 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 831 fm |= OHCI_FSMPS(ival) | ival; 832 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 833 per = OHCI_PERIODIC(ival); /* 90% periodic */ 834 OWRITE4(sc, OHCI_PERIODIC_START, per); 835 836 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 837 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 838 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 839 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 840 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 841 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 842 843 /* 844 * The AMD756 requires a delay before re-reading the register, 845 * otherwise it will occasionally report 0 ports. 846 */ 847 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 848 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 849 850 #ifdef OHCI_DEBUG 851 if (ohcidebug > 5) 852 ohci_dumpregs(sc); 853 #endif 854 855 /* Set up the bus struct. */ 856 sc->sc_bus.methods = &ohci_bus_methods; 857 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 858 859 #if defined(__NetBSD__) || defined(__OpenBSD__) 860 sc->sc_control = sc->sc_intre = 0; 861 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 862 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 863 #endif 864 865 return (USBD_NORMAL_COMPLETION); 866 867 bad5: 868 for (i = 0; i < OHCI_NO_EDS; i++) 869 ohci_free_sed(sc, sc->sc_eds[i]); 870 bad4: 871 ohci_free_sed(sc, sc->sc_isoc_head); 872 bad3: 873 ohci_free_sed(sc, sc->sc_ctrl_head); 874 bad2: 875 ohci_free_sed(sc, sc->sc_bulk_head); 876 bad1: 877 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 878 return (err); 879 } 880 881 usbd_status 882 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 883 { 884 #if defined(__NetBSD__) || defined(__OpenBSD__) 885 struct ohci_softc *sc = (struct ohci_softc *)bus; 886 #endif 887 888 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 889 } 890 891 void 892 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 893 { 894 #if defined(__NetBSD__) || defined(__OpenBSD__) 895 struct ohci_softc *sc = (struct ohci_softc *)bus; 896 #endif 897 898 usb_freemem(&sc->sc_bus, dma); 899 } 900 901 usbd_xfer_handle 902 ohci_allocx(struct usbd_bus *bus) 903 { 904 struct ohci_softc *sc = (struct ohci_softc *)bus; 905 usbd_xfer_handle xfer; 906 907 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 908 if (xfer != NULL) 909 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 910 else 911 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 912 if (xfer != NULL) 913 memset(xfer, 0, sizeof *xfer); 914 return (xfer); 915 } 916 917 void 918 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 919 { 920 struct ohci_softc *sc = (struct ohci_softc *)bus; 921 922 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 923 } 924 925 /* 926 * Shut down the controller when the system is going down. 927 */ 928 void 929 ohci_shutdown(void *v) 930 { 931 ohci_softc_t *sc = v; 932 933 DPRINTF(("ohci_shutdown: stopping the HC\n")); 934 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 935 } 936 937 /* 938 * Handle suspend/resume. 939 * 940 * We need to switch to polling mode here, because this routine is 941 * called from an intterupt context. This is all right since we 942 * are almost suspended anyway. 943 */ 944 void 945 ohci_power(int why, void *v) 946 { 947 ohci_softc_t *sc = v; 948 u_int32_t ctl; 949 int s; 950 951 #ifdef OHCI_DEBUG 952 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 953 ohci_dumpregs(sc); 954 #endif 955 956 s = splhardusb(); 957 switch (why) { 958 case PWR_SUSPEND: 959 case PWR_STANDBY: 960 sc->sc_bus.use_polling++; 961 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 962 if (sc->sc_control == 0) { 963 /* 964 * Preserve register values, in case that APM BIOS 965 * does not recover them. 966 */ 967 sc->sc_control = ctl; 968 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 969 } 970 ctl |= OHCI_HCFS_SUSPEND; 971 OWRITE4(sc, OHCI_CONTROL, ctl); 972 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 973 sc->sc_bus.use_polling--; 974 break; 975 case PWR_RESUME: 976 sc->sc_bus.use_polling++; 977 /* Some broken BIOSes do not recover these values */ 978 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 979 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 980 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 981 if (sc->sc_intre) 982 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 983 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 984 if (sc->sc_control) 985 ctl = sc->sc_control; 986 else 987 ctl = OREAD4(sc, OHCI_CONTROL); 988 ctl |= OHCI_HCFS_RESUME; 989 OWRITE4(sc, OHCI_CONTROL, ctl); 990 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 991 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 992 OWRITE4(sc, OHCI_CONTROL, ctl); 993 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 994 sc->sc_control = sc->sc_intre = 0; 995 sc->sc_bus.use_polling--; 996 break; 997 #if defined(__NetBSD__) 998 case PWR_SOFTSUSPEND: 999 case PWR_SOFTSTANDBY: 1000 case PWR_SOFTRESUME: 1001 break; 1002 #endif 1003 } 1004 splx(s); 1005 } 1006 1007 #ifdef OHCI_DEBUG 1008 void 1009 ohci_dumpregs(ohci_softc_t *sc) 1010 { 1011 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1012 OREAD4(sc, OHCI_REVISION), 1013 OREAD4(sc, OHCI_CONTROL), 1014 OREAD4(sc, OHCI_COMMAND_STATUS))); 1015 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1016 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1017 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1018 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1019 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1020 OREAD4(sc, OHCI_HCCA), 1021 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1022 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1023 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1024 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1025 OREAD4(sc, OHCI_BULK_HEAD_ED), 1026 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1027 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1028 OREAD4(sc, OHCI_DONE_HEAD), 1029 OREAD4(sc, OHCI_FM_INTERVAL), 1030 OREAD4(sc, OHCI_FM_REMAINING))); 1031 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1032 OREAD4(sc, OHCI_FM_NUMBER), 1033 OREAD4(sc, OHCI_PERIODIC_START), 1034 OREAD4(sc, OHCI_LS_THRESHOLD))); 1035 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1036 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1037 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1038 OREAD4(sc, OHCI_RH_STATUS))); 1039 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1040 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1041 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1042 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1043 le32toh(sc->sc_hcca->hcca_frame_number), 1044 le32toh(sc->sc_hcca->hcca_done_head))); 1045 } 1046 #endif 1047 1048 Static int ohci_intr1(ohci_softc_t *); 1049 1050 int 1051 ohci_intr(void *p) 1052 { 1053 ohci_softc_t *sc = p; 1054 1055 /* If we get an interrupt while polling, then just ignore it. */ 1056 if (sc->sc_bus.use_polling) { 1057 #ifdef DIAGNOSTIC 1058 printf("ohci_intr: ignored interrupt while polling\n"); 1059 #endif 1060 return (0); 1061 } 1062 1063 return (ohci_intr1(sc)); 1064 } 1065 1066 Static int 1067 ohci_intr1(ohci_softc_t *sc) 1068 { 1069 u_int32_t intrs, eintrs; 1070 ohci_physaddr_t done; 1071 1072 /* In case the interrupt occurs before initialization has completed. */ 1073 if (sc == NULL || sc->sc_hcca == NULL) { 1074 #ifdef DIAGNOSTIC 1075 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1076 #endif 1077 return (0); 1078 } 1079 1080 intrs = 0; 1081 done = le32toh(sc->sc_hcca->hcca_done_head); 1082 if (done != 0) { 1083 if (done & ~OHCI_DONE_INTRS) 1084 intrs = OHCI_WDH; 1085 if (done & OHCI_DONE_INTRS) 1086 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1087 } else 1088 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1089 1090 if (!intrs) 1091 return (0); 1092 1093 intrs &= ~OHCI_MIE; 1094 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1095 eintrs = intrs & sc->sc_eintrs; 1096 if (!eintrs) 1097 return (0); 1098 1099 sc->sc_bus.intr_context++; 1100 sc->sc_bus.no_intrs++; 1101 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1102 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1103 (u_int)eintrs)); 1104 1105 if (eintrs & OHCI_SO) { 1106 sc->sc_overrun_cnt++; 1107 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1108 printf("%s: %u scheduling overruns\n", 1109 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1110 sc->sc_overrun_cnt = 0; 1111 } 1112 /* XXX do what */ 1113 intrs &= ~OHCI_SO; 1114 } 1115 if (eintrs & OHCI_WDH) { 1116 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1117 sc->sc_hcca->hcca_done_head = 0; 1118 usb_schedsoftintr(&sc->sc_bus); 1119 intrs &= ~OHCI_WDH; 1120 } 1121 if (eintrs & OHCI_RD) { 1122 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1123 /* XXX process resume detect */ 1124 } 1125 if (eintrs & OHCI_UE) { 1126 printf("%s: unrecoverable error, controller halted\n", 1127 USBDEVNAME(sc->sc_bus.bdev)); 1128 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1129 /* XXX what else */ 1130 } 1131 if (eintrs & OHCI_RHSC) { 1132 ohci_rhsc(sc, sc->sc_intrxfer); 1133 intrs &= ~OHCI_RHSC; 1134 1135 /* 1136 * Disable RHSC interrupt for now, because it will be 1137 * on until the port has been reset. 1138 */ 1139 ohci_rhsc_able(sc, 0); 1140 #if defined (__OpenBSD__) 1141 /* Do not allow RHSC interrupts > 1 per second */ 1142 timeout_add(&sc->sc_tmo_rhsc, hz); 1143 #endif 1144 } 1145 1146 sc->sc_bus.intr_context--; 1147 1148 /* Block unprocessed interrupts. XXX */ 1149 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1150 sc->sc_eintrs &= ~intrs; 1151 1152 return (1); 1153 } 1154 1155 void 1156 ohci_rhsc_able(ohci_softc_t *sc, int on) 1157 { 1158 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1159 if (on) { 1160 sc->sc_eintrs |= OHCI_RHSC; 1161 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1162 } else { 1163 sc->sc_eintrs &= ~OHCI_RHSC; 1164 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1165 } 1166 } 1167 1168 void 1169 ohci_rhsc_enable(void *v_sc) 1170 { 1171 ohci_softc_t *sc = v_sc; 1172 1173 ohci_rhsc_able(sc, 1); 1174 } 1175 1176 #ifdef OHCI_DEBUG 1177 char *ohci_cc_strs[] = { 1178 "NO_ERROR", 1179 "CRC", 1180 "BIT_STUFFING", 1181 "DATA_TOGGLE_MISMATCH", 1182 "STALL", 1183 "DEVICE_NOT_RESPONDING", 1184 "PID_CHECK_FAILURE", 1185 "UNEXPECTED_PID", 1186 "DATA_OVERRUN", 1187 "DATA_UNDERRUN", 1188 "BUFFER_OVERRUN", 1189 "BUFFER_UNDERRUN", 1190 "reserved", 1191 "reserved", 1192 "NOT_ACCESSED", 1193 "NOT_ACCESSED", 1194 }; 1195 #endif 1196 1197 void 1198 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1199 { 1200 ohci_soft_itd_t *sitd, *sidone, **ip; 1201 ohci_soft_td_t *std, *sdone, **p; 1202 1203 /* Reverse the done list. */ 1204 for (sdone = NULL, sidone = NULL; done != 0; ) { 1205 std = ohci_hash_find_td(sc, done); 1206 if (std != NULL) { 1207 std->dnext = sdone; 1208 done = le32toh(std->td.td_nexttd); 1209 sdone = std; 1210 DPRINTFN(10,("add TD %p\n", std)); 1211 continue; 1212 } 1213 sitd = ohci_hash_find_itd(sc, done); 1214 if (sitd != NULL) { 1215 sitd->dnext = sidone; 1216 done = le32toh(sitd->itd.itd_nextitd); 1217 sidone = sitd; 1218 DPRINTFN(5,("add ITD %p\n", sitd)); 1219 continue; 1220 } 1221 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1222 } 1223 1224 /* sdone & sidone now hold the done lists. */ 1225 /* Put them on the already processed lists. */ 1226 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1227 ; 1228 *p = sdone; 1229 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1230 ; 1231 *ip = sidone; 1232 } 1233 1234 void 1235 ohci_softintr(void *v) 1236 { 1237 ohci_softc_t *sc = v; 1238 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1239 ohci_soft_td_t *std, *sdone, *stdnext; 1240 usbd_xfer_handle xfer; 1241 int len, cc, s; 1242 1243 sc->sc_bus.intr_context++; 1244 1245 s = splhardusb(); 1246 sdone = sc->sc_sdone; 1247 sc->sc_sdone = NULL; 1248 sidone = sc->sc_sidone; 1249 sc->sc_sidone = NULL; 1250 splx(s); 1251 1252 DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone)); 1253 1254 #ifdef OHCI_DEBUG 1255 if (ohcidebug > 10) { 1256 DPRINTF(("ohci_process_done: TD done:\n")); 1257 ohci_dump_tds(sdone); 1258 } 1259 #endif 1260 1261 for (std = sdone; std; std = stdnext) { 1262 xfer = std->xfer; 1263 stdnext = std->dnext; 1264 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1265 std, xfer, xfer ? xfer->hcpriv : 0)); 1266 if (xfer == NULL) { 1267 /* xfer == NULL: There seems to be no xfer associated 1268 * with this TD. It is tailp that happened to end up on 1269 * the done queue. 1270 */ 1271 continue; 1272 } 1273 if (xfer->status == USBD_CANCELLED || 1274 xfer->status == USBD_TIMEOUT) { 1275 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1276 xfer)); 1277 /* Handled by abort routine. */ 1278 continue; 1279 } 1280 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1281 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1282 if (cc == OHCI_CC_NO_ERROR) { 1283 len = std->len; 1284 if (std->td.td_cbp != 0) 1285 len -= le32toh(std->td.td_be) - 1286 le32toh(std->td.td_cbp) + 1; 1287 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1288 len, std->flags)); 1289 if (std->flags & OHCI_ADD_LEN) 1290 xfer->actlen += len; 1291 if (std->flags & OHCI_CALL_DONE) { 1292 xfer->status = USBD_NORMAL_COMPLETION; 1293 usb_transfer_complete(xfer); 1294 } 1295 ohci_free_std(sc, std); 1296 } else { 1297 /* 1298 * Endpoint is halted. First unlink all the TDs 1299 * belonging to the failed transfer, and then restart 1300 * the endpoint. 1301 */ 1302 ohci_soft_td_t *p, *n; 1303 struct ohci_pipe *opipe = 1304 (struct ohci_pipe *)xfer->pipe; 1305 1306 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1307 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1308 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1309 1310 /* remove TDs */ 1311 for (p = std; p->xfer == xfer; p = n) { 1312 n = p->nexttd; 1313 ohci_free_std(sc, p); 1314 } 1315 1316 /* clear halt */ 1317 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1318 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1319 1320 if (cc == OHCI_CC_STALL) 1321 xfer->status = USBD_STALLED; 1322 else 1323 xfer->status = USBD_IOERROR; 1324 usb_transfer_complete(xfer); 1325 } 1326 } 1327 1328 #ifdef OHCI_DEBUG 1329 if (ohcidebug > 10) { 1330 DPRINTF(("ohci_process_done: ITD done:\n")); 1331 ohci_dump_itds(sidone); 1332 } 1333 #endif 1334 1335 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1336 xfer = sitd->xfer; 1337 sitdnext = sitd->dnext; 1338 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1339 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1340 if (xfer == NULL) 1341 continue; 1342 if (xfer->status == USBD_CANCELLED || 1343 xfer->status == USBD_TIMEOUT) { 1344 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1345 xfer)); 1346 /* Handled by abort routine. */ 1347 continue; 1348 } 1349 #ifdef DIAGNOSTIC 1350 if (sitd->isdone) 1351 printf("ohci_softintr: sitd=%p is done\n", sitd); 1352 sitd->isdone = 1; 1353 #endif 1354 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1355 if (cc == OHCI_CC_NO_ERROR) { 1356 /* XXX compute length for input */ 1357 struct ohci_pipe *opipe = 1358 (struct ohci_pipe *)xfer->pipe; 1359 if (sitd->flags & OHCI_CALL_DONE) { 1360 opipe->u.iso.inuse -= xfer->nframes; 1361 /* XXX update frlengths with actual length */ 1362 /* XXX xfer->actlen = actlen; */ 1363 xfer->status = USBD_NORMAL_COMPLETION; 1364 usb_transfer_complete(xfer); 1365 } 1366 } else { 1367 /* XXX Do more */ 1368 xfer->status = USBD_IOERROR; 1369 usb_transfer_complete(xfer); 1370 } 1371 } 1372 1373 sc->sc_bus.intr_context--; 1374 } 1375 1376 void 1377 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1378 { 1379 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1380 1381 #ifdef DIAGNOSTIC 1382 if (!(xfer->rqflags & URQ_REQUEST)) { 1383 panic("ohci_ctrl_done: not a request\n"); 1384 } 1385 #endif 1386 xfer->hcpriv = NULL; 1387 } 1388 1389 void 1390 ohci_device_intr_done(usbd_xfer_handle xfer) 1391 { 1392 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1393 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1394 ohci_soft_ed_t *sed = opipe->sed; 1395 ohci_soft_td_t *data, *tail; 1396 1397 1398 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1399 xfer, xfer->actlen)); 1400 1401 xfer->hcpriv = NULL; 1402 1403 if (xfer->pipe->repeat) { 1404 data = opipe->tail.td; 1405 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1406 if (tail == NULL) { 1407 xfer->status = USBD_NOMEM; 1408 return; 1409 } 1410 tail->xfer = NULL; 1411 1412 data->td.td_flags = htole32( 1413 OHCI_TD_IN | OHCI_TD_NOCC | 1414 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1415 if (xfer->flags & USBD_SHORT_XFER_OK) 1416 data->td.td_flags |= htole32(OHCI_TD_R); 1417 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1418 data->nexttd = tail; 1419 data->td.td_nexttd = htole32(tail->physaddr); 1420 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1421 xfer->length - 1); 1422 data->len = xfer->length; 1423 data->xfer = xfer; 1424 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1425 xfer->hcpriv = data; 1426 xfer->actlen = 0; 1427 1428 sed->ed.ed_tailp = htole32(tail->physaddr); 1429 opipe->tail.td = tail; 1430 } 1431 } 1432 1433 void 1434 ohci_device_bulk_done(usbd_xfer_handle xfer) 1435 { 1436 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1437 xfer, xfer->actlen)); 1438 1439 xfer->hcpriv = NULL; 1440 } 1441 1442 void 1443 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1444 { 1445 usbd_pipe_handle pipe; 1446 struct ohci_pipe *opipe; 1447 u_char *p; 1448 int i, m; 1449 int hstatus; 1450 1451 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1452 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1453 sc, xfer, hstatus)); 1454 1455 if (xfer == NULL) { 1456 /* Just ignore the change. */ 1457 return; 1458 } 1459 1460 pipe = xfer->pipe; 1461 opipe = (struct ohci_pipe *)pipe; 1462 1463 p = KERNADDR(&xfer->dmabuf); 1464 m = min(sc->sc_noport, xfer->length * 8 - 1); 1465 memset(p, 0, xfer->length); 1466 for (i = 1; i <= m; i++) { 1467 /* Pick out CHANGE bits from the status reg. */ 1468 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1469 p[i/8] |= 1 << (i%8); 1470 } 1471 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1472 xfer->actlen = xfer->length; 1473 xfer->status = USBD_NORMAL_COMPLETION; 1474 1475 usb_transfer_complete(xfer); 1476 } 1477 1478 void 1479 ohci_root_intr_done(usbd_xfer_handle xfer) 1480 { 1481 xfer->hcpriv = NULL; 1482 } 1483 1484 void 1485 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1486 { 1487 xfer->hcpriv = NULL; 1488 } 1489 1490 /* 1491 * Wait here until controller claims to have an interrupt. 1492 * Then call ohci_intr and return. Use timeout to avoid waiting 1493 * too long. 1494 */ 1495 void 1496 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1497 { 1498 int timo = xfer->timeout; 1499 int usecs; 1500 u_int32_t intrs; 1501 1502 xfer->status = USBD_IN_PROGRESS; 1503 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1504 usb_delay_ms(&sc->sc_bus, 1); 1505 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1506 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1507 #ifdef OHCI_DEBUG 1508 if (ohcidebug > 15) 1509 ohci_dumpregs(sc); 1510 #endif 1511 if (intrs) { 1512 ohci_intr1(sc); 1513 if (xfer->status != USBD_IN_PROGRESS) 1514 return; 1515 } 1516 } 1517 1518 /* Timeout */ 1519 DPRINTF(("ohci_waitintr: timeout\n")); 1520 xfer->status = USBD_TIMEOUT; 1521 usb_transfer_complete(xfer); 1522 /* XXX should free TD */ 1523 } 1524 1525 void 1526 ohci_poll(struct usbd_bus *bus) 1527 { 1528 ohci_softc_t *sc = (ohci_softc_t *)bus; 1529 1530 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1531 ohci_intr1(sc); 1532 } 1533 1534 usbd_status 1535 ohci_device_request(usbd_xfer_handle xfer) 1536 { 1537 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1538 usb_device_request_t *req = &xfer->request; 1539 usbd_device_handle dev = opipe->pipe.device; 1540 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1541 int addr = dev->address; 1542 ohci_soft_td_t *setup, *stat, *next, *tail; 1543 ohci_soft_ed_t *sed; 1544 int isread; 1545 int len; 1546 usbd_status err; 1547 int s; 1548 1549 isread = req->bmRequestType & UT_READ; 1550 len = UGETW(req->wLength); 1551 1552 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1553 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1554 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1555 UGETW(req->wIndex), len, addr, 1556 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1557 1558 setup = opipe->tail.td; 1559 stat = ohci_alloc_std(sc); 1560 if (stat == NULL) { 1561 err = USBD_NOMEM; 1562 goto bad1; 1563 } 1564 tail = ohci_alloc_std(sc); 1565 if (tail == NULL) { 1566 err = USBD_NOMEM; 1567 goto bad2; 1568 } 1569 tail->xfer = NULL; 1570 1571 sed = opipe->sed; 1572 opipe->u.ctl.length = len; 1573 1574 /* Update device address and length since they may have changed. */ 1575 /* XXX This only needs to be done once, but it's too early in open. */ 1576 /* XXXX Should not touch ED here! */ 1577 sed->ed.ed_flags = htole32( 1578 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1579 OHCI_ED_SET_FA(addr) | 1580 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1581 1582 next = stat; 1583 1584 /* Set up data transaction */ 1585 if (len != 0) { 1586 ohci_soft_td_t *std = stat; 1587 1588 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1589 std, &stat); 1590 stat = stat->nexttd; /* point at free TD */ 1591 if (err) 1592 goto bad3; 1593 /* Start toggle at 1 and then use the carried toggle. */ 1594 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1595 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1596 } 1597 1598 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1599 1600 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1601 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1602 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1603 setup->nexttd = next; 1604 setup->td.td_nexttd = htole32(next->physaddr); 1605 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1606 setup->len = 0; 1607 setup->xfer = xfer; 1608 setup->flags = 0; 1609 xfer->hcpriv = setup; 1610 1611 stat->td.td_flags = htole32( 1612 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1613 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1614 stat->td.td_cbp = 0; 1615 stat->nexttd = tail; 1616 stat->td.td_nexttd = htole32(tail->physaddr); 1617 stat->td.td_be = 0; 1618 stat->flags = OHCI_CALL_DONE; 1619 stat->len = 0; 1620 stat->xfer = xfer; 1621 1622 #ifdef OHCI_DEBUG 1623 if (ohcidebug > 5) { 1624 DPRINTF(("ohci_device_request:\n")); 1625 ohci_dump_ed(sed); 1626 ohci_dump_tds(setup); 1627 } 1628 #endif 1629 1630 /* Insert ED in schedule */ 1631 s = splusb(); 1632 sed->ed.ed_tailp = htole32(tail->physaddr); 1633 opipe->tail.td = tail; 1634 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1635 if (xfer->timeout && !sc->sc_bus.use_polling) { 1636 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1637 ohci_timeout, xfer); 1638 } 1639 splx(s); 1640 1641 #if 0 1642 if (ohcidebug > 10) { 1643 delay(10000); 1644 DPRINTF(("ohci_device_request: status=%x\n", 1645 OREAD4(sc, OHCI_COMMAND_STATUS))); 1646 ohci_dump_ed(sed); 1647 ohci_dump_tds(setup); 1648 } 1649 #endif 1650 1651 return (USBD_NORMAL_COMPLETION); 1652 1653 bad3: 1654 ohci_free_std(sc, tail); 1655 bad2: 1656 ohci_free_std(sc, stat); 1657 bad1: 1658 return (err); 1659 } 1660 1661 /* 1662 * Add an ED to the schedule. Called at splusb(). 1663 */ 1664 void 1665 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1666 { 1667 SPLUSBCHECK; 1668 sed->next = head->next; 1669 sed->ed.ed_nexted = head->ed.ed_nexted; 1670 head->next = sed; 1671 head->ed.ed_nexted = htole32(sed->physaddr); 1672 } 1673 1674 /* 1675 * Remove an ED from the schedule. Called at splusb(). 1676 */ 1677 void 1678 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1679 { 1680 ohci_soft_ed_t *p; 1681 1682 SPLUSBCHECK; 1683 1684 /* XXX */ 1685 for (p = head; p == NULL && p->next != sed; p = p->next) 1686 ; 1687 if (p == NULL) 1688 panic("ohci_rem_ed: ED not found\n"); 1689 p->next = sed->next; 1690 p->ed.ed_nexted = sed->ed.ed_nexted; 1691 } 1692 1693 /* 1694 * When a transfer is completed the TD is added to the done queue by 1695 * the host controller. This queue is the processed by software. 1696 * Unfortunately the queue contains the physical address of the TD 1697 * and we have no simple way to translate this back to a kernel address. 1698 * To make the translation possible (and fast) we use a hash table of 1699 * TDs currently in the schedule. The physical address is used as the 1700 * hash value. 1701 */ 1702 1703 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1704 /* Called at splusb() */ 1705 void 1706 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1707 { 1708 int h = HASH(std->physaddr); 1709 1710 SPLUSBCHECK; 1711 1712 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1713 } 1714 1715 /* Called at splusb() */ 1716 void 1717 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1718 { 1719 SPLUSBCHECK; 1720 1721 LIST_REMOVE(std, hnext); 1722 } 1723 1724 ohci_soft_td_t * 1725 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1726 { 1727 int h = HASH(a); 1728 ohci_soft_td_t *std; 1729 1730 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1731 std != NULL; 1732 std = LIST_NEXT(std, hnext)) 1733 if (std->physaddr == a) 1734 return (std); 1735 return (NULL); 1736 } 1737 1738 /* Called at splusb() */ 1739 void 1740 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1741 { 1742 int h = HASH(sitd->physaddr); 1743 1744 SPLUSBCHECK; 1745 1746 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1747 sitd, (u_long)sitd->physaddr)); 1748 1749 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1750 } 1751 1752 /* Called at splusb() */ 1753 void 1754 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1755 { 1756 SPLUSBCHECK; 1757 1758 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1759 sitd, (u_long)sitd->physaddr)); 1760 1761 LIST_REMOVE(sitd, hnext); 1762 } 1763 1764 ohci_soft_itd_t * 1765 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1766 { 1767 int h = HASH(a); 1768 ohci_soft_itd_t *sitd; 1769 1770 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1771 sitd != NULL; 1772 sitd = LIST_NEXT(sitd, hnext)) 1773 if (sitd->physaddr == a) 1774 return (sitd); 1775 return (NULL); 1776 } 1777 1778 void 1779 ohci_timeout(void *addr) 1780 { 1781 usbd_xfer_handle xfer = addr; 1782 int s; 1783 1784 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1785 1786 s = splusb(); 1787 xfer->device->bus->intr_context++; 1788 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1789 xfer->device->bus->intr_context--; 1790 splx(s); 1791 } 1792 1793 #ifdef OHCI_DEBUG 1794 void 1795 ohci_dump_tds(ohci_soft_td_t *std) 1796 { 1797 for (; std; std = std->nexttd) 1798 ohci_dump_td(std); 1799 } 1800 1801 void 1802 ohci_dump_td(ohci_soft_td_t *std) 1803 { 1804 char sbuf[128]; 1805 1806 bitmask_snprintf((int)le32toh(std->td.td_flags), 1807 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1808 sbuf, sizeof(sbuf)); 1809 1810 DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1811 "nexttd=0x%08lx be=0x%08lx\n", 1812 std, (u_long)std->physaddr, sbuf, 1813 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1814 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1815 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1816 (u_long)le32toh(std->td.td_cbp), 1817 (u_long)le32toh(std->td.td_nexttd), 1818 (u_long)le32toh(std->td.td_be))); 1819 } 1820 1821 void 1822 ohci_dump_itd(ohci_soft_itd_t *sitd) 1823 { 1824 int i; 1825 1826 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1827 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1828 sitd, (u_long)sitd->physaddr, 1829 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1830 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1831 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1832 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1833 (u_long)le32toh(sitd->itd.itd_bp0), 1834 (u_long)le32toh(sitd->itd.itd_nextitd), 1835 (u_long)le32toh(sitd->itd.itd_be))); 1836 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1837 DPRINTF(("offs[%d]=0x%04x ", i, 1838 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1839 DPRINTF(("\n")); 1840 } 1841 1842 void 1843 ohci_dump_itds(ohci_soft_itd_t *sitd) 1844 { 1845 for (; sitd; sitd = sitd->nextitd) 1846 ohci_dump_itd(sitd); 1847 } 1848 1849 void 1850 ohci_dump_ed(ohci_soft_ed_t *sed) 1851 { 1852 char sbuf[128], sbuf2[128]; 1853 1854 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1855 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1856 sbuf, sizeof(sbuf)); 1857 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1858 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1859 1860 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx " 1861 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1862 sed, (u_long)sed->physaddr, 1863 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1864 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1865 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1866 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1867 (u_long)le32toh(sed->ed.ed_headp), 1868 (u_long)le32toh(sed->ed.ed_nexted))); 1869 } 1870 #endif 1871 1872 usbd_status 1873 ohci_open(usbd_pipe_handle pipe) 1874 { 1875 usbd_device_handle dev = pipe->device; 1876 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1877 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1878 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1879 u_int8_t addr = dev->address; 1880 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1881 ohci_soft_ed_t *sed; 1882 ohci_soft_td_t *std; 1883 ohci_soft_itd_t *sitd; 1884 ohci_physaddr_t tdphys; 1885 u_int32_t fmt; 1886 usbd_status err; 1887 int s; 1888 int ival; 1889 1890 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1891 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1892 1893 std = NULL; 1894 sed = NULL; 1895 1896 if (addr == sc->sc_addr) { 1897 switch (ed->bEndpointAddress) { 1898 case USB_CONTROL_ENDPOINT: 1899 pipe->methods = &ohci_root_ctrl_methods; 1900 break; 1901 case UE_DIR_IN | OHCI_INTR_ENDPT: 1902 pipe->methods = &ohci_root_intr_methods; 1903 break; 1904 default: 1905 return (USBD_INVAL); 1906 } 1907 } else { 1908 sed = ohci_alloc_sed(sc); 1909 if (sed == NULL) 1910 goto bad0; 1911 opipe->sed = sed; 1912 if (xfertype == UE_ISOCHRONOUS) { 1913 sitd = ohci_alloc_sitd(sc); 1914 if (sitd == NULL) { 1915 ohci_free_sitd(sc, sitd); 1916 goto bad1; 1917 } 1918 opipe->tail.itd = sitd; 1919 tdphys = sitd->physaddr; 1920 fmt = OHCI_ED_FORMAT_ISO; 1921 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1922 fmt |= OHCI_ED_DIR_IN; 1923 else 1924 fmt |= OHCI_ED_DIR_OUT; 1925 } else { 1926 std = ohci_alloc_std(sc); 1927 if (std == NULL) { 1928 ohci_free_std(sc, std); 1929 goto bad1; 1930 } 1931 opipe->tail.td = std; 1932 tdphys = std->physaddr; 1933 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1934 } 1935 sed->ed.ed_flags = htole32( 1936 OHCI_ED_SET_FA(addr) | 1937 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1938 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1939 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1940 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1941 1942 switch (xfertype) { 1943 case UE_CONTROL: 1944 pipe->methods = &ohci_device_ctrl_methods; 1945 err = usb_allocmem(&sc->sc_bus, 1946 sizeof(usb_device_request_t), 1947 0, &opipe->u.ctl.reqdma); 1948 if (err) 1949 goto bad; 1950 s = splusb(); 1951 ohci_add_ed(sed, sc->sc_ctrl_head); 1952 splx(s); 1953 break; 1954 case UE_INTERRUPT: 1955 pipe->methods = &ohci_device_intr_methods; 1956 ival = pipe->interval; 1957 if (ival == USBD_DEFAULT_INTERVAL) 1958 ival = ed->bInterval; 1959 return (ohci_device_setintr(sc, opipe, ival)); 1960 case UE_ISOCHRONOUS: 1961 pipe->methods = &ohci_device_isoc_methods; 1962 return (ohci_setup_isoc(pipe)); 1963 case UE_BULK: 1964 pipe->methods = &ohci_device_bulk_methods; 1965 s = splusb(); 1966 ohci_add_ed(sed, sc->sc_bulk_head); 1967 splx(s); 1968 break; 1969 } 1970 } 1971 return (USBD_NORMAL_COMPLETION); 1972 1973 bad: 1974 if (std != NULL) 1975 ohci_free_std(sc, std); 1976 bad1: 1977 if (sed != NULL) 1978 ohci_free_sed(sc, sed); 1979 bad0: 1980 return (USBD_NOMEM); 1981 1982 } 1983 1984 /* 1985 * Close a reqular pipe. 1986 * Assumes that there are no pending transactions. 1987 */ 1988 void 1989 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 1990 { 1991 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1992 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1993 ohci_soft_ed_t *sed = opipe->sed; 1994 int s; 1995 1996 s = splusb(); 1997 #ifdef DIAGNOSTIC 1998 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1999 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2000 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2001 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 2002 ohci_soft_td_t *std; 2003 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 2004 std != NULL; 2005 std = LIST_NEXT(std, hnext)) 2006 if (std->physaddr == td) 2007 break; 2008 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2009 "tl=0x%x pipe=%p, std=%p\n", sed, 2010 (int)le32toh(sed->ed.ed_headp), 2011 (int)le32toh(sed->ed.ed_tailp), 2012 pipe, std); 2013 usb_delay_ms(&sc->sc_bus, 2); 2014 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2015 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2016 printf("ohci_close_pipe: pipe still not empty\n"); 2017 } 2018 #endif 2019 ohci_rem_ed(sed, head); 2020 splx(s); 2021 ohci_free_sed(sc, opipe->sed); 2022 } 2023 2024 /* 2025 * Abort a device request. 2026 * If this routine is called at splusb() it guarantees that the request 2027 * will be removed from the hardware scheduling and that the callback 2028 * for it will be called with USBD_CANCELLED status. 2029 * It's impossible to guarantee that the requested transfer will not 2030 * have happened since the hardware runs concurrently. 2031 * If the transaction has already happened we rely on the ordinary 2032 * interrupt processing to process it. 2033 */ 2034 void 2035 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2036 { 2037 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2038 ohci_soft_ed_t *sed; 2039 2040 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 2041 2042 xfer->status = status; 2043 2044 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2045 2046 sed = opipe->sed; 2047 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2048 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2049 2050 #if 1 2051 if (xfer->device->bus->intr_context) { 2052 /* We have no process context, so we can't use tsleep(). */ 2053 usb_callout(xfer->pipe->abort_handle, 2054 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 2055 } else { 2056 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 2057 KASSERT(intr_nesting_level == 0, 2058 ("ohci_abort_req in interrupt context")); 2059 #endif 2060 usb_delay_ms(opipe->pipe.device->bus, 1); 2061 ohci_abort_xfer_end(xfer); 2062 } 2063 #else 2064 delay(1000); 2065 ohci_abort_xfer_end(xfer); 2066 #endif 2067 } 2068 2069 void 2070 ohci_abort_xfer_end(void *v) 2071 { 2072 usbd_xfer_handle xfer = v; 2073 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2074 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2075 ohci_soft_ed_t *sed; 2076 ohci_soft_td_t *p, *n; 2077 int s; 2078 2079 s = splusb(); 2080 2081 p = xfer->hcpriv; 2082 #ifdef DIAGNOSTIC 2083 if (p == NULL) { 2084 splx(s); 2085 printf("ohci_abort_xfer: hcpriv==0\n"); 2086 return; 2087 } 2088 #endif 2089 for (; p->xfer == xfer; p = n) { 2090 n = p->nexttd; 2091 ohci_free_std(sc, p); 2092 } 2093 2094 sed = opipe->sed; 2095 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2096 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2097 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2098 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2099 2100 usb_transfer_complete(xfer); 2101 2102 splx(s); 2103 } 2104 2105 /* 2106 * Data structures and routines to emulate the root hub. 2107 */ 2108 Static usb_device_descriptor_t ohci_devd = { 2109 USB_DEVICE_DESCRIPTOR_SIZE, 2110 UDESC_DEVICE, /* type */ 2111 {0x00, 0x01}, /* USB version */ 2112 UDCLASS_HUB, /* class */ 2113 UDSUBCLASS_HUB, /* subclass */ 2114 0, /* protocol */ 2115 64, /* max packet */ 2116 {0},{0},{0x00,0x01}, /* device id */ 2117 1,2,0, /* string indicies */ 2118 1 /* # of configurations */ 2119 }; 2120 2121 Static usb_config_descriptor_t ohci_confd = { 2122 USB_CONFIG_DESCRIPTOR_SIZE, 2123 UDESC_CONFIG, 2124 {USB_CONFIG_DESCRIPTOR_SIZE + 2125 USB_INTERFACE_DESCRIPTOR_SIZE + 2126 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2127 1, 2128 1, 2129 0, 2130 UC_SELF_POWERED, 2131 0 /* max power */ 2132 }; 2133 2134 Static usb_interface_descriptor_t ohci_ifcd = { 2135 USB_INTERFACE_DESCRIPTOR_SIZE, 2136 UDESC_INTERFACE, 2137 0, 2138 0, 2139 1, 2140 UICLASS_HUB, 2141 UISUBCLASS_HUB, 2142 0, 2143 0 2144 }; 2145 2146 Static usb_endpoint_descriptor_t ohci_endpd = { 2147 USB_ENDPOINT_DESCRIPTOR_SIZE, 2148 UDESC_ENDPOINT, 2149 UE_DIR_IN | OHCI_INTR_ENDPT, 2150 UE_INTERRUPT, 2151 {8, 0}, /* max packet */ 2152 255 2153 }; 2154 2155 Static usb_hub_descriptor_t ohci_hubd = { 2156 USB_HUB_DESCRIPTOR_SIZE, 2157 UDESC_HUB, 2158 0, 2159 {0,0}, 2160 0, 2161 0, 2162 {0}, 2163 }; 2164 2165 Static int 2166 ohci_str(p, l, s) 2167 usb_string_descriptor_t *p; 2168 int l; 2169 char *s; 2170 { 2171 int i; 2172 2173 if (l == 0) 2174 return (0); 2175 p->bLength = 2 * strlen(s) + 2; 2176 if (l == 1) 2177 return (1); 2178 p->bDescriptorType = UDESC_STRING; 2179 l -= 2; 2180 for (i = 0; s[i] && l > 1; i++, l -= 2) 2181 USETW2(p->bString[i], 0, s[i]); 2182 return (2*i+2); 2183 } 2184 2185 /* 2186 * Simulate a hardware hub by handling all the necessary requests. 2187 */ 2188 Static usbd_status 2189 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2190 { 2191 usbd_status err; 2192 2193 /* Insert last in queue. */ 2194 err = usb_insert_transfer(xfer); 2195 if (err) 2196 return (err); 2197 2198 /* Pipe isn't running, start first */ 2199 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2200 } 2201 2202 Static usbd_status 2203 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2204 { 2205 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2206 usb_device_request_t *req; 2207 void *buf = NULL; 2208 int port, i; 2209 int s, len, value, index, l, totlen = 0; 2210 usb_port_status_t ps; 2211 usb_hub_descriptor_t hubd; 2212 usbd_status err; 2213 u_int32_t v; 2214 2215 if (sc->sc_dying) 2216 return (USBD_IOERROR); 2217 2218 #ifdef DIAGNOSTIC 2219 if (!(xfer->rqflags & URQ_REQUEST)) 2220 /* XXX panic */ 2221 return (USBD_INVAL); 2222 #endif 2223 req = &xfer->request; 2224 2225 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2226 req->bmRequestType, req->bRequest)); 2227 2228 len = UGETW(req->wLength); 2229 value = UGETW(req->wValue); 2230 index = UGETW(req->wIndex); 2231 2232 if (len != 0) 2233 buf = KERNADDR(&xfer->dmabuf); 2234 2235 #define C(x,y) ((x) | ((y) << 8)) 2236 switch(C(req->bRequest, req->bmRequestType)) { 2237 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2238 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2239 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2240 /* 2241 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2242 * for the integrated root hub. 2243 */ 2244 break; 2245 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2246 if (len > 0) { 2247 *(u_int8_t *)buf = sc->sc_conf; 2248 totlen = 1; 2249 } 2250 break; 2251 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2252 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2253 switch(value >> 8) { 2254 case UDESC_DEVICE: 2255 if ((value & 0xff) != 0) { 2256 err = USBD_IOERROR; 2257 goto ret; 2258 } 2259 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2260 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2261 memcpy(buf, &ohci_devd, l); 2262 break; 2263 case UDESC_CONFIG: 2264 if ((value & 0xff) != 0) { 2265 err = USBD_IOERROR; 2266 goto ret; 2267 } 2268 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2269 memcpy(buf, &ohci_confd, l); 2270 buf = (char *)buf + l; 2271 len -= l; 2272 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2273 totlen += l; 2274 memcpy(buf, &ohci_ifcd, l); 2275 buf = (char *)buf + l; 2276 len -= l; 2277 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2278 totlen += l; 2279 memcpy(buf, &ohci_endpd, l); 2280 break; 2281 case UDESC_STRING: 2282 if (len == 0) 2283 break; 2284 *(u_int8_t *)buf = 0; 2285 totlen = 1; 2286 switch (value & 0xff) { 2287 case 1: /* Vendor */ 2288 totlen = ohci_str(buf, len, sc->sc_vendor); 2289 break; 2290 case 2: /* Product */ 2291 totlen = ohci_str(buf, len, "OHCI root hub"); 2292 break; 2293 } 2294 break; 2295 default: 2296 err = USBD_IOERROR; 2297 goto ret; 2298 } 2299 break; 2300 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2301 if (len > 0) { 2302 *(u_int8_t *)buf = 0; 2303 totlen = 1; 2304 } 2305 break; 2306 case C(UR_GET_STATUS, UT_READ_DEVICE): 2307 if (len > 1) { 2308 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2309 totlen = 2; 2310 } 2311 break; 2312 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2313 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2314 if (len > 1) { 2315 USETW(((usb_status_t *)buf)->wStatus, 0); 2316 totlen = 2; 2317 } 2318 break; 2319 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2320 if (value >= USB_MAX_DEVICES) { 2321 err = USBD_IOERROR; 2322 goto ret; 2323 } 2324 sc->sc_addr = value; 2325 break; 2326 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2327 if (value != 0 && value != 1) { 2328 err = USBD_IOERROR; 2329 goto ret; 2330 } 2331 sc->sc_conf = value; 2332 break; 2333 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2334 break; 2335 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2336 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2337 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2338 err = USBD_IOERROR; 2339 goto ret; 2340 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2341 break; 2342 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2343 break; 2344 /* Hub requests */ 2345 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2346 break; 2347 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2348 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2349 "port=%d feature=%d\n", 2350 index, value)); 2351 if (index < 1 || index > sc->sc_noport) { 2352 err = USBD_IOERROR; 2353 goto ret; 2354 } 2355 port = OHCI_RH_PORT_STATUS(index); 2356 switch(value) { 2357 case UHF_PORT_ENABLE: 2358 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2359 break; 2360 case UHF_PORT_SUSPEND: 2361 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2362 break; 2363 case UHF_PORT_POWER: 2364 /* Yes, writing to the LOW_SPEED bit clears power. */ 2365 OWRITE4(sc, port, UPS_LOW_SPEED); 2366 break; 2367 case UHF_C_PORT_CONNECTION: 2368 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2369 break; 2370 case UHF_C_PORT_ENABLE: 2371 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2372 break; 2373 case UHF_C_PORT_SUSPEND: 2374 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2375 break; 2376 case UHF_C_PORT_OVER_CURRENT: 2377 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2378 break; 2379 case UHF_C_PORT_RESET: 2380 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2381 break; 2382 default: 2383 err = USBD_IOERROR; 2384 goto ret; 2385 } 2386 switch(value) { 2387 case UHF_C_PORT_CONNECTION: 2388 case UHF_C_PORT_ENABLE: 2389 case UHF_C_PORT_SUSPEND: 2390 case UHF_C_PORT_OVER_CURRENT: 2391 case UHF_C_PORT_RESET: 2392 /* Enable RHSC interrupt if condition is cleared. */ 2393 if ((OREAD4(sc, port) >> 16) == 0) 2394 ohci_rhsc_able(sc, 1); 2395 break; 2396 default: 2397 break; 2398 } 2399 break; 2400 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2401 if (value != 0) { 2402 err = USBD_IOERROR; 2403 goto ret; 2404 } 2405 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2406 hubd = ohci_hubd; 2407 hubd.bNbrPorts = sc->sc_noport; 2408 USETW(hubd.wHubCharacteristics, 2409 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2410 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2411 /* XXX overcurrent */ 2412 ); 2413 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2414 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2415 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2416 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2417 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2418 l = min(len, hubd.bDescLength); 2419 totlen = l; 2420 memcpy(buf, &hubd, l); 2421 break; 2422 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2423 if (len != 4) { 2424 err = USBD_IOERROR; 2425 goto ret; 2426 } 2427 memset(buf, 0, len); /* ? XXX */ 2428 totlen = len; 2429 break; 2430 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2431 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2432 index)); 2433 if (index < 1 || index > sc->sc_noport) { 2434 err = USBD_IOERROR; 2435 goto ret; 2436 } 2437 if (len != 4) { 2438 err = USBD_IOERROR; 2439 goto ret; 2440 } 2441 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2442 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2443 v)); 2444 USETW(ps.wPortStatus, v); 2445 USETW(ps.wPortChange, v >> 16); 2446 l = min(len, sizeof ps); 2447 memcpy(buf, &ps, l); 2448 totlen = l; 2449 break; 2450 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2451 err = USBD_IOERROR; 2452 goto ret; 2453 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2454 break; 2455 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2456 if (index < 1 || index > sc->sc_noport) { 2457 err = USBD_IOERROR; 2458 goto ret; 2459 } 2460 port = OHCI_RH_PORT_STATUS(index); 2461 switch(value) { 2462 case UHF_PORT_ENABLE: 2463 OWRITE4(sc, port, UPS_PORT_ENABLED); 2464 break; 2465 case UHF_PORT_SUSPEND: 2466 OWRITE4(sc, port, UPS_SUSPEND); 2467 break; 2468 case UHF_PORT_RESET: 2469 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2470 index)); 2471 OWRITE4(sc, port, UPS_RESET); 2472 for (i = 0; i < 10; i++) { 2473 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2474 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2475 break; 2476 } 2477 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2478 index, OREAD4(sc, port))); 2479 break; 2480 case UHF_PORT_POWER: 2481 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2482 "%d\n", index)); 2483 OWRITE4(sc, port, UPS_PORT_POWER); 2484 break; 2485 default: 2486 err = USBD_IOERROR; 2487 goto ret; 2488 } 2489 break; 2490 default: 2491 err = USBD_IOERROR; 2492 goto ret; 2493 } 2494 xfer->actlen = totlen; 2495 err = USBD_NORMAL_COMPLETION; 2496 ret: 2497 xfer->status = err; 2498 s = splusb(); 2499 usb_transfer_complete(xfer); 2500 splx(s); 2501 return (USBD_IN_PROGRESS); 2502 } 2503 2504 /* Abort a root control request. */ 2505 Static void 2506 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2507 { 2508 /* Nothing to do, all transfers are synchronous. */ 2509 } 2510 2511 /* Close the root pipe. */ 2512 Static void 2513 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2514 { 2515 DPRINTF(("ohci_root_ctrl_close\n")); 2516 /* Nothing to do. */ 2517 } 2518 2519 Static usbd_status 2520 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2521 { 2522 usbd_status err; 2523 2524 /* Insert last in queue. */ 2525 err = usb_insert_transfer(xfer); 2526 if (err) 2527 return (err); 2528 2529 /* Pipe isn't running, start first */ 2530 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2531 } 2532 2533 Static usbd_status 2534 ohci_root_intr_start(usbd_xfer_handle xfer) 2535 { 2536 usbd_pipe_handle pipe = xfer->pipe; 2537 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2538 2539 if (sc->sc_dying) 2540 return (USBD_IOERROR); 2541 2542 sc->sc_intrxfer = xfer; 2543 2544 return (USBD_IN_PROGRESS); 2545 } 2546 2547 /* Abort a root interrupt request. */ 2548 Static void 2549 ohci_root_intr_abort(usbd_xfer_handle xfer) 2550 { 2551 int s; 2552 2553 if (xfer->pipe->intrxfer == xfer) { 2554 DPRINTF(("ohci_root_intr_abort: remove\n")); 2555 xfer->pipe->intrxfer = NULL; 2556 } 2557 xfer->status = USBD_CANCELLED; 2558 s = splusb(); 2559 usb_transfer_complete(xfer); 2560 splx(s); 2561 } 2562 2563 /* Close the root pipe. */ 2564 Static void 2565 ohci_root_intr_close(usbd_pipe_handle pipe) 2566 { 2567 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2568 2569 DPRINTF(("ohci_root_intr_close\n")); 2570 2571 sc->sc_intrxfer = NULL; 2572 } 2573 2574 /************************/ 2575 2576 Static usbd_status 2577 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2578 { 2579 usbd_status err; 2580 2581 /* Insert last in queue. */ 2582 err = usb_insert_transfer(xfer); 2583 if (err) 2584 return (err); 2585 2586 /* Pipe isn't running, start first */ 2587 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2588 } 2589 2590 Static usbd_status 2591 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2592 { 2593 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2594 usbd_status err; 2595 2596 if (sc->sc_dying) 2597 return (USBD_IOERROR); 2598 2599 #ifdef DIAGNOSTIC 2600 if (!(xfer->rqflags & URQ_REQUEST)) { 2601 /* XXX panic */ 2602 printf("ohci_device_ctrl_transfer: not a request\n"); 2603 return (USBD_INVAL); 2604 } 2605 #endif 2606 2607 err = ohci_device_request(xfer); 2608 if (err) 2609 return (err); 2610 2611 if (sc->sc_bus.use_polling) 2612 ohci_waitintr(sc, xfer); 2613 return (USBD_IN_PROGRESS); 2614 } 2615 2616 /* Abort a device control request. */ 2617 Static void 2618 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2619 { 2620 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2621 ohci_abort_xfer(xfer, USBD_CANCELLED); 2622 } 2623 2624 /* Close a device control pipe. */ 2625 Static void 2626 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2627 { 2628 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2629 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2630 2631 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2632 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2633 ohci_free_std(sc, opipe->tail.td); 2634 } 2635 2636 /************************/ 2637 2638 Static void 2639 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2640 { 2641 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2642 2643 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2644 } 2645 2646 Static void 2647 ohci_noop(usbd_pipe_handle pipe) 2648 { 2649 } 2650 2651 Static usbd_status 2652 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2653 { 2654 usbd_status err; 2655 2656 /* Insert last in queue. */ 2657 err = usb_insert_transfer(xfer); 2658 if (err) 2659 return (err); 2660 2661 /* Pipe isn't running, start first */ 2662 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2663 } 2664 2665 Static usbd_status 2666 ohci_device_bulk_start(usbd_xfer_handle xfer) 2667 { 2668 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2669 usbd_device_handle dev = opipe->pipe.device; 2670 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2671 int addr = dev->address; 2672 ohci_soft_td_t *data, *tail, *tdp; 2673 ohci_soft_ed_t *sed; 2674 int s, len, isread, endpt; 2675 usbd_status err; 2676 2677 if (sc->sc_dying) 2678 return (USBD_IOERROR); 2679 2680 #ifdef DIAGNOSTIC 2681 if (xfer->rqflags & URQ_REQUEST) { 2682 /* XXX panic */ 2683 printf("ohci_device_bulk_start: a request\n"); 2684 return (USBD_INVAL); 2685 } 2686 #endif 2687 2688 len = xfer->length; 2689 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2690 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2691 sed = opipe->sed; 2692 2693 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2694 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2695 endpt)); 2696 2697 opipe->u.bulk.isread = isread; 2698 opipe->u.bulk.length = len; 2699 2700 /* Update device address */ 2701 sed->ed.ed_flags = htole32( 2702 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2703 OHCI_ED_SET_FA(addr)); 2704 2705 /* Allocate a chain of new TDs (including a new tail). */ 2706 data = opipe->tail.td; 2707 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2708 data, &tail); 2709 /* We want interrupt at the end of the transfer. */ 2710 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2711 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2712 tail->flags |= OHCI_CALL_DONE; 2713 tail = tail->nexttd; /* point at sentinel */ 2714 if (err) 2715 return (err); 2716 2717 tail->xfer = NULL; 2718 xfer->hcpriv = data; 2719 2720 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2721 "td_cbp=0x%08x td_be=0x%08x\n", 2722 (int)le32toh(sed->ed.ed_flags), 2723 (int)le32toh(data->td.td_flags), 2724 (int)le32toh(data->td.td_cbp), 2725 (int)le32toh(data->td.td_be))); 2726 2727 #ifdef OHCI_DEBUG 2728 if (ohcidebug > 5) { 2729 ohci_dump_ed(sed); 2730 ohci_dump_tds(data); 2731 } 2732 #endif 2733 2734 /* Insert ED in schedule */ 2735 s = splusb(); 2736 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2737 tdp->xfer = xfer; 2738 } 2739 sed->ed.ed_tailp = htole32(tail->physaddr); 2740 opipe->tail.td = tail; 2741 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2742 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2743 if (xfer->timeout && !sc->sc_bus.use_polling) { 2744 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2745 ohci_timeout, xfer); 2746 } 2747 2748 #if 0 2749 /* This goes wrong if we are too slow. */ 2750 if (ohcidebug > 10) { 2751 delay(10000); 2752 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2753 OREAD4(sc, OHCI_COMMAND_STATUS))); 2754 ohci_dump_ed(sed); 2755 ohci_dump_tds(data); 2756 } 2757 #endif 2758 2759 splx(s); 2760 2761 return (USBD_IN_PROGRESS); 2762 } 2763 2764 Static void 2765 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2766 { 2767 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2768 ohci_abort_xfer(xfer, USBD_CANCELLED); 2769 } 2770 2771 /* 2772 * Close a device bulk pipe. 2773 */ 2774 Static void 2775 ohci_device_bulk_close(usbd_pipe_handle pipe) 2776 { 2777 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2778 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2779 2780 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2781 ohci_close_pipe(pipe, sc->sc_bulk_head); 2782 ohci_free_std(sc, opipe->tail.td); 2783 } 2784 2785 /************************/ 2786 2787 Static usbd_status 2788 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2789 { 2790 usbd_status err; 2791 2792 /* Insert last in queue. */ 2793 err = usb_insert_transfer(xfer); 2794 if (err) 2795 return (err); 2796 2797 /* Pipe isn't running, start first */ 2798 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2799 } 2800 2801 Static usbd_status 2802 ohci_device_intr_start(usbd_xfer_handle xfer) 2803 { 2804 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2805 usbd_device_handle dev = opipe->pipe.device; 2806 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2807 ohci_soft_ed_t *sed = opipe->sed; 2808 ohci_soft_td_t *data, *tail; 2809 int len; 2810 int s; 2811 2812 if (sc->sc_dying) 2813 return (USBD_IOERROR); 2814 2815 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2816 "flags=%d priv=%p\n", 2817 xfer, xfer->length, xfer->flags, xfer->priv)); 2818 2819 #ifdef DIAGNOSTIC 2820 if (xfer->rqflags & URQ_REQUEST) 2821 panic("ohci_device_intr_transfer: a request\n"); 2822 #endif 2823 2824 len = xfer->length; 2825 2826 data = opipe->tail.td; 2827 tail = ohci_alloc_std(sc); 2828 if (tail == NULL) 2829 return (USBD_NOMEM); 2830 tail->xfer = NULL; 2831 2832 data->td.td_flags = htole32( 2833 OHCI_TD_IN | OHCI_TD_NOCC | 2834 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2835 if (xfer->flags & USBD_SHORT_XFER_OK) 2836 data->td.td_flags |= htole32(OHCI_TD_R); 2837 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2838 data->nexttd = tail; 2839 data->td.td_nexttd = htole32(tail->physaddr); 2840 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2841 data->len = len; 2842 data->xfer = xfer; 2843 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2844 xfer->hcpriv = data; 2845 2846 #ifdef OHCI_DEBUG 2847 if (ohcidebug > 5) { 2848 DPRINTF(("ohci_device_intr_transfer:\n")); 2849 ohci_dump_ed(sed); 2850 ohci_dump_tds(data); 2851 } 2852 #endif 2853 2854 /* Insert ED in schedule */ 2855 s = splusb(); 2856 sed->ed.ed_tailp = htole32(tail->physaddr); 2857 opipe->tail.td = tail; 2858 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2859 2860 #if 0 2861 /* 2862 * This goes horribly wrong, printing thousands of descriptors, 2863 * because false references are followed due to the fact that the 2864 * TD is gone. 2865 */ 2866 if (ohcidebug > 5) { 2867 usb_delay_ms(&sc->sc_bus, 5); 2868 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2869 OREAD4(sc, OHCI_COMMAND_STATUS))); 2870 ohci_dump_ed(sed); 2871 ohci_dump_tds(data); 2872 } 2873 #endif 2874 splx(s); 2875 2876 return (USBD_IN_PROGRESS); 2877 } 2878 2879 /* Abort a device control request. */ 2880 Static void 2881 ohci_device_intr_abort(usbd_xfer_handle xfer) 2882 { 2883 if (xfer->pipe->intrxfer == xfer) { 2884 DPRINTF(("ohci_device_intr_abort: remove\n")); 2885 xfer->pipe->intrxfer = NULL; 2886 } 2887 ohci_abort_xfer(xfer, USBD_CANCELLED); 2888 } 2889 2890 /* Close a device interrupt pipe. */ 2891 Static void 2892 ohci_device_intr_close(usbd_pipe_handle pipe) 2893 { 2894 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2895 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2896 int nslots = opipe->u.intr.nslots; 2897 int pos = opipe->u.intr.pos; 2898 int j; 2899 ohci_soft_ed_t *p, *sed = opipe->sed; 2900 int s; 2901 2902 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2903 pipe, nslots, pos)); 2904 s = splusb(); 2905 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2906 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2907 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2908 usb_delay_ms(&sc->sc_bus, 2); 2909 2910 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2911 ; 2912 #ifdef DIAGNOSTIC 2913 if (p == NULL) 2914 panic("ohci_device_intr_close: ED not found\n"); 2915 #endif 2916 p->next = sed->next; 2917 p->ed.ed_nexted = sed->ed.ed_nexted; 2918 splx(s); 2919 2920 for (j = 0; j < nslots; j++) 2921 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2922 2923 ohci_free_std(sc, opipe->tail.td); 2924 ohci_free_sed(sc, opipe->sed); 2925 } 2926 2927 Static usbd_status 2928 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2929 { 2930 int i, j, s, best; 2931 u_int npoll, slow, shigh, nslots; 2932 u_int bestbw, bw; 2933 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2934 2935 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2936 if (ival == 0) { 2937 printf("ohci_setintr: 0 interval\n"); 2938 return (USBD_INVAL); 2939 } 2940 2941 npoll = OHCI_NO_INTRS; 2942 while (npoll > ival) 2943 npoll /= 2; 2944 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2945 2946 /* 2947 * We now know which level in the tree the ED must go into. 2948 * Figure out which slot has most bandwidth left over. 2949 * Slots to examine: 2950 * npoll 2951 * 1 0 2952 * 2 1 2 2953 * 4 3 4 5 6 2954 * 8 7 8 9 10 11 12 13 14 2955 * N (N-1) .. (N-1+N-1) 2956 */ 2957 slow = npoll-1; 2958 shigh = slow + npoll; 2959 nslots = OHCI_NO_INTRS / npoll; 2960 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2961 bw = 0; 2962 for (j = 0; j < nslots; j++) 2963 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2964 if (bw < bestbw) { 2965 best = i; 2966 bestbw = bw; 2967 } 2968 } 2969 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2970 best, slow, shigh, bestbw)); 2971 2972 s = splusb(); 2973 hsed = sc->sc_eds[best]; 2974 sed->next = hsed->next; 2975 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2976 hsed->next = sed; 2977 hsed->ed.ed_nexted = htole32(sed->physaddr); 2978 splx(s); 2979 2980 for (j = 0; j < nslots; j++) 2981 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2982 opipe->u.intr.nslots = nslots; 2983 opipe->u.intr.pos = best; 2984 2985 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2986 return (USBD_NORMAL_COMPLETION); 2987 } 2988 2989 /***********************/ 2990 2991 usbd_status 2992 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 2993 { 2994 usbd_status err; 2995 2996 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2997 2998 /* Put it on our queue, */ 2999 err = usb_insert_transfer(xfer); 3000 3001 /* bail out on error, */ 3002 if (err && err != USBD_IN_PROGRESS) 3003 return (err); 3004 3005 /* XXX should check inuse here */ 3006 3007 /* insert into schedule, */ 3008 ohci_device_isoc_enter(xfer); 3009 3010 /* and start if the pipe wasn't running */ 3011 if (!err) 3012 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3013 3014 return (err); 3015 } 3016 3017 void 3018 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3019 { 3020 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3021 usbd_device_handle dev = opipe->pipe.device; 3022 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3023 ohci_soft_ed_t *sed = opipe->sed; 3024 struct iso *iso = &opipe->u.iso; 3025 ohci_soft_itd_t *sitd, *nsitd; 3026 ohci_physaddr_t buf, offs, noffs, bp0; 3027 int i, ncur, nframes; 3028 int s; 3029 3030 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3031 "nframes=%d\n", 3032 iso->inuse, iso->next, xfer, xfer->nframes)); 3033 3034 if (sc->sc_dying) 3035 return; 3036 3037 if (iso->next == -1) { 3038 /* Not in use yet, schedule it a few frames ahead. */ 3039 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3040 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3041 iso->next)); 3042 } 3043 3044 sitd = opipe->tail.itd; 3045 buf = DMAADDR(&xfer->dmabuf); 3046 bp0 = OHCI_PAGE(buf); 3047 offs = OHCI_PAGE_OFFSET(buf); 3048 nframes = xfer->nframes; 3049 xfer->hcpriv = sitd; 3050 for (i = ncur = 0; i < nframes; i++, ncur++) { 3051 noffs = offs + xfer->frlengths[i]; 3052 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3053 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3054 3055 /* Allocate next ITD */ 3056 nsitd = ohci_alloc_sitd(sc); 3057 if (nsitd == NULL) { 3058 /* XXX what now? */ 3059 printf("%s: isoc TD alloc failed\n", 3060 USBDEVNAME(sc->sc_bus.bdev)); 3061 return; 3062 } 3063 3064 /* Fill current ITD */ 3065 sitd->itd.itd_flags = htole32( 3066 OHCI_ITD_NOCC | 3067 OHCI_ITD_SET_SF(iso->next) | 3068 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3069 OHCI_ITD_SET_FC(ncur)); 3070 sitd->itd.itd_bp0 = htole32(bp0); 3071 sitd->nextitd = nsitd; 3072 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3073 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3074 sitd->xfer = xfer; 3075 sitd->flags = 0; 3076 3077 sitd = nsitd; 3078 iso->next = iso->next + ncur; 3079 bp0 = OHCI_PAGE(buf + offs); 3080 ncur = 0; 3081 } 3082 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3083 offs = noffs; 3084 } 3085 nsitd = ohci_alloc_sitd(sc); 3086 if (nsitd == NULL) { 3087 /* XXX what now? */ 3088 printf("%s: isoc TD alloc failed\n", 3089 USBDEVNAME(sc->sc_bus.bdev)); 3090 return; 3091 } 3092 /* Fixup last used ITD */ 3093 sitd->itd.itd_flags = htole32( 3094 OHCI_ITD_NOCC | 3095 OHCI_ITD_SET_SF(iso->next) | 3096 OHCI_ITD_SET_DI(0) | 3097 OHCI_ITD_SET_FC(ncur)); 3098 sitd->itd.itd_bp0 = htole32(bp0); 3099 sitd->nextitd = nsitd; 3100 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3101 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3102 sitd->xfer = xfer; 3103 sitd->flags = OHCI_CALL_DONE; 3104 3105 iso->next = iso->next + ncur; 3106 iso->inuse += nframes; 3107 3108 xfer->actlen = offs; /* XXX pretend we did it all */ 3109 3110 xfer->status = USBD_IN_PROGRESS; 3111 3112 #ifdef OHCI_DEBUG 3113 if (ohcidebug > 5) { 3114 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3115 le32toh(sc->sc_hcca->hcca_frame_number))); 3116 ohci_dump_itds(xfer->hcpriv); 3117 ohci_dump_ed(sed); 3118 } 3119 #endif 3120 3121 s = splusb(); 3122 opipe->tail.itd = nsitd; 3123 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3124 splx(s); 3125 3126 #ifdef OHCI_DEBUG 3127 if (ohcidebug > 5) { 3128 delay(150000); 3129 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3130 le32toh(sc->sc_hcca->hcca_frame_number))); 3131 ohci_dump_itds(xfer->hcpriv); 3132 ohci_dump_ed(sed); 3133 } 3134 #endif 3135 } 3136 3137 usbd_status 3138 ohci_device_isoc_start(usbd_xfer_handle xfer) 3139 { 3140 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3141 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3142 3143 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3144 3145 if (sc->sc_dying) 3146 return (USBD_IOERROR); 3147 3148 #ifdef DIAGNOSTIC 3149 if (xfer->status != USBD_IN_PROGRESS) 3150 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3151 #endif 3152 3153 /* XXX anything to do? */ 3154 3155 return (USBD_IN_PROGRESS); 3156 } 3157 3158 void 3159 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3160 { 3161 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3162 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3163 ohci_soft_ed_t *sed; 3164 ohci_soft_itd_t *sitd; 3165 int s; 3166 3167 s = splusb(); 3168 3169 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3170 3171 /* Transfer is already done. */ 3172 if (xfer->status != USBD_NOT_STARTED && 3173 xfer->status != USBD_IN_PROGRESS) { 3174 splx(s); 3175 printf("ohci_device_isoc_abort: early return\n"); 3176 return; 3177 } 3178 3179 /* Give xfer the requested abort code. */ 3180 xfer->status = USBD_CANCELLED; 3181 3182 sed = opipe->sed; 3183 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3184 3185 sitd = xfer->hcpriv; 3186 #ifdef DIAGNOSTIC 3187 if (sitd == NULL) { 3188 splx(s); 3189 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3190 return; 3191 } 3192 #endif 3193 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3194 #ifdef DIAGNOSTIC 3195 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3196 sitd->isdone = 1; 3197 #endif 3198 } 3199 3200 splx(s); 3201 3202 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3203 3204 s = splusb(); 3205 3206 /* Run callback. */ 3207 usb_transfer_complete(xfer); 3208 3209 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3210 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3211 3212 splx(s); 3213 } 3214 3215 void 3216 ohci_device_isoc_done(usbd_xfer_handle xfer) 3217 { 3218 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3219 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3220 ohci_soft_itd_t *sitd, *nsitd; 3221 3222 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3223 3224 for (sitd = xfer->hcpriv; 3225 !(sitd->flags & OHCI_CALL_DONE); 3226 sitd = nsitd) { 3227 nsitd = sitd->nextitd; 3228 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3229 ohci_free_sitd(sc, sitd); 3230 } 3231 ohci_free_sitd(sc, sitd); 3232 xfer->hcpriv = NULL; 3233 } 3234 3235 usbd_status 3236 ohci_setup_isoc(usbd_pipe_handle pipe) 3237 { 3238 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3239 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3240 struct iso *iso = &opipe->u.iso; 3241 int s; 3242 3243 iso->next = -1; 3244 iso->inuse = 0; 3245 3246 s = splusb(); 3247 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3248 splx(s); 3249 3250 return (USBD_NORMAL_COMPLETION); 3251 } 3252 3253 void 3254 ohci_device_isoc_close(usbd_pipe_handle pipe) 3255 { 3256 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3257 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3258 int s; 3259 3260 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3261 3262 s = splusb(); 3263 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3264 splx(s); 3265 ohci_close_pipe(pipe, sc->sc_isoc_head); 3266 #ifdef DIAGNOSTIC 3267 opipe->tail.itd->isdone = 1; 3268 #endif 3269 ohci_free_sitd(sc, opipe->tail.itd); 3270 } 3271