1 /* $OpenBSD: if_uath.c,v 1.34 2008/06/08 20:43:31 yuo Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Driver for Atheros AR5005UG/AR5005UX chipsets. 22 * http://www.atheros.com/pt/bulletins/AR5005UGBulletin.pdf 23 * http://www.atheros.com/pt/bulletins/AR5005UXBulletin.pdf 24 * 25 * IMPORTANT NOTICE: 26 * This driver was written without any documentation or support from Atheros 27 * Communications. It is based on a black-box analysis of the Windows binary 28 * driver. It handles both pre and post-firmware devices. 29 */ 30 31 #include "bpfilter.h" 32 33 #include <sys/param.h> 34 #include <sys/sockio.h> 35 #include <sys/sysctl.h> 36 #include <sys/mbuf.h> 37 #include <sys/kernel.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/timeout.h> 41 #include <sys/conf.h> 42 #include <sys/device.h> 43 44 #include <machine/bus.h> 45 #include <machine/endian.h> 46 #include <machine/intr.h> 47 48 #if NBPFILTER > 0 49 #include <net/bpf.h> 50 #endif 51 #include <net/if.h> 52 #include <net/if_arp.h> 53 #include <net/if_dl.h> 54 #include <net/if_media.h> 55 #include <net/if_types.h> 56 57 #include <netinet/in.h> 58 #include <netinet/in_systm.h> 59 #include <netinet/in_var.h> 60 #include <netinet/if_ether.h> 61 #include <netinet/ip.h> 62 63 #include <net80211/ieee80211_var.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/rndvar.h> 67 #include <crypto/arc4.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> /* needs_reattach() */ 72 #include <dev/usb/usbdi_util.h> 73 #include <dev/usb/usbdevs.h> 74 75 #include <dev/usb/if_uathreg.h> 76 #include <dev/usb/if_uathvar.h> 77 78 #ifdef USB_DEBUG 79 #define UATH_DEBUG 80 #endif 81 82 #ifdef UATH_DEBUG 83 #define DPRINTF(x) do { if (uath_debug) printf x; } while (0) 84 #define DPRINTFN(n, x) do { if (uath_debug >= (n)) printf x; } while (0) 85 int uath_debug = 1; 86 #else 87 #define DPRINTF(x) 88 #define DPRINTFN(n, x) 89 #endif 90 91 /*- 92 * Various supported device vendors/products. 93 * UB51: AR5005UG 802.11b/g, UB52: AR5005UX 802.11a/b/g 94 */ 95 #define UATH_DEV(v, p, f) \ 96 { { USB_VENDOR_##v, USB_PRODUCT_##v##_##p }, (f) }, \ 97 { { USB_VENDOR_##v, USB_PRODUCT_##v##_##p##_NF }, \ 98 (f) | UATH_FLAG_PRE_FIRMWARE } 99 #define UATH_DEV_UG(v, p) UATH_DEV(v, p, 0) 100 #define UATH_DEV_UX(v, p) UATH_DEV(v, p, UATH_FLAG_ABG) 101 static const struct uath_type { 102 struct usb_devno dev; 103 unsigned int flags; 104 #define UATH_FLAG_PRE_FIRMWARE (1 << 0) 105 #define UATH_FLAG_ABG (1 << 1) 106 } uath_devs[] = { 107 UATH_DEV_UG(ACCTON, SMCWUSBTG2), 108 UATH_DEV_UG(ATHEROS, AR5523), 109 UATH_DEV_UG(ATHEROS2, AR5523_1), 110 UATH_DEV_UG(ATHEROS2, AR5523_2), 111 UATH_DEV_UX(ATHEROS2, AR5523_3), 112 UATH_DEV_UG(CONCEPTRONIC, AR5523_1), 113 UATH_DEV_UX(CONCEPTRONIC, AR5523_2), 114 UATH_DEV_UX(DLINK, DWLAG122), 115 UATH_DEV_UX(DLINK, DWLAG132), 116 UATH_DEV_UG(DLINK, DWLG132), 117 UATH_DEV_UG(GIGASET, AR5523), 118 UATH_DEV_UG(GIGASET, SMCWUSBTG), 119 UATH_DEV_UG(GLOBALSUN, AR5523_1), 120 UATH_DEV_UX(GLOBALSUN, AR5523_2), 121 UATH_DEV_UG(IODATA, USBWNG54US), 122 UATH_DEV_UG(MELCO, WLIU2KAMG54), 123 UATH_DEV_UX(NETGEAR, WG111U), 124 UATH_DEV_UG(NETGEAR3, WG111T), 125 UATH_DEV_UG(NETGEAR3, WPN111), 126 UATH_DEV_UG(UMEDIA, AR5523_1), 127 UATH_DEV_UX(UMEDIA, AR5523_2), 128 UATH_DEV_UG(UMEDIA, TEW444UBEU), 129 UATH_DEV_UG(WISTRONNEWEB, AR5523_1), 130 UATH_DEV_UX(WISTRONNEWEB, AR5523_2), 131 UATH_DEV_UG(ZCOM, AR5523) 132 }; 133 #define uath_lookup(v, p) \ 134 ((const struct uath_type *)usb_lookup(uath_devs, v, p)) 135 136 void uath_attachhook(void *); 137 int uath_open_pipes(struct uath_softc *); 138 void uath_close_pipes(struct uath_softc *); 139 int uath_alloc_tx_data_list(struct uath_softc *); 140 void uath_free_tx_data_list(struct uath_softc *); 141 int uath_alloc_rx_data_list(struct uath_softc *); 142 void uath_free_rx_data_list(struct uath_softc *); 143 int uath_alloc_tx_cmd_list(struct uath_softc *); 144 void uath_free_tx_cmd_list(struct uath_softc *); 145 int uath_alloc_rx_cmd_list(struct uath_softc *); 146 void uath_free_rx_cmd_list(struct uath_softc *); 147 int uath_media_change(struct ifnet *); 148 void uath_stat(void *); 149 void uath_next_scan(void *); 150 void uath_task(void *); 151 int uath_newstate(struct ieee80211com *, enum ieee80211_state, int); 152 #ifdef UATH_DEBUG 153 void uath_dump_cmd(const uint8_t *, int, char); 154 #endif 155 int uath_cmd(struct uath_softc *, uint32_t, const void *, int, void *, 156 int); 157 int uath_cmd_write(struct uath_softc *, uint32_t, const void *, int, int); 158 int uath_cmd_read(struct uath_softc *, uint32_t, const void *, int, void *, 159 int); 160 int uath_write_reg(struct uath_softc *, uint32_t, uint32_t); 161 int uath_write_multi(struct uath_softc *, uint32_t, const void *, int); 162 int uath_read_reg(struct uath_softc *, uint32_t, uint32_t *); 163 int uath_read_eeprom(struct uath_softc *, uint32_t, void *); 164 void uath_cmd_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status); 165 void uath_data_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status); 166 void uath_data_txeof(usbd_xfer_handle, usbd_private_handle, usbd_status); 167 int uath_tx_null(struct uath_softc *); 168 int uath_tx_data(struct uath_softc *, struct mbuf *, 169 struct ieee80211_node *); 170 void uath_start(struct ifnet *); 171 void uath_watchdog(struct ifnet *); 172 int uath_ioctl(struct ifnet *, u_long, caddr_t); 173 int uath_query_eeprom(struct uath_softc *); 174 int uath_reset(struct uath_softc *); 175 int uath_reset_tx_queues(struct uath_softc *); 176 int uath_wme_init(struct uath_softc *); 177 int uath_set_chan(struct uath_softc *, struct ieee80211_channel *); 178 int uath_set_key(struct uath_softc *, const struct ieee80211_key *, int); 179 int uath_set_keys(struct uath_softc *); 180 int uath_set_rates(struct uath_softc *, const struct ieee80211_rateset *); 181 int uath_set_rxfilter(struct uath_softc *, uint32_t, uint32_t); 182 int uath_set_led(struct uath_softc *, int, int); 183 int uath_switch_channel(struct uath_softc *, struct ieee80211_channel *); 184 int uath_init(struct ifnet *); 185 void uath_stop(struct ifnet *, int); 186 int uath_loadfirmware(struct uath_softc *, const u_char *, int); 187 int uath_activate(struct device *, enum devact); 188 189 int uath_match(struct device *, void *, void *); 190 void uath_attach(struct device *, struct device *, void *); 191 int uath_detach(struct device *, int); 192 int uath_activate(struct device *, enum devact); 193 194 struct cfdriver uath_cd = { 195 NULL, "uath", DV_DULL 196 }; 197 198 const struct cfattach uath_ca = { 199 sizeof(struct uath_softc), 200 uath_match, 201 uath_attach, 202 uath_detach, 203 uath_activate, 204 }; 205 206 int 207 uath_match(struct device *parent, void *match, void *aux) 208 { 209 struct usb_attach_arg *uaa = aux; 210 211 if (uaa->iface != NULL) 212 return UMATCH_NONE; 213 214 return (uath_lookup(uaa->vendor, uaa->product) != NULL) ? 215 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 216 } 217 218 void 219 uath_attachhook(void *xsc) 220 { 221 struct uath_softc *sc = xsc; 222 u_char *fw; 223 size_t size; 224 int error; 225 226 if ((error = loadfirmware("uath-ar5523", &fw, &size)) != 0) { 227 printf("%s: error %d, could not read firmware %s\n", 228 sc->sc_dev.dv_xname, error, "uath-ar5523"); 229 return; 230 } 231 232 error = uath_loadfirmware(sc, fw, size); 233 free(fw, M_DEVBUF); 234 235 if (error == 0) { 236 usb_port_status_t status; 237 238 /* 239 * Hack alert: the device doesn't always gracefully detach 240 * from the bus after a firmware upload. We need to force 241 * a port reset and a re-exploration on the parent hub. 242 */ 243 usbd_reset_port(sc->sc_uhub, sc->sc_port, &status); 244 usb_needs_reattach(sc->sc_udev); 245 } else { 246 printf("%s: could not load firmware (error=%s)\n", 247 sc->sc_dev.dv_xname, usbd_errstr(error)); 248 } 249 } 250 251 void 252 uath_attach(struct device *parent, struct device *self, void *aux) 253 { 254 struct uath_softc *sc = (struct uath_softc *)self; 255 struct usb_attach_arg *uaa = aux; 256 struct ieee80211com *ic = &sc->sc_ic; 257 struct ifnet *ifp = &ic->ic_if; 258 usbd_status error; 259 int i; 260 261 sc->sc_udev = uaa->device; 262 sc->sc_uhub = uaa->device->myhub; 263 sc->sc_port = uaa->port; 264 265 sc->sc_flags = uath_lookup(uaa->vendor, uaa->product)->flags; 266 267 if (usbd_set_config_no(sc->sc_udev, UATH_CONFIG_NO, 0) != 0) { 268 printf("%s: could not set configuration no\n", 269 sc->sc_dev.dv_xname); 270 return; 271 } 272 273 /* get the first interface handle */ 274 error = usbd_device2interface_handle(sc->sc_udev, UATH_IFACE_INDEX, 275 &sc->sc_iface); 276 if (error != 0) { 277 printf("%s: could not get interface handle\n", 278 sc->sc_dev.dv_xname); 279 return; 280 } 281 282 /* 283 * We must open the pipes early because they're used to upload the 284 * firmware (pre-firmware devices) or to send firmware commands. 285 */ 286 if (uath_open_pipes(sc) != 0) { 287 printf("%s: could not open pipes\n", sc->sc_dev.dv_xname); 288 return; 289 } 290 291 if (sc->sc_flags & UATH_FLAG_PRE_FIRMWARE) { 292 if (rootvp == NULL) 293 mountroothook_establish(uath_attachhook, sc); 294 else 295 uath_attachhook(sc); 296 return; 297 } 298 299 /* 300 * Only post-firmware devices here. 301 */ 302 usb_init_task(&sc->sc_task, uath_task, sc); 303 timeout_set(&sc->scan_to, uath_next_scan, sc); 304 timeout_set(&sc->stat_to, uath_stat, sc); 305 306 /* 307 * Allocate xfers for firmware commands. 308 */ 309 if (uath_alloc_tx_cmd_list(sc) != 0) { 310 printf("%s: could not allocate Tx command list\n", 311 sc->sc_dev.dv_xname); 312 goto fail1; 313 } 314 if (uath_alloc_rx_cmd_list(sc) != 0) { 315 printf("%s: could not allocate Rx command list\n", 316 sc->sc_dev.dv_xname); 317 goto fail2; 318 } 319 320 /* 321 * Queue Rx command xfers. 322 */ 323 for (i = 0; i < UATH_RX_CMD_LIST_COUNT; i++) { 324 struct uath_rx_cmd *cmd = &sc->rx_cmd[i]; 325 326 usbd_setup_xfer(cmd->xfer, sc->cmd_rx_pipe, cmd, cmd->buf, 327 UATH_MAX_RXCMDSZ, USBD_SHORT_XFER_OK | USBD_NO_COPY, 328 USBD_NO_TIMEOUT, uath_cmd_rxeof); 329 error = usbd_transfer(cmd->xfer); 330 if (error != USBD_IN_PROGRESS && error != 0) { 331 printf("%s: could not queue Rx command xfer\n", 332 sc->sc_dev.dv_xname); 333 goto fail3; 334 } 335 } 336 337 /* 338 * We're now ready to send/receive firmware commands. 339 */ 340 if (uath_reset(sc) != 0) { 341 printf("%s: could not initialize adapter\n", 342 sc->sc_dev.dv_xname); 343 goto fail3; 344 } 345 if (uath_query_eeprom(sc) != 0) { 346 printf("%s: could not read EEPROM\n", sc->sc_dev.dv_xname); 347 goto fail3; 348 } 349 350 printf("%s: MAC/BBP AR5523, RF AR%c112, address %s\n", 351 sc->sc_dev.dv_xname, (sc->sc_flags & UATH_FLAG_ABG) ? '5': '2', 352 ether_sprintf(ic->ic_myaddr)); 353 354 /* 355 * Allocate xfers for Tx/Rx data pipes. 356 */ 357 if (uath_alloc_tx_data_list(sc) != 0) { 358 printf("%s: could not allocate Tx data list\n", 359 sc->sc_dev.dv_xname); 360 goto fail3; 361 } 362 if (uath_alloc_rx_data_list(sc) != 0) { 363 printf("%s: could not allocate Rx data list\n", 364 sc->sc_dev.dv_xname); 365 goto fail4; 366 } 367 368 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 369 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 370 ic->ic_state = IEEE80211_S_INIT; 371 372 /* set device capabilities */ 373 ic->ic_caps = 374 IEEE80211_C_MONITOR | /* monitor mode supported */ 375 IEEE80211_C_TXPMGT | /* tx power management */ 376 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 377 IEEE80211_C_SHSLOT | /* short slot time supported */ 378 IEEE80211_C_WEP; /* h/w WEP */ 379 380 /* set supported .11b and .11g rates */ 381 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 382 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 383 384 /* set supported .11b and .11g channels (1 through 14) */ 385 for (i = 1; i <= 14; i++) { 386 ic->ic_channels[i].ic_freq = 387 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 388 ic->ic_channels[i].ic_flags = 389 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 390 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 391 } 392 393 ifp->if_softc = sc; 394 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 395 ifp->if_init = uath_init; 396 ifp->if_ioctl = uath_ioctl; 397 ifp->if_start = uath_start; 398 ifp->if_watchdog = uath_watchdog; 399 IFQ_SET_READY(&ifp->if_snd); 400 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 401 402 if_attach(ifp); 403 ieee80211_ifattach(ifp); 404 405 /* override state transition machine */ 406 sc->sc_newstate = ic->ic_newstate; 407 ic->ic_newstate = uath_newstate; 408 ieee80211_media_init(ifp, uath_media_change, ieee80211_media_status); 409 410 #if NBPFILTER > 0 411 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 412 sizeof (struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN); 413 414 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 415 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 416 sc->sc_rxtap.wr_ihdr.it_present = htole32(UATH_RX_RADIOTAP_PRESENT); 417 418 sc->sc_txtap_len = sizeof sc->sc_txtapu; 419 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 420 sc->sc_txtap.wt_ihdr.it_present = htole32(UATH_TX_RADIOTAP_PRESENT); 421 #endif 422 423 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 424 &sc->sc_dev); 425 426 return; 427 428 fail4: uath_free_tx_data_list(sc); 429 fail3: uath_free_rx_cmd_list(sc); 430 fail2: uath_free_tx_cmd_list(sc); 431 fail1: uath_close_pipes(sc); 432 } 433 434 int 435 uath_detach(struct device *self, int flags) 436 { 437 struct uath_softc *sc = (struct uath_softc *)self; 438 struct ifnet *ifp = &sc->sc_ic.ic_if; 439 int s; 440 441 s = splnet(); 442 443 if (sc->sc_flags & UATH_FLAG_PRE_FIRMWARE) { 444 uath_close_pipes(sc); 445 splx(s); 446 return 0; 447 } 448 449 /* post-firmware device */ 450 451 usb_rem_task(sc->sc_udev, &sc->sc_task); 452 timeout_del(&sc->scan_to); 453 timeout_del(&sc->stat_to); 454 455 /* abort and free xfers */ 456 uath_free_tx_data_list(sc); 457 uath_free_rx_data_list(sc); 458 uath_free_tx_cmd_list(sc); 459 uath_free_rx_cmd_list(sc); 460 461 /* close Tx/Rx pipes */ 462 uath_close_pipes(sc); 463 464 ieee80211_ifdetach(ifp); /* free all nodes */ 465 if_detach(ifp); 466 467 splx(s); 468 469 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 470 &sc->sc_dev); 471 472 return 0; 473 } 474 475 int 476 uath_open_pipes(struct uath_softc *sc) 477 { 478 int error; 479 480 /* 481 * XXX pipes numbers are hardcoded because we don't have any way 482 * to distinguish the data pipes from the firmware command pipes 483 * (both are bulk pipes) using the endpoints descriptors. 484 */ 485 error = usbd_open_pipe(sc->sc_iface, 0x01, USBD_EXCLUSIVE_USE, 486 &sc->cmd_tx_pipe); 487 if (error != 0) { 488 printf("%s: could not open Tx command pipe: %s\n", 489 sc->sc_dev.dv_xname, usbd_errstr(error)); 490 goto fail; 491 } 492 493 error = usbd_open_pipe(sc->sc_iface, 0x02, USBD_EXCLUSIVE_USE, 494 &sc->data_tx_pipe); 495 if (error != 0) { 496 printf("%s: could not open Tx data pipe: %s\n", 497 sc->sc_dev.dv_xname, usbd_errstr(error)); 498 goto fail; 499 } 500 501 error = usbd_open_pipe(sc->sc_iface, 0x81, USBD_EXCLUSIVE_USE, 502 &sc->cmd_rx_pipe); 503 if (error != 0) { 504 printf("%s: could not open Rx command pipe: %s\n", 505 sc->sc_dev.dv_xname, usbd_errstr(error)); 506 goto fail; 507 } 508 509 error = usbd_open_pipe(sc->sc_iface, 0x82, USBD_EXCLUSIVE_USE, 510 &sc->data_rx_pipe); 511 if (error != 0) { 512 printf("%s: could not open Rx data pipe: %s\n", 513 sc->sc_dev.dv_xname, usbd_errstr(error)); 514 goto fail; 515 } 516 517 return 0; 518 519 fail: uath_close_pipes(sc); 520 return error; 521 } 522 523 void 524 uath_close_pipes(struct uath_softc *sc) 525 { 526 /* assumes no transfers are pending on the pipes */ 527 528 if (sc->data_tx_pipe != NULL) 529 usbd_close_pipe(sc->data_tx_pipe); 530 531 if (sc->data_rx_pipe != NULL) 532 usbd_close_pipe(sc->data_rx_pipe); 533 534 if (sc->cmd_tx_pipe != NULL) 535 usbd_close_pipe(sc->cmd_tx_pipe); 536 537 if (sc->cmd_rx_pipe != NULL) 538 usbd_close_pipe(sc->cmd_rx_pipe); 539 } 540 541 int 542 uath_alloc_tx_data_list(struct uath_softc *sc) 543 { 544 int i, error; 545 546 for (i = 0; i < UATH_TX_DATA_LIST_COUNT; i++) { 547 struct uath_tx_data *data = &sc->tx_data[i]; 548 549 data->sc = sc; /* backpointer for callbacks */ 550 551 data->xfer = usbd_alloc_xfer(sc->sc_udev); 552 if (data->xfer == NULL) { 553 printf("%s: could not allocate xfer\n", 554 sc->sc_dev.dv_xname); 555 error = ENOMEM; 556 goto fail; 557 } 558 data->buf = usbd_alloc_buffer(data->xfer, UATH_MAX_TXBUFSZ); 559 if (data->buf == NULL) { 560 printf("%s: could not allocate xfer buffer\n", 561 sc->sc_dev.dv_xname); 562 error = ENOMEM; 563 goto fail; 564 } 565 } 566 return 0; 567 568 fail: uath_free_tx_data_list(sc); 569 return error; 570 } 571 572 void 573 uath_free_tx_data_list(struct uath_softc *sc) 574 { 575 int i; 576 577 /* make sure no transfers are pending */ 578 usbd_abort_pipe(sc->data_tx_pipe); 579 580 for (i = 0; i < UATH_TX_DATA_LIST_COUNT; i++) 581 if (sc->tx_data[i].xfer != NULL) 582 usbd_free_xfer(sc->tx_data[i].xfer); 583 } 584 585 int 586 uath_alloc_rx_data_list(struct uath_softc *sc) 587 { 588 int i, error; 589 590 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) { 591 struct uath_rx_data *data = &sc->rx_data[i]; 592 593 data->sc = sc; /* backpointer for callbacks */ 594 595 data->xfer = usbd_alloc_xfer(sc->sc_udev); 596 if (data->xfer == NULL) { 597 printf("%s: could not allocate xfer\n", 598 sc->sc_dev.dv_xname); 599 error = ENOMEM; 600 goto fail; 601 } 602 if (usbd_alloc_buffer(data->xfer, sc->rxbufsz) == NULL) { 603 printf("%s: could not allocate xfer buffer\n", 604 sc->sc_dev.dv_xname); 605 error = ENOMEM; 606 goto fail; 607 } 608 609 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 610 if (data->m == NULL) { 611 printf("%s: could not allocate rx mbuf\n", 612 sc->sc_dev.dv_xname); 613 error = ENOMEM; 614 goto fail; 615 } 616 MCLGET(data->m, M_DONTWAIT); 617 if (!(data->m->m_flags & M_EXT)) { 618 printf("%s: could not allocate rx mbuf cluster\n", 619 sc->sc_dev.dv_xname); 620 error = ENOMEM; 621 goto fail; 622 } 623 624 data->buf = mtod(data->m, uint8_t *); 625 } 626 return 0; 627 628 fail: uath_free_rx_data_list(sc); 629 return error; 630 } 631 632 void 633 uath_free_rx_data_list(struct uath_softc *sc) 634 { 635 int i; 636 637 /* make sure no transfers are pending */ 638 usbd_abort_pipe(sc->data_rx_pipe); 639 640 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) { 641 struct uath_rx_data *data = &sc->rx_data[i]; 642 643 if (data->xfer != NULL) 644 usbd_free_xfer(data->xfer); 645 646 if (data->m != NULL) 647 m_freem(data->m); 648 } 649 } 650 651 int 652 uath_alloc_tx_cmd_list(struct uath_softc *sc) 653 { 654 int i, error; 655 656 for (i = 0; i < UATH_TX_CMD_LIST_COUNT; i++) { 657 struct uath_tx_cmd *cmd = &sc->tx_cmd[i]; 658 659 cmd->sc = sc; /* backpointer for callbacks */ 660 661 cmd->xfer = usbd_alloc_xfer(sc->sc_udev); 662 if (cmd->xfer == NULL) { 663 printf("%s: could not allocate xfer\n", 664 sc->sc_dev.dv_xname); 665 error = ENOMEM; 666 goto fail; 667 } 668 cmd->buf = usbd_alloc_buffer(cmd->xfer, UATH_MAX_TXCMDSZ); 669 if (cmd->buf == NULL) { 670 printf("%s: could not allocate xfer buffer\n", 671 sc->sc_dev.dv_xname); 672 error = ENOMEM; 673 goto fail; 674 } 675 } 676 return 0; 677 678 fail: uath_free_tx_cmd_list(sc); 679 return error; 680 } 681 682 void 683 uath_free_tx_cmd_list(struct uath_softc *sc) 684 { 685 int i; 686 687 /* make sure no transfers are pending */ 688 usbd_abort_pipe(sc->cmd_tx_pipe); 689 690 for (i = 0; i < UATH_TX_CMD_LIST_COUNT; i++) 691 if (sc->tx_cmd[i].xfer != NULL) 692 usbd_free_xfer(sc->tx_cmd[i].xfer); 693 } 694 695 int 696 uath_alloc_rx_cmd_list(struct uath_softc *sc) 697 { 698 int i, error; 699 700 for (i = 0; i < UATH_RX_CMD_LIST_COUNT; i++) { 701 struct uath_rx_cmd *cmd = &sc->rx_cmd[i]; 702 703 cmd->sc = sc; /* backpointer for callbacks */ 704 705 cmd->xfer = usbd_alloc_xfer(sc->sc_udev); 706 if (cmd->xfer == NULL) { 707 printf("%s: could not allocate xfer\n", 708 sc->sc_dev.dv_xname); 709 error = ENOMEM; 710 goto fail; 711 } 712 cmd->buf = usbd_alloc_buffer(cmd->xfer, UATH_MAX_RXCMDSZ); 713 if (cmd->buf == NULL) { 714 printf("%s: could not allocate xfer buffer\n", 715 sc->sc_dev.dv_xname); 716 error = ENOMEM; 717 goto fail; 718 } 719 } 720 return 0; 721 722 fail: uath_free_rx_cmd_list(sc); 723 return error; 724 } 725 726 void 727 uath_free_rx_cmd_list(struct uath_softc *sc) 728 { 729 int i; 730 731 /* make sure no transfers are pending */ 732 usbd_abort_pipe(sc->cmd_rx_pipe); 733 734 for (i = 0; i < UATH_RX_CMD_LIST_COUNT; i++) 735 if (sc->rx_cmd[i].xfer != NULL) 736 usbd_free_xfer(sc->rx_cmd[i].xfer); 737 } 738 739 int 740 uath_media_change(struct ifnet *ifp) 741 { 742 int error; 743 744 error = ieee80211_media_change(ifp); 745 if (error != ENETRESET) 746 return error; 747 748 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 749 uath_init(ifp); 750 751 return 0; 752 } 753 754 /* 755 * This function is called periodically (every second) when associated to 756 * query device statistics. 757 */ 758 void 759 uath_stat(void *arg) 760 { 761 struct uath_softc *sc = arg; 762 int error; 763 764 /* 765 * Send request for statistics asynchronously. The timer will be 766 * restarted when we'll get the stats notification. 767 */ 768 error = uath_cmd_write(sc, UATH_CMD_STATS, NULL, 0, 769 UATH_CMD_FLAG_ASYNC); 770 if (error != 0) { 771 printf("%s: could not query statistics (error=%d)\n", 772 sc->sc_dev.dv_xname, error); 773 } 774 } 775 776 /* 777 * This function is called periodically (every 250ms) during scanning to 778 * switch from one channel to another. 779 */ 780 void 781 uath_next_scan(void *arg) 782 { 783 struct uath_softc *sc = arg; 784 struct ieee80211com *ic = &sc->sc_ic; 785 struct ifnet *ifp = &ic->ic_if; 786 787 if (ic->ic_state == IEEE80211_S_SCAN) 788 ieee80211_next_scan(ifp); 789 } 790 791 void 792 uath_task(void *arg) 793 { 794 struct uath_softc *sc = arg; 795 struct ieee80211com *ic = &sc->sc_ic; 796 enum ieee80211_state ostate; 797 798 ostate = ic->ic_state; 799 800 switch (sc->sc_state) { 801 case IEEE80211_S_INIT: 802 if (ostate == IEEE80211_S_RUN) { 803 /* turn link and activity LEDs off */ 804 (void)uath_set_led(sc, UATH_LED_LINK, 0); 805 (void)uath_set_led(sc, UATH_LED_ACTIVITY, 0); 806 } 807 break; 808 809 case IEEE80211_S_SCAN: 810 if (uath_switch_channel(sc, ic->ic_bss->ni_chan) != 0) { 811 printf("%s: could not switch channel\n", 812 sc->sc_dev.dv_xname); 813 break; 814 } 815 timeout_add(&sc->scan_to, hz / 4); 816 break; 817 818 case IEEE80211_S_AUTH: 819 { 820 struct ieee80211_node *ni = ic->ic_bss; 821 struct uath_cmd_bssid bssid; 822 struct uath_cmd_0b cmd0b; 823 struct uath_cmd_0c cmd0c; 824 825 if (uath_switch_channel(sc, ni->ni_chan) != 0) { 826 printf("%s: could not switch channel\n", 827 sc->sc_dev.dv_xname); 828 break; 829 } 830 831 (void)uath_cmd_write(sc, UATH_CMD_24, NULL, 0, 0); 832 833 bzero(&bssid, sizeof bssid); 834 bssid.len = htobe32(IEEE80211_ADDR_LEN); 835 IEEE80211_ADDR_COPY(bssid.bssid, ni->ni_bssid); 836 (void)uath_cmd_write(sc, UATH_CMD_SET_BSSID, &bssid, 837 sizeof bssid, 0); 838 839 bzero(&cmd0b, sizeof cmd0b); 840 cmd0b.code = htobe32(2); 841 cmd0b.size = htobe32(sizeof (cmd0b.data)); 842 (void)uath_cmd_write(sc, UATH_CMD_0B, &cmd0b, sizeof cmd0b, 0); 843 844 bzero(&cmd0c, sizeof cmd0c); 845 cmd0c.magic1 = htobe32(2); 846 cmd0c.magic2 = htobe32(7); 847 cmd0c.magic3 = htobe32(1); 848 (void)uath_cmd_write(sc, UATH_CMD_0C, &cmd0c, sizeof cmd0c, 0); 849 850 if (uath_set_rates(sc, &ni->ni_rates) != 0) { 851 printf("%s: could not set negotiated rate set\n", 852 sc->sc_dev.dv_xname); 853 break; 854 } 855 break; 856 } 857 858 case IEEE80211_S_ASSOC: 859 break; 860 861 case IEEE80211_S_RUN: 862 { 863 struct ieee80211_node *ni = ic->ic_bss; 864 struct uath_cmd_bssid bssid; 865 struct uath_cmd_xled xled; 866 uint32_t val; 867 868 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 869 /* make both LEDs blink while monitoring */ 870 bzero(&xled, sizeof xled); 871 xled.which = htobe32(0); 872 xled.rate = htobe32(1); 873 xled.mode = htobe32(2); 874 (void)uath_cmd_write(sc, UATH_CMD_SET_XLED, &xled, 875 sizeof xled, 0); 876 break; 877 } 878 879 /* 880 * Tx rate is controlled by firmware, report the maximum 881 * negotiated rate in ifconfig output. 882 */ 883 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 884 885 val = htobe32(1); 886 (void)uath_cmd_write(sc, UATH_CMD_2E, &val, sizeof val, 0); 887 888 bzero(&bssid, sizeof bssid); 889 bssid.flags1 = htobe32(0xc004); 890 bssid.flags2 = htobe32(0x003b); 891 bssid.len = htobe32(IEEE80211_ADDR_LEN); 892 IEEE80211_ADDR_COPY(bssid.bssid, ni->ni_bssid); 893 (void)uath_cmd_write(sc, UATH_CMD_SET_BSSID, &bssid, 894 sizeof bssid, 0); 895 896 /* turn link LED on */ 897 (void)uath_set_led(sc, UATH_LED_LINK, 1); 898 899 /* make activity LED blink */ 900 bzero(&xled, sizeof xled); 901 xled.which = htobe32(1); 902 xled.rate = htobe32(1); 903 xled.mode = htobe32(2); 904 (void)uath_cmd_write(sc, UATH_CMD_SET_XLED, &xled, sizeof xled, 905 0); 906 907 /* set state to associated */ 908 val = htobe32(1); 909 (void)uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 910 0); 911 912 /* start statistics timer */ 913 timeout_add(&sc->stat_to, hz); 914 break; 915 } 916 } 917 sc->sc_newstate(ic, sc->sc_state, sc->sc_arg); 918 } 919 920 int 921 uath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 922 { 923 struct uath_softc *sc = ic->ic_softc; 924 925 usb_rem_task(sc->sc_udev, &sc->sc_task); 926 timeout_del(&sc->scan_to); 927 timeout_del(&sc->stat_to); 928 929 /* do it in a process context */ 930 sc->sc_state = nstate; 931 sc->sc_arg = arg; 932 usb_add_task(sc->sc_udev, &sc->sc_task); 933 return 0; 934 } 935 936 #ifdef UATH_DEBUG 937 void 938 uath_dump_cmd(const uint8_t *buf, int len, char prefix) 939 { 940 int i; 941 942 for (i = 0; i < len; i++) { 943 if ((i % 16) == 0) 944 printf("\n%c ", prefix); 945 else if ((i % 4) == 0) 946 printf(" "); 947 printf("%02x", buf[i]); 948 } 949 printf("\n"); 950 } 951 #endif 952 953 /* 954 * Low-level function to send read or write commands to the firmware. 955 */ 956 int 957 uath_cmd(struct uath_softc *sc, uint32_t code, const void *idata, int ilen, 958 void *odata, int flags) 959 { 960 struct uath_cmd_hdr *hdr; 961 struct uath_tx_cmd *cmd; 962 uint16_t xferflags; 963 int s, xferlen, error; 964 965 /* grab a xfer */ 966 cmd = &sc->tx_cmd[sc->cmd_idx]; 967 968 /* always bulk-out a multiple of 4 bytes */ 969 xferlen = (sizeof (struct uath_cmd_hdr) + ilen + 3) & ~3; 970 971 hdr = (struct uath_cmd_hdr *)cmd->buf; 972 bzero(hdr, sizeof (struct uath_cmd_hdr)); 973 hdr->len = htobe32(xferlen); 974 hdr->code = htobe32(code); 975 hdr->priv = sc->cmd_idx; /* don't care about endianness */ 976 hdr->magic = htobe32((flags & UATH_CMD_FLAG_MAGIC) ? 1 << 24 : 0); 977 bcopy(idata, (uint8_t *)(hdr + 1), ilen); 978 979 #ifdef UATH_DEBUG 980 if (uath_debug >= 5) { 981 printf("sending command code=0x%02x flags=0x%x index=%u", 982 code, flags, sc->cmd_idx); 983 uath_dump_cmd(cmd->buf, xferlen, '+'); 984 } 985 #endif 986 xferflags = USBD_FORCE_SHORT_XFER | USBD_NO_COPY; 987 if (!(flags & UATH_CMD_FLAG_READ)) { 988 if (!(flags & UATH_CMD_FLAG_ASYNC)) 989 xferflags |= USBD_SYNCHRONOUS; 990 } else 991 s = splusb(); 992 993 cmd->odata = odata; 994 995 usbd_setup_xfer(cmd->xfer, sc->cmd_tx_pipe, cmd, cmd->buf, xferlen, 996 xferflags, UATH_CMD_TIMEOUT, NULL); 997 error = usbd_transfer(cmd->xfer); 998 if (error != USBD_IN_PROGRESS && error != 0) { 999 if (flags & UATH_CMD_FLAG_READ) 1000 splx(s); 1001 printf("%s: could not send command 0x%x (error=%s)\n", 1002 sc->sc_dev.dv_xname, code, usbd_errstr(error)); 1003 return error; 1004 } 1005 sc->cmd_idx = (sc->cmd_idx + 1) % UATH_TX_CMD_LIST_COUNT; 1006 1007 if (!(flags & UATH_CMD_FLAG_READ)) 1008 return 0; /* write: don't wait for reply */ 1009 1010 /* wait at most two seconds for command reply */ 1011 error = tsleep(cmd, PCATCH, "uathcmd", 2 * hz); 1012 cmd->odata = NULL; /* in case answer is received too late */ 1013 splx(s); 1014 if (error != 0) { 1015 printf("%s: timeout waiting for command reply\n", 1016 sc->sc_dev.dv_xname); 1017 } 1018 return error; 1019 } 1020 1021 int 1022 uath_cmd_write(struct uath_softc *sc, uint32_t code, const void *data, int len, 1023 int flags) 1024 { 1025 flags &= ~UATH_CMD_FLAG_READ; 1026 return uath_cmd(sc, code, data, len, NULL, flags); 1027 } 1028 1029 int 1030 uath_cmd_read(struct uath_softc *sc, uint32_t code, const void *idata, 1031 int ilen, void *odata, int flags) 1032 { 1033 flags |= UATH_CMD_FLAG_READ; 1034 return uath_cmd(sc, code, idata, ilen, odata, flags); 1035 } 1036 1037 int 1038 uath_write_reg(struct uath_softc *sc, uint32_t reg, uint32_t val) 1039 { 1040 struct uath_write_mac write; 1041 int error; 1042 1043 write.reg = htobe32(reg); 1044 write.len = htobe32(0); /* 0 = single write */ 1045 *(uint32_t *)write.data = htobe32(val); 1046 1047 error = uath_cmd_write(sc, UATH_CMD_WRITE_MAC, &write, 1048 3 * sizeof (uint32_t), 0); 1049 if (error != 0) { 1050 printf("%s: could not write register 0x%02x\n", 1051 sc->sc_dev.dv_xname, reg); 1052 } 1053 return error; 1054 } 1055 1056 int 1057 uath_write_multi(struct uath_softc *sc, uint32_t reg, const void *data, 1058 int len) 1059 { 1060 struct uath_write_mac write; 1061 int error; 1062 1063 write.reg = htobe32(reg); 1064 write.len = htobe32(len); 1065 bcopy(data, write.data, len); 1066 1067 /* properly handle the case where len is zero (reset) */ 1068 error = uath_cmd_write(sc, UATH_CMD_WRITE_MAC, &write, 1069 (len == 0) ? sizeof (uint32_t) : 2 * sizeof (uint32_t) + len, 0); 1070 if (error != 0) { 1071 printf("%s: could not write %d bytes to register 0x%02x\n", 1072 sc->sc_dev.dv_xname, len, reg); 1073 } 1074 return error; 1075 } 1076 1077 int 1078 uath_read_reg(struct uath_softc *sc, uint32_t reg, uint32_t *val) 1079 { 1080 struct uath_read_mac read; 1081 int error; 1082 1083 reg = htobe32(reg); 1084 error = uath_cmd_read(sc, UATH_CMD_READ_MAC, ®, sizeof reg, &read, 1085 0); 1086 if (error != 0) { 1087 printf("%s: could not read register 0x%02x\n", 1088 sc->sc_dev.dv_xname, betoh32(reg)); 1089 return error; 1090 } 1091 *val = betoh32(*(uint32_t *)read.data); 1092 return error; 1093 } 1094 1095 int 1096 uath_read_eeprom(struct uath_softc *sc, uint32_t reg, void *odata) 1097 { 1098 struct uath_read_mac read; 1099 int len, error; 1100 1101 reg = htobe32(reg); 1102 error = uath_cmd_read(sc, UATH_CMD_READ_EEPROM, ®, sizeof reg, 1103 &read, 0); 1104 if (error != 0) { 1105 printf("%s: could not read EEPROM offset 0x%02x\n", 1106 sc->sc_dev.dv_xname, betoh32(reg)); 1107 return error; 1108 } 1109 len = betoh32(read.len); 1110 bcopy(read.data, odata, (len == 0) ? sizeof (uint32_t) : len); 1111 return error; 1112 } 1113 1114 void 1115 uath_cmd_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, 1116 usbd_status status) 1117 { 1118 struct uath_rx_cmd *cmd = priv; 1119 struct uath_softc *sc = cmd->sc; 1120 struct uath_cmd_hdr *hdr; 1121 1122 if (status != USBD_NORMAL_COMPLETION) { 1123 if (status == USBD_STALLED) 1124 usbd_clear_endpoint_stall_async(sc->cmd_rx_pipe); 1125 return; 1126 } 1127 1128 hdr = (struct uath_cmd_hdr *)cmd->buf; 1129 1130 #ifdef UATH_DEBUG 1131 if (uath_debug >= 5) { 1132 printf("received command code=0x%x index=%u len=%u", 1133 betoh32(hdr->code), hdr->priv, betoh32(hdr->len)); 1134 uath_dump_cmd(cmd->buf, betoh32(hdr->len), '-'); 1135 } 1136 #endif 1137 1138 switch (betoh32(hdr->code) & 0xff) { 1139 /* reply to a read command */ 1140 default: 1141 { 1142 struct uath_tx_cmd *txcmd = &sc->tx_cmd[hdr->priv]; 1143 1144 if (txcmd->odata != NULL) { 1145 /* copy answer into caller's supplied buffer */ 1146 bcopy((uint8_t *)(hdr + 1), txcmd->odata, 1147 betoh32(hdr->len) - sizeof (struct uath_cmd_hdr)); 1148 } 1149 wakeup(txcmd); /* wake up caller */ 1150 break; 1151 } 1152 /* spontaneous firmware notifications */ 1153 case UATH_NOTIF_READY: 1154 DPRINTF(("received device ready notification\n")); 1155 wakeup(UATH_COND_INIT(sc)); 1156 break; 1157 1158 case UATH_NOTIF_TX: 1159 /* this notification is sent when UATH_TX_NOTIFY is set */ 1160 DPRINTF(("received Tx notification\n")); 1161 break; 1162 1163 case UATH_NOTIF_STATS: 1164 DPRINTFN(2, ("received device statistics\n")); 1165 timeout_add(&sc->stat_to, hz); 1166 break; 1167 } 1168 1169 /* setup a new transfer */ 1170 usbd_setup_xfer(xfer, sc->cmd_rx_pipe, cmd, cmd->buf, UATH_MAX_RXCMDSZ, 1171 USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT, 1172 uath_cmd_rxeof); 1173 (void)usbd_transfer(xfer); 1174 } 1175 1176 void 1177 uath_data_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, 1178 usbd_status status) 1179 { 1180 struct uath_rx_data *data = priv; 1181 struct uath_softc *sc = data->sc; 1182 struct ieee80211com *ic = &sc->sc_ic; 1183 struct ifnet *ifp = &ic->ic_if; 1184 struct ieee80211_frame *wh; 1185 struct ieee80211_node *ni; 1186 struct uath_rx_desc *desc; 1187 struct mbuf *mnew, *m; 1188 uint32_t hdr; 1189 int s, len; 1190 1191 if (status != USBD_NORMAL_COMPLETION) { 1192 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1193 return; 1194 1195 if (status == USBD_STALLED) 1196 usbd_clear_endpoint_stall_async(sc->data_rx_pipe); 1197 1198 ifp->if_ierrors++; 1199 return; 1200 } 1201 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 1202 1203 if (len < UATH_MIN_RXBUFSZ) { 1204 DPRINTF(("wrong xfer size (len=%d)\n", len)); 1205 ifp->if_ierrors++; 1206 goto skip; 1207 } 1208 1209 hdr = betoh32(*(uint32_t *)data->buf); 1210 1211 /* Rx descriptor is located at the end, 32-bit aligned */ 1212 desc = (struct uath_rx_desc *) 1213 (data->buf + len - sizeof (struct uath_rx_desc)); 1214 1215 if (betoh32(desc->len) > sc->rxbufsz) { 1216 DPRINTF(("bad descriptor (len=%d)\n", betoh32(desc->len))); 1217 ifp->if_ierrors++; 1218 goto skip; 1219 } 1220 1221 /* there's probably a "bad CRC" flag somewhere in the descriptor.. */ 1222 1223 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1224 if (mnew == NULL) { 1225 printf("%s: could not allocate rx mbuf\n", 1226 sc->sc_dev.dv_xname); 1227 ifp->if_ierrors++; 1228 goto skip; 1229 } 1230 MCLGET(mnew, M_DONTWAIT); 1231 if (!(mnew->m_flags & M_EXT)) { 1232 printf("%s: could not allocate rx mbuf cluster\n", 1233 sc->sc_dev.dv_xname); 1234 m_freem(mnew); 1235 ifp->if_ierrors++; 1236 goto skip; 1237 } 1238 1239 m = data->m; 1240 data->m = mnew; 1241 1242 /* finalize mbuf */ 1243 m->m_pkthdr.rcvif = ifp; 1244 m->m_data = data->buf + sizeof (uint32_t); 1245 m->m_pkthdr.len = m->m_len = betoh32(desc->len) - 1246 sizeof (struct uath_rx_desc) - IEEE80211_CRC_LEN; 1247 1248 data->buf = mtod(data->m, uint8_t *); 1249 1250 wh = mtod(m, struct ieee80211_frame *); 1251 if ((wh->i_fc[1] & IEEE80211_FC1_WEP) && 1252 ic->ic_opmode != IEEE80211_M_MONITOR) { 1253 /* 1254 * Hardware decrypts the frame itself but leaves the WEP bit 1255 * set in the 802.11 header and doesn't remove the IV and CRC 1256 * fields. 1257 */ 1258 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 1259 ovbcopy(wh, (caddr_t)wh + IEEE80211_WEP_IVLEN + 1260 IEEE80211_WEP_KIDLEN, sizeof (struct ieee80211_frame)); 1261 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 1262 m_adj(m, -IEEE80211_WEP_CRCLEN); 1263 wh = mtod(m, struct ieee80211_frame *); 1264 } 1265 1266 #if NBPFILTER > 0 1267 /* there are a lot more fields in the Rx descriptor */ 1268 if (sc->sc_drvbpf != NULL) { 1269 struct mbuf mb; 1270 struct uath_rx_radiotap_header *tap = &sc->sc_rxtap; 1271 1272 tap->wr_flags = 0; 1273 tap->wr_chan_freq = htole16(betoh32(desc->freq)); 1274 tap->wr_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags); 1275 tap->wr_dbm_antsignal = (int8_t)betoh32(desc->rssi); 1276 1277 mb.m_data = (caddr_t)tap; 1278 mb.m_len = sc->sc_rxtap_len; 1279 mb.m_next = m; 1280 mb.m_nextpkt = NULL; 1281 mb.m_type = 0; 1282 mb.m_flags = 0; 1283 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1284 } 1285 #endif 1286 1287 s = splnet(); 1288 ni = ieee80211_find_rxnode(ic, wh); 1289 ieee80211_input(ifp, m, ni, (int)betoh32(desc->rssi), 0); 1290 1291 /* node is no longer needed */ 1292 ieee80211_release_node(ic, ni); 1293 splx(s); 1294 1295 skip: /* setup a new transfer */ 1296 usbd_setup_xfer(xfer, sc->data_rx_pipe, data, data->buf, sc->rxbufsz, 1297 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, uath_data_rxeof); 1298 (void)usbd_transfer(data->xfer); 1299 } 1300 1301 int 1302 uath_tx_null(struct uath_softc *sc) 1303 { 1304 struct uath_tx_data *data; 1305 struct uath_tx_desc *desc; 1306 1307 data = &sc->tx_data[sc->data_idx]; 1308 1309 data->ni = NULL; 1310 1311 *(uint32_t *)data->buf = UATH_MAKECTL(1, sizeof (struct uath_tx_desc)); 1312 desc = (struct uath_tx_desc *)(data->buf + sizeof (uint32_t)); 1313 1314 bzero(desc, sizeof (struct uath_tx_desc)); 1315 desc->len = htobe32(sizeof (struct uath_tx_desc)); 1316 desc->type = htobe32(UATH_TX_NULL); 1317 1318 usbd_setup_xfer(data->xfer, sc->data_tx_pipe, data, data->buf, 1319 sizeof (uint32_t) + sizeof (struct uath_tx_desc), USBD_NO_COPY | 1320 USBD_FORCE_SHORT_XFER, UATH_DATA_TIMEOUT, NULL); 1321 if (usbd_sync_transfer(data->xfer) != 0) 1322 return EIO; 1323 1324 sc->data_idx = (sc->data_idx + 1) % UATH_TX_DATA_LIST_COUNT; 1325 1326 return uath_cmd_write(sc, UATH_CMD_0F, NULL, 0, UATH_CMD_FLAG_ASYNC); 1327 } 1328 1329 void 1330 uath_data_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 1331 usbd_status status) 1332 { 1333 struct uath_tx_data *data = priv; 1334 struct uath_softc *sc = data->sc; 1335 struct ieee80211com *ic = &sc->sc_ic; 1336 struct ifnet *ifp = &ic->ic_if; 1337 int s; 1338 1339 if (status != USBD_NORMAL_COMPLETION) { 1340 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1341 return; 1342 1343 printf("%s: could not transmit buffer: %s\n", 1344 sc->sc_dev.dv_xname, usbd_errstr(status)); 1345 1346 if (status == USBD_STALLED) 1347 usbd_clear_endpoint_stall_async(sc->data_tx_pipe); 1348 1349 ifp->if_oerrors++; 1350 return; 1351 } 1352 1353 s = splnet(); 1354 1355 ieee80211_release_node(ic, data->ni); 1356 data->ni = NULL; 1357 1358 sc->tx_queued--; 1359 ifp->if_opackets++; 1360 1361 sc->sc_tx_timer = 0; 1362 ifp->if_flags &= ~IFF_OACTIVE; 1363 uath_start(ifp); 1364 1365 splx(s); 1366 } 1367 1368 int 1369 uath_tx_data(struct uath_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1370 { 1371 struct ieee80211com *ic = &sc->sc_ic; 1372 struct uath_tx_data *data; 1373 struct uath_tx_desc *desc; 1374 const struct ieee80211_frame *wh; 1375 int paylen, totlen, xferlen, error; 1376 1377 data = &sc->tx_data[sc->data_idx]; 1378 desc = (struct uath_tx_desc *)(data->buf + sizeof (uint32_t)); 1379 1380 data->ni = ni; 1381 1382 #if NBPFILTER > 0 1383 if (sc->sc_drvbpf != NULL) { 1384 struct mbuf mb; 1385 struct uath_tx_radiotap_header *tap = &sc->sc_txtap; 1386 1387 tap->wt_flags = 0; 1388 tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq); 1389 tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags); 1390 1391 mb.m_data = (caddr_t)tap; 1392 mb.m_len = sc->sc_txtap_len; 1393 mb.m_next = m0; 1394 mb.m_nextpkt = NULL; 1395 mb.m_type = 0; 1396 mb.m_flags = 0; 1397 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1398 } 1399 #endif 1400 1401 paylen = m0->m_pkthdr.len; 1402 xferlen = sizeof (uint32_t) + sizeof (struct uath_tx_desc) + paylen; 1403 1404 wh = mtod(m0, struct ieee80211_frame *); 1405 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1406 uint8_t *frm = (uint8_t *)(desc + 1); 1407 uint32_t iv; 1408 1409 /* h/w WEP: it's up to the host to fill the IV field */ 1410 bcopy(wh, frm, sizeof (struct ieee80211_frame)); 1411 frm += sizeof (struct ieee80211_frame); 1412 1413 /* insert IV: code copied from net80211 */ 1414 iv = (ic->ic_iv != 0) ? ic->ic_iv : arc4random(); 1415 if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00) 1416 iv += 0x000100; 1417 ic->ic_iv = iv + 1; 1418 1419 *frm++ = iv & 0xff; 1420 *frm++ = (iv >> 8) & 0xff; 1421 *frm++ = (iv >> 16) & 0xff; 1422 *frm++ = ic->ic_wep_txkey << 6; 1423 1424 m_copydata(m0, sizeof (struct ieee80211_frame), 1425 m0->m_pkthdr.len - sizeof (struct ieee80211_frame), frm); 1426 1427 paylen += IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN; 1428 xferlen += IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN; 1429 totlen = xferlen + IEEE80211_WEP_CRCLEN; 1430 } else { 1431 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(desc + 1)); 1432 totlen = xferlen; 1433 } 1434 1435 /* fill Tx descriptor */ 1436 *(uint32_t *)data->buf = UATH_MAKECTL(1, xferlen - sizeof (uint32_t)); 1437 1438 desc->len = htobe32(totlen); 1439 desc->priv = sc->data_idx; /* don't care about endianness */ 1440 desc->paylen = htobe32(paylen); 1441 desc->type = htobe32(UATH_TX_DATA); 1442 desc->flags = htobe32(0); 1443 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1444 desc->dest = htobe32(UATH_ID_BROADCAST); 1445 desc->magic = htobe32(3); 1446 } else { 1447 desc->dest = htobe32(UATH_ID_BSS); 1448 desc->magic = htobe32(1); 1449 } 1450 1451 m_freem(m0); /* mbuf is no longer needed */ 1452 1453 #ifdef UATH_DEBUG 1454 if (uath_debug >= 6) { 1455 printf("sending frame index=%u len=%d xferlen=%d", 1456 sc->data_idx, paylen, xferlen); 1457 uath_dump_cmd(data->buf, xferlen, '+'); 1458 } 1459 #endif 1460 usbd_setup_xfer(data->xfer, sc->data_tx_pipe, data, data->buf, xferlen, 1461 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, UATH_DATA_TIMEOUT, 1462 uath_data_txeof); 1463 error = usbd_transfer(data->xfer); 1464 if (error != USBD_IN_PROGRESS && error != 0) { 1465 ic->ic_if.if_oerrors++; 1466 return error; 1467 } 1468 sc->data_idx = (sc->data_idx + 1) % UATH_TX_DATA_LIST_COUNT; 1469 sc->tx_queued++; 1470 1471 return 0; 1472 } 1473 1474 void 1475 uath_start(struct ifnet *ifp) 1476 { 1477 struct uath_softc *sc = ifp->if_softc; 1478 struct ieee80211com *ic = &sc->sc_ic; 1479 struct ieee80211_node *ni; 1480 struct mbuf *m0; 1481 1482 /* 1483 * net80211 may still try to send management frames even if the 1484 * IFF_RUNNING flag is not set... 1485 */ 1486 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1487 return; 1488 1489 for (;;) { 1490 IF_POLL(&ic->ic_mgtq, m0); 1491 if (m0 != NULL) { 1492 if (sc->tx_queued >= UATH_TX_DATA_LIST_COUNT) { 1493 ifp->if_flags |= IFF_OACTIVE; 1494 break; 1495 } 1496 IF_DEQUEUE(&ic->ic_mgtq, m0); 1497 1498 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1499 m0->m_pkthdr.rcvif = NULL; 1500 #if NBPFILTER > 0 1501 if (ic->ic_rawbpf != NULL) 1502 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1503 #endif 1504 if (uath_tx_data(sc, m0, ni) != 0) 1505 break; 1506 } else { 1507 if (ic->ic_state != IEEE80211_S_RUN) 1508 break; 1509 IFQ_POLL(&ifp->if_snd, m0); 1510 if (m0 == NULL) 1511 break; 1512 if (sc->tx_queued >= UATH_TX_DATA_LIST_COUNT) { 1513 ifp->if_flags |= IFF_OACTIVE; 1514 break; 1515 } 1516 IFQ_DEQUEUE(&ifp->if_snd, m0); 1517 #if NBPFILTER > 0 1518 if (ifp->if_bpf != NULL) 1519 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1520 #endif 1521 m0 = ieee80211_encap(ifp, m0, &ni); 1522 if (m0 == NULL) 1523 continue; 1524 #if NBPFILTER > 0 1525 if (ic->ic_rawbpf != NULL) 1526 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1527 #endif 1528 if (uath_tx_data(sc, m0, ni) != 0) { 1529 if (ni != NULL) 1530 ieee80211_release_node(ic, ni); 1531 ifp->if_oerrors++; 1532 break; 1533 } 1534 } 1535 1536 sc->sc_tx_timer = 5; 1537 ifp->if_timer = 1; 1538 } 1539 } 1540 1541 void 1542 uath_watchdog(struct ifnet *ifp) 1543 { 1544 struct uath_softc *sc = ifp->if_softc; 1545 1546 ifp->if_timer = 0; 1547 1548 if (sc->sc_tx_timer > 0) { 1549 if (--sc->sc_tx_timer == 0) { 1550 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1551 /*uath_init(ifp); XXX needs a process context! */ 1552 ifp->if_oerrors++; 1553 return; 1554 } 1555 ifp->if_timer = 1; 1556 } 1557 1558 ieee80211_watchdog(ifp); 1559 } 1560 1561 int 1562 uath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1563 { 1564 struct uath_softc *sc = ifp->if_softc; 1565 struct ieee80211com *ic = &sc->sc_ic; 1566 struct ifaddr *ifa; 1567 struct ifreq *ifr; 1568 int s, error = 0; 1569 1570 s = splnet(); 1571 1572 switch (cmd) { 1573 case SIOCSIFADDR: 1574 ifa = (struct ifaddr *)data; 1575 ifp->if_flags |= IFF_UP; 1576 #ifdef INET 1577 if (ifa->ifa_addr->sa_family == AF_INET) 1578 arp_ifinit(&ic->ic_ac, ifa); 1579 #endif 1580 /* FALLTHROUGH */ 1581 case SIOCSIFFLAGS: 1582 if (ifp->if_flags & IFF_UP) { 1583 if (!(ifp->if_flags & IFF_RUNNING)) 1584 uath_init(ifp); 1585 } else { 1586 if (ifp->if_flags & IFF_RUNNING) 1587 uath_stop(ifp, 1); 1588 } 1589 break; 1590 1591 case SIOCADDMULTI: 1592 case SIOCDELMULTI: 1593 ifr = (struct ifreq *)data; 1594 error = (cmd == SIOCADDMULTI) ? 1595 ether_addmulti(ifr, &ic->ic_ac) : 1596 ether_delmulti(ifr, &ic->ic_ac); 1597 if (error == ENETRESET) 1598 error = 0; 1599 break; 1600 1601 default: 1602 error = ieee80211_ioctl(ifp, cmd, data); 1603 } 1604 1605 if (error == ENETRESET) { 1606 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1607 (IFF_UP | IFF_RUNNING)) 1608 uath_init(ifp); 1609 error = 0; 1610 } 1611 1612 splx(s); 1613 1614 return error; 1615 } 1616 1617 int 1618 uath_query_eeprom(struct uath_softc *sc) 1619 { 1620 uint32_t tmp; 1621 int error; 1622 1623 /* retrieve MAC address */ 1624 error = uath_read_eeprom(sc, UATH_EEPROM_MACADDR, sc->sc_ic.ic_myaddr); 1625 if (error != 0) { 1626 printf("%s: could not read MAC address\n", 1627 sc->sc_dev.dv_xname); 1628 return error; 1629 } 1630 1631 /* retrieve the maximum frame size that the hardware can receive */ 1632 error = uath_read_eeprom(sc, UATH_EEPROM_RXBUFSZ, &tmp); 1633 if (error != 0) { 1634 printf("%s: could not read maximum Rx buffer size\n", 1635 sc->sc_dev.dv_xname); 1636 return error; 1637 } 1638 sc->rxbufsz = betoh32(tmp) & 0xfff; 1639 DPRINTF(("maximum Rx buffer size %d\n", sc->rxbufsz)); 1640 return 0; 1641 } 1642 1643 int 1644 uath_reset(struct uath_softc *sc) 1645 { 1646 struct uath_cmd_setup setup; 1647 uint32_t reg, val; 1648 int s, error; 1649 1650 /* init device with some voodoo incantations.. */ 1651 setup.magic1 = htobe32(1); 1652 setup.magic2 = htobe32(5); 1653 setup.magic3 = htobe32(200); 1654 setup.magic4 = htobe32(27); 1655 s = splusb(); 1656 error = uath_cmd_write(sc, UATH_CMD_SETUP, &setup, sizeof setup, 1657 UATH_CMD_FLAG_ASYNC); 1658 /* ..and wait until firmware notifies us that it is ready */ 1659 if (error == 0) 1660 error = tsleep(UATH_COND_INIT(sc), PCATCH, "uathinit", 5 * hz); 1661 splx(s); 1662 if (error != 0) 1663 return error; 1664 1665 /* read PHY registers */ 1666 for (reg = 0x09; reg <= 0x24; reg++) { 1667 if (reg == 0x0b || reg == 0x0c) 1668 continue; 1669 DELAY(100); 1670 if ((error = uath_read_reg(sc, reg, &val)) != 0) 1671 return error; 1672 DPRINTFN(2, ("reg 0x%02x=0x%08x\n", reg, val)); 1673 } 1674 return error; 1675 } 1676 1677 int 1678 uath_reset_tx_queues(struct uath_softc *sc) 1679 { 1680 int ac, error; 1681 1682 for (ac = 0; ac < 4; ac++) { 1683 const uint32_t qid = htobe32(UATH_AC_TO_QID(ac)); 1684 1685 DPRINTF(("resetting Tx queue %d\n", UATH_AC_TO_QID(ac))); 1686 error = uath_cmd_write(sc, UATH_CMD_RESET_QUEUE, &qid, 1687 sizeof qid, 0); 1688 if (error != 0) 1689 break; 1690 } 1691 return error; 1692 } 1693 1694 int 1695 uath_wme_init(struct uath_softc *sc) 1696 { 1697 struct uath_qinfo qinfo; 1698 int ac, error; 1699 static const struct uath_wme_settings uath_wme_11g[4] = { 1700 { 7, 4, 10, 0, 0 }, /* Background */ 1701 { 3, 4, 10, 0, 0 }, /* Best-Effort */ 1702 { 3, 3, 4, 26, 0 }, /* Video */ 1703 { 2, 2, 3, 47, 0 } /* Voice */ 1704 }; 1705 1706 bzero(&qinfo, sizeof qinfo); 1707 qinfo.size = htobe32(32); 1708 qinfo.magic1 = htobe32(1); /* XXX ack policy? */ 1709 qinfo.magic2 = htobe32(1); 1710 for (ac = 0; ac < 4; ac++) { 1711 qinfo.qid = htobe32(UATH_AC_TO_QID(ac)); 1712 qinfo.ac = htobe32(ac); 1713 qinfo.aifsn = htobe32(uath_wme_11g[ac].aifsn); 1714 qinfo.logcwmin = htobe32(uath_wme_11g[ac].logcwmin); 1715 qinfo.logcwmax = htobe32(uath_wme_11g[ac].logcwmax); 1716 qinfo.txop = htobe32(UATH_TXOP_TO_US( 1717 uath_wme_11g[ac].txop)); 1718 qinfo.acm = htobe32(uath_wme_11g[ac].acm); 1719 1720 DPRINTF(("setting up Tx queue %d\n", UATH_AC_TO_QID(ac))); 1721 error = uath_cmd_write(sc, UATH_CMD_SET_QUEUE, &qinfo, 1722 sizeof qinfo, 0); 1723 if (error != 0) 1724 break; 1725 } 1726 return error; 1727 } 1728 1729 int 1730 uath_set_chan(struct uath_softc *sc, struct ieee80211_channel *c) 1731 { 1732 struct uath_set_chan chan; 1733 1734 bzero(&chan, sizeof chan); 1735 chan.flags = htobe32(0x1400); 1736 chan.freq = htobe32(c->ic_freq); 1737 chan.magic1 = htobe32(20); 1738 chan.magic2 = htobe32(50); 1739 chan.magic3 = htobe32(1); 1740 1741 DPRINTF(("switching to channel %d\n", 1742 ieee80211_chan2ieee(&sc->sc_ic, c))); 1743 return uath_cmd_write(sc, UATH_CMD_SET_CHAN, &chan, sizeof chan, 0); 1744 } 1745 1746 int 1747 uath_set_key(struct uath_softc *sc, const struct ieee80211_key *k, int index) 1748 { 1749 struct uath_cmd_crypto crypto; 1750 int i; 1751 1752 bzero(&crypto, sizeof crypto); 1753 crypto.keyidx = htobe32(index); 1754 crypto.magic1 = htobe32(1); 1755 crypto.size = htobe32(368); 1756 crypto.mask = htobe32(0xffff); 1757 crypto.flags = htobe32(0x80000068); 1758 if (index != UATH_DEFAULT_KEY) 1759 crypto.flags |= htobe32(index << 16); 1760 memset(crypto.magic2, 0xff, sizeof crypto.magic2); 1761 1762 /* 1763 * Each byte of the key must be XOR'ed with 10101010 before being 1764 * transmitted to the firmware. 1765 */ 1766 for (i = 0; i < k->k_len; i++) 1767 crypto.key[i] = k->k_key[i] ^ 0xaa; 1768 1769 DPRINTF(("setting crypto key index=%d len=%d\n", index, k->k_len)); 1770 return uath_cmd_write(sc, UATH_CMD_CRYPTO, &crypto, sizeof crypto, 0); 1771 } 1772 1773 int 1774 uath_set_keys(struct uath_softc *sc) 1775 { 1776 const struct ieee80211com *ic = &sc->sc_ic; 1777 int i, error; 1778 1779 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1780 const struct ieee80211_key *k = &ic->ic_nw_keys[i]; 1781 1782 if (k->k_len > 0 && (error = uath_set_key(sc, k, i)) != 0) 1783 return error; 1784 } 1785 return uath_set_key(sc, &ic->ic_nw_keys[ic->ic_wep_txkey], 1786 UATH_DEFAULT_KEY); 1787 } 1788 1789 int 1790 uath_set_rates(struct uath_softc *sc, const struct ieee80211_rateset *rs) 1791 { 1792 struct uath_cmd_rates rates; 1793 1794 bzero(&rates, sizeof rates); 1795 rates.magic1 = htobe32(0x02); 1796 rates.size = htobe32(1 + sizeof rates.rates); 1797 rates.nrates = rs->rs_nrates; 1798 bcopy(rs->rs_rates, rates.rates, rs->rs_nrates); 1799 1800 DPRINTF(("setting supported rates nrates=%d\n", rs->rs_nrates)); 1801 return uath_cmd_write(sc, UATH_CMD_SET_RATES, &rates, sizeof rates, 0); 1802 } 1803 1804 int 1805 uath_set_rxfilter(struct uath_softc *sc, uint32_t filter, uint32_t flags) 1806 { 1807 struct uath_cmd_filter rxfilter; 1808 1809 rxfilter.filter = htobe32(filter); 1810 rxfilter.flags = htobe32(flags); 1811 1812 DPRINTF(("setting Rx filter=0x%x flags=0x%x\n", filter, flags)); 1813 return uath_cmd_write(sc, UATH_CMD_SET_FILTER, &rxfilter, 1814 sizeof rxfilter, 0); 1815 } 1816 1817 int 1818 uath_set_led(struct uath_softc *sc, int which, int on) 1819 { 1820 struct uath_cmd_led led; 1821 1822 led.which = htobe32(which); 1823 led.state = htobe32(on ? UATH_LED_ON : UATH_LED_OFF); 1824 1825 DPRINTFN(2, ("switching %s led %s\n", 1826 (which == UATH_LED_LINK) ? "link" : "activity", 1827 on ? "on" : "off")); 1828 return uath_cmd_write(sc, UATH_CMD_SET_LED, &led, sizeof led, 0); 1829 } 1830 1831 int 1832 uath_switch_channel(struct uath_softc *sc, struct ieee80211_channel *c) 1833 { 1834 uint32_t val; 1835 int error; 1836 1837 /* set radio frequency */ 1838 if ((error = uath_set_chan(sc, c)) != 0) { 1839 printf("%s: could not set channel\n", sc->sc_dev.dv_xname); 1840 return error; 1841 } 1842 1843 /* reset Tx rings */ 1844 if ((error = uath_reset_tx_queues(sc)) != 0) { 1845 printf("%s: could not reset Tx queues\n", 1846 sc->sc_dev.dv_xname); 1847 return error; 1848 } 1849 1850 /* set Tx rings WME properties */ 1851 if ((error = uath_wme_init(sc)) != 0) { 1852 printf("%s: could not init Tx queues\n", 1853 sc->sc_dev.dv_xname); 1854 return error; 1855 } 1856 1857 val = htobe32(0); 1858 error = uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 0); 1859 if (error != 0) { 1860 printf("%s: could not set state\n", sc->sc_dev.dv_xname); 1861 return error; 1862 } 1863 1864 return uath_tx_null(sc); 1865 } 1866 1867 int 1868 uath_init(struct ifnet *ifp) 1869 { 1870 struct uath_softc *sc = ifp->if_softc; 1871 struct ieee80211com *ic = &sc->sc_ic; 1872 struct uath_cmd_31 cmd31; 1873 uint32_t val; 1874 int i, error; 1875 1876 /* reset data and command rings */ 1877 sc->tx_queued = sc->data_idx = sc->cmd_idx = 0; 1878 1879 val = htobe32(0); 1880 (void)uath_cmd_write(sc, UATH_CMD_02, &val, sizeof val, 0); 1881 1882 /* set MAC address */ 1883 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 1884 (void)uath_write_multi(sc, 0x13, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1885 1886 (void)uath_write_reg(sc, 0x02, 0x00000001); 1887 (void)uath_write_reg(sc, 0x0e, 0x0000003f); 1888 (void)uath_write_reg(sc, 0x10, 0x00000001); 1889 (void)uath_write_reg(sc, 0x06, 0x0000001e); 1890 1891 /* 1892 * Queue Rx data xfers. 1893 */ 1894 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) { 1895 struct uath_rx_data *data = &sc->rx_data[i]; 1896 1897 usbd_setup_xfer(data->xfer, sc->data_rx_pipe, data, data->buf, 1898 sc->rxbufsz, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, 1899 uath_data_rxeof); 1900 error = usbd_transfer(data->xfer); 1901 if (error != USBD_IN_PROGRESS && error != 0) { 1902 printf("%s: could not queue Rx transfer\n", 1903 sc->sc_dev.dv_xname); 1904 goto fail; 1905 } 1906 } 1907 1908 error = uath_cmd_read(sc, UATH_CMD_07, 0, NULL, &val, 1909 UATH_CMD_FLAG_MAGIC); 1910 if (error != 0) { 1911 printf("%s: could not send read command 07h\n", 1912 sc->sc_dev.dv_xname); 1913 goto fail; 1914 } 1915 DPRINTF(("command 07h return code: %x\n", betoh32(val))); 1916 1917 /* set default channel */ 1918 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 1919 if ((error = uath_set_chan(sc, ic->ic_bss->ni_chan)) != 0) { 1920 printf("%s: could not set channel\n", sc->sc_dev.dv_xname); 1921 goto fail; 1922 } 1923 1924 if ((error = uath_wme_init(sc)) != 0) { 1925 printf("%s: could not setup WME parameters\n", 1926 sc->sc_dev.dv_xname); 1927 goto fail; 1928 } 1929 1930 /* init MAC registers */ 1931 (void)uath_write_reg(sc, 0x19, 0x00000000); 1932 (void)uath_write_reg(sc, 0x1a, 0x0000003c); 1933 (void)uath_write_reg(sc, 0x1b, 0x0000003c); 1934 (void)uath_write_reg(sc, 0x1c, 0x00000000); 1935 (void)uath_write_reg(sc, 0x1e, 0x00000000); 1936 (void)uath_write_reg(sc, 0x1f, 0x00000003); 1937 (void)uath_write_reg(sc, 0x0c, 0x00000000); 1938 (void)uath_write_reg(sc, 0x0f, 0x00000002); 1939 (void)uath_write_reg(sc, 0x0a, 0x00000007); /* XXX retry? */ 1940 (void)uath_write_reg(sc, 0x09, ic->ic_rtsthreshold); 1941 1942 val = htobe32(4); 1943 (void)uath_cmd_write(sc, UATH_CMD_27, &val, sizeof val, 0); 1944 (void)uath_cmd_write(sc, UATH_CMD_27, &val, sizeof val, 0); 1945 (void)uath_cmd_write(sc, UATH_CMD_1B, NULL, 0, 0); 1946 1947 if ((error = uath_set_keys(sc)) != 0) { 1948 printf("%s: could not set crypto keys\n", 1949 sc->sc_dev.dv_xname); 1950 goto fail; 1951 } 1952 1953 /* enable Rx */ 1954 (void)uath_set_rxfilter(sc, 0x0000, 4); 1955 (void)uath_set_rxfilter(sc, 0x0817, 1); 1956 1957 cmd31.magic1 = htobe32(0xffffffff); 1958 cmd31.magic2 = htobe32(0xffffffff); 1959 (void)uath_cmd_write(sc, UATH_CMD_31, &cmd31, sizeof cmd31, 0); 1960 1961 ifp->if_flags &= ~IFF_OACTIVE; 1962 ifp->if_flags |= IFF_RUNNING; 1963 1964 if (ic->ic_opmode == IEEE80211_M_MONITOR) 1965 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 1966 else 1967 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 1968 1969 return 0; 1970 1971 fail: uath_stop(ifp, 1); 1972 return error; 1973 } 1974 1975 void 1976 uath_stop(struct ifnet *ifp, int disable) 1977 { 1978 struct uath_softc *sc = ifp->if_softc; 1979 struct ieee80211com *ic = &sc->sc_ic; 1980 uint32_t val; 1981 int s; 1982 1983 s = splusb(); 1984 1985 sc->sc_tx_timer = 0; 1986 ifp->if_timer = 0; 1987 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1988 1989 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 1990 1991 val = htobe32(0); 1992 (void)uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 0); 1993 (void)uath_cmd_write(sc, UATH_CMD_RESET, NULL, 0, 0); 1994 1995 val = htobe32(0); 1996 (void)uath_cmd_write(sc, UATH_CMD_15, &val, sizeof val, 0); 1997 1998 #if 0 1999 (void)uath_cmd_read(sc, UATH_CMD_SHUTDOWN, NULL, 0, NULL, 2000 UATH_CMD_FLAG_MAGIC); 2001 #endif 2002 2003 /* abort any pending transfers */ 2004 usbd_abort_pipe(sc->data_tx_pipe); 2005 usbd_abort_pipe(sc->data_rx_pipe); 2006 usbd_abort_pipe(sc->cmd_tx_pipe); 2007 2008 splx(s); 2009 } 2010 2011 /* 2012 * Load the MIPS R4000 microcode into the device. Once the image is loaded, 2013 * the device will detach itself from the bus and reattach later with a new 2014 * product Id (a la ezusb). XXX this could also be implemented in userland 2015 * through /dev/ugen. 2016 */ 2017 int 2018 uath_loadfirmware(struct uath_softc *sc, const u_char *fw, int len) 2019 { 2020 usbd_xfer_handle ctlxfer, txxfer, rxxfer; 2021 struct uath_fwblock *txblock, *rxblock; 2022 uint8_t *txdata; 2023 int error = 0; 2024 2025 if ((ctlxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) { 2026 printf("%s: could not allocate Tx control xfer\n", 2027 sc->sc_dev.dv_xname); 2028 error = USBD_NOMEM; 2029 goto fail1; 2030 } 2031 txblock = usbd_alloc_buffer(ctlxfer, sizeof (struct uath_fwblock)); 2032 if (txblock == NULL) { 2033 printf("%s: could not allocate Tx control block\n", 2034 sc->sc_dev.dv_xname); 2035 error = USBD_NOMEM; 2036 goto fail2; 2037 } 2038 2039 if ((txxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) { 2040 printf("%s: could not allocate Tx xfer\n", 2041 sc->sc_dev.dv_xname); 2042 error = USBD_NOMEM; 2043 goto fail2; 2044 } 2045 txdata = usbd_alloc_buffer(txxfer, UATH_MAX_FWBLOCK_SIZE); 2046 if (txdata == NULL) { 2047 printf("%s: could not allocate Tx buffer\n", 2048 sc->sc_dev.dv_xname); 2049 error = USBD_NOMEM; 2050 goto fail3; 2051 } 2052 2053 if ((rxxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) { 2054 printf("%s: could not allocate Rx control xfer\n", 2055 sc->sc_dev.dv_xname); 2056 error = USBD_NOMEM; 2057 goto fail3; 2058 } 2059 rxblock = usbd_alloc_buffer(rxxfer, sizeof (struct uath_fwblock)); 2060 if (rxblock == NULL) { 2061 printf("%s: could not allocate Rx control block\n", 2062 sc->sc_dev.dv_xname); 2063 error = USBD_NOMEM; 2064 goto fail4; 2065 } 2066 2067 bzero(txblock, sizeof (struct uath_fwblock)); 2068 txblock->flags = htobe32(UATH_WRITE_BLOCK); 2069 txblock->total = htobe32(len); 2070 2071 while (len > 0) { 2072 int mlen = min(len, UATH_MAX_FWBLOCK_SIZE); 2073 2074 txblock->remain = htobe32(len - mlen); 2075 txblock->len = htobe32(mlen); 2076 2077 DPRINTF(("sending firmware block: %d bytes remaining\n", 2078 len - mlen)); 2079 2080 /* send firmware block meta-data */ 2081 usbd_setup_xfer(ctlxfer, sc->cmd_tx_pipe, sc, txblock, 2082 sizeof (struct uath_fwblock), USBD_NO_COPY, 2083 UATH_CMD_TIMEOUT, NULL); 2084 if ((error = usbd_sync_transfer(ctlxfer)) != 0) { 2085 printf("%s: could not send firmware block info\n", 2086 sc->sc_dev.dv_xname); 2087 break; 2088 } 2089 2090 /* send firmware block data */ 2091 bcopy(fw, txdata, mlen); 2092 usbd_setup_xfer(txxfer, sc->data_tx_pipe, sc, txdata, mlen, 2093 USBD_NO_COPY, UATH_DATA_TIMEOUT, NULL); 2094 if ((error = usbd_sync_transfer(txxfer)) != 0) { 2095 printf("%s: could not send firmware block data\n", 2096 sc->sc_dev.dv_xname); 2097 break; 2098 } 2099 2100 /* wait for ack from firmware */ 2101 usbd_setup_xfer(rxxfer, sc->cmd_rx_pipe, sc, rxblock, 2102 sizeof (struct uath_fwblock), USBD_SHORT_XFER_OK | 2103 USBD_NO_COPY, UATH_CMD_TIMEOUT, NULL); 2104 if ((error = usbd_sync_transfer(rxxfer)) != 0) { 2105 printf("%s: could not read firmware answer\n", 2106 sc->sc_dev.dv_xname); 2107 break; 2108 } 2109 2110 DPRINTFN(2, ("rxblock flags=0x%x total=%d\n", 2111 betoh32(rxblock->flags), betoh32(rxblock->rxtotal))); 2112 fw += mlen; 2113 len -= mlen; 2114 } 2115 2116 fail4: usbd_free_xfer(rxxfer); 2117 fail3: usbd_free_xfer(txxfer); 2118 fail2: usbd_free_xfer(ctlxfer); 2119 fail1: return error; 2120 } 2121 2122 int 2123 uath_activate(struct device *self, enum devact act) 2124 { 2125 switch (act) { 2126 case DVACT_ACTIVATE: 2127 break; 2128 2129 case DVACT_DEACTIVATE: 2130 break; 2131 } 2132 return 0; 2133 } 2134