1 /* $OpenBSD: if_uath.c,v 1.67 2015/03/14 03:38:49 jsg Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Driver for Atheros AR5005UG/AR5005UX chipsets. 22 * 23 * IMPORTANT NOTICE: 24 * This driver was written without any documentation or support from Atheros 25 * Communications. It is based on a black-box analysis of the Windows binary 26 * driver. It handles both pre and post-firmware devices. 27 */ 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/timeout.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 #include <sys/endian.h> 41 42 #include <machine/bus.h> 43 #include <machine/intr.h> 44 45 #if NBPFILTER > 0 46 #include <net/bpf.h> 47 #endif 48 #include <net/if.h> 49 #include <net/if_arp.h> 50 #include <net/if_dl.h> 51 #include <net/if_media.h> 52 #include <net/if_types.h> 53 54 #include <netinet/in.h> 55 #include <netinet/if_ether.h> 56 57 #include <net80211/ieee80211_var.h> 58 #include <net80211/ieee80211_radiotap.h> 59 60 #include <dev/usb/usb.h> 61 #include <dev/usb/usbdi.h> 62 #include <dev/usb/usbdivar.h> /* needs_reattach() */ 63 #include <dev/usb/usbdi_util.h> 64 #include <dev/usb/usbdevs.h> 65 66 #include <dev/usb/if_uathreg.h> 67 #include <dev/usb/if_uathvar.h> 68 69 #ifdef UATH_DEBUG 70 #define DPRINTF(x) do { if (uath_debug) printf x; } while (0) 71 #define DPRINTFN(n, x) do { if (uath_debug >= (n)) printf x; } while (0) 72 int uath_debug = 1; 73 #else 74 #define DPRINTF(x) 75 #define DPRINTFN(n, x) 76 #endif 77 78 /*- 79 * Various supported device vendors/products. 80 * UB51: AR5005UG 802.11b/g, UB52: AR5005UX 802.11a/b/g 81 */ 82 #define UATH_DEV(v, p, f) \ 83 { { USB_VENDOR_##v, USB_PRODUCT_##v##_##p }, (f) }, \ 84 { { USB_VENDOR_##v, USB_PRODUCT_##v##_##p##_NF }, \ 85 (f) | UATH_FLAG_PRE_FIRMWARE } 86 #define UATH_DEV_UG(v, p) UATH_DEV(v, p, 0) 87 #define UATH_DEV_UX(v, p) UATH_DEV(v, p, UATH_FLAG_ABG) 88 static const struct uath_type { 89 struct usb_devno dev; 90 unsigned int flags; 91 #define UATH_FLAG_PRE_FIRMWARE (1 << 0) 92 #define UATH_FLAG_ABG (1 << 1) 93 } uath_devs[] = { 94 UATH_DEV_UG(ACCTON, SMCWUSBTG2), 95 UATH_DEV_UG(ATHEROS, AR5523), 96 UATH_DEV_UG(ATHEROS2, AR5523_1), 97 UATH_DEV_UG(ATHEROS2, AR5523_2), 98 UATH_DEV_UX(ATHEROS2, AR5523_3), 99 UATH_DEV_UG(CONCEPTRONIC, AR5523_1), 100 UATH_DEV_UX(CONCEPTRONIC, AR5523_2), 101 UATH_DEV_UX(DLINK, DWLAG122), 102 UATH_DEV_UX(DLINK, DWLAG132), 103 UATH_DEV_UG(DLINK, DWLG132), 104 UATH_DEV_UG(DLINK2, WUA2340), 105 UATH_DEV_UG(GIGASET, AR5523), 106 UATH_DEV_UG(GIGASET, SMCWUSBTG), 107 UATH_DEV_UG(GLOBALSUN, AR5523_1), 108 UATH_DEV_UX(GLOBALSUN, AR5523_2), 109 UATH_DEV_UG(IODATA, USBWNG54US), 110 UATH_DEV_UG(MELCO, WLIU2KAMG54), 111 UATH_DEV_UX(NETGEAR, WG111U), 112 UATH_DEV_UG(NETGEAR3, WG111T), 113 UATH_DEV_UG(NETGEAR3, WPN111), 114 UATH_DEV_UG(PHILIPS, SNU6500), 115 UATH_DEV_UX(UMEDIA, AR5523_2), 116 UATH_DEV_UG(UMEDIA, TEW444UBEU), 117 UATH_DEV_UG(WISTRONNEWEB, AR5523_1), 118 UATH_DEV_UX(WISTRONNEWEB, AR5523_2), 119 UATH_DEV_UG(ZCOM, AR5523) 120 }; 121 #define uath_lookup(v, p) \ 122 ((const struct uath_type *)usb_lookup(uath_devs, v, p)) 123 124 void uath_attachhook(void *); 125 int uath_open_pipes(struct uath_softc *); 126 void uath_close_pipes(struct uath_softc *); 127 int uath_alloc_tx_data_list(struct uath_softc *); 128 void uath_free_tx_data_list(struct uath_softc *); 129 int uath_alloc_rx_data_list(struct uath_softc *); 130 void uath_free_rx_data_list(struct uath_softc *); 131 int uath_alloc_tx_cmd_list(struct uath_softc *); 132 void uath_free_tx_cmd_list(struct uath_softc *); 133 int uath_alloc_rx_cmd_list(struct uath_softc *); 134 void uath_free_rx_cmd_list(struct uath_softc *); 135 int uath_media_change(struct ifnet *); 136 void uath_stat(void *); 137 void uath_next_scan(void *); 138 void uath_task(void *); 139 int uath_newstate(struct ieee80211com *, enum ieee80211_state, int); 140 #ifdef UATH_DEBUG 141 void uath_dump_cmd(const uint8_t *, int, char); 142 #endif 143 int uath_cmd(struct uath_softc *, uint32_t, const void *, int, void *, 144 int); 145 int uath_cmd_write(struct uath_softc *, uint32_t, const void *, int, int); 146 int uath_cmd_read(struct uath_softc *, uint32_t, const void *, int, void *, 147 int); 148 int uath_write_reg(struct uath_softc *, uint32_t, uint32_t); 149 int uath_write_multi(struct uath_softc *, uint32_t, const void *, int); 150 int uath_read_reg(struct uath_softc *, uint32_t, uint32_t *); 151 int uath_read_eeprom(struct uath_softc *, uint32_t, void *); 152 void uath_cmd_rxeof(struct usbd_xfer *, void *, usbd_status); 153 void uath_data_rxeof(struct usbd_xfer *, void *, usbd_status); 154 void uath_data_txeof(struct usbd_xfer *, void *, usbd_status); 155 int uath_tx_null(struct uath_softc *); 156 int uath_tx_data(struct uath_softc *, struct mbuf *, 157 struct ieee80211_node *); 158 void uath_start(struct ifnet *); 159 void uath_watchdog(struct ifnet *); 160 int uath_ioctl(struct ifnet *, u_long, caddr_t); 161 int uath_query_eeprom(struct uath_softc *); 162 int uath_reset(struct uath_softc *); 163 int uath_reset_tx_queues(struct uath_softc *); 164 int uath_wme_init(struct uath_softc *); 165 int uath_set_chan(struct uath_softc *, struct ieee80211_channel *); 166 int uath_set_key(struct uath_softc *, const struct ieee80211_key *, int); 167 int uath_set_keys(struct uath_softc *); 168 int uath_set_rates(struct uath_softc *, const struct ieee80211_rateset *); 169 int uath_set_rxfilter(struct uath_softc *, uint32_t, uint32_t); 170 int uath_set_led(struct uath_softc *, int, int); 171 int uath_switch_channel(struct uath_softc *, struct ieee80211_channel *); 172 int uath_init(struct ifnet *); 173 void uath_stop(struct ifnet *, int); 174 int uath_loadfirmware(struct uath_softc *, const u_char *, int); 175 176 int uath_match(struct device *, void *, void *); 177 void uath_attach(struct device *, struct device *, void *); 178 int uath_detach(struct device *, int); 179 180 struct cfdriver uath_cd = { 181 NULL, "uath", DV_IFNET 182 }; 183 184 const struct cfattach uath_ca = { 185 sizeof(struct uath_softc), uath_match, uath_attach, uath_detach 186 }; 187 188 int 189 uath_match(struct device *parent, void *match, void *aux) 190 { 191 struct usb_attach_arg *uaa = aux; 192 193 if (uaa->iface != NULL) 194 return UMATCH_NONE; 195 196 return (uath_lookup(uaa->vendor, uaa->product) != NULL) ? 197 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 198 } 199 200 void 201 uath_attachhook(void *xsc) 202 { 203 struct uath_softc *sc = xsc; 204 u_char *fw; 205 size_t size; 206 int error; 207 208 if ((error = loadfirmware("uath-ar5523", &fw, &size)) != 0) { 209 printf("%s: error %d, could not read firmware %s\n", 210 sc->sc_dev.dv_xname, error, "uath-ar5523"); 211 return; 212 } 213 214 error = uath_loadfirmware(sc, fw, size); 215 free(fw, M_DEVBUF, 0); 216 217 if (error == 0) { 218 /* 219 * Hack alert: the device doesn't always gracefully detach 220 * from the bus after a firmware upload. We need to force 221 * a port reset and a re-exploration on the parent hub. 222 */ 223 usbd_reset_port(sc->sc_uhub, sc->sc_port); 224 usb_needs_reattach(sc->sc_udev); 225 } else { 226 printf("%s: could not load firmware (error=%s)\n", 227 sc->sc_dev.dv_xname, usbd_errstr(error)); 228 } 229 } 230 231 void 232 uath_attach(struct device *parent, struct device *self, void *aux) 233 { 234 struct uath_softc *sc = (struct uath_softc *)self; 235 struct usb_attach_arg *uaa = aux; 236 struct ieee80211com *ic = &sc->sc_ic; 237 struct ifnet *ifp = &ic->ic_if; 238 usbd_status error; 239 int i; 240 241 sc->sc_udev = uaa->device; 242 sc->sc_uhub = uaa->device->myhub; 243 sc->sc_port = uaa->port; 244 245 sc->sc_flags = uath_lookup(uaa->vendor, uaa->product)->flags; 246 247 if (usbd_set_config_no(sc->sc_udev, UATH_CONFIG_NO, 0) != 0) { 248 printf("%s: could not set configuration no\n", 249 sc->sc_dev.dv_xname); 250 return; 251 } 252 253 /* get the first interface handle */ 254 error = usbd_device2interface_handle(sc->sc_udev, UATH_IFACE_INDEX, 255 &sc->sc_iface); 256 if (error != 0) { 257 printf("%s: could not get interface handle\n", 258 sc->sc_dev.dv_xname); 259 return; 260 } 261 262 /* 263 * We must open the pipes early because they're used to upload the 264 * firmware (pre-firmware devices) or to send firmware commands. 265 */ 266 if (uath_open_pipes(sc) != 0) { 267 printf("%s: could not open pipes\n", sc->sc_dev.dv_xname); 268 return; 269 } 270 271 if (sc->sc_flags & UATH_FLAG_PRE_FIRMWARE) { 272 if (rootvp == NULL) 273 mountroothook_establish(uath_attachhook, sc); 274 else 275 uath_attachhook(sc); 276 return; 277 } 278 279 /* 280 * Only post-firmware devices here. 281 */ 282 usb_init_task(&sc->sc_task, uath_task, sc, USB_TASK_TYPE_GENERIC); 283 timeout_set(&sc->scan_to, uath_next_scan, sc); 284 timeout_set(&sc->stat_to, uath_stat, sc); 285 286 /* 287 * Allocate xfers for firmware commands. 288 */ 289 if (uath_alloc_tx_cmd_list(sc) != 0) { 290 printf("%s: could not allocate Tx command list\n", 291 sc->sc_dev.dv_xname); 292 goto fail1; 293 } 294 if (uath_alloc_rx_cmd_list(sc) != 0) { 295 printf("%s: could not allocate Rx command list\n", 296 sc->sc_dev.dv_xname); 297 goto fail2; 298 } 299 300 /* 301 * Queue Rx command xfers. 302 */ 303 for (i = 0; i < UATH_RX_CMD_LIST_COUNT; i++) { 304 struct uath_rx_cmd *cmd = &sc->rx_cmd[i]; 305 306 usbd_setup_xfer(cmd->xfer, sc->cmd_rx_pipe, cmd, cmd->buf, 307 UATH_MAX_RXCMDSZ, USBD_SHORT_XFER_OK | USBD_NO_COPY, 308 USBD_NO_TIMEOUT, uath_cmd_rxeof); 309 error = usbd_transfer(cmd->xfer); 310 if (error != USBD_IN_PROGRESS && error != 0) { 311 printf("%s: could not queue Rx command xfer\n", 312 sc->sc_dev.dv_xname); 313 goto fail3; 314 } 315 } 316 317 /* 318 * We're now ready to send/receive firmware commands. 319 */ 320 if (uath_reset(sc) != 0) { 321 printf("%s: could not initialize adapter\n", 322 sc->sc_dev.dv_xname); 323 goto fail3; 324 } 325 if (uath_query_eeprom(sc) != 0) { 326 printf("%s: could not read EEPROM\n", sc->sc_dev.dv_xname); 327 goto fail3; 328 } 329 330 printf("%s: MAC/BBP AR5523, RF AR%c112, address %s\n", 331 sc->sc_dev.dv_xname, (sc->sc_flags & UATH_FLAG_ABG) ? '5': '2', 332 ether_sprintf(ic->ic_myaddr)); 333 334 /* 335 * Allocate xfers for Tx/Rx data pipes. 336 */ 337 if (uath_alloc_tx_data_list(sc) != 0) { 338 printf("%s: could not allocate Tx data list\n", 339 sc->sc_dev.dv_xname); 340 goto fail3; 341 } 342 if (uath_alloc_rx_data_list(sc) != 0) { 343 printf("%s: could not allocate Rx data list\n", 344 sc->sc_dev.dv_xname); 345 goto fail4; 346 } 347 348 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 349 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 350 ic->ic_state = IEEE80211_S_INIT; 351 352 /* set device capabilities */ 353 ic->ic_caps = 354 IEEE80211_C_MONITOR | /* monitor mode supported */ 355 IEEE80211_C_TXPMGT | /* tx power management */ 356 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 357 IEEE80211_C_SHSLOT | /* short slot time supported */ 358 IEEE80211_C_WEP; /* h/w WEP */ 359 360 /* set supported .11b and .11g rates */ 361 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 362 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 363 364 /* set supported .11b and .11g channels (1 through 14) */ 365 for (i = 1; i <= 14; i++) { 366 ic->ic_channels[i].ic_freq = 367 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 368 ic->ic_channels[i].ic_flags = 369 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 370 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 371 } 372 373 ifp->if_softc = sc; 374 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 375 ifp->if_ioctl = uath_ioctl; 376 ifp->if_start = uath_start; 377 ifp->if_watchdog = uath_watchdog; 378 IFQ_SET_READY(&ifp->if_snd); 379 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 380 381 if_attach(ifp); 382 ieee80211_ifattach(ifp); 383 384 /* override state transition machine */ 385 sc->sc_newstate = ic->ic_newstate; 386 ic->ic_newstate = uath_newstate; 387 ieee80211_media_init(ifp, uath_media_change, ieee80211_media_status); 388 389 #if NBPFILTER > 0 390 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 391 sizeof (struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN); 392 393 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 394 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 395 sc->sc_rxtap.wr_ihdr.it_present = htole32(UATH_RX_RADIOTAP_PRESENT); 396 397 sc->sc_txtap_len = sizeof sc->sc_txtapu; 398 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 399 sc->sc_txtap.wt_ihdr.it_present = htole32(UATH_TX_RADIOTAP_PRESENT); 400 #endif 401 402 return; 403 404 fail4: uath_free_tx_data_list(sc); 405 fail3: uath_free_rx_cmd_list(sc); 406 fail2: uath_free_tx_cmd_list(sc); 407 fail1: uath_close_pipes(sc); 408 usbd_deactivate(sc->sc_udev); 409 } 410 411 int 412 uath_detach(struct device *self, int flags) 413 { 414 struct uath_softc *sc = (struct uath_softc *)self; 415 struct ifnet *ifp = &sc->sc_ic.ic_if; 416 int s; 417 418 s = splnet(); 419 420 if (sc->sc_flags & UATH_FLAG_PRE_FIRMWARE) { 421 uath_close_pipes(sc); 422 splx(s); 423 return 0; 424 } 425 426 /* post-firmware device */ 427 428 usb_rem_task(sc->sc_udev, &sc->sc_task); 429 if (timeout_initialized(&sc->scan_to)) 430 timeout_del(&sc->scan_to); 431 if (timeout_initialized(&sc->stat_to)) 432 timeout_del(&sc->stat_to); 433 434 /* abort and free xfers */ 435 uath_free_tx_data_list(sc); 436 uath_free_rx_data_list(sc); 437 uath_free_tx_cmd_list(sc); 438 uath_free_rx_cmd_list(sc); 439 440 /* close Tx/Rx pipes */ 441 uath_close_pipes(sc); 442 443 if (ifp->if_softc != NULL) { 444 ieee80211_ifdetach(ifp); /* free all nodes */ 445 if_detach(ifp); 446 } 447 448 splx(s); 449 450 return 0; 451 } 452 453 int 454 uath_open_pipes(struct uath_softc *sc) 455 { 456 int error; 457 458 /* 459 * XXX pipes numbers are hardcoded because we don't have any way 460 * to distinguish the data pipes from the firmware command pipes 461 * (both are bulk pipes) using the endpoints descriptors. 462 */ 463 error = usbd_open_pipe(sc->sc_iface, 0x01, USBD_EXCLUSIVE_USE, 464 &sc->cmd_tx_pipe); 465 if (error != 0) { 466 printf("%s: could not open Tx command pipe: %s\n", 467 sc->sc_dev.dv_xname, usbd_errstr(error)); 468 goto fail; 469 } 470 471 error = usbd_open_pipe(sc->sc_iface, 0x02, USBD_EXCLUSIVE_USE, 472 &sc->data_tx_pipe); 473 if (error != 0) { 474 printf("%s: could not open Tx data pipe: %s\n", 475 sc->sc_dev.dv_xname, usbd_errstr(error)); 476 goto fail; 477 } 478 479 error = usbd_open_pipe(sc->sc_iface, 0x81, USBD_EXCLUSIVE_USE, 480 &sc->cmd_rx_pipe); 481 if (error != 0) { 482 printf("%s: could not open Rx command pipe: %s\n", 483 sc->sc_dev.dv_xname, usbd_errstr(error)); 484 goto fail; 485 } 486 487 error = usbd_open_pipe(sc->sc_iface, 0x82, USBD_EXCLUSIVE_USE, 488 &sc->data_rx_pipe); 489 if (error != 0) { 490 printf("%s: could not open Rx data pipe: %s\n", 491 sc->sc_dev.dv_xname, usbd_errstr(error)); 492 goto fail; 493 } 494 495 return 0; 496 497 fail: uath_close_pipes(sc); 498 return error; 499 } 500 501 void 502 uath_close_pipes(struct uath_softc *sc) 503 { 504 /* assumes no transfers are pending on the pipes */ 505 506 if (sc->data_tx_pipe != NULL) 507 usbd_close_pipe(sc->data_tx_pipe); 508 509 if (sc->data_rx_pipe != NULL) 510 usbd_close_pipe(sc->data_rx_pipe); 511 512 if (sc->cmd_tx_pipe != NULL) 513 usbd_close_pipe(sc->cmd_tx_pipe); 514 515 if (sc->cmd_rx_pipe != NULL) 516 usbd_close_pipe(sc->cmd_rx_pipe); 517 } 518 519 int 520 uath_alloc_tx_data_list(struct uath_softc *sc) 521 { 522 int i, error; 523 524 for (i = 0; i < UATH_TX_DATA_LIST_COUNT; i++) { 525 struct uath_tx_data *data = &sc->tx_data[i]; 526 527 data->sc = sc; /* backpointer for callbacks */ 528 529 data->xfer = usbd_alloc_xfer(sc->sc_udev); 530 if (data->xfer == NULL) { 531 printf("%s: could not allocate xfer\n", 532 sc->sc_dev.dv_xname); 533 error = ENOMEM; 534 goto fail; 535 } 536 data->buf = usbd_alloc_buffer(data->xfer, UATH_MAX_TXBUFSZ); 537 if (data->buf == NULL) { 538 printf("%s: could not allocate xfer buffer\n", 539 sc->sc_dev.dv_xname); 540 error = ENOMEM; 541 goto fail; 542 } 543 } 544 return 0; 545 546 fail: uath_free_tx_data_list(sc); 547 return error; 548 } 549 550 void 551 uath_free_tx_data_list(struct uath_softc *sc) 552 { 553 int i; 554 555 /* make sure no transfers are pending */ 556 usbd_abort_pipe(sc->data_tx_pipe); 557 558 for (i = 0; i < UATH_TX_DATA_LIST_COUNT; i++) 559 if (sc->tx_data[i].xfer != NULL) 560 usbd_free_xfer(sc->tx_data[i].xfer); 561 } 562 563 int 564 uath_alloc_rx_data_list(struct uath_softc *sc) 565 { 566 int i, error; 567 568 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) { 569 struct uath_rx_data *data = &sc->rx_data[i]; 570 571 data->sc = sc; /* backpointer for callbacks */ 572 573 data->xfer = usbd_alloc_xfer(sc->sc_udev); 574 if (data->xfer == NULL) { 575 printf("%s: could not allocate xfer\n", 576 sc->sc_dev.dv_xname); 577 error = ENOMEM; 578 goto fail; 579 } 580 if (usbd_alloc_buffer(data->xfer, sc->rxbufsz) == NULL) { 581 printf("%s: could not allocate xfer buffer\n", 582 sc->sc_dev.dv_xname); 583 error = ENOMEM; 584 goto fail; 585 } 586 587 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 588 if (data->m == NULL) { 589 printf("%s: could not allocate rx mbuf\n", 590 sc->sc_dev.dv_xname); 591 error = ENOMEM; 592 goto fail; 593 } 594 MCLGET(data->m, M_DONTWAIT); 595 if (!(data->m->m_flags & M_EXT)) { 596 printf("%s: could not allocate rx mbuf cluster\n", 597 sc->sc_dev.dv_xname); 598 error = ENOMEM; 599 goto fail; 600 } 601 602 data->buf = mtod(data->m, uint8_t *); 603 } 604 return 0; 605 606 fail: uath_free_rx_data_list(sc); 607 return error; 608 } 609 610 void 611 uath_free_rx_data_list(struct uath_softc *sc) 612 { 613 int i; 614 615 /* make sure no transfers are pending */ 616 usbd_abort_pipe(sc->data_rx_pipe); 617 618 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) { 619 struct uath_rx_data *data = &sc->rx_data[i]; 620 621 if (data->xfer != NULL) 622 usbd_free_xfer(data->xfer); 623 624 if (data->m != NULL) 625 m_freem(data->m); 626 } 627 } 628 629 int 630 uath_alloc_tx_cmd_list(struct uath_softc *sc) 631 { 632 int i, error; 633 634 for (i = 0; i < UATH_TX_CMD_LIST_COUNT; i++) { 635 struct uath_tx_cmd *cmd = &sc->tx_cmd[i]; 636 637 cmd->sc = sc; /* backpointer for callbacks */ 638 639 cmd->xfer = usbd_alloc_xfer(sc->sc_udev); 640 if (cmd->xfer == NULL) { 641 printf("%s: could not allocate xfer\n", 642 sc->sc_dev.dv_xname); 643 error = ENOMEM; 644 goto fail; 645 } 646 cmd->buf = usbd_alloc_buffer(cmd->xfer, UATH_MAX_TXCMDSZ); 647 if (cmd->buf == NULL) { 648 printf("%s: could not allocate xfer buffer\n", 649 sc->sc_dev.dv_xname); 650 error = ENOMEM; 651 goto fail; 652 } 653 } 654 return 0; 655 656 fail: uath_free_tx_cmd_list(sc); 657 return error; 658 } 659 660 void 661 uath_free_tx_cmd_list(struct uath_softc *sc) 662 { 663 int i; 664 665 /* make sure no transfers are pending */ 666 usbd_abort_pipe(sc->cmd_tx_pipe); 667 668 for (i = 0; i < UATH_TX_CMD_LIST_COUNT; i++) 669 if (sc->tx_cmd[i].xfer != NULL) 670 usbd_free_xfer(sc->tx_cmd[i].xfer); 671 } 672 673 int 674 uath_alloc_rx_cmd_list(struct uath_softc *sc) 675 { 676 int i, error; 677 678 for (i = 0; i < UATH_RX_CMD_LIST_COUNT; i++) { 679 struct uath_rx_cmd *cmd = &sc->rx_cmd[i]; 680 681 cmd->sc = sc; /* backpointer for callbacks */ 682 683 cmd->xfer = usbd_alloc_xfer(sc->sc_udev); 684 if (cmd->xfer == NULL) { 685 printf("%s: could not allocate xfer\n", 686 sc->sc_dev.dv_xname); 687 error = ENOMEM; 688 goto fail; 689 } 690 cmd->buf = usbd_alloc_buffer(cmd->xfer, UATH_MAX_RXCMDSZ); 691 if (cmd->buf == NULL) { 692 printf("%s: could not allocate xfer buffer\n", 693 sc->sc_dev.dv_xname); 694 error = ENOMEM; 695 goto fail; 696 } 697 } 698 return 0; 699 700 fail: uath_free_rx_cmd_list(sc); 701 return error; 702 } 703 704 void 705 uath_free_rx_cmd_list(struct uath_softc *sc) 706 { 707 int i; 708 709 /* make sure no transfers are pending */ 710 usbd_abort_pipe(sc->cmd_rx_pipe); 711 712 for (i = 0; i < UATH_RX_CMD_LIST_COUNT; i++) 713 if (sc->rx_cmd[i].xfer != NULL) 714 usbd_free_xfer(sc->rx_cmd[i].xfer); 715 } 716 717 int 718 uath_media_change(struct ifnet *ifp) 719 { 720 int error; 721 722 error = ieee80211_media_change(ifp); 723 if (error != ENETRESET) 724 return error; 725 726 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 727 uath_init(ifp); 728 729 return 0; 730 } 731 732 /* 733 * This function is called periodically (every second) when associated to 734 * query device statistics. 735 */ 736 void 737 uath_stat(void *arg) 738 { 739 struct uath_softc *sc = arg; 740 int error; 741 742 /* 743 * Send request for statistics asynchronously. The timer will be 744 * restarted when we'll get the stats notification. 745 */ 746 error = uath_cmd_write(sc, UATH_CMD_STATS, NULL, 0, 747 UATH_CMD_FLAG_ASYNC); 748 if (error != 0) { 749 printf("%s: could not query statistics (error=%d)\n", 750 sc->sc_dev.dv_xname, error); 751 } 752 } 753 754 /* 755 * This function is called periodically (every 250ms) during scanning to 756 * switch from one channel to another. 757 */ 758 void 759 uath_next_scan(void *arg) 760 { 761 struct uath_softc *sc = arg; 762 struct ieee80211com *ic = &sc->sc_ic; 763 struct ifnet *ifp = &ic->ic_if; 764 765 if (ic->ic_state == IEEE80211_S_SCAN) 766 ieee80211_next_scan(ifp); 767 } 768 769 void 770 uath_task(void *arg) 771 { 772 struct uath_softc *sc = arg; 773 struct ieee80211com *ic = &sc->sc_ic; 774 enum ieee80211_state ostate; 775 776 ostate = ic->ic_state; 777 778 switch (sc->sc_state) { 779 case IEEE80211_S_INIT: 780 if (ostate == IEEE80211_S_RUN) { 781 /* turn link and activity LEDs off */ 782 (void)uath_set_led(sc, UATH_LED_LINK, 0); 783 (void)uath_set_led(sc, UATH_LED_ACTIVITY, 0); 784 } 785 break; 786 787 case IEEE80211_S_SCAN: 788 if (uath_switch_channel(sc, ic->ic_bss->ni_chan) != 0) { 789 printf("%s: could not switch channel\n", 790 sc->sc_dev.dv_xname); 791 break; 792 } 793 timeout_add_msec(&sc->scan_to, 250); 794 break; 795 796 case IEEE80211_S_AUTH: 797 { 798 struct ieee80211_node *ni = ic->ic_bss; 799 struct uath_cmd_bssid bssid; 800 struct uath_cmd_0b cmd0b; 801 struct uath_cmd_0c cmd0c; 802 803 if (uath_switch_channel(sc, ni->ni_chan) != 0) { 804 printf("%s: could not switch channel\n", 805 sc->sc_dev.dv_xname); 806 break; 807 } 808 809 (void)uath_cmd_write(sc, UATH_CMD_24, NULL, 0, 0); 810 811 bzero(&bssid, sizeof bssid); 812 bssid.len = htobe32(IEEE80211_ADDR_LEN); 813 IEEE80211_ADDR_COPY(bssid.bssid, ni->ni_bssid); 814 (void)uath_cmd_write(sc, UATH_CMD_SET_BSSID, &bssid, 815 sizeof bssid, 0); 816 817 bzero(&cmd0b, sizeof cmd0b); 818 cmd0b.code = htobe32(2); 819 cmd0b.size = htobe32(sizeof (cmd0b.data)); 820 (void)uath_cmd_write(sc, UATH_CMD_0B, &cmd0b, sizeof cmd0b, 0); 821 822 bzero(&cmd0c, sizeof cmd0c); 823 cmd0c.magic1 = htobe32(2); 824 cmd0c.magic2 = htobe32(7); 825 cmd0c.magic3 = htobe32(1); 826 (void)uath_cmd_write(sc, UATH_CMD_0C, &cmd0c, sizeof cmd0c, 0); 827 828 if (uath_set_rates(sc, &ni->ni_rates) != 0) { 829 printf("%s: could not set negotiated rate set\n", 830 sc->sc_dev.dv_xname); 831 break; 832 } 833 break; 834 } 835 836 case IEEE80211_S_ASSOC: 837 break; 838 839 case IEEE80211_S_RUN: 840 { 841 struct ieee80211_node *ni = ic->ic_bss; 842 struct uath_cmd_bssid bssid; 843 struct uath_cmd_xled xled; 844 uint32_t val; 845 846 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 847 /* make both LEDs blink while monitoring */ 848 bzero(&xled, sizeof xled); 849 xled.which = htobe32(0); 850 xled.rate = htobe32(1); 851 xled.mode = htobe32(2); 852 (void)uath_cmd_write(sc, UATH_CMD_SET_XLED, &xled, 853 sizeof xled, 0); 854 break; 855 } 856 857 /* 858 * Tx rate is controlled by firmware, report the maximum 859 * negotiated rate in ifconfig output. 860 */ 861 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 862 863 val = htobe32(1); 864 (void)uath_cmd_write(sc, UATH_CMD_2E, &val, sizeof val, 0); 865 866 bzero(&bssid, sizeof bssid); 867 bssid.flags1 = htobe32(0xc004); 868 bssid.flags2 = htobe32(0x003b); 869 bssid.len = htobe32(IEEE80211_ADDR_LEN); 870 IEEE80211_ADDR_COPY(bssid.bssid, ni->ni_bssid); 871 (void)uath_cmd_write(sc, UATH_CMD_SET_BSSID, &bssid, 872 sizeof bssid, 0); 873 874 /* turn link LED on */ 875 (void)uath_set_led(sc, UATH_LED_LINK, 1); 876 877 /* make activity LED blink */ 878 bzero(&xled, sizeof xled); 879 xled.which = htobe32(1); 880 xled.rate = htobe32(1); 881 xled.mode = htobe32(2); 882 (void)uath_cmd_write(sc, UATH_CMD_SET_XLED, &xled, sizeof xled, 883 0); 884 885 /* set state to associated */ 886 val = htobe32(1); 887 (void)uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 888 0); 889 890 /* start statistics timer */ 891 timeout_add_sec(&sc->stat_to, 1); 892 break; 893 } 894 } 895 sc->sc_newstate(ic, sc->sc_state, sc->sc_arg); 896 } 897 898 int 899 uath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 900 { 901 struct uath_softc *sc = ic->ic_softc; 902 903 usb_rem_task(sc->sc_udev, &sc->sc_task); 904 timeout_del(&sc->scan_to); 905 timeout_del(&sc->stat_to); 906 907 /* do it in a process context */ 908 sc->sc_state = nstate; 909 sc->sc_arg = arg; 910 usb_add_task(sc->sc_udev, &sc->sc_task); 911 return 0; 912 } 913 914 #ifdef UATH_DEBUG 915 void 916 uath_dump_cmd(const uint8_t *buf, int len, char prefix) 917 { 918 int i; 919 920 for (i = 0; i < len; i++) { 921 if ((i % 16) == 0) 922 printf("\n%c ", prefix); 923 else if ((i % 4) == 0) 924 printf(" "); 925 printf("%02x", buf[i]); 926 } 927 printf("\n"); 928 } 929 #endif 930 931 /* 932 * Low-level function to send read or write commands to the firmware. 933 */ 934 int 935 uath_cmd(struct uath_softc *sc, uint32_t code, const void *idata, int ilen, 936 void *odata, int flags) 937 { 938 struct uath_cmd_hdr *hdr; 939 struct uath_tx_cmd *cmd; 940 uint16_t xferflags; 941 int s, xferlen, error; 942 943 /* grab a xfer */ 944 cmd = &sc->tx_cmd[sc->cmd_idx]; 945 946 /* always bulk-out a multiple of 4 bytes */ 947 xferlen = (sizeof (struct uath_cmd_hdr) + ilen + 3) & ~3; 948 949 hdr = (struct uath_cmd_hdr *)cmd->buf; 950 bzero(hdr, sizeof (struct uath_cmd_hdr)); 951 hdr->len = htobe32(xferlen); 952 hdr->code = htobe32(code); 953 hdr->priv = sc->cmd_idx; /* don't care about endianness */ 954 hdr->magic = htobe32((flags & UATH_CMD_FLAG_MAGIC) ? 1 << 24 : 0); 955 bcopy(idata, (uint8_t *)(hdr + 1), ilen); 956 957 #ifdef UATH_DEBUG 958 if (uath_debug >= 5) { 959 printf("sending command code=0x%02x flags=0x%x index=%u", 960 code, flags, sc->cmd_idx); 961 uath_dump_cmd(cmd->buf, xferlen, '+'); 962 } 963 #endif 964 xferflags = USBD_FORCE_SHORT_XFER | USBD_NO_COPY; 965 if (!(flags & UATH_CMD_FLAG_READ)) { 966 if (!(flags & UATH_CMD_FLAG_ASYNC)) 967 xferflags |= USBD_SYNCHRONOUS; 968 } else 969 s = splusb(); 970 971 cmd->odata = odata; 972 973 usbd_setup_xfer(cmd->xfer, sc->cmd_tx_pipe, cmd, cmd->buf, xferlen, 974 xferflags, UATH_CMD_TIMEOUT, NULL); 975 error = usbd_transfer(cmd->xfer); 976 if (error != USBD_IN_PROGRESS && error != 0) { 977 if (flags & UATH_CMD_FLAG_READ) 978 splx(s); 979 printf("%s: could not send command 0x%x (error=%s)\n", 980 sc->sc_dev.dv_xname, code, usbd_errstr(error)); 981 return error; 982 } 983 sc->cmd_idx = (sc->cmd_idx + 1) % UATH_TX_CMD_LIST_COUNT; 984 985 if (!(flags & UATH_CMD_FLAG_READ)) 986 return 0; /* write: don't wait for reply */ 987 988 /* wait at most two seconds for command reply */ 989 error = tsleep(cmd, PCATCH, "uathcmd", 2 * hz); 990 cmd->odata = NULL; /* in case answer is received too late */ 991 splx(s); 992 if (error != 0) { 993 printf("%s: timeout waiting for command reply\n", 994 sc->sc_dev.dv_xname); 995 } 996 return error; 997 } 998 999 int 1000 uath_cmd_write(struct uath_softc *sc, uint32_t code, const void *data, int len, 1001 int flags) 1002 { 1003 flags &= ~UATH_CMD_FLAG_READ; 1004 return uath_cmd(sc, code, data, len, NULL, flags); 1005 } 1006 1007 int 1008 uath_cmd_read(struct uath_softc *sc, uint32_t code, const void *idata, 1009 int ilen, void *odata, int flags) 1010 { 1011 flags |= UATH_CMD_FLAG_READ; 1012 return uath_cmd(sc, code, idata, ilen, odata, flags); 1013 } 1014 1015 int 1016 uath_write_reg(struct uath_softc *sc, uint32_t reg, uint32_t val) 1017 { 1018 struct uath_write_mac write; 1019 int error; 1020 1021 write.reg = htobe32(reg); 1022 write.len = htobe32(0); /* 0 = single write */ 1023 *(uint32_t *)write.data = htobe32(val); 1024 1025 error = uath_cmd_write(sc, UATH_CMD_WRITE_MAC, &write, 1026 3 * sizeof (uint32_t), 0); 1027 if (error != 0) { 1028 printf("%s: could not write register 0x%02x\n", 1029 sc->sc_dev.dv_xname, reg); 1030 } 1031 return error; 1032 } 1033 1034 int 1035 uath_write_multi(struct uath_softc *sc, uint32_t reg, const void *data, 1036 int len) 1037 { 1038 struct uath_write_mac write; 1039 int error; 1040 1041 write.reg = htobe32(reg); 1042 write.len = htobe32(len); 1043 bcopy(data, write.data, len); 1044 1045 /* properly handle the case where len is zero (reset) */ 1046 error = uath_cmd_write(sc, UATH_CMD_WRITE_MAC, &write, 1047 (len == 0) ? sizeof (uint32_t) : 2 * sizeof (uint32_t) + len, 0); 1048 if (error != 0) { 1049 printf("%s: could not write %d bytes to register 0x%02x\n", 1050 sc->sc_dev.dv_xname, len, reg); 1051 } 1052 return error; 1053 } 1054 1055 int 1056 uath_read_reg(struct uath_softc *sc, uint32_t reg, uint32_t *val) 1057 { 1058 struct uath_read_mac read; 1059 int error; 1060 1061 reg = htobe32(reg); 1062 error = uath_cmd_read(sc, UATH_CMD_READ_MAC, ®, sizeof reg, &read, 1063 0); 1064 if (error != 0) { 1065 printf("%s: could not read register 0x%02x\n", 1066 sc->sc_dev.dv_xname, betoh32(reg)); 1067 return error; 1068 } 1069 *val = betoh32(*(uint32_t *)read.data); 1070 return error; 1071 } 1072 1073 int 1074 uath_read_eeprom(struct uath_softc *sc, uint32_t reg, void *odata) 1075 { 1076 struct uath_read_mac read; 1077 int len, error; 1078 1079 reg = htobe32(reg); 1080 error = uath_cmd_read(sc, UATH_CMD_READ_EEPROM, ®, sizeof reg, 1081 &read, 0); 1082 if (error != 0) { 1083 printf("%s: could not read EEPROM offset 0x%02x\n", 1084 sc->sc_dev.dv_xname, betoh32(reg)); 1085 return error; 1086 } 1087 len = betoh32(read.len); 1088 bcopy(read.data, odata, (len == 0) ? sizeof (uint32_t) : len); 1089 return error; 1090 } 1091 1092 void 1093 uath_cmd_rxeof(struct usbd_xfer *xfer, void *priv, 1094 usbd_status status) 1095 { 1096 struct uath_rx_cmd *cmd = priv; 1097 struct uath_softc *sc = cmd->sc; 1098 struct uath_cmd_hdr *hdr; 1099 1100 if (status != USBD_NORMAL_COMPLETION) { 1101 if (status == USBD_STALLED) 1102 usbd_clear_endpoint_stall_async(sc->cmd_rx_pipe); 1103 return; 1104 } 1105 1106 hdr = (struct uath_cmd_hdr *)cmd->buf; 1107 1108 #ifdef UATH_DEBUG 1109 if (uath_debug >= 5) { 1110 printf("received command code=0x%x index=%u len=%u", 1111 betoh32(hdr->code), hdr->priv, betoh32(hdr->len)); 1112 uath_dump_cmd(cmd->buf, betoh32(hdr->len), '-'); 1113 } 1114 #endif 1115 1116 switch (betoh32(hdr->code) & 0xff) { 1117 /* reply to a read command */ 1118 default: 1119 { 1120 struct uath_tx_cmd *txcmd = &sc->tx_cmd[hdr->priv]; 1121 1122 if (txcmd->odata != NULL) { 1123 /* copy answer into caller's supplied buffer */ 1124 bcopy((uint8_t *)(hdr + 1), txcmd->odata, 1125 betoh32(hdr->len) - sizeof (struct uath_cmd_hdr)); 1126 } 1127 wakeup(txcmd); /* wake up caller */ 1128 break; 1129 } 1130 /* spontaneous firmware notifications */ 1131 case UATH_NOTIF_READY: 1132 DPRINTF(("received device ready notification\n")); 1133 wakeup(UATH_COND_INIT(sc)); 1134 break; 1135 1136 case UATH_NOTIF_TX: 1137 /* this notification is sent when UATH_TX_NOTIFY is set */ 1138 DPRINTF(("received Tx notification\n")); 1139 break; 1140 1141 case UATH_NOTIF_STATS: 1142 DPRINTFN(2, ("received device statistics\n")); 1143 timeout_add_sec(&sc->stat_to, 1); 1144 break; 1145 } 1146 1147 /* setup a new transfer */ 1148 usbd_setup_xfer(xfer, sc->cmd_rx_pipe, cmd, cmd->buf, UATH_MAX_RXCMDSZ, 1149 USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT, 1150 uath_cmd_rxeof); 1151 (void)usbd_transfer(xfer); 1152 } 1153 1154 void 1155 uath_data_rxeof(struct usbd_xfer *xfer, void *priv, 1156 usbd_status status) 1157 { 1158 struct uath_rx_data *data = priv; 1159 struct uath_softc *sc = data->sc; 1160 struct ieee80211com *ic = &sc->sc_ic; 1161 struct ifnet *ifp = &ic->ic_if; 1162 struct ieee80211_frame *wh; 1163 struct ieee80211_rxinfo rxi; 1164 struct ieee80211_node *ni; 1165 struct uath_rx_desc *desc; 1166 struct mbuf *mnew, *m; 1167 uint32_t hdr; 1168 int s, len; 1169 1170 if (status != USBD_NORMAL_COMPLETION) { 1171 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1172 return; 1173 1174 if (status == USBD_STALLED) 1175 usbd_clear_endpoint_stall_async(sc->data_rx_pipe); 1176 1177 ifp->if_ierrors++; 1178 return; 1179 } 1180 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 1181 1182 if (len < UATH_MIN_RXBUFSZ) { 1183 DPRINTF(("wrong xfer size (len=%d)\n", len)); 1184 ifp->if_ierrors++; 1185 goto skip; 1186 } 1187 1188 hdr = betoh32(*(uint32_t *)data->buf); 1189 1190 /* Rx descriptor is located at the end, 32-bit aligned */ 1191 desc = (struct uath_rx_desc *) 1192 (data->buf + len - sizeof (struct uath_rx_desc)); 1193 1194 if (betoh32(desc->len) > sc->rxbufsz) { 1195 DPRINTF(("bad descriptor (len=%d)\n", betoh32(desc->len))); 1196 ifp->if_ierrors++; 1197 goto skip; 1198 } 1199 1200 /* there's probably a "bad CRC" flag somewhere in the descriptor.. */ 1201 1202 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1203 if (mnew == NULL) { 1204 printf("%s: could not allocate rx mbuf\n", 1205 sc->sc_dev.dv_xname); 1206 ifp->if_ierrors++; 1207 goto skip; 1208 } 1209 MCLGET(mnew, M_DONTWAIT); 1210 if (!(mnew->m_flags & M_EXT)) { 1211 printf("%s: could not allocate rx mbuf cluster\n", 1212 sc->sc_dev.dv_xname); 1213 m_freem(mnew); 1214 ifp->if_ierrors++; 1215 goto skip; 1216 } 1217 1218 m = data->m; 1219 data->m = mnew; 1220 1221 /* finalize mbuf */ 1222 m->m_data = data->buf + sizeof (uint32_t); 1223 m->m_pkthdr.len = m->m_len = betoh32(desc->len) - 1224 sizeof (struct uath_rx_desc) - IEEE80211_CRC_LEN; 1225 1226 data->buf = mtod(data->m, uint8_t *); 1227 1228 wh = mtod(m, struct ieee80211_frame *); 1229 rxi.rxi_flags = 0; 1230 if ((wh->i_fc[1] & IEEE80211_FC1_WEP) && 1231 ic->ic_opmode != IEEE80211_M_MONITOR) { 1232 /* 1233 * Hardware decrypts the frame itself but leaves the WEP bit 1234 * set in the 802.11 header and doesn't remove the IV and CRC 1235 * fields. 1236 */ 1237 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 1238 memmove((caddr_t)wh + IEEE80211_WEP_IVLEN + 1239 IEEE80211_WEP_KIDLEN, wh, sizeof (struct ieee80211_frame)); 1240 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 1241 m_adj(m, -IEEE80211_WEP_CRCLEN); 1242 wh = mtod(m, struct ieee80211_frame *); 1243 1244 rxi.rxi_flags |= IEEE80211_RXI_HWDEC; 1245 } 1246 1247 #if NBPFILTER > 0 1248 /* there are a lot more fields in the Rx descriptor */ 1249 if (sc->sc_drvbpf != NULL) { 1250 struct mbuf mb; 1251 struct uath_rx_radiotap_header *tap = &sc->sc_rxtap; 1252 1253 tap->wr_flags = 0; 1254 tap->wr_chan_freq = htole16(betoh32(desc->freq)); 1255 tap->wr_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags); 1256 tap->wr_dbm_antsignal = (int8_t)betoh32(desc->rssi); 1257 1258 mb.m_data = (caddr_t)tap; 1259 mb.m_len = sc->sc_rxtap_len; 1260 mb.m_next = m; 1261 mb.m_nextpkt = NULL; 1262 mb.m_type = 0; 1263 mb.m_flags = 0; 1264 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1265 } 1266 #endif 1267 1268 s = splnet(); 1269 ni = ieee80211_find_rxnode(ic, wh); 1270 rxi.rxi_rssi = (int)betoh32(desc->rssi); 1271 rxi.rxi_tstamp = 0; /* unused */ 1272 ieee80211_input(ifp, m, ni, &rxi); 1273 1274 /* node is no longer needed */ 1275 ieee80211_release_node(ic, ni); 1276 splx(s); 1277 1278 skip: /* setup a new transfer */ 1279 usbd_setup_xfer(xfer, sc->data_rx_pipe, data, data->buf, sc->rxbufsz, 1280 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, uath_data_rxeof); 1281 (void)usbd_transfer(data->xfer); 1282 } 1283 1284 int 1285 uath_tx_null(struct uath_softc *sc) 1286 { 1287 struct uath_tx_data *data; 1288 struct uath_tx_desc *desc; 1289 1290 data = &sc->tx_data[sc->data_idx]; 1291 1292 data->ni = NULL; 1293 1294 *(uint32_t *)data->buf = UATH_MAKECTL(1, sizeof (struct uath_tx_desc)); 1295 desc = (struct uath_tx_desc *)(data->buf + sizeof (uint32_t)); 1296 1297 bzero(desc, sizeof (struct uath_tx_desc)); 1298 desc->len = htobe32(sizeof (struct uath_tx_desc)); 1299 desc->type = htobe32(UATH_TX_NULL); 1300 1301 usbd_setup_xfer(data->xfer, sc->data_tx_pipe, data, data->buf, 1302 sizeof (uint32_t) + sizeof (struct uath_tx_desc), USBD_NO_COPY | 1303 USBD_FORCE_SHORT_XFER | USBD_SYNCHRONOUS, UATH_DATA_TIMEOUT, NULL); 1304 if (usbd_transfer(data->xfer) != 0) 1305 return EIO; 1306 1307 sc->data_idx = (sc->data_idx + 1) % UATH_TX_DATA_LIST_COUNT; 1308 1309 return uath_cmd_write(sc, UATH_CMD_0F, NULL, 0, UATH_CMD_FLAG_ASYNC); 1310 } 1311 1312 void 1313 uath_data_txeof(struct usbd_xfer *xfer, void *priv, 1314 usbd_status status) 1315 { 1316 struct uath_tx_data *data = priv; 1317 struct uath_softc *sc = data->sc; 1318 struct ieee80211com *ic = &sc->sc_ic; 1319 struct ifnet *ifp = &ic->ic_if; 1320 int s; 1321 1322 if (status != USBD_NORMAL_COMPLETION) { 1323 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1324 return; 1325 1326 printf("%s: could not transmit buffer: %s\n", 1327 sc->sc_dev.dv_xname, usbd_errstr(status)); 1328 1329 if (status == USBD_STALLED) 1330 usbd_clear_endpoint_stall_async(sc->data_tx_pipe); 1331 1332 ifp->if_oerrors++; 1333 return; 1334 } 1335 1336 s = splnet(); 1337 1338 ieee80211_release_node(ic, data->ni); 1339 data->ni = NULL; 1340 1341 sc->tx_queued--; 1342 ifp->if_opackets++; 1343 1344 sc->sc_tx_timer = 0; 1345 ifp->if_flags &= ~IFF_OACTIVE; 1346 uath_start(ifp); 1347 1348 splx(s); 1349 } 1350 1351 int 1352 uath_tx_data(struct uath_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1353 { 1354 struct ieee80211com *ic = &sc->sc_ic; 1355 struct uath_tx_data *data; 1356 struct uath_tx_desc *desc; 1357 const struct ieee80211_frame *wh; 1358 int paylen, totlen, xferlen, error; 1359 1360 data = &sc->tx_data[sc->data_idx]; 1361 desc = (struct uath_tx_desc *)(data->buf + sizeof (uint32_t)); 1362 1363 data->ni = ni; 1364 1365 #if NBPFILTER > 0 1366 if (sc->sc_drvbpf != NULL) { 1367 struct mbuf mb; 1368 struct uath_tx_radiotap_header *tap = &sc->sc_txtap; 1369 1370 tap->wt_flags = 0; 1371 tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq); 1372 tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags); 1373 1374 mb.m_data = (caddr_t)tap; 1375 mb.m_len = sc->sc_txtap_len; 1376 mb.m_next = m0; 1377 mb.m_nextpkt = NULL; 1378 mb.m_type = 0; 1379 mb.m_flags = 0; 1380 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1381 } 1382 #endif 1383 1384 paylen = m0->m_pkthdr.len; 1385 xferlen = sizeof (uint32_t) + sizeof (struct uath_tx_desc) + paylen; 1386 1387 wh = mtod(m0, struct ieee80211_frame *); 1388 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1389 uint8_t *frm = (uint8_t *)(desc + 1); 1390 uint32_t iv; 1391 1392 /* h/w WEP: it's up to the host to fill the IV field */ 1393 bcopy(wh, frm, sizeof (struct ieee80211_frame)); 1394 frm += sizeof (struct ieee80211_frame); 1395 1396 /* insert IV: code copied from net80211 */ 1397 iv = (ic->ic_iv != 0) ? ic->ic_iv : arc4random(); 1398 if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00) 1399 iv += 0x000100; 1400 ic->ic_iv = iv + 1; 1401 1402 *frm++ = iv & 0xff; 1403 *frm++ = (iv >> 8) & 0xff; 1404 *frm++ = (iv >> 16) & 0xff; 1405 *frm++ = ic->ic_wep_txkey << 6; 1406 1407 m_copydata(m0, sizeof (struct ieee80211_frame), 1408 m0->m_pkthdr.len - sizeof (struct ieee80211_frame), frm); 1409 1410 paylen += IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN; 1411 xferlen += IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN; 1412 totlen = xferlen + IEEE80211_WEP_CRCLEN; 1413 } else { 1414 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(desc + 1)); 1415 totlen = xferlen; 1416 } 1417 1418 /* fill Tx descriptor */ 1419 *(uint32_t *)data->buf = UATH_MAKECTL(1, xferlen - sizeof (uint32_t)); 1420 1421 desc->len = htobe32(totlen); 1422 desc->priv = sc->data_idx; /* don't care about endianness */ 1423 desc->paylen = htobe32(paylen); 1424 desc->type = htobe32(UATH_TX_DATA); 1425 desc->flags = htobe32(0); 1426 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1427 desc->dest = htobe32(UATH_ID_BROADCAST); 1428 desc->magic = htobe32(3); 1429 } else { 1430 desc->dest = htobe32(UATH_ID_BSS); 1431 desc->magic = htobe32(1); 1432 } 1433 1434 m_freem(m0); /* mbuf is no longer needed */ 1435 1436 #ifdef UATH_DEBUG 1437 if (uath_debug >= 6) { 1438 printf("sending frame index=%u len=%d xferlen=%d", 1439 sc->data_idx, paylen, xferlen); 1440 uath_dump_cmd(data->buf, xferlen, '+'); 1441 } 1442 #endif 1443 usbd_setup_xfer(data->xfer, sc->data_tx_pipe, data, data->buf, xferlen, 1444 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, UATH_DATA_TIMEOUT, 1445 uath_data_txeof); 1446 error = usbd_transfer(data->xfer); 1447 if (error != USBD_IN_PROGRESS && error != 0) { 1448 ic->ic_if.if_oerrors++; 1449 return error; 1450 } 1451 sc->data_idx = (sc->data_idx + 1) % UATH_TX_DATA_LIST_COUNT; 1452 sc->tx_queued++; 1453 1454 return 0; 1455 } 1456 1457 void 1458 uath_start(struct ifnet *ifp) 1459 { 1460 struct uath_softc *sc = ifp->if_softc; 1461 struct ieee80211com *ic = &sc->sc_ic; 1462 struct ieee80211_node *ni; 1463 struct mbuf *m0; 1464 1465 /* 1466 * net80211 may still try to send management frames even if the 1467 * IFF_RUNNING flag is not set... 1468 */ 1469 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1470 return; 1471 1472 for (;;) { 1473 IF_POLL(&ic->ic_mgtq, m0); 1474 if (m0 != NULL) { 1475 if (sc->tx_queued >= UATH_TX_DATA_LIST_COUNT) { 1476 ifp->if_flags |= IFF_OACTIVE; 1477 break; 1478 } 1479 IF_DEQUEUE(&ic->ic_mgtq, m0); 1480 1481 ni = m0->m_pkthdr.ph_cookie; 1482 #if NBPFILTER > 0 1483 if (ic->ic_rawbpf != NULL) 1484 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1485 #endif 1486 if (uath_tx_data(sc, m0, ni) != 0) 1487 break; 1488 } else { 1489 if (ic->ic_state != IEEE80211_S_RUN) 1490 break; 1491 IFQ_POLL(&ifp->if_snd, m0); 1492 if (m0 == NULL) 1493 break; 1494 if (sc->tx_queued >= UATH_TX_DATA_LIST_COUNT) { 1495 ifp->if_flags |= IFF_OACTIVE; 1496 break; 1497 } 1498 IFQ_DEQUEUE(&ifp->if_snd, m0); 1499 #if NBPFILTER > 0 1500 if (ifp->if_bpf != NULL) 1501 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1502 #endif 1503 m0 = ieee80211_encap(ifp, m0, &ni); 1504 if (m0 == NULL) 1505 continue; 1506 #if NBPFILTER > 0 1507 if (ic->ic_rawbpf != NULL) 1508 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1509 #endif 1510 if (uath_tx_data(sc, m0, ni) != 0) { 1511 if (ni != NULL) 1512 ieee80211_release_node(ic, ni); 1513 ifp->if_oerrors++; 1514 break; 1515 } 1516 } 1517 1518 sc->sc_tx_timer = 5; 1519 ifp->if_timer = 1; 1520 } 1521 } 1522 1523 void 1524 uath_watchdog(struct ifnet *ifp) 1525 { 1526 struct uath_softc *sc = ifp->if_softc; 1527 1528 ifp->if_timer = 0; 1529 1530 if (sc->sc_tx_timer > 0) { 1531 if (--sc->sc_tx_timer == 0) { 1532 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1533 /*uath_init(ifp); XXX needs a process context! */ 1534 ifp->if_oerrors++; 1535 return; 1536 } 1537 ifp->if_timer = 1; 1538 } 1539 1540 ieee80211_watchdog(ifp); 1541 } 1542 1543 int 1544 uath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1545 { 1546 struct uath_softc *sc = ifp->if_softc; 1547 struct ieee80211com *ic = &sc->sc_ic; 1548 struct ifaddr *ifa; 1549 struct ifreq *ifr; 1550 int s, error = 0; 1551 1552 s = splnet(); 1553 1554 switch (cmd) { 1555 case SIOCSIFADDR: 1556 ifa = (struct ifaddr *)data; 1557 ifp->if_flags |= IFF_UP; 1558 if (ifa->ifa_addr->sa_family == AF_INET) 1559 arp_ifinit(&ic->ic_ac, ifa); 1560 /* FALLTHROUGH */ 1561 case SIOCSIFFLAGS: 1562 if (ifp->if_flags & IFF_UP) { 1563 if (!(ifp->if_flags & IFF_RUNNING)) 1564 uath_init(ifp); 1565 } else { 1566 if (ifp->if_flags & IFF_RUNNING) 1567 uath_stop(ifp, 1); 1568 } 1569 break; 1570 1571 case SIOCADDMULTI: 1572 case SIOCDELMULTI: 1573 ifr = (struct ifreq *)data; 1574 error = (cmd == SIOCADDMULTI) ? 1575 ether_addmulti(ifr, &ic->ic_ac) : 1576 ether_delmulti(ifr, &ic->ic_ac); 1577 if (error == ENETRESET) 1578 error = 0; 1579 break; 1580 1581 default: 1582 error = ieee80211_ioctl(ifp, cmd, data); 1583 } 1584 1585 if (error == ENETRESET) { 1586 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1587 (IFF_UP | IFF_RUNNING)) 1588 uath_init(ifp); 1589 error = 0; 1590 } 1591 1592 splx(s); 1593 1594 return error; 1595 } 1596 1597 int 1598 uath_query_eeprom(struct uath_softc *sc) 1599 { 1600 uint32_t tmp; 1601 int error; 1602 1603 /* retrieve MAC address */ 1604 error = uath_read_eeprom(sc, UATH_EEPROM_MACADDR, sc->sc_ic.ic_myaddr); 1605 if (error != 0) { 1606 printf("%s: could not read MAC address\n", 1607 sc->sc_dev.dv_xname); 1608 return error; 1609 } 1610 1611 /* retrieve the maximum frame size that the hardware can receive */ 1612 error = uath_read_eeprom(sc, UATH_EEPROM_RXBUFSZ, &tmp); 1613 if (error != 0) { 1614 printf("%s: could not read maximum Rx buffer size\n", 1615 sc->sc_dev.dv_xname); 1616 return error; 1617 } 1618 sc->rxbufsz = betoh32(tmp) & 0xfff; 1619 DPRINTF(("maximum Rx buffer size %d\n", sc->rxbufsz)); 1620 return 0; 1621 } 1622 1623 int 1624 uath_reset(struct uath_softc *sc) 1625 { 1626 struct uath_cmd_setup setup; 1627 uint32_t reg, val; 1628 int s, error; 1629 1630 /* init device with some voodoo incantations.. */ 1631 setup.magic1 = htobe32(1); 1632 setup.magic2 = htobe32(5); 1633 setup.magic3 = htobe32(200); 1634 setup.magic4 = htobe32(27); 1635 s = splusb(); 1636 error = uath_cmd_write(sc, UATH_CMD_SETUP, &setup, sizeof setup, 1637 UATH_CMD_FLAG_ASYNC); 1638 /* ..and wait until firmware notifies us that it is ready */ 1639 if (error == 0) 1640 error = tsleep(UATH_COND_INIT(sc), PCATCH, "uathinit", 5 * hz); 1641 splx(s); 1642 if (error != 0) 1643 return error; 1644 1645 /* read PHY registers */ 1646 for (reg = 0x09; reg <= 0x24; reg++) { 1647 if (reg == 0x0b || reg == 0x0c) 1648 continue; 1649 DELAY(100); 1650 if ((error = uath_read_reg(sc, reg, &val)) != 0) 1651 return error; 1652 DPRINTFN(2, ("reg 0x%02x=0x%08x\n", reg, val)); 1653 } 1654 return error; 1655 } 1656 1657 int 1658 uath_reset_tx_queues(struct uath_softc *sc) 1659 { 1660 int ac, error; 1661 1662 for (ac = 0; ac < 4; ac++) { 1663 const uint32_t qid = htobe32(UATH_AC_TO_QID(ac)); 1664 1665 DPRINTF(("resetting Tx queue %d\n", UATH_AC_TO_QID(ac))); 1666 error = uath_cmd_write(sc, UATH_CMD_RESET_QUEUE, &qid, 1667 sizeof qid, 0); 1668 if (error != 0) 1669 break; 1670 } 1671 return error; 1672 } 1673 1674 int 1675 uath_wme_init(struct uath_softc *sc) 1676 { 1677 struct uath_qinfo qinfo; 1678 int ac, error; 1679 static const struct uath_wme_settings uath_wme_11g[4] = { 1680 { 7, 4, 10, 0, 0 }, /* Background */ 1681 { 3, 4, 10, 0, 0 }, /* Best-Effort */ 1682 { 3, 3, 4, 26, 0 }, /* Video */ 1683 { 2, 2, 3, 47, 0 } /* Voice */ 1684 }; 1685 1686 bzero(&qinfo, sizeof qinfo); 1687 qinfo.size = htobe32(32); 1688 qinfo.magic1 = htobe32(1); /* XXX ack policy? */ 1689 qinfo.magic2 = htobe32(1); 1690 for (ac = 0; ac < 4; ac++) { 1691 qinfo.qid = htobe32(UATH_AC_TO_QID(ac)); 1692 qinfo.ac = htobe32(ac); 1693 qinfo.aifsn = htobe32(uath_wme_11g[ac].aifsn); 1694 qinfo.logcwmin = htobe32(uath_wme_11g[ac].logcwmin); 1695 qinfo.logcwmax = htobe32(uath_wme_11g[ac].logcwmax); 1696 qinfo.txop = htobe32(UATH_TXOP_TO_US( 1697 uath_wme_11g[ac].txop)); 1698 qinfo.acm = htobe32(uath_wme_11g[ac].acm); 1699 1700 DPRINTF(("setting up Tx queue %d\n", UATH_AC_TO_QID(ac))); 1701 error = uath_cmd_write(sc, UATH_CMD_SET_QUEUE, &qinfo, 1702 sizeof qinfo, 0); 1703 if (error != 0) 1704 break; 1705 } 1706 return error; 1707 } 1708 1709 int 1710 uath_set_chan(struct uath_softc *sc, struct ieee80211_channel *c) 1711 { 1712 struct uath_set_chan chan; 1713 1714 bzero(&chan, sizeof chan); 1715 chan.flags = htobe32(0x1400); 1716 chan.freq = htobe32(c->ic_freq); 1717 chan.magic1 = htobe32(20); 1718 chan.magic2 = htobe32(50); 1719 chan.magic3 = htobe32(1); 1720 1721 DPRINTF(("switching to channel %d\n", 1722 ieee80211_chan2ieee(&sc->sc_ic, c))); 1723 return uath_cmd_write(sc, UATH_CMD_SET_CHAN, &chan, sizeof chan, 0); 1724 } 1725 1726 int 1727 uath_set_key(struct uath_softc *sc, const struct ieee80211_key *k, int index) 1728 { 1729 struct uath_cmd_crypto crypto; 1730 int i; 1731 1732 bzero(&crypto, sizeof crypto); 1733 crypto.keyidx = htobe32(index); 1734 crypto.magic1 = htobe32(1); 1735 crypto.size = htobe32(368); 1736 crypto.mask = htobe32(0xffff); 1737 crypto.flags = htobe32(0x80000068); 1738 if (index != UATH_DEFAULT_KEY) 1739 crypto.flags |= htobe32(index << 16); 1740 memset(crypto.magic2, 0xff, sizeof crypto.magic2); 1741 1742 /* 1743 * Each byte of the key must be XOR'ed with 10101010 before being 1744 * transmitted to the firmware. 1745 */ 1746 for (i = 0; i < k->k_len; i++) 1747 crypto.key[i] = k->k_key[i] ^ 0xaa; 1748 1749 DPRINTF(("setting crypto key index=%d len=%d\n", index, k->k_len)); 1750 return uath_cmd_write(sc, UATH_CMD_CRYPTO, &crypto, sizeof crypto, 0); 1751 } 1752 1753 int 1754 uath_set_keys(struct uath_softc *sc) 1755 { 1756 const struct ieee80211com *ic = &sc->sc_ic; 1757 int i, error; 1758 1759 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1760 const struct ieee80211_key *k = &ic->ic_nw_keys[i]; 1761 1762 if (k->k_len > 0 && (error = uath_set_key(sc, k, i)) != 0) 1763 return error; 1764 } 1765 return uath_set_key(sc, &ic->ic_nw_keys[ic->ic_wep_txkey], 1766 UATH_DEFAULT_KEY); 1767 } 1768 1769 int 1770 uath_set_rates(struct uath_softc *sc, const struct ieee80211_rateset *rs) 1771 { 1772 struct uath_cmd_rates rates; 1773 1774 bzero(&rates, sizeof rates); 1775 rates.magic1 = htobe32(0x02); 1776 rates.size = htobe32(1 + sizeof rates.rates); 1777 rates.nrates = rs->rs_nrates; 1778 bcopy(rs->rs_rates, rates.rates, rs->rs_nrates); 1779 1780 DPRINTF(("setting supported rates nrates=%d\n", rs->rs_nrates)); 1781 return uath_cmd_write(sc, UATH_CMD_SET_RATES, &rates, sizeof rates, 0); 1782 } 1783 1784 int 1785 uath_set_rxfilter(struct uath_softc *sc, uint32_t filter, uint32_t flags) 1786 { 1787 struct uath_cmd_filter rxfilter; 1788 1789 rxfilter.filter = htobe32(filter); 1790 rxfilter.flags = htobe32(flags); 1791 1792 DPRINTF(("setting Rx filter=0x%x flags=0x%x\n", filter, flags)); 1793 return uath_cmd_write(sc, UATH_CMD_SET_FILTER, &rxfilter, 1794 sizeof rxfilter, 0); 1795 } 1796 1797 int 1798 uath_set_led(struct uath_softc *sc, int which, int on) 1799 { 1800 struct uath_cmd_led led; 1801 1802 led.which = htobe32(which); 1803 led.state = htobe32(on ? UATH_LED_ON : UATH_LED_OFF); 1804 1805 DPRINTFN(2, ("switching %s led %s\n", 1806 (which == UATH_LED_LINK) ? "link" : "activity", 1807 on ? "on" : "off")); 1808 return uath_cmd_write(sc, UATH_CMD_SET_LED, &led, sizeof led, 0); 1809 } 1810 1811 int 1812 uath_switch_channel(struct uath_softc *sc, struct ieee80211_channel *c) 1813 { 1814 uint32_t val; 1815 int error; 1816 1817 /* set radio frequency */ 1818 if ((error = uath_set_chan(sc, c)) != 0) { 1819 printf("%s: could not set channel\n", sc->sc_dev.dv_xname); 1820 return error; 1821 } 1822 1823 /* reset Tx rings */ 1824 if ((error = uath_reset_tx_queues(sc)) != 0) { 1825 printf("%s: could not reset Tx queues\n", 1826 sc->sc_dev.dv_xname); 1827 return error; 1828 } 1829 1830 /* set Tx rings WME properties */ 1831 if ((error = uath_wme_init(sc)) != 0) { 1832 printf("%s: could not init Tx queues\n", 1833 sc->sc_dev.dv_xname); 1834 return error; 1835 } 1836 1837 val = htobe32(0); 1838 error = uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 0); 1839 if (error != 0) { 1840 printf("%s: could not set state\n", sc->sc_dev.dv_xname); 1841 return error; 1842 } 1843 1844 return uath_tx_null(sc); 1845 } 1846 1847 int 1848 uath_init(struct ifnet *ifp) 1849 { 1850 struct uath_softc *sc = ifp->if_softc; 1851 struct ieee80211com *ic = &sc->sc_ic; 1852 struct uath_cmd_31 cmd31; 1853 uint32_t val; 1854 int i, error; 1855 1856 /* reset data and command rings */ 1857 sc->tx_queued = sc->data_idx = sc->cmd_idx = 0; 1858 1859 val = htobe32(0); 1860 (void)uath_cmd_write(sc, UATH_CMD_02, &val, sizeof val, 0); 1861 1862 /* set MAC address */ 1863 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 1864 (void)uath_write_multi(sc, 0x13, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1865 1866 (void)uath_write_reg(sc, 0x02, 0x00000001); 1867 (void)uath_write_reg(sc, 0x0e, 0x0000003f); 1868 (void)uath_write_reg(sc, 0x10, 0x00000001); 1869 (void)uath_write_reg(sc, 0x06, 0x0000001e); 1870 1871 /* 1872 * Queue Rx data xfers. 1873 */ 1874 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) { 1875 struct uath_rx_data *data = &sc->rx_data[i]; 1876 1877 usbd_setup_xfer(data->xfer, sc->data_rx_pipe, data, data->buf, 1878 sc->rxbufsz, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, 1879 uath_data_rxeof); 1880 error = usbd_transfer(data->xfer); 1881 if (error != USBD_IN_PROGRESS && error != 0) { 1882 printf("%s: could not queue Rx transfer\n", 1883 sc->sc_dev.dv_xname); 1884 goto fail; 1885 } 1886 } 1887 1888 error = uath_cmd_read(sc, UATH_CMD_07, NULL, 0, &val, 1889 UATH_CMD_FLAG_MAGIC); 1890 if (error != 0) { 1891 printf("%s: could not send read command 07h\n", 1892 sc->sc_dev.dv_xname); 1893 goto fail; 1894 } 1895 DPRINTF(("command 07h return code: %x\n", betoh32(val))); 1896 1897 /* set default channel */ 1898 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 1899 if ((error = uath_set_chan(sc, ic->ic_bss->ni_chan)) != 0) { 1900 printf("%s: could not set channel\n", sc->sc_dev.dv_xname); 1901 goto fail; 1902 } 1903 1904 if ((error = uath_wme_init(sc)) != 0) { 1905 printf("%s: could not setup WME parameters\n", 1906 sc->sc_dev.dv_xname); 1907 goto fail; 1908 } 1909 1910 /* init MAC registers */ 1911 (void)uath_write_reg(sc, 0x19, 0x00000000); 1912 (void)uath_write_reg(sc, 0x1a, 0x0000003c); 1913 (void)uath_write_reg(sc, 0x1b, 0x0000003c); 1914 (void)uath_write_reg(sc, 0x1c, 0x00000000); 1915 (void)uath_write_reg(sc, 0x1e, 0x00000000); 1916 (void)uath_write_reg(sc, 0x1f, 0x00000003); 1917 (void)uath_write_reg(sc, 0x0c, 0x00000000); 1918 (void)uath_write_reg(sc, 0x0f, 0x00000002); 1919 (void)uath_write_reg(sc, 0x0a, 0x00000007); /* XXX retry? */ 1920 (void)uath_write_reg(sc, 0x09, ic->ic_rtsthreshold); 1921 1922 val = htobe32(4); 1923 (void)uath_cmd_write(sc, UATH_CMD_27, &val, sizeof val, 0); 1924 (void)uath_cmd_write(sc, UATH_CMD_27, &val, sizeof val, 0); 1925 (void)uath_cmd_write(sc, UATH_CMD_1B, NULL, 0, 0); 1926 1927 if ((error = uath_set_keys(sc)) != 0) { 1928 printf("%s: could not set crypto keys\n", 1929 sc->sc_dev.dv_xname); 1930 goto fail; 1931 } 1932 1933 /* enable Rx */ 1934 (void)uath_set_rxfilter(sc, 0x0000, 4); 1935 (void)uath_set_rxfilter(sc, 0x0817, 1); 1936 1937 cmd31.magic1 = htobe32(0xffffffff); 1938 cmd31.magic2 = htobe32(0xffffffff); 1939 (void)uath_cmd_write(sc, UATH_CMD_31, &cmd31, sizeof cmd31, 0); 1940 1941 ifp->if_flags &= ~IFF_OACTIVE; 1942 ifp->if_flags |= IFF_RUNNING; 1943 1944 if (ic->ic_opmode == IEEE80211_M_MONITOR) 1945 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 1946 else 1947 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 1948 1949 return 0; 1950 1951 fail: uath_stop(ifp, 1); 1952 return error; 1953 } 1954 1955 void 1956 uath_stop(struct ifnet *ifp, int disable) 1957 { 1958 struct uath_softc *sc = ifp->if_softc; 1959 struct ieee80211com *ic = &sc->sc_ic; 1960 uint32_t val; 1961 int s; 1962 1963 s = splusb(); 1964 1965 sc->sc_tx_timer = 0; 1966 ifp->if_timer = 0; 1967 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1968 1969 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 1970 1971 val = htobe32(0); 1972 (void)uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 0); 1973 (void)uath_cmd_write(sc, UATH_CMD_RESET, NULL, 0, 0); 1974 1975 val = htobe32(0); 1976 (void)uath_cmd_write(sc, UATH_CMD_15, &val, sizeof val, 0); 1977 1978 #if 0 1979 (void)uath_cmd_read(sc, UATH_CMD_SHUTDOWN, NULL, 0, NULL, 1980 UATH_CMD_FLAG_MAGIC); 1981 #endif 1982 1983 /* abort any pending transfers */ 1984 usbd_abort_pipe(sc->data_tx_pipe); 1985 usbd_abort_pipe(sc->data_rx_pipe); 1986 usbd_abort_pipe(sc->cmd_tx_pipe); 1987 1988 splx(s); 1989 } 1990 1991 /* 1992 * Load the MIPS R4000 microcode into the device. Once the image is loaded, 1993 * the device will detach itself from the bus and reattach later with a new 1994 * product Id (a la ezusb). XXX this could also be implemented in userland 1995 * through /dev/ugen. 1996 */ 1997 int 1998 uath_loadfirmware(struct uath_softc *sc, const u_char *fw, int len) 1999 { 2000 struct usbd_xfer *ctlxfer, *txxfer, *rxxfer; 2001 struct uath_fwblock *txblock, *rxblock; 2002 uint8_t *txdata; 2003 int error = 0; 2004 2005 if ((ctlxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) { 2006 printf("%s: could not allocate Tx control xfer\n", 2007 sc->sc_dev.dv_xname); 2008 error = USBD_NOMEM; 2009 goto fail1; 2010 } 2011 txblock = usbd_alloc_buffer(ctlxfer, sizeof (struct uath_fwblock)); 2012 if (txblock == NULL) { 2013 printf("%s: could not allocate Tx control block\n", 2014 sc->sc_dev.dv_xname); 2015 error = USBD_NOMEM; 2016 goto fail2; 2017 } 2018 2019 if ((txxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) { 2020 printf("%s: could not allocate Tx xfer\n", 2021 sc->sc_dev.dv_xname); 2022 error = USBD_NOMEM; 2023 goto fail2; 2024 } 2025 txdata = usbd_alloc_buffer(txxfer, UATH_MAX_FWBLOCK_SIZE); 2026 if (txdata == NULL) { 2027 printf("%s: could not allocate Tx buffer\n", 2028 sc->sc_dev.dv_xname); 2029 error = USBD_NOMEM; 2030 goto fail3; 2031 } 2032 2033 if ((rxxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) { 2034 printf("%s: could not allocate Rx control xfer\n", 2035 sc->sc_dev.dv_xname); 2036 error = USBD_NOMEM; 2037 goto fail3; 2038 } 2039 rxblock = usbd_alloc_buffer(rxxfer, sizeof (struct uath_fwblock)); 2040 if (rxblock == NULL) { 2041 printf("%s: could not allocate Rx control block\n", 2042 sc->sc_dev.dv_xname); 2043 error = USBD_NOMEM; 2044 goto fail4; 2045 } 2046 2047 bzero(txblock, sizeof (struct uath_fwblock)); 2048 txblock->flags = htobe32(UATH_WRITE_BLOCK); 2049 txblock->total = htobe32(len); 2050 2051 while (len > 0) { 2052 int mlen = min(len, UATH_MAX_FWBLOCK_SIZE); 2053 2054 txblock->remain = htobe32(len - mlen); 2055 txblock->len = htobe32(mlen); 2056 2057 DPRINTF(("sending firmware block: %d bytes remaining\n", 2058 len - mlen)); 2059 2060 /* send firmware block meta-data */ 2061 usbd_setup_xfer(ctlxfer, sc->cmd_tx_pipe, sc, txblock, 2062 sizeof (struct uath_fwblock), 2063 USBD_NO_COPY | USBD_SYNCHRONOUS, 2064 UATH_CMD_TIMEOUT, NULL); 2065 if ((error = usbd_transfer(ctlxfer)) != 0) { 2066 printf("%s: could not send firmware block info\n", 2067 sc->sc_dev.dv_xname); 2068 break; 2069 } 2070 2071 /* send firmware block data */ 2072 bcopy(fw, txdata, mlen); 2073 usbd_setup_xfer(txxfer, sc->data_tx_pipe, sc, txdata, mlen, 2074 USBD_NO_COPY | USBD_SYNCHRONOUS, UATH_DATA_TIMEOUT, NULL); 2075 if ((error = usbd_transfer(txxfer)) != 0) { 2076 printf("%s: could not send firmware block data\n", 2077 sc->sc_dev.dv_xname); 2078 break; 2079 } 2080 2081 /* wait for ack from firmware */ 2082 usbd_setup_xfer(rxxfer, sc->cmd_rx_pipe, sc, rxblock, 2083 sizeof (struct uath_fwblock), USBD_SHORT_XFER_OK | 2084 USBD_NO_COPY | USBD_SYNCHRONOUS, UATH_CMD_TIMEOUT, NULL); 2085 if ((error = usbd_transfer(rxxfer)) != 0) { 2086 printf("%s: could not read firmware answer\n", 2087 sc->sc_dev.dv_xname); 2088 break; 2089 } 2090 2091 DPRINTFN(2, ("rxblock flags=0x%x total=%d\n", 2092 betoh32(rxblock->flags), betoh32(rxblock->rxtotal))); 2093 fw += mlen; 2094 len -= mlen; 2095 } 2096 2097 fail4: usbd_free_xfer(rxxfer); 2098 fail3: usbd_free_xfer(txxfer); 2099 fail2: usbd_free_xfer(ctlxfer); 2100 fail1: return error; 2101 } 2102