1 /* $OpenBSD: if_mue.c,v 1.11 2021/07/25 06:43:04 mglocker Exp $ */ 2 3 /* 4 * Copyright (c) 2018 Kevin Lo <kevlo@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* Driver for Microchip LAN7500/LAN7800 chipsets. */ 20 21 #include "bpfilter.h" 22 23 #include <sys/param.h> 24 #include <sys/systm.h> 25 #include <sys/sockio.h> 26 #include <sys/rwlock.h> 27 #include <sys/mbuf.h> 28 #include <sys/kernel.h> 29 #include <sys/socket.h> 30 31 #include <sys/device.h> 32 33 #include <machine/bus.h> 34 35 #include <net/if.h> 36 #include <net/if_dl.h> 37 #include <net/if_media.h> 38 39 #if NBPFILTER > 0 40 #include <net/bpf.h> 41 #endif 42 43 #include <netinet/in.h> 44 #include <netinet/if_ether.h> 45 46 #include <dev/mii/miivar.h> 47 48 #include <dev/usb/usb.h> 49 #include <dev/usb/usbdi.h> 50 #include <dev/usb/usbdi_util.h> 51 #include <dev/usb/usbdivar.h> 52 #include <dev/usb/usbdevs.h> 53 54 #include <dev/usb/if_muereg.h> 55 56 #ifdef MUE_DEBUG 57 #define DPRINTF(x) do { if (muedebug) printf x; } while (0) 58 #define DPRINTFN(n,x) do { if (muedebug >= (n)) printf x; } while (0) 59 int muedebug = 0; 60 #else 61 #define DPRINTF(x) 62 #define DPRINTFN(n,x) 63 #endif 64 65 /* 66 * Various supported device vendors/products. 67 */ 68 struct mue_type { 69 struct usb_devno mue_dev; 70 uint16_t mue_flags; 71 #define LAN7500 0x0001 /* LAN7500 */ 72 }; 73 74 const struct mue_type mue_devs[] = { 75 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7500 }, LAN7500 }, 76 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7505 }, LAN7500 }, 77 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7800 }, 0 }, 78 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7801 }, 0 }, 79 { { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7850 }, 0 } 80 }; 81 82 #define mue_lookup(v, p) ((struct mue_type *)usb_lookup(mue_devs, v, p)) 83 84 int mue_match(struct device *, void *, void *); 85 void mue_attach(struct device *, struct device *, void *); 86 int mue_detach(struct device *, int); 87 88 struct cfdriver mue_cd = { 89 NULL, "mue", DV_IFNET 90 }; 91 92 const struct cfattach mue_ca = { 93 sizeof(struct mue_softc), mue_match, mue_attach, mue_detach 94 }; 95 96 uint32_t mue_csr_read(struct mue_softc *, uint32_t); 97 int mue_csr_write(struct mue_softc *, uint32_t, uint32_t); 98 99 void mue_lock_mii(struct mue_softc *); 100 void mue_unlock_mii(struct mue_softc *); 101 102 int mue_mii_wait(struct mue_softc *); 103 int mue_miibus_readreg(struct device *, int, int); 104 void mue_miibus_writereg(struct device *, int, int, int); 105 void mue_miibus_statchg(struct device *); 106 int mue_ifmedia_upd(struct ifnet *); 107 void mue_ifmedia_sts(struct ifnet *, struct ifmediareq *); 108 109 int mue_eeprom_wait(struct mue_softc *); 110 uint8_t mue_eeprom_getbyte(struct mue_softc *, int, uint8_t *); 111 int mue_read_eeprom(struct mue_softc *, caddr_t, int, int); 112 int mue_dataport_wait(struct mue_softc *); 113 void mue_dataport_write(struct mue_softc *, uint32_t, uint32_t, 114 uint32_t, uint32_t *); 115 void mue_init_ltm(struct mue_softc *); 116 int mue_chip_init(struct mue_softc *); 117 void mue_set_macaddr(struct mue_softc *); 118 119 int mue_rx_list_init(struct mue_softc *); 120 int mue_tx_list_init(struct mue_softc *); 121 int mue_open_pipes(struct mue_softc *); 122 int mue_encap(struct mue_softc *, struct mbuf *, int); 123 void mue_iff(struct mue_softc *); 124 void mue_rxeof(struct usbd_xfer *, void *, usbd_status); 125 void mue_txeof(struct usbd_xfer *, void *, usbd_status); 126 127 void mue_init(void *); 128 int mue_ioctl(struct ifnet *, u_long, caddr_t); 129 void mue_watchdog(struct ifnet *); 130 void mue_reset(struct mue_softc *); 131 void mue_start(struct ifnet *); 132 void mue_stop(struct mue_softc *); 133 void mue_tick(void *); 134 void mue_tick_task(void *); 135 136 #define MUE_SETBIT(sc, reg, x) \ 137 mue_csr_write(sc, reg, mue_csr_read(sc, reg) | (x)) 138 139 #define MUE_CLRBIT(sc, reg, x) \ 140 mue_csr_write(sc, reg, mue_csr_read(sc, reg) & ~(x)) 141 142 #if defined(__arm__) || defined(__arm64__) 143 144 #include <dev/ofw/openfirm.h> 145 146 void 147 mue_enaddr_OF(struct mue_softc *sc) 148 { 149 char *device = "/axi/usb/hub/ethernet"; 150 char prop[64]; 151 int node; 152 153 if (sc->mue_dev.dv_unit != 0) 154 return; 155 156 /* Get the Raspberry Pi MAC address from FDT. */ 157 if ((node = OF_finddevice("/aliases")) == -1) 158 return; 159 if (OF_getprop(node, "ethernet0", prop, sizeof(prop)) > 0 || 160 OF_getprop(node, "ethernet", prop, sizeof(prop)) > 0) 161 device = prop; 162 163 if ((node = OF_finddevice(device)) == -1) 164 return; 165 if (OF_getprop(node, "local-mac-address", sc->arpcom.ac_enaddr, 166 sizeof(sc->arpcom.ac_enaddr)) != sizeof(sc->arpcom.ac_enaddr)) { 167 OF_getprop(node, "mac-address", sc->arpcom.ac_enaddr, 168 sizeof(sc->arpcom.ac_enaddr)); 169 } 170 } 171 #else 172 #define mue_enaddr_OF(x) do {} while(0) 173 #endif 174 175 uint32_t 176 mue_csr_read(struct mue_softc *sc, uint32_t reg) 177 { 178 usb_device_request_t req; 179 usbd_status err; 180 uDWord val; 181 182 if (usbd_is_dying(sc->mue_udev)) 183 return (0); 184 185 USETDW(val, 0); 186 req.bmRequestType = UT_READ_VENDOR_DEVICE; 187 req.bRequest = MUE_UR_READREG; 188 USETW(req.wValue, 0); 189 USETW(req.wIndex, reg); 190 USETW(req.wLength, 4); 191 192 err = usbd_do_request(sc->mue_udev, &req, &val); 193 if (err) { 194 DPRINTF(("%s: mue_csr_read: reg=0x%x err=%s\n", 195 sc->mue_dev.dv_xname, reg, usbd_errstr(err))); 196 return (0); 197 } 198 199 return (UGETDW(val)); 200 } 201 202 int 203 mue_csr_write(struct mue_softc *sc, uint32_t reg, uint32_t aval) 204 { 205 usb_device_request_t req; 206 usbd_status err; 207 uDWord val; 208 209 if (usbd_is_dying(sc->mue_udev)) 210 return (0); 211 212 USETDW(val, aval); 213 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 214 req.bRequest = MUE_UR_WRITEREG; 215 USETW(req.wValue, 0); 216 USETW(req.wIndex, reg); 217 USETW(req.wLength, 4); 218 219 err = usbd_do_request(sc->mue_udev, &req, &val); 220 if (err) { 221 DPRINTF(("%s: mue_csr_write: reg=0x%x err=%s\n", 222 sc->mue_dev.dv_xname, reg, usbd_errstr(err))); 223 return (-1); 224 } 225 226 return (0); 227 } 228 229 /* 230 * Get exclusive access to the MII registers. 231 */ 232 void 233 mue_lock_mii(struct mue_softc *sc) 234 { 235 sc->mue_refcnt++; 236 rw_enter_write(&sc->mue_mii_lock); 237 } 238 239 void 240 mue_unlock_mii(struct mue_softc *sc) 241 { 242 rw_exit_write(&sc->mue_mii_lock); 243 if (--sc->mue_refcnt < 0) 244 usb_detach_wakeup(&sc->mue_dev); 245 } 246 247 /* 248 * Wait for the MII to become ready. 249 */ 250 int 251 mue_mii_wait(struct mue_softc *sc) 252 { 253 int ntries; 254 255 for (ntries = 0; ntries < 100; ntries++) { 256 if (!(mue_csr_read(sc, MUE_MII_ACCESS) & MUE_MII_ACCESS_BUSY)) 257 return (0); 258 DELAY(5); 259 } 260 261 printf("%s: MII timed out\n", sc->mue_dev.dv_xname); 262 return (1); 263 } 264 265 int 266 mue_miibus_readreg(struct device *dev, int phy, int reg) 267 { 268 struct mue_softc *sc = (void *)dev; 269 uint32_t val; 270 271 if (usbd_is_dying(sc->mue_udev)) 272 return (0); 273 274 if (sc->mue_phyno != phy) 275 return (0); 276 277 mue_lock_mii(sc); 278 if (mue_mii_wait(sc) != 0) 279 return (0); 280 281 mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_READ | 282 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) | 283 MUE_MII_ACCESS_PHYADDR(phy)); 284 285 if (mue_mii_wait(sc) != 0) 286 printf("%s: MII read timed out\n", sc->mue_dev.dv_xname); 287 288 val = mue_csr_read(sc, MUE_MII_DATA); 289 mue_unlock_mii(sc); 290 return (val & 0xffff); 291 } 292 293 void 294 mue_miibus_writereg(struct device *dev, int phy, int reg, int data) 295 { 296 struct mue_softc *sc = (void *)dev; 297 298 if (usbd_is_dying(sc->mue_udev)) 299 return; 300 301 if (sc->mue_phyno != phy) 302 return; 303 304 mue_lock_mii(sc); 305 if (mue_mii_wait(sc) != 0) 306 return; 307 308 mue_csr_write(sc, MUE_MII_DATA, data); 309 mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE | 310 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) | 311 MUE_MII_ACCESS_PHYADDR(phy)); 312 313 if (mue_mii_wait(sc) != 0) 314 printf("%s: MII write timed out\n", sc->mue_dev.dv_xname); 315 316 mue_unlock_mii(sc); 317 } 318 319 void 320 mue_miibus_statchg(struct device *dev) 321 { 322 struct mue_softc *sc = (void *)dev; 323 struct mii_data *mii = GET_MII(sc); 324 struct ifnet *ifp = GET_IFP(sc); 325 uint32_t flow, threshold; 326 327 if (mii == NULL || ifp == NULL || 328 (ifp->if_flags & IFF_RUNNING) == 0) 329 return; 330 331 sc->mue_link = 0; 332 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 333 (IFM_ACTIVE | IFM_AVALID)) { 334 switch (IFM_SUBTYPE(mii->mii_media_active)) { 335 case IFM_10_T: 336 case IFM_100_TX: 337 case IFM_1000_T: 338 sc->mue_link++; 339 break; 340 default: 341 break; 342 } 343 } 344 345 /* Lost link, do nothing. */ 346 if (sc->mue_link == 0) 347 return; 348 349 if (!(sc->mue_flags & LAN7500)) { 350 if (sc->mue_udev->speed == USB_SPEED_SUPER) { 351 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { 352 /* Disable U2 and enable U1. */ 353 MUE_CLRBIT(sc, MUE_USB_CFG1, 354 MUE_USB_CFG1_DEV_U2_INIT_EN); 355 MUE_SETBIT(sc, MUE_USB_CFG1, 356 MUE_USB_CFG1_DEV_U1_INIT_EN); 357 } else { 358 /* Enable U1 and U2. */ 359 MUE_SETBIT(sc, MUE_USB_CFG1, 360 MUE_USB_CFG1_DEV_U1_INIT_EN | 361 MUE_USB_CFG1_DEV_U2_INIT_EN); 362 } 363 } 364 } 365 366 threshold = 0; 367 flow = 0; 368 if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) { 369 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) { 370 flow |= MUE_FLOW_TX_FCEN | MUE_FLOW_PAUSE_TIME; 371 372 /* XXX magic numbers come from Linux driver. */ 373 if (sc->mue_flags & LAN7500) { 374 threshold = 0x820; 375 } else { 376 threshold = 377 (sc->mue_udev->speed == USB_SPEED_SUPER) ? 378 0x817 : 0x211; 379 } 380 } 381 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) 382 flow |= MUE_FLOW_RX_FCEN; 383 } 384 mue_csr_write(sc, (sc->mue_flags & LAN7500) ? 385 MUE_FCT_FLOW : MUE_7800_FCT_FLOW, threshold); 386 387 /* Threshold value should be set before enabling flow. */ 388 mue_csr_write(sc, MUE_FLOW, flow); 389 } 390 391 /* 392 * Set media options. 393 */ 394 int 395 mue_ifmedia_upd(struct ifnet *ifp) 396 { 397 struct mue_softc *sc = ifp->if_softc; 398 struct mii_data *mii = GET_MII(sc); 399 400 if (mii->mii_instance) { 401 struct mii_softc *miisc; 402 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 403 mii_phy_reset(miisc); 404 } 405 return (mii_mediachg(mii)); 406 } 407 408 /* 409 * Report current media status. 410 */ 411 void 412 mue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 413 { 414 struct mue_softc *sc = ifp->if_softc; 415 struct mii_data *mii = GET_MII(sc); 416 417 mii_pollstat(mii); 418 ifmr->ifm_active = mii->mii_media_active; 419 ifmr->ifm_status = mii->mii_media_status; 420 } 421 422 int 423 mue_eeprom_wait(struct mue_softc *sc) 424 { 425 uint32_t val; 426 int ntries; 427 428 for (ntries = 0; ntries < 100; ntries++) { 429 val = mue_csr_read(sc, MUE_E2P_CMD); 430 if (!(val & MUE_E2P_CMD_BUSY) || (val & MUE_E2P_CMD_TIMEOUT)) 431 return (0); 432 DELAY(5); 433 } 434 435 return (1); 436 } 437 438 uint8_t 439 mue_eeprom_getbyte(struct mue_softc *sc, int addr, uint8_t *dest) 440 { 441 uint32_t byte = 0; 442 int ntries; 443 444 for (ntries = 0; ntries < 100; ntries++) { 445 if (!(mue_csr_read(sc, MUE_E2P_CMD) & MUE_E2P_CMD_BUSY)) 446 break; 447 DELAY(5); 448 } 449 450 if (ntries == 100) { 451 printf("%s: EEPROM failed to come ready\n", 452 sc->mue_dev.dv_xname); 453 return (ETIMEDOUT); 454 } 455 456 mue_csr_write(sc, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY | 457 (addr & MUE_E2P_CMD_ADDR_MASK)); 458 459 if (mue_eeprom_wait(sc) != 0) { 460 printf("%s: EEPROM read timed out\n", sc->mue_dev.dv_xname); 461 return (ETIMEDOUT); 462 } 463 464 byte = mue_csr_read(sc, MUE_E2P_DATA); 465 *dest = byte & 0xff; 466 467 return (0); 468 } 469 470 int 471 mue_read_eeprom(struct mue_softc *sc, caddr_t dest, int off, int cnt) 472 { 473 uint32_t val; 474 uint8_t byte = 0; 475 int i, err = 0; 476 477 /* 478 * EEPROM pins are muxed with the LED function on LAN7800 device. 479 */ 480 val = mue_csr_read(sc, MUE_HW_CFG); 481 if (sc->mue_product == USB_PRODUCT_SMC2_LAN7800) { 482 MUE_CLRBIT(sc, MUE_HW_CFG, 483 MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN); 484 } 485 486 for (i = 0; i < cnt; i++) { 487 err = mue_eeprom_getbyte(sc, off + i, &byte); 488 if (err) 489 break; 490 *(dest + i) = byte; 491 } 492 493 if (sc->mue_product == USB_PRODUCT_SMC2_LAN7800) 494 mue_csr_write(sc, MUE_HW_CFG, val); 495 496 return (err ? 1 : 0); 497 } 498 499 int 500 mue_dataport_wait(struct mue_softc *sc) 501 { 502 int ntries; 503 504 for (ntries = 0; ntries < 100; ntries++) { 505 if (mue_csr_read(sc, MUE_DP_SEL) & MUE_DP_SEL_DPRDY) 506 return (0); 507 DELAY(5); 508 } 509 510 printf("%s: dataport timed out\n", sc->mue_dev.dv_xname); 511 return (1); 512 } 513 514 void 515 mue_dataport_write(struct mue_softc *sc, uint32_t sel, uint32_t addr, 516 uint32_t cnt, uint32_t *data) 517 { 518 int i; 519 520 if (mue_dataport_wait(sc) != 0) 521 return; 522 523 mue_csr_write(sc, MUE_DP_SEL, 524 (mue_csr_read(sc, MUE_DP_SEL) & ~MUE_DP_SEL_RSEL_MASK) | sel); 525 526 for (i = 0; i < cnt; i++) { 527 mue_csr_write(sc, MUE_DP_ADDR, addr + i); 528 mue_csr_write(sc, MUE_DP_DATA, data[i]); 529 mue_csr_write(sc, MUE_DP_CMD, MUE_DP_CMD_WRITE); 530 if (mue_dataport_wait(sc) != 0) 531 return; 532 } 533 } 534 535 void 536 mue_init_ltm(struct mue_softc *sc) 537 { 538 uint8_t idx[6] = { 0 }; 539 int i; 540 541 if (mue_csr_read(sc, MUE_USB_CFG1) & MUE_USB_CFG1_LTM_ENABLE) { 542 uint8_t temp[2]; 543 544 if (mue_read_eeprom(sc, (caddr_t)&temp, MUE_EE_LTM_OFFSET, 2)) { 545 if (temp[0] != 24) 546 goto done; 547 mue_read_eeprom(sc, (caddr_t)&idx, temp[1] << 1, 24); 548 } 549 } 550 done: 551 for (i = 0; i < sizeof(idx); i++) 552 mue_csr_write(sc, MUE_LTM_INDEX(i), idx[i]); 553 } 554 555 int 556 mue_chip_init(struct mue_softc *sc) 557 { 558 uint32_t val; 559 int ntries; 560 561 if (sc->mue_flags & LAN7500) { 562 for (ntries = 0; ntries < 100; ntries++) { 563 if (mue_csr_read(sc, MUE_PMT_CTL) & MUE_PMT_CTL_READY) 564 break; 565 DELAY(1000); /* 1 msec */ 566 } 567 if (ntries == 100) { 568 printf("%s: timeout waiting for device ready\n", 569 sc->mue_dev.dv_xname); 570 return (ETIMEDOUT); 571 } 572 } 573 574 MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_LRST); 575 576 for (ntries = 0; ntries < 1000; ntries++) { 577 if (!(mue_csr_read(sc, MUE_HW_CFG) & MUE_HW_CFG_LRST)) 578 break; 579 DELAY(5); 580 } 581 if (ntries == 1000) { 582 printf("%s: timeout on lite software reset\n", 583 sc->mue_dev.dv_xname); 584 return (ETIMEDOUT); 585 } 586 587 /* Respond to the IN token with a NAK. */ 588 if (sc->mue_flags & LAN7500) 589 MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BIR); 590 else 591 MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BIR); 592 593 if (sc->mue_flags & LAN7500) { 594 mue_csr_write(sc, MUE_BURST_CAP, 595 (sc->mue_udev->speed == USB_SPEED_HIGH) ? 596 MUE_BURST_MIN_BUFSZ : MUE_BURST_MAX_BUFSZ); 597 mue_csr_write(sc, MUE_BULK_IN_DELAY, MUE_DEFAULT_BULKIN_DELAY); 598 599 MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BCE | MUE_HW_CFG_MEF); 600 601 /* Set undocumented FIFO sizes. */ 602 mue_csr_write(sc, MUE_FCT_RX_FIFO_END, 0x27); 603 mue_csr_write(sc, MUE_FCT_TX_FIFO_END, 0x17); 604 } else { 605 /* Init LTM. */ 606 mue_init_ltm(sc); 607 608 val = (sc->mue_udev->speed == USB_SPEED_SUPER) ? 609 MUE_7800_BURST_MIN_BUFSZ : MUE_7800_BURST_MAX_BUFSZ; 610 mue_csr_write(sc, MUE_7800_BURST_CAP, val); 611 mue_csr_write(sc, MUE_7800_BULK_IN_DELAY, 612 MUE_7800_DEFAULT_BULKIN_DELAY); 613 614 MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_MEF); 615 MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BCE); 616 } 617 618 mue_csr_write(sc, MUE_INT_STATUS, 0xffffffff); 619 mue_csr_write(sc, (sc->mue_flags & LAN7500) ? 620 MUE_FCT_FLOW : MUE_7800_FCT_FLOW, 0); 621 mue_csr_write(sc, MUE_FLOW, 0); 622 623 /* Reset PHY. */ 624 MUE_SETBIT(sc, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST); 625 for (ntries = 0; ntries < 100; ntries++) { 626 val = mue_csr_read(sc, MUE_PMT_CTL); 627 if (!(val & MUE_PMT_CTL_PHY_RST) && (val & MUE_PMT_CTL_READY)) 628 break; 629 DELAY(10000); 630 } 631 if (ntries == 100) { 632 printf("%s: timeout waiting for PHY reset\n", 633 sc->mue_dev.dv_xname); 634 return (ETIMEDOUT); 635 } 636 637 /* LAN7801 only has RGMII mode. */ 638 if (sc->mue_product == USB_PRODUCT_SMC2_LAN7801) 639 MUE_CLRBIT(sc, MUE_MAC_CR, MUE_MAC_CR_GMII_EN); 640 641 if (sc->mue_flags & LAN7500 || !sc->mue_eeprom_present) { 642 /* Allow MAC to detect speed and duplex from PHY. */ 643 MUE_SETBIT(sc, MUE_MAC_CR, MUE_MAC_CR_AUTO_SPEED | 644 MUE_MAC_CR_AUTO_DUPLEX); 645 } 646 647 MUE_SETBIT(sc, MUE_MAC_TX, MUE_MAC_TX_TXEN); 648 MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ? 649 MUE_FCT_TX_CTL : MUE_7800_FCT_TX_CTL, MUE_FCT_TX_CTL_EN); 650 651 /* Set the maximum frame size. */ 652 MUE_CLRBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN); 653 MUE_SETBIT(sc, MUE_MAC_RX, MUE_MAC_RX_MAX_LEN(ETHER_MAX_LEN)); 654 MUE_SETBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN); 655 656 MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ? 657 MUE_FCT_RX_CTL : MUE_7800_FCT_RX_CTL, MUE_FCT_RX_CTL_EN); 658 659 /* Enable LEDs. */ 660 if (sc->mue_product == USB_PRODUCT_SMC2_LAN7800 && 661 sc->mue_eeprom_present == 0) { 662 MUE_SETBIT(sc, MUE_HW_CFG, 663 MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN); 664 } 665 666 return (0); 667 } 668 669 void 670 mue_set_macaddr(struct mue_softc *sc) 671 { 672 struct ifnet *ifp = &sc->arpcom.ac_if; 673 const uint8_t *eaddr = LLADDR(ifp->if_sadl); 674 uint32_t val, reg; 675 676 reg = (sc->mue_flags & LAN7500) ? MUE_ADDR_FILTX : MUE_7800_ADDR_FILTX; 677 678 val = (eaddr[3] << 24) | (eaddr[2] << 16) | (eaddr[1] << 8) | eaddr[0]; 679 mue_csr_write(sc, MUE_RX_ADDRL, val); 680 mue_csr_write(sc, reg + 4, val); 681 val = (eaddr[5] << 8) | eaddr[4]; 682 mue_csr_write(sc, MUE_RX_ADDRH, val); 683 mue_csr_write(sc, reg, val | MUE_ADDR_FILTX_VALID); 684 } 685 686 /* 687 * Probe for a Microchip chip. 688 */ 689 int 690 mue_match(struct device *parent, void *match, void *aux) 691 { 692 struct usb_attach_arg *uaa = aux; 693 694 if (uaa->iface == NULL || uaa->configno != 1) 695 return (UMATCH_NONE); 696 697 return (mue_lookup(uaa->vendor, uaa->product) != NULL ? 698 UMATCH_VENDOR_PRODUCT_CONF_IFACE : UMATCH_NONE); 699 } 700 701 void 702 mue_attach(struct device *parent, struct device *self, void *aux) 703 { 704 struct mue_softc *sc = (struct mue_softc *)self; 705 struct usb_attach_arg *uaa = aux; 706 usb_interface_descriptor_t *id; 707 usb_endpoint_descriptor_t *ed; 708 struct mii_data *mii; 709 struct ifnet *ifp; 710 int i, s; 711 712 sc->mue_udev = uaa->device; 713 sc->mue_iface = uaa->iface; 714 sc->mue_product = uaa->product; 715 sc->mue_flags = mue_lookup(uaa->vendor, uaa->product)->mue_flags; 716 717 usb_init_task(&sc->mue_tick_task, mue_tick_task, sc, 718 USB_TASK_TYPE_GENERIC); 719 rw_init(&sc->mue_mii_lock, "muemii"); 720 usb_init_task(&sc->mue_stop_task, (void (*)(void *))mue_stop, sc, 721 USB_TASK_TYPE_GENERIC); 722 723 /* Decide on what our bufsize will be. */ 724 if (sc->mue_flags & LAN7500) 725 sc->mue_bufsz = (sc->mue_udev->speed == USB_SPEED_HIGH) ? 726 MUE_MAX_BUFSZ : MUE_MIN_BUFSZ; 727 else 728 sc->mue_bufsz = MUE_7800_BUFSZ; 729 730 /* Find endpoints. */ 731 id = usbd_get_interface_descriptor(sc->mue_iface); 732 for (i = 0; i < id->bNumEndpoints; i++) { 733 ed = usbd_interface2endpoint_descriptor(sc->mue_iface, i); 734 if (ed == NULL) { 735 printf("%s: couldn't get ep %d\n", 736 sc->mue_dev.dv_xname, i); 737 return; 738 } 739 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 740 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 741 sc->mue_ed[MUE_ENDPT_RX] = ed->bEndpointAddress; 742 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 743 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 744 sc->mue_ed[MUE_ENDPT_TX] = ed->bEndpointAddress; 745 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 746 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) { 747 sc->mue_ed[MUE_ENDPT_INTR] = ed->bEndpointAddress; 748 } 749 } 750 751 s = splnet(); 752 753 sc->mue_phyno = 1; 754 755 /* Check if the EEPROM programmed indicator is present. */ 756 mue_read_eeprom(sc, (caddr_t)&i, MUE_EE_IND_OFFSET, 1); 757 sc->mue_eeprom_present = (i == MUE_EEPROM_INDICATOR) ? 1 : 0; 758 759 if (mue_chip_init(sc) != 0) { 760 printf("%s: chip initialization failed\n", 761 sc->mue_dev.dv_xname); 762 splx(s); 763 return; 764 } 765 766 /* Get station address from the EEPROM. */ 767 if (sc->mue_eeprom_present) { 768 if (mue_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr, 769 MUE_EE_MAC_OFFSET, ETHER_ADDR_LEN)) { 770 printf("%s: failed to read station address\n", 771 sc->mue_dev.dv_xname); 772 splx(s); 773 return; 774 } 775 } else 776 mue_enaddr_OF(sc); 777 778 /* A Microchip chip was detected. Inform the world. */ 779 printf("%s:", sc->mue_dev.dv_xname); 780 if (sc->mue_flags & LAN7500) 781 printf(" LAN7500"); 782 else 783 printf(" LAN7800"); 784 printf(", address %s\n", ether_sprintf(sc->arpcom.ac_enaddr)); 785 786 /* Initialize interface info.*/ 787 ifp = GET_IFP(sc); 788 ifp->if_softc = sc; 789 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 790 ifp->if_ioctl = mue_ioctl; 791 ifp->if_start = mue_start; 792 ifp->if_watchdog = mue_watchdog; 793 strlcpy(ifp->if_xname, sc->mue_dev.dv_xname, IFNAMSIZ); 794 795 ifp->if_capabilities = IFCAP_VLAN_MTU; 796 797 /* Initialize MII/media info. */ 798 mii = GET_MII(sc); 799 mii->mii_ifp = ifp; 800 mii->mii_readreg = mue_miibus_readreg; 801 mii->mii_writereg = mue_miibus_writereg; 802 mii->mii_statchg = mue_miibus_statchg; 803 mii->mii_flags = MIIF_AUTOTSLEEP; 804 805 ifmedia_init(&mii->mii_media, 0, mue_ifmedia_upd, mue_ifmedia_sts); 806 mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 807 MIIF_DOPAUSE); 808 809 if (LIST_FIRST(&mii->mii_phys) == NULL) { 810 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL); 811 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE); 812 } else 813 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO); 814 815 /* Attach the interface. */ 816 if_attach(ifp); 817 ether_ifattach(ifp); 818 819 timeout_set(&sc->mue_stat_ch, mue_tick, sc); 820 821 splx(s); 822 } 823 824 int 825 mue_detach(struct device *self, int flags) 826 { 827 struct mue_softc *sc = (struct mue_softc *)self; 828 struct ifnet *ifp = GET_IFP(sc); 829 int s; 830 831 if (timeout_initialized(&sc->mue_stat_ch)) 832 timeout_del(&sc->mue_stat_ch); 833 834 if (sc->mue_ep[MUE_ENDPT_TX] != NULL) 835 usbd_abort_pipe(sc->mue_ep[MUE_ENDPT_TX]); 836 if (sc->mue_ep[MUE_ENDPT_RX] != NULL) 837 usbd_abort_pipe(sc->mue_ep[MUE_ENDPT_RX]); 838 if (sc->mue_ep[MUE_ENDPT_INTR] != NULL) 839 usbd_abort_pipe(sc->mue_ep[MUE_ENDPT_INTR]); 840 841 /* 842 * Remove any pending tasks. They cannot be executing because they run 843 * in the same thread as detach. 844 */ 845 usb_rem_task(sc->mue_udev, &sc->mue_tick_task); 846 usb_rem_task(sc->mue_udev, &sc->mue_stop_task); 847 848 s = splusb(); 849 850 if (--sc->mue_refcnt >= 0) { 851 /* Wait for processes to go away */ 852 usb_detach_wait(&sc->mue_dev); 853 } 854 855 if (ifp->if_flags & IFF_RUNNING) 856 mue_stop(sc); 857 858 mii_detach(&sc->mue_mii, MII_PHY_ANY, MII_OFFSET_ANY); 859 ifmedia_delete_instance(&sc->mue_mii.mii_media, IFM_INST_ANY); 860 if (ifp->if_softc != NULL) { 861 ether_ifdetach(ifp); 862 if_detach(ifp); 863 } 864 865 splx(s); 866 867 return (0); 868 } 869 870 int 871 mue_rx_list_init(struct mue_softc *sc) 872 { 873 struct mue_cdata *cd; 874 struct mue_chain *c; 875 int i; 876 877 DPRINTF(("%s: %s: enter\n", sc->mue_dev.dv_xname, __func__)); 878 879 cd = &sc->mue_cdata; 880 for (i = 0; i < MUE_RX_LIST_CNT; i++) { 881 c = &cd->mue_rx_chain[i]; 882 c->mue_sc = sc; 883 c->mue_idx = i; 884 c->mue_mbuf = NULL; 885 if (c->mue_xfer == NULL) { 886 c->mue_xfer = usbd_alloc_xfer(sc->mue_udev); 887 if (c->mue_xfer == NULL) 888 return (ENOBUFS); 889 c->mue_buf = usbd_alloc_buffer(c->mue_xfer, 890 sc->mue_bufsz); 891 if (c->mue_buf == NULL) { 892 usbd_free_xfer(c->mue_xfer); 893 return (ENOBUFS); 894 } 895 } 896 } 897 898 return (0); 899 } 900 901 int 902 mue_tx_list_init(struct mue_softc *sc) 903 { 904 struct mue_cdata *cd; 905 struct mue_chain *c; 906 int i; 907 908 DPRINTF(("%s: %s: enter\n", sc->mue_dev.dv_xname, __func__)); 909 910 cd = &sc->mue_cdata; 911 for (i = 0; i < MUE_TX_LIST_CNT; i++) { 912 c = &cd->mue_tx_chain[i]; 913 c->mue_sc = sc; 914 c->mue_idx = i; 915 c->mue_mbuf = NULL; 916 if (c->mue_xfer == NULL) { 917 c->mue_xfer = usbd_alloc_xfer(sc->mue_udev); 918 if (c->mue_xfer == NULL) 919 return (ENOBUFS); 920 c->mue_buf = usbd_alloc_buffer(c->mue_xfer, 921 sc->mue_bufsz); 922 if (c->mue_buf == NULL) { 923 usbd_free_xfer(c->mue_xfer); 924 return (ENOBUFS); 925 } 926 } 927 } 928 929 return (0); 930 } 931 932 int 933 mue_open_pipes(struct mue_softc *sc) 934 { 935 struct mue_chain *c; 936 usbd_status err; 937 int i; 938 939 /* Open RX and TX pipes. */ 940 err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_RX], 941 USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_RX]); 942 if (err) { 943 printf("%s: open rx pipe failed: %s\n", 944 sc->mue_dev.dv_xname, usbd_errstr(err)); 945 return (EIO); 946 } 947 err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_TX], 948 USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_TX]); 949 if (err) { 950 printf("%s: open tx pipe failed: %s\n", 951 sc->mue_dev.dv_xname, usbd_errstr(err)); 952 return (EIO); 953 } 954 955 /* Start up the receive pipe. */ 956 for (i = 0; i < MUE_RX_LIST_CNT; i++) { 957 c = &sc->mue_cdata.mue_rx_chain[i]; 958 usbd_setup_xfer(c->mue_xfer, sc->mue_ep[MUE_ENDPT_RX], 959 c, c->mue_buf, sc->mue_bufsz, 960 USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT, 961 mue_rxeof); 962 usbd_transfer(c->mue_xfer); 963 } 964 965 return (0); 966 } 967 968 int 969 mue_encap(struct mue_softc *sc, struct mbuf *m, int idx) 970 { 971 struct mue_chain *c; 972 usbd_status err; 973 struct mue_txbuf_hdr hdr; 974 int length; 975 976 c = &sc->mue_cdata.mue_tx_chain[idx]; 977 978 hdr.tx_cmd_a = htole32((m->m_pkthdr.len & MUE_TX_CMD_A_LEN_MASK) | 979 MUE_TX_CMD_A_FCS); 980 /* Disable segmentation offload. */ 981 hdr.tx_cmd_b = htole32(0); 982 memcpy(c->mue_buf, &hdr, sizeof(hdr)); 983 length = sizeof(hdr); 984 985 m_copydata(m, 0, m->m_pkthdr.len, c->mue_buf + length); 986 length += m->m_pkthdr.len; 987 988 c->mue_mbuf = m; 989 990 usbd_setup_xfer(c->mue_xfer, sc->mue_ep[MUE_ENDPT_TX], 991 c, c->mue_buf, length, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, 992 10000, mue_txeof); 993 994 /* Transmit */ 995 err = usbd_transfer(c->mue_xfer); 996 if (err != USBD_IN_PROGRESS) { 997 c->mue_mbuf = NULL; 998 mue_stop(sc); 999 return(EIO); 1000 } 1001 1002 sc->mue_cdata.mue_tx_cnt++; 1003 1004 return(0); 1005 } 1006 1007 void 1008 mue_iff(struct mue_softc *sc) 1009 { 1010 struct ifnet *ifp = GET_IFP(sc); 1011 struct arpcom *ac = &sc->arpcom; 1012 struct ether_multi *enm; 1013 struct ether_multistep step; 1014 uint32_t h = 0, hashtbl[MUE_DP_SEL_VHF_HASH_LEN], reg, rxfilt; 1015 1016 if (usbd_is_dying(sc->mue_udev)) 1017 return; 1018 1019 reg = (sc->mue_flags & LAN7500) ? MUE_RFE_CTL : MUE_7800_RFE_CTL; 1020 rxfilt = mue_csr_read(sc, reg); 1021 rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH | 1022 MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST); 1023 memset(hashtbl, 0, sizeof(hashtbl)); 1024 ifp->if_flags &= ~IFF_ALLMULTI; 1025 1026 /* Always accept broadcast frames. */ 1027 rxfilt |= MUE_RFE_CTL_BROADCAST; 1028 1029 if (ifp->if_flags & IFF_PROMISC || ac->ac_multirangecnt > 0) { 1030 ifp->if_flags |= IFF_ALLMULTI; 1031 rxfilt |= MUE_RFE_CTL_MULTICAST; 1032 if (ifp->if_flags & IFF_PROMISC) 1033 rxfilt |= MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST; 1034 } else { 1035 rxfilt |= MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH; 1036 1037 /* Now program new ones. */ 1038 ETHER_FIRST_MULTI(step, ac, enm); 1039 while (enm != NULL) { 1040 h = ether_crc32_be(enm->enm_addrlo, 1041 ETHER_ADDR_LEN) >> 23; 1042 hashtbl[h / 32] |= 1 << (h % 32); 1043 ETHER_NEXT_MULTI(step, enm); 1044 } 1045 } 1046 1047 mue_dataport_write(sc, MUE_DP_SEL_VHF, MUE_DP_SEL_VHF_VLAN_LEN, 1048 MUE_DP_SEL_VHF_HASH_LEN, hashtbl); 1049 mue_csr_write(sc, reg, rxfilt); 1050 } 1051 1052 void 1053 mue_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 1054 { 1055 struct mue_chain *c = (struct mue_chain *)priv; 1056 struct mue_softc *sc = c->mue_sc; 1057 struct ifnet *ifp = GET_IFP(sc); 1058 struct mbuf_list ml = MBUF_LIST_INITIALIZER(); 1059 struct mbuf *m; 1060 struct mue_rxbuf_hdr hdr; 1061 u_char *buf = c->mue_buf; 1062 uint32_t total_len; 1063 int pktlen = 0; 1064 int s; 1065 1066 if (usbd_is_dying(sc->mue_udev)) 1067 return; 1068 1069 if (!(ifp->if_flags & IFF_RUNNING)) 1070 return; 1071 1072 if (status != USBD_NORMAL_COMPLETION) { 1073 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1074 return; 1075 if (usbd_ratecheck(&sc->mue_rx_notice)) { 1076 printf("%s: usb errors on rx: %s\n", 1077 sc->mue_dev.dv_xname, usbd_errstr(status)); 1078 } 1079 if (status == USBD_STALLED) 1080 usbd_clear_endpoint_stall_async(sc->mue_ep[MUE_ENDPT_RX]); 1081 goto done; 1082 } 1083 1084 usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL); 1085 1086 do { 1087 if (total_len < sizeof(hdr)) { 1088 ifp->if_ierrors++; 1089 goto done; 1090 } 1091 1092 buf += pktlen; 1093 1094 memcpy(&hdr, buf, sizeof(hdr)); 1095 total_len -= sizeof(hdr); 1096 1097 if (letoh32(hdr.rx_cmd_a) & MUE_RX_CMD_A_RED) { 1098 ifp->if_ierrors++; 1099 goto done; 1100 } 1101 1102 pktlen = letoh32(hdr.rx_cmd_a) & MUE_RX_CMD_A_LEN_MASK; 1103 if (sc->mue_flags & LAN7500) 1104 pktlen -= 2; 1105 1106 if (pktlen > total_len) { 1107 ifp->if_ierrors++; 1108 goto done; 1109 } 1110 1111 buf += sizeof(hdr); 1112 1113 if (total_len < pktlen) 1114 total_len = 0; 1115 else 1116 total_len -= pktlen; 1117 1118 m = m_devget(buf, pktlen - ETHER_CRC_LEN, ETHER_ALIGN); 1119 if (m == NULL) { 1120 DPRINTF(("unable to allocate mbuf for next packet\n")); 1121 ifp->if_ierrors++; 1122 goto done; 1123 } 1124 ml_enqueue(&ml, m); 1125 } while (total_len > 0); 1126 1127 done: 1128 s = splnet(); 1129 if_input(ifp, &ml); 1130 splx(s); 1131 1132 memset(c->mue_buf, 0, sc->mue_bufsz); 1133 1134 /* Setup new transfer. */ 1135 usbd_setup_xfer(xfer, sc->mue_ep[MUE_ENDPT_RX], 1136 c, c->mue_buf, sc->mue_bufsz, USBD_SHORT_XFER_OK | USBD_NO_COPY, 1137 USBD_NO_TIMEOUT, mue_rxeof); 1138 usbd_transfer(xfer); 1139 1140 DPRINTFN(10,("%s: %s: start rx\n", sc->mue_dev.dv_xname, __func__)); 1141 } 1142 1143 void 1144 mue_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 1145 { 1146 struct mue_chain *c = priv; 1147 struct mue_softc *sc = c->mue_sc; 1148 struct ifnet *ifp = GET_IFP(sc); 1149 int s; 1150 1151 if (usbd_is_dying(sc->mue_udev)) 1152 return; 1153 1154 s = splnet(); 1155 1156 DPRINTFN(10,("%s: %s: enter status=%d\n", sc->mue_dev.dv_xname, 1157 __func__, status)); 1158 1159 if (status != USBD_NORMAL_COMPLETION) { 1160 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) { 1161 splx(s); 1162 return; 1163 } 1164 ifp->if_oerrors++; 1165 printf("%s: usb error on tx: %s\n", sc->mue_dev.dv_xname, 1166 usbd_errstr(status)); 1167 if (status == USBD_STALLED) 1168 usbd_clear_endpoint_stall_async(sc->mue_ep[MUE_ENDPT_TX]); 1169 splx(s); 1170 return; 1171 } 1172 1173 ifp->if_timer = 0; 1174 ifq_clr_oactive(&ifp->if_snd); 1175 1176 m_freem(c->mue_mbuf); 1177 c->mue_mbuf = NULL; 1178 1179 if (ifq_empty(&ifp->if_snd) == 0) 1180 mue_start(ifp); 1181 1182 splx(s); 1183 } 1184 1185 void 1186 mue_init(void *xsc) 1187 { 1188 struct mue_softc *sc = xsc; 1189 struct ifnet *ifp = GET_IFP(sc); 1190 int s; 1191 1192 s = splnet(); 1193 1194 /* Cancel pending I/O and free all TX/RX buffers. */ 1195 mue_reset(sc); 1196 1197 /* Set MAC address. */ 1198 mue_set_macaddr(sc); 1199 1200 /* Init RX ring. */ 1201 if (mue_rx_list_init(sc) == ENOBUFS) { 1202 printf("%s: rx list init failed\n", sc->mue_dev.dv_xname); 1203 splx(s); 1204 return; 1205 } 1206 1207 /* Init TX ring. */ 1208 if (mue_tx_list_init(sc) == ENOBUFS) { 1209 printf("%s: tx list init failed\n", sc->mue_dev.dv_xname); 1210 splx(s); 1211 return; 1212 } 1213 1214 /* Program promiscuous mode and multicast filters. */ 1215 mue_iff(sc); 1216 1217 if (mue_open_pipes(sc) != 0) { 1218 splx(s); 1219 return; 1220 } 1221 1222 sc->mue_link = 0; 1223 ifp->if_flags |= IFF_RUNNING; 1224 ifq_clr_oactive(&ifp->if_snd); 1225 1226 splx(s); 1227 1228 timeout_add_sec(&sc->mue_stat_ch, 1); 1229 } 1230 1231 int 1232 mue_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1233 { 1234 struct mue_softc *sc = ifp->if_softc; 1235 struct ifreq *ifr = (struct ifreq *)data; 1236 int s, error = 0; 1237 1238 s = splnet(); 1239 1240 switch(cmd) { 1241 case SIOCSIFADDR: 1242 ifp->if_flags |= IFF_UP; 1243 if (!(ifp->if_flags & IFF_RUNNING)) 1244 mue_init(sc); 1245 break; 1246 case SIOCSIFFLAGS: 1247 if (ifp->if_flags & IFF_UP) { 1248 if (ifp->if_flags & IFF_RUNNING) 1249 error = ENETRESET; 1250 else 1251 mue_init(sc); 1252 } else { 1253 if (ifp->if_flags & IFF_RUNNING) 1254 mue_stop(sc); 1255 } 1256 break; 1257 case SIOCGIFMEDIA: 1258 case SIOCSIFMEDIA: 1259 error = ifmedia_ioctl(ifp, ifr, &sc->mue_mii.mii_media, cmd); 1260 break; 1261 default: 1262 error = ether_ioctl(ifp, &sc->arpcom, cmd, data); 1263 } 1264 1265 if (error == ENETRESET) { 1266 if (ifp->if_flags & IFF_RUNNING) 1267 mue_iff(sc); 1268 error = 0; 1269 } 1270 1271 splx(s); 1272 1273 return(error); 1274 } 1275 1276 void 1277 mue_watchdog(struct ifnet *ifp) 1278 { 1279 struct mue_softc *sc = ifp->if_softc; 1280 struct mue_chain *c; 1281 usbd_status stat; 1282 int s; 1283 1284 ifp->if_oerrors++; 1285 printf("%s: watchdog timeout\n", sc->mue_dev.dv_xname); 1286 1287 s = splusb(); 1288 c = &sc->mue_cdata.mue_tx_chain[0]; 1289 usbd_get_xfer_status(c->mue_xfer, NULL, NULL, NULL, &stat); 1290 mue_txeof(c->mue_xfer, c, stat); 1291 1292 if (!ifq_empty(&ifp->if_snd)) 1293 mue_start(ifp); 1294 splx(s); 1295 } 1296 1297 void 1298 mue_reset(struct mue_softc *sc) 1299 { 1300 if (usbd_is_dying(sc->mue_udev)) 1301 return; 1302 1303 /* Wait a little while for the chip to get its brains in order. */ 1304 DELAY(1000); 1305 } 1306 1307 void 1308 mue_start(struct ifnet *ifp) 1309 { 1310 struct mue_softc *sc = ifp->if_softc; 1311 struct mbuf *m_head = NULL; 1312 1313 if (!sc->mue_link) 1314 return; 1315 1316 if (ifq_is_oactive(&ifp->if_snd)) 1317 return; 1318 1319 m_head = ifq_dequeue(&ifp->if_snd); 1320 if (m_head == NULL) 1321 return; 1322 1323 if (mue_encap(sc, m_head, 0)) { 1324 m_freem(m_head); 1325 ifq_set_oactive(&ifp->if_snd); 1326 return; 1327 } 1328 1329 /* If there's a BPF listener, bounce a copy of this frame to him. */ 1330 #if NBPFILTER > 0 1331 if (ifp->if_bpf) 1332 bpf_mtap(ifp->if_bpf, m_head, BPF_DIRECTION_OUT); 1333 #endif 1334 1335 ifq_set_oactive(&ifp->if_snd); 1336 1337 /* Set a timeout in case the chip goes out to lunch. */ 1338 ifp->if_timer = 5; 1339 } 1340 1341 void 1342 mue_stop(struct mue_softc *sc) 1343 { 1344 struct ifnet *ifp; 1345 usbd_status err; 1346 int i; 1347 1348 ifp = GET_IFP(sc); 1349 ifp->if_timer = 0; 1350 ifp->if_flags &= ~IFF_RUNNING; 1351 ifq_clr_oactive(&ifp->if_snd); 1352 1353 timeout_del(&sc->mue_stat_ch); 1354 1355 /* Stop transfers. */ 1356 if (sc->mue_ep[MUE_ENDPT_RX] != NULL) { 1357 err = usbd_close_pipe(sc->mue_ep[MUE_ENDPT_RX]); 1358 if (err) { 1359 printf("%s: close rx pipe failed: %s\n", 1360 sc->mue_dev.dv_xname, usbd_errstr(err)); 1361 } 1362 sc->mue_ep[MUE_ENDPT_RX] = NULL; 1363 } 1364 1365 if (sc->mue_ep[MUE_ENDPT_TX] != NULL) { 1366 err = usbd_close_pipe(sc->mue_ep[MUE_ENDPT_TX]); 1367 if (err) { 1368 printf("%s: close tx pipe failed: %s\n", 1369 sc->mue_dev.dv_xname, usbd_errstr(err)); 1370 } 1371 sc->mue_ep[MUE_ENDPT_TX] = NULL; 1372 } 1373 1374 if (sc->mue_ep[MUE_ENDPT_INTR] != NULL) { 1375 err = usbd_close_pipe(sc->mue_ep[MUE_ENDPT_INTR]); 1376 if (err) { 1377 printf("%s: close intr pipe failed: %s\n", 1378 sc->mue_dev.dv_xname, usbd_errstr(err)); 1379 } 1380 sc->mue_ep[MUE_ENDPT_INTR] = NULL; 1381 } 1382 1383 /* Free RX resources. */ 1384 for (i = 0; i < MUE_RX_LIST_CNT; i++) { 1385 if (sc->mue_cdata.mue_rx_chain[i].mue_mbuf != NULL) { 1386 m_freem(sc->mue_cdata.mue_rx_chain[i].mue_mbuf); 1387 sc->mue_cdata.mue_rx_chain[i].mue_mbuf = NULL; 1388 } 1389 if (sc->mue_cdata.mue_rx_chain[i].mue_xfer != NULL) { 1390 usbd_free_xfer(sc->mue_cdata.mue_rx_chain[i].mue_xfer); 1391 sc->mue_cdata.mue_rx_chain[i].mue_xfer = NULL; 1392 } 1393 } 1394 1395 /* Free TX resources. */ 1396 for (i = 0; i < MUE_TX_LIST_CNT; i++) { 1397 if (sc->mue_cdata.mue_tx_chain[i].mue_mbuf != NULL) { 1398 m_freem(sc->mue_cdata.mue_tx_chain[i].mue_mbuf); 1399 sc->mue_cdata.mue_tx_chain[i].mue_mbuf = NULL; 1400 } 1401 if (sc->mue_cdata.mue_tx_chain[i].mue_xfer != NULL) { 1402 usbd_free_xfer(sc->mue_cdata.mue_tx_chain[i].mue_xfer); 1403 sc->mue_cdata.mue_tx_chain[i].mue_xfer = NULL; 1404 } 1405 } 1406 1407 sc->mue_link = 0; 1408 } 1409 1410 void 1411 mue_tick(void *xsc) 1412 { 1413 struct mue_softc *sc = xsc; 1414 1415 if (sc == NULL) 1416 return; 1417 1418 if (usbd_is_dying(sc->mue_udev)) 1419 return; 1420 1421 /* Perform periodic stuff in process context. */ 1422 usb_add_task(sc->mue_udev, &sc->mue_tick_task); 1423 } 1424 1425 void 1426 mue_tick_task(void *xsc) 1427 { 1428 struct mue_softc *sc =xsc; 1429 struct mii_data *mii; 1430 int s; 1431 1432 if (sc == NULL) 1433 return; 1434 1435 if (usbd_is_dying(sc->mue_udev)) 1436 return; 1437 1438 mii = GET_MII(sc); 1439 1440 s = splnet(); 1441 mii_tick(mii); 1442 if (sc->mue_link == 0) 1443 mue_miibus_statchg(&sc->mue_dev); 1444 timeout_add_sec(&sc->mue_stat_ch, 1); 1445 splx(s); 1446 } 1447