xref: /openbsd-src/sys/dev/usb/if_mue.c (revision 1a8dbaac879b9f3335ad7fb25429ce63ac1d6bac)
1 /*	$OpenBSD: if_mue.c,v 1.10 2020/07/31 10:49:32 mglocker Exp $	*/
2 
3 /*
4  * Copyright (c) 2018 Kevin Lo <kevlo@openbsd.org>
5  *
6  * Permission to use, copy, modify, and distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 /* Driver for Microchip LAN7500/LAN7800 chipsets. */
20 
21 #include "bpfilter.h"
22 
23 #include <sys/param.h>
24 #include <sys/systm.h>
25 #include <sys/sockio.h>
26 #include <sys/rwlock.h>
27 #include <sys/mbuf.h>
28 #include <sys/kernel.h>
29 #include <sys/socket.h>
30 
31 #include <sys/device.h>
32 
33 #include <machine/bus.h>
34 
35 #include <net/if.h>
36 #include <net/if_dl.h>
37 #include <net/if_media.h>
38 
39 #if NBPFILTER > 0
40 #include <net/bpf.h>
41 #endif
42 
43 #include <netinet/in.h>
44 #include <netinet/if_ether.h>
45 
46 #include <dev/mii/miivar.h>
47 
48 #include <dev/usb/usb.h>
49 #include <dev/usb/usbdi.h>
50 #include <dev/usb/usbdi_util.h>
51 #include <dev/usb/usbdivar.h>
52 #include <dev/usb/usbdevs.h>
53 
54 #include <dev/usb/if_muereg.h>
55 
56 #ifdef MUE_DEBUG
57 #define DPRINTF(x)	do { if (muedebug) printf x; } while (0)
58 #define DPRINTFN(n,x)	do { if (muedebug >= (n)) printf x; } while (0)
59 int	muedebug = 0;
60 #else
61 #define DPRINTF(x)
62 #define DPRINTFN(n,x)
63 #endif
64 
65 /*
66  * Various supported device vendors/products.
67  */
68 struct mue_type {
69 	struct usb_devno	mue_dev;
70 	uint16_t		mue_flags;
71 #define LAN7500	0x0001		/* LAN7500 */
72 };
73 
74 const struct mue_type mue_devs[] = {
75 	{ { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7500 }, LAN7500 },
76 	{ { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7505 }, LAN7500 },
77 	{ { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7800 }, 0 },
78 	{ { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7801 }, 0 },
79 	{ { USB_VENDOR_SMC2, USB_PRODUCT_SMC2_LAN7850 }, 0 }
80 };
81 
82 #define mue_lookup(v, p)	((struct mue_type *)usb_lookup(mue_devs, v, p))
83 
84 int	mue_match(struct device *, void *, void *);
85 void	mue_attach(struct device *, struct device *, void *);
86 int	mue_detach(struct device *, int);
87 
88 struct cfdriver mue_cd = {
89 	NULL, "mue", DV_IFNET
90 };
91 
92 const struct cfattach mue_ca = {
93 	sizeof(struct mue_softc), mue_match, mue_attach, mue_detach
94 };
95 
96 uint32_t	mue_csr_read(struct mue_softc *, uint32_t);
97 int		mue_csr_write(struct mue_softc *, uint32_t, uint32_t);
98 
99 void		mue_lock_mii(struct mue_softc *);
100 void		mue_unlock_mii(struct mue_softc *);
101 
102 int		mue_mii_wait(struct mue_softc *);
103 int		mue_miibus_readreg(struct device *, int, int);
104 void		mue_miibus_writereg(struct device *, int, int, int);
105 void		mue_miibus_statchg(struct device *);
106 int		mue_ifmedia_upd(struct ifnet *);
107 void		mue_ifmedia_sts(struct ifnet *, struct ifmediareq *);
108 
109 int		mue_eeprom_wait(struct mue_softc *);
110 uint8_t		mue_eeprom_getbyte(struct mue_softc *, int, uint8_t *);
111 int		mue_read_eeprom(struct mue_softc *, caddr_t, int, int);
112 int		mue_dataport_wait(struct mue_softc *);
113 void		mue_dataport_write(struct mue_softc *, uint32_t, uint32_t,
114 		    uint32_t, uint32_t *);
115 void		mue_init_ltm(struct mue_softc *);
116 int		mue_chip_init(struct mue_softc *);
117 void		mue_set_macaddr(struct mue_softc *);
118 
119 int		mue_rx_list_init(struct mue_softc *);
120 int		mue_tx_list_init(struct mue_softc *);
121 int		mue_open_pipes(struct mue_softc *);
122 int		mue_encap(struct mue_softc *, struct mbuf *, int);
123 void		mue_iff(struct mue_softc *);
124 void		mue_rxeof(struct usbd_xfer *, void *, usbd_status);
125 void		mue_txeof(struct usbd_xfer *, void *, usbd_status);
126 
127 void		mue_init(void *);
128 int		mue_ioctl(struct ifnet *, u_long, caddr_t);
129 void		mue_watchdog(struct ifnet *);
130 void		mue_reset(struct mue_softc *);
131 void		mue_start(struct ifnet *);
132 void		mue_stop(struct mue_softc *);
133 void		mue_tick(void *);
134 void		mue_tick_task(void *);
135 
136 #define MUE_SETBIT(sc, reg, x)	\
137 	mue_csr_write(sc, reg, mue_csr_read(sc, reg) | (x))
138 
139 #define MUE_CLRBIT(sc, reg, x)	\
140 	mue_csr_write(sc, reg, mue_csr_read(sc, reg) & ~(x))
141 
142 #if defined(__arm__) || defined(__arm64__)
143 
144 #include <dev/ofw/openfirm.h>
145 
146 void
147 mue_enaddr_OF(struct mue_softc *sc)
148 {
149 	char *device = "/axi/usb/hub/ethernet";
150 	char prop[64];
151 	int node;
152 
153 	if (sc->mue_dev.dv_unit != 0)
154 		return;
155 
156 	/* Get the Raspberry Pi MAC address from FDT. */
157 	if ((node = OF_finddevice("/aliases")) == -1)
158 		return;
159 	if (OF_getprop(node, "ethernet0", prop, sizeof(prop)) > 0 ||
160 	    OF_getprop(node, "ethernet", prop, sizeof(prop)) > 0)
161 		device = prop;
162 
163 	if ((node = OF_finddevice(device)) == -1)
164 		return;
165 	if (OF_getprop(node, "local-mac-address", sc->arpcom.ac_enaddr,
166 	    sizeof(sc->arpcom.ac_enaddr)) != sizeof(sc->arpcom.ac_enaddr)) {
167 		OF_getprop(node, "mac-address", sc->arpcom.ac_enaddr,
168 		    sizeof(sc->arpcom.ac_enaddr));
169 	}
170 }
171 #else
172 #define mue_enaddr_OF(x) do {} while(0)
173 #endif
174 
175 uint32_t
176 mue_csr_read(struct mue_softc *sc, uint32_t reg)
177 {
178 	usb_device_request_t req;
179 	usbd_status err;
180 	uDWord val;
181 
182 	if (usbd_is_dying(sc->mue_udev))
183 		return (0);
184 
185 	USETDW(val, 0);
186 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
187 	req.bRequest = MUE_UR_READREG;
188 	USETW(req.wValue, 0);
189 	USETW(req.wIndex, reg);
190 	USETW(req.wLength, 4);
191 
192 	err = usbd_do_request(sc->mue_udev, &req, &val);
193 	if (err) {
194 		DPRINTF(("%s: mue_csr_read: reg=0x%x err=%s\n",
195 		    sc->mue_dev.dv_xname, reg, usbd_errstr(err)));
196 		return (0);
197 	}
198 
199 	return (UGETDW(val));
200 }
201 
202 int
203 mue_csr_write(struct mue_softc *sc, uint32_t reg, uint32_t aval)
204 {
205 	usb_device_request_t req;
206 	usbd_status err;
207 	uDWord val;
208 
209 	if (usbd_is_dying(sc->mue_udev))
210 		return (0);
211 
212 	USETDW(val, aval);
213 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
214 	req.bRequest = MUE_UR_WRITEREG;
215 	USETW(req.wValue, 0);
216 	USETW(req.wIndex, reg);
217 	USETW(req.wLength, 4);
218 
219 	err = usbd_do_request(sc->mue_udev, &req, &val);
220 	if (err) {
221 		DPRINTF(("%s: mue_csr_write: reg=0x%x err=%s\n",
222 		    sc->mue_dev.dv_xname, reg, usbd_errstr(err)));
223 		return (-1);
224 	}
225 
226 	return (0);
227 }
228 
229 /*
230  * Get exclusive access to the MII registers.
231  */
232 void
233 mue_lock_mii(struct mue_softc *sc)
234 {
235 	sc->mue_refcnt++;
236 	rw_enter_write(&sc->mue_mii_lock);
237 }
238 
239 void
240 mue_unlock_mii(struct mue_softc *sc)
241 {
242 	rw_exit_write(&sc->mue_mii_lock);
243 	if (--sc->mue_refcnt < 0)
244 		usb_detach_wakeup(&sc->mue_dev);
245 }
246 
247 /*
248  * Wait for the MII to become ready.
249  */
250 int
251 mue_mii_wait(struct mue_softc *sc)
252 {
253 	int ntries;
254 
255 	for (ntries = 0; ntries < 100; ntries++) {
256 		if (!(mue_csr_read(sc, MUE_MII_ACCESS) & MUE_MII_ACCESS_BUSY))
257 			return (0);
258 		DELAY(5);
259 	}
260 
261 	printf("%s: MII timed out\n", sc->mue_dev.dv_xname);
262 	return (1);
263 }
264 
265 int
266 mue_miibus_readreg(struct device *dev, int phy, int reg)
267 {
268 	struct mue_softc *sc = (void *)dev;
269 	uint32_t val;
270 
271 	if (usbd_is_dying(sc->mue_udev))
272 		return (0);
273 
274 	if (sc->mue_phyno != phy)
275 		return (0);
276 
277 	mue_lock_mii(sc);
278 	if (mue_mii_wait(sc) != 0)
279 		return (0);
280 
281 	mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_READ |
282 	    MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
283 	    MUE_MII_ACCESS_PHYADDR(phy));
284 
285 	if (mue_mii_wait(sc) != 0)
286 		printf("%s: MII read timed out\n", sc->mue_dev.dv_xname);
287 
288 	val = mue_csr_read(sc, MUE_MII_DATA);
289 	mue_unlock_mii(sc);
290 	return (val & 0xffff);
291 }
292 
293 void
294 mue_miibus_writereg(struct device *dev, int phy, int reg, int data)
295 {
296 	struct mue_softc *sc = (void *)dev;
297 
298 	if (usbd_is_dying(sc->mue_udev))
299 		return;
300 
301 	if (sc->mue_phyno != phy)
302 		return;
303 
304 	mue_lock_mii(sc);
305 	if (mue_mii_wait(sc) != 0)
306 		return;
307 
308 	mue_csr_write(sc, MUE_MII_DATA, data);
309 	mue_csr_write(sc, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE |
310 	    MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
311 	    MUE_MII_ACCESS_PHYADDR(phy));
312 
313 	if (mue_mii_wait(sc) != 0)
314 		printf("%s: MII write timed out\n", sc->mue_dev.dv_xname);
315 
316 	mue_unlock_mii(sc);
317 }
318 
319 void
320 mue_miibus_statchg(struct device *dev)
321 {
322 	struct mue_softc *sc = (void *)dev;
323 	struct mii_data *mii = GET_MII(sc);
324 	struct ifnet *ifp = GET_IFP(sc);
325 	uint32_t flow, threshold;
326 
327 	if (mii == NULL || ifp == NULL ||
328 	    (ifp->if_flags & IFF_RUNNING) == 0)
329 		return;
330 
331 	sc->mue_link = 0;
332 	if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
333 	    (IFM_ACTIVE | IFM_AVALID)) {
334 		switch (IFM_SUBTYPE(mii->mii_media_active)) {
335 		case IFM_10_T:
336 		case IFM_100_TX:
337 		case IFM_1000_T:
338 			sc->mue_link++;
339 			break;
340 		default:
341 			break;
342 		}
343 	}
344 
345 	/* Lost link, do nothing. */
346 	if (sc->mue_link == 0)
347 		return;
348 
349 	if (!(sc->mue_flags & LAN7500)) {
350 		if (sc->mue_udev->speed == USB_SPEED_SUPER) {
351 			if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
352 				/* Disable U2 and enable U1. */
353 				MUE_CLRBIT(sc, MUE_USB_CFG1,
354 				    MUE_USB_CFG1_DEV_U2_INIT_EN);
355 				MUE_SETBIT(sc, MUE_USB_CFG1,
356 				    MUE_USB_CFG1_DEV_U1_INIT_EN);
357 			} else {
358 				/* Enable U1 and U2. */
359 				MUE_SETBIT(sc, MUE_USB_CFG1,
360 				    MUE_USB_CFG1_DEV_U1_INIT_EN |
361 				    MUE_USB_CFG1_DEV_U2_INIT_EN);
362 			}
363 		}
364 	}
365 
366 	threshold = 0;
367 	flow = 0;
368 	if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) {
369 		if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) {
370 			flow |= MUE_FLOW_TX_FCEN | MUE_FLOW_PAUSE_TIME;
371 
372 			/* XXX magic numbers come from Linux driver. */
373 			if (sc->mue_flags & LAN7500) {
374 				threshold = 0x820;
375 			} else {
376 				threshold =
377 				    (sc->mue_udev->speed == USB_SPEED_SUPER) ?
378 				    0x817 : 0x211;
379 			}
380 		}
381 		if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE)
382 			flow |= MUE_FLOW_RX_FCEN;
383 	}
384 	mue_csr_write(sc, (sc->mue_flags & LAN7500) ?
385 	    MUE_FCT_FLOW : MUE_7800_FCT_FLOW, threshold);
386 
387 	/* Threshold value should be set before enabling flow. */
388 	mue_csr_write(sc, MUE_FLOW, flow);
389 }
390 
391 /*
392  * Set media options.
393  */
394 int
395 mue_ifmedia_upd(struct ifnet *ifp)
396 {
397 	struct mue_softc *sc = ifp->if_softc;
398 	struct mii_data *mii = GET_MII(sc);
399 
400 	if (mii->mii_instance) {
401 		struct mii_softc *miisc;
402 		LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
403 			mii_phy_reset(miisc);
404 	}
405 	return (mii_mediachg(mii));
406 }
407 
408 /*
409  * Report current media status.
410  */
411 void
412 mue_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
413 {
414 	struct mue_softc *sc = ifp->if_softc;
415 	struct mii_data *mii = GET_MII(sc);
416 
417 	mii_pollstat(mii);
418 	ifmr->ifm_active = mii->mii_media_active;
419 	ifmr->ifm_status = mii->mii_media_status;
420 }
421 
422 int
423 mue_eeprom_wait(struct mue_softc *sc)
424 {
425 	uint32_t val;
426 	int ntries;
427 
428 	for (ntries = 0; ntries < 100; ntries++) {
429 		val = mue_csr_read(sc, MUE_E2P_CMD);
430 		if (!(val & MUE_E2P_CMD_BUSY) || (val & MUE_E2P_CMD_TIMEOUT))
431 			return (0);
432 		DELAY(5);
433 	}
434 
435 	return (1);
436 }
437 
438 uint8_t
439 mue_eeprom_getbyte(struct mue_softc *sc, int addr, uint8_t *dest)
440 {
441 	uint32_t byte = 0;
442 	int ntries;
443 
444 	for (ntries = 0; ntries < 100; ntries++) {
445 		if (!(mue_csr_read(sc, MUE_E2P_CMD) & MUE_E2P_CMD_BUSY))
446 			break;
447 		DELAY(5);
448 	}
449 
450 	if (ntries == 100) {
451 		printf("%s: EEPROM failed to come ready\n",
452 		    sc->mue_dev.dv_xname);
453 		return (ETIMEDOUT);
454 	}
455 
456 	mue_csr_write(sc, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY |
457 	    (addr & MUE_E2P_CMD_ADDR_MASK));
458 
459 	if (mue_eeprom_wait(sc) != 0) {
460 		printf("%s: EEPROM read timed out\n", sc->mue_dev.dv_xname);
461 		return (ETIMEDOUT);
462 	}
463 
464 	byte = mue_csr_read(sc, MUE_E2P_DATA);
465 	*dest = byte & 0xff;
466 
467 	return (0);
468 }
469 
470 int
471 mue_read_eeprom(struct mue_softc *sc, caddr_t dest, int off, int cnt)
472 {
473 	uint32_t val;
474 	uint8_t byte = 0;
475 	int i, err = 0;
476 
477 	/*
478 	 * EEPROM pins are muxed with the LED function on LAN7800 device.
479 	 */
480 	val = mue_csr_read(sc, MUE_HW_CFG);
481 	if (sc->mue_product == USB_PRODUCT_SMC2_LAN7800) {
482 		MUE_CLRBIT(sc, MUE_HW_CFG,
483 		    MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN);
484 	}
485 
486 	for (i = 0; i < cnt; i++) {
487 		err = mue_eeprom_getbyte(sc, off + i, &byte);
488 		if (err)
489 			break;
490 		*(dest + i) = byte;
491 	}
492 
493 	if (sc->mue_product == USB_PRODUCT_SMC2_LAN7800)
494 		mue_csr_write(sc, MUE_HW_CFG, val);
495 
496 	return (err ? 1 : 0);
497 }
498 
499 int
500 mue_dataport_wait(struct mue_softc *sc)
501 {
502 	int ntries;
503 
504 	for (ntries = 0; ntries < 100; ntries++) {
505 		if (mue_csr_read(sc, MUE_DP_SEL) & MUE_DP_SEL_DPRDY)
506 			return (0);
507 		DELAY(5);
508 	}
509 
510 	printf("%s: dataport timed out\n", sc->mue_dev.dv_xname);
511 	return (1);
512 }
513 
514 void
515 mue_dataport_write(struct mue_softc *sc, uint32_t sel, uint32_t addr,
516     uint32_t cnt, uint32_t *data)
517 {
518 	int i;
519 
520 	if (mue_dataport_wait(sc) != 0)
521 		return;
522 
523 	mue_csr_write(sc, MUE_DP_SEL,
524 	    (mue_csr_read(sc, MUE_DP_SEL) & ~MUE_DP_SEL_RSEL_MASK) | sel);
525 
526 	for (i = 0; i < cnt; i++) {
527 		mue_csr_write(sc, MUE_DP_ADDR, addr + i);
528 		mue_csr_write(sc, MUE_DP_DATA, data[i]);
529 		mue_csr_write(sc, MUE_DP_CMD, MUE_DP_CMD_WRITE);
530 		if (mue_dataport_wait(sc) != 0)
531 			return;
532 	}
533 }
534 
535 void
536 mue_init_ltm(struct mue_softc *sc)
537 {
538 	uint8_t idx[6] = { 0 };
539 	int i;
540 
541 	if (mue_csr_read(sc, MUE_USB_CFG1) & MUE_USB_CFG1_LTM_ENABLE) {
542 		uint8_t temp[2];
543 
544 		if (mue_read_eeprom(sc, (caddr_t)&temp, MUE_EE_LTM_OFFSET, 2)) {
545 			if (temp[0] != 24)
546 				goto done;
547 			mue_read_eeprom(sc, (caddr_t)&idx, temp[1] << 1, 24);
548 		}
549 	}
550 done:
551 	for (i = 0; i < sizeof(idx); i++)
552 		mue_csr_write(sc, MUE_LTM_INDEX(i), idx[i]);
553 }
554 
555 int
556 mue_chip_init(struct mue_softc *sc)
557 {
558 	uint32_t val;
559 	int ntries;
560 
561 	if (sc->mue_flags & LAN7500) {
562 		for (ntries = 0; ntries < 100; ntries++) {
563 			if (mue_csr_read(sc, MUE_PMT_CTL) & MUE_PMT_CTL_READY)
564 				break;
565 			DELAY(1000);	/* 1 msec */
566 		}
567 		if (ntries == 100) {
568 			printf("%s: timeout waiting for device ready\n",
569 			    sc->mue_dev.dv_xname);
570 			return (ETIMEDOUT);
571 		}
572 	}
573 
574 	MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_LRST);
575 
576 	for (ntries = 0; ntries < 1000; ntries++) {
577 		if (!(mue_csr_read(sc, MUE_HW_CFG) & MUE_HW_CFG_LRST))
578 			break;
579 		DELAY(5);
580 	}
581 	if (ntries == 1000) {
582 		printf("%s: timeout on lite software reset\n",
583 		    sc->mue_dev.dv_xname);
584 		return (ETIMEDOUT);
585 	}
586 
587 	/* Respond to the IN token with a NAK. */
588 	if (sc->mue_flags & LAN7500)
589 		MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BIR);
590 	else
591 		MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BIR);
592 
593 	if (sc->mue_flags & LAN7500) {
594 		mue_csr_write(sc, MUE_BURST_CAP,
595 		    (sc->mue_udev->speed == USB_SPEED_HIGH) ?
596 		    MUE_BURST_MIN_BUFSZ : MUE_BURST_MAX_BUFSZ);
597 		mue_csr_write(sc, MUE_BULK_IN_DELAY, MUE_DEFAULT_BULKIN_DELAY);
598 
599 		MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_BCE | MUE_HW_CFG_MEF);
600 
601 		/* Set undocumented FIFO sizes. */
602 		mue_csr_write(sc, MUE_FCT_RX_FIFO_END, 0x27);
603 		mue_csr_write(sc, MUE_FCT_TX_FIFO_END, 0x17);
604 	} else {
605 		/* Init LTM. */
606 		mue_init_ltm(sc);
607 
608 		val = (sc->mue_udev->speed == USB_SPEED_SUPER) ?
609 		    MUE_7800_BURST_MIN_BUFSZ : MUE_7800_BURST_MAX_BUFSZ;
610 		mue_csr_write(sc, MUE_7800_BURST_CAP, val);
611 		mue_csr_write(sc, MUE_7800_BULK_IN_DELAY,
612 		    MUE_7800_DEFAULT_BULKIN_DELAY);
613 
614 		MUE_SETBIT(sc, MUE_HW_CFG, MUE_HW_CFG_MEF);
615 		MUE_SETBIT(sc, MUE_USB_CFG0, MUE_USB_CFG0_BCE);
616 	}
617 
618 	mue_csr_write(sc, MUE_INT_STATUS, 0xffffffff);
619 	mue_csr_write(sc, (sc->mue_flags & LAN7500) ?
620 	    MUE_FCT_FLOW : MUE_7800_FCT_FLOW, 0);
621 	mue_csr_write(sc, MUE_FLOW, 0);
622 
623 	/* Reset PHY. */
624 	MUE_SETBIT(sc, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST);
625 	for (ntries = 0; ntries < 100; ntries++) {
626 		val = mue_csr_read(sc, MUE_PMT_CTL);
627 		if (!(val & MUE_PMT_CTL_PHY_RST) && (val & MUE_PMT_CTL_READY))
628 			break;
629 		DELAY(10000);
630 	}
631 	if (ntries == 100) {
632 		printf("%s: timeout waiting for PHY reset\n",
633 		    sc->mue_dev.dv_xname);
634 		return (ETIMEDOUT);
635 	}
636 
637 	/* LAN7801 only has RGMII mode. */
638 	if (sc->mue_product == USB_PRODUCT_SMC2_LAN7801)
639 		MUE_CLRBIT(sc, MUE_MAC_CR, MUE_MAC_CR_GMII_EN);
640 
641 	if (sc->mue_flags & LAN7500 || !sc->mue_eeprom_present) {
642 		/* Allow MAC to detect speed and duplex from PHY. */
643 		MUE_SETBIT(sc, MUE_MAC_CR, MUE_MAC_CR_AUTO_SPEED |
644 		    MUE_MAC_CR_AUTO_DUPLEX);
645 	}
646 
647 	MUE_SETBIT(sc, MUE_MAC_TX, MUE_MAC_TX_TXEN);
648 	MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ?
649 	    MUE_FCT_TX_CTL : MUE_7800_FCT_TX_CTL, MUE_FCT_TX_CTL_EN);
650 
651 	/* Set the maximum frame size. */
652 	MUE_CLRBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN);
653 	MUE_SETBIT(sc, MUE_MAC_RX, MUE_MAC_RX_MAX_LEN(ETHER_MAX_LEN));
654 	MUE_SETBIT(sc, MUE_MAC_RX, MUE_MAC_RX_RXEN);
655 
656 	MUE_SETBIT(sc, (sc->mue_flags & LAN7500) ?
657 	    MUE_FCT_RX_CTL : MUE_7800_FCT_RX_CTL, MUE_FCT_RX_CTL_EN);
658 
659 	return (0);
660 }
661 
662 void
663 mue_set_macaddr(struct mue_softc *sc)
664 {
665 	struct ifnet *ifp = &sc->arpcom.ac_if;
666 	const uint8_t *eaddr = LLADDR(ifp->if_sadl);
667 	uint32_t val, reg;
668 
669 	reg = (sc->mue_flags & LAN7500) ? MUE_ADDR_FILTX : MUE_7800_ADDR_FILTX;
670 
671 	val = (eaddr[3] << 24) | (eaddr[2] << 16) | (eaddr[1] << 8) | eaddr[0];
672 	mue_csr_write(sc, MUE_RX_ADDRL, val);
673 	mue_csr_write(sc, reg + 4, val);
674 	val = (eaddr[5] << 8) | eaddr[4];
675 	mue_csr_write(sc, MUE_RX_ADDRH, val);
676 	mue_csr_write(sc, reg, val | MUE_ADDR_FILTX_VALID);
677 }
678 
679 /*
680  * Probe for a Microchip chip.
681  */
682 int
683 mue_match(struct device *parent, void *match, void *aux)
684 {
685 	struct usb_attach_arg *uaa = aux;
686 
687 	if (uaa->iface == NULL || uaa->configno != 1)
688 		return (UMATCH_NONE);
689 
690 	return (mue_lookup(uaa->vendor, uaa->product) != NULL ?
691 	    UMATCH_VENDOR_PRODUCT_CONF_IFACE : UMATCH_NONE);
692 }
693 
694 void
695 mue_attach(struct device *parent, struct device *self, void *aux)
696 {
697 	struct mue_softc *sc = (struct mue_softc *)self;
698 	struct usb_attach_arg *uaa = aux;
699 	usb_interface_descriptor_t *id;
700 	usb_endpoint_descriptor_t *ed;
701 	struct mii_data	*mii;
702 	struct ifnet *ifp;
703 	int i, s;
704 
705 	sc->mue_udev = uaa->device;
706 	sc->mue_iface = uaa->iface;
707 	sc->mue_product = uaa->product;
708 	sc->mue_flags = mue_lookup(uaa->vendor, uaa->product)->mue_flags;
709 
710 	usb_init_task(&sc->mue_tick_task, mue_tick_task, sc,
711 	    USB_TASK_TYPE_GENERIC);
712 	rw_init(&sc->mue_mii_lock, "muemii");
713 	usb_init_task(&sc->mue_stop_task, (void (*)(void *))mue_stop, sc,
714 	    USB_TASK_TYPE_GENERIC);
715 
716 	/* Decide on what our bufsize will be. */
717 	if (sc->mue_flags & LAN7500)
718 		sc->mue_bufsz = (sc->mue_udev->speed == USB_SPEED_HIGH) ?
719 		    MUE_MAX_BUFSZ : MUE_MIN_BUFSZ;
720 	else
721 		sc->mue_bufsz = MUE_7800_BUFSZ;
722 
723 	/* Find endpoints. */
724 	id = usbd_get_interface_descriptor(sc->mue_iface);
725 	for (i = 0; i < id->bNumEndpoints; i++) {
726 		ed = usbd_interface2endpoint_descriptor(sc->mue_iface, i);
727 		if (ed == NULL) {
728 			printf("%s: couldn't get ep %d\n",
729 			    sc->mue_dev.dv_xname, i);
730 			return;
731 		}
732 		if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
733 		    UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
734 			sc->mue_ed[MUE_ENDPT_RX] = ed->bEndpointAddress;
735 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
736 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
737 			sc->mue_ed[MUE_ENDPT_TX] = ed->bEndpointAddress;
738 		} else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
739 			   UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
740 			sc->mue_ed[MUE_ENDPT_INTR] = ed->bEndpointAddress;
741 		}
742 	}
743 
744 	s = splnet();
745 
746 	sc->mue_phyno = 1;
747 
748 	/* Check if the EEPROM programmed indicator is present. */
749 	mue_read_eeprom(sc, (caddr_t)&i, MUE_EE_IND_OFFSET, 1);
750 	sc->mue_eeprom_present = (i == MUE_EEPROM_INDICATOR) ? 1 : 0;
751 
752 	if (mue_chip_init(sc) != 0) {
753 		printf("%s: chip initialization failed\n",
754 		    sc->mue_dev.dv_xname);
755 		splx(s);
756 		return;
757 	}
758 
759 	/* Get station address from the EEPROM. */
760 	if (sc->mue_eeprom_present) {
761 		if (mue_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
762 		    MUE_EE_MAC_OFFSET, ETHER_ADDR_LEN)) {
763 			printf("%s: failed to read station address\n",
764 			    sc->mue_dev.dv_xname);
765 			splx(s);
766 			return;
767 		}
768 	} else
769 		mue_enaddr_OF(sc);
770 
771 	/* A Microchip chip was detected.  Inform the world. */
772 	printf("%s:", sc->mue_dev.dv_xname);
773 	if (sc->mue_flags & LAN7500)
774 		printf(" LAN7500");
775 	else
776 		printf(" LAN7800");
777 	printf(", address %s\n", ether_sprintf(sc->arpcom.ac_enaddr));
778 
779 	/* Initialize interface info.*/
780 	ifp = GET_IFP(sc);
781 	ifp->if_softc = sc;
782 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
783 	ifp->if_ioctl = mue_ioctl;
784 	ifp->if_start = mue_start;
785 	ifp->if_watchdog = mue_watchdog;
786 	strlcpy(ifp->if_xname, sc->mue_dev.dv_xname, IFNAMSIZ);
787 
788 	ifp->if_capabilities = IFCAP_VLAN_MTU;
789 
790 	/* Initialize MII/media info. */
791 	mii = GET_MII(sc);
792 	mii->mii_ifp = ifp;
793 	mii->mii_readreg = mue_miibus_readreg;
794 	mii->mii_writereg = mue_miibus_writereg;
795 	mii->mii_statchg = mue_miibus_statchg;
796 	mii->mii_flags = MIIF_AUTOTSLEEP;
797 
798 	ifmedia_init(&mii->mii_media, 0, mue_ifmedia_upd, mue_ifmedia_sts);
799 	mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
800 	    MIIF_DOPAUSE);
801 
802 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
803 		ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
804 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
805 	} else
806 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
807 
808 	/* Attach the interface. */
809 	if_attach(ifp);
810 	ether_ifattach(ifp);
811 
812 	timeout_set(&sc->mue_stat_ch, mue_tick, sc);
813 
814 	splx(s);
815 }
816 
817 int
818 mue_detach(struct device *self, int flags)
819 {
820 	struct mue_softc *sc = (struct mue_softc *)self;
821 	struct ifnet *ifp = GET_IFP(sc);
822 	int s;
823 
824 	if (timeout_initialized(&sc->mue_stat_ch))
825 		timeout_del(&sc->mue_stat_ch);
826 
827 	if (sc->mue_ep[MUE_ENDPT_TX] != NULL)
828 		usbd_abort_pipe(sc->mue_ep[MUE_ENDPT_TX]);
829 	if (sc->mue_ep[MUE_ENDPT_RX] != NULL)
830 		usbd_abort_pipe(sc->mue_ep[MUE_ENDPT_RX]);
831 	if (sc->mue_ep[MUE_ENDPT_INTR] != NULL)
832 		usbd_abort_pipe(sc->mue_ep[MUE_ENDPT_INTR]);
833 
834 	/*
835 	 * Remove any pending tasks.  They cannot be executing because they run
836 	 * in the same thread as detach.
837 	 */
838 	usb_rem_task(sc->mue_udev, &sc->mue_tick_task);
839 	usb_rem_task(sc->mue_udev, &sc->mue_stop_task);
840 
841 	s = splusb();
842 
843 	if (--sc->mue_refcnt >= 0) {
844 		/* Wait for processes to go away */
845 		usb_detach_wait(&sc->mue_dev);
846 	}
847 
848 	if (ifp->if_flags & IFF_RUNNING)
849 		mue_stop(sc);
850 
851 	mii_detach(&sc->mue_mii, MII_PHY_ANY, MII_OFFSET_ANY);
852 	ifmedia_delete_instance(&sc->mue_mii.mii_media, IFM_INST_ANY);
853 	if (ifp->if_softc != NULL) {
854 		ether_ifdetach(ifp);
855 		if_detach(ifp);
856 	}
857 
858 	splx(s);
859 
860 	return (0);
861 }
862 
863 int
864 mue_rx_list_init(struct mue_softc *sc)
865 {
866 	struct mue_cdata *cd;
867 	struct mue_chain *c;
868 	int i;
869 
870 	DPRINTF(("%s: %s: enter\n", sc->mue_dev.dv_xname, __func__));
871 
872 	cd = &sc->mue_cdata;
873 	for (i = 0; i < MUE_RX_LIST_CNT; i++) {
874 		c = &cd->mue_rx_chain[i];
875 		c->mue_sc = sc;
876 		c->mue_idx = i;
877 		c->mue_mbuf = NULL;
878 		if (c->mue_xfer == NULL) {
879 			c->mue_xfer = usbd_alloc_xfer(sc->mue_udev);
880 			if (c->mue_xfer == NULL)
881 				return (ENOBUFS);
882 			c->mue_buf = usbd_alloc_buffer(c->mue_xfer,
883 			    sc->mue_bufsz);
884 			if (c->mue_buf == NULL) {
885 				usbd_free_xfer(c->mue_xfer);
886 				return (ENOBUFS);
887 			}
888 		}
889 	}
890 
891 	return (0);
892 }
893 
894 int
895 mue_tx_list_init(struct mue_softc *sc)
896 {
897 	struct mue_cdata *cd;
898 	struct mue_chain *c;
899 	int i;
900 
901 	DPRINTF(("%s: %s: enter\n", sc->mue_dev.dv_xname, __func__));
902 
903 	cd = &sc->mue_cdata;
904 	for (i = 0; i < MUE_TX_LIST_CNT; i++) {
905 		c = &cd->mue_tx_chain[i];
906 		c->mue_sc = sc;
907 		c->mue_idx = i;
908 		c->mue_mbuf = NULL;
909 		if (c->mue_xfer == NULL) {
910 			c->mue_xfer = usbd_alloc_xfer(sc->mue_udev);
911 			if (c->mue_xfer == NULL)
912 				return (ENOBUFS);
913 			c->mue_buf = usbd_alloc_buffer(c->mue_xfer,
914 			    sc->mue_bufsz);
915 			if (c->mue_buf == NULL) {
916 				usbd_free_xfer(c->mue_xfer);
917 				return (ENOBUFS);
918 			}
919 		}
920 	}
921 
922 	return (0);
923 }
924 
925 int
926 mue_open_pipes(struct mue_softc *sc)
927 {
928 	struct mue_chain *c;
929 	usbd_status err;
930 	int i;
931 
932 	/* Open RX and TX pipes. */
933 	err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_RX],
934 	    USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_RX]);
935 	if (err) {
936 		printf("%s: open rx pipe failed: %s\n",
937 		    sc->mue_dev.dv_xname, usbd_errstr(err));
938 		return (EIO);
939 	}
940 	err = usbd_open_pipe(sc->mue_iface, sc->mue_ed[MUE_ENDPT_TX],
941 	    USBD_EXCLUSIVE_USE, &sc->mue_ep[MUE_ENDPT_TX]);
942 	if (err) {
943 		printf("%s: open tx pipe failed: %s\n",
944 		    sc->mue_dev.dv_xname, usbd_errstr(err));
945 		return (EIO);
946 	}
947 
948 	/* Start up the receive pipe. */
949 	for (i = 0; i < MUE_RX_LIST_CNT; i++) {
950 		c = &sc->mue_cdata.mue_rx_chain[i];
951 		usbd_setup_xfer(c->mue_xfer, sc->mue_ep[MUE_ENDPT_RX],
952 		    c, c->mue_buf, sc->mue_bufsz,
953 		    USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT,
954 		    mue_rxeof);
955 		usbd_transfer(c->mue_xfer);
956 	}
957 
958 	return (0);
959 }
960 
961 int
962 mue_encap(struct mue_softc *sc, struct mbuf *m, int idx)
963 {
964 	struct mue_chain *c;
965 	usbd_status err;
966 	struct mue_txbuf_hdr hdr;
967 	int length;
968 
969 	c = &sc->mue_cdata.mue_tx_chain[idx];
970 
971 	hdr.tx_cmd_a = htole32((m->m_pkthdr.len & MUE_TX_CMD_A_LEN_MASK) |
972 	    MUE_TX_CMD_A_FCS);
973 	/* Disable segmentation offload. */
974 	hdr.tx_cmd_b = htole32(0);
975 	memcpy(c->mue_buf, &hdr, sizeof(hdr));
976 	length = sizeof(hdr);
977 
978 	m_copydata(m, 0, m->m_pkthdr.len, c->mue_buf + length);
979 	length += m->m_pkthdr.len;
980 
981 	c->mue_mbuf = m;
982 
983 	usbd_setup_xfer(c->mue_xfer, sc->mue_ep[MUE_ENDPT_TX],
984 	    c, c->mue_buf, length, USBD_FORCE_SHORT_XFER | USBD_NO_COPY,
985 	    10000, mue_txeof);
986 
987 	/* Transmit */
988 	err = usbd_transfer(c->mue_xfer);
989 	if (err != USBD_IN_PROGRESS) {
990 		c->mue_mbuf = NULL;
991 		mue_stop(sc);
992 		return(EIO);
993 	}
994 
995 	sc->mue_cdata.mue_tx_cnt++;
996 
997 	return(0);
998 }
999 
1000 void
1001 mue_iff(struct mue_softc *sc)
1002 {
1003 	struct ifnet *ifp = GET_IFP(sc);
1004 	struct arpcom *ac = &sc->arpcom;
1005 	struct ether_multi *enm;
1006 	struct ether_multistep step;
1007 	uint32_t h = 0, hashtbl[MUE_DP_SEL_VHF_HASH_LEN], reg, rxfilt;
1008 
1009 	if (usbd_is_dying(sc->mue_udev))
1010 		return;
1011 
1012 	reg = (sc->mue_flags & LAN7500) ? MUE_RFE_CTL : MUE_7800_RFE_CTL;
1013 	rxfilt = mue_csr_read(sc, reg);
1014 	rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH |
1015 	    MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST);
1016 	memset(hashtbl, 0, sizeof(hashtbl));
1017 	ifp->if_flags &= ~IFF_ALLMULTI;
1018 
1019 	/* Always accept broadcast frames. */
1020 	rxfilt |= MUE_RFE_CTL_BROADCAST;
1021 
1022 	if (ifp->if_flags & IFF_PROMISC || ac->ac_multirangecnt > 0) {
1023 		ifp->if_flags |= IFF_ALLMULTI;
1024 		rxfilt |= MUE_RFE_CTL_MULTICAST;
1025 		if (ifp->if_flags & IFF_PROMISC)
1026 			rxfilt |= MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST;
1027 	} else {
1028 		rxfilt |= MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH;
1029 
1030 		/* Now program new ones. */
1031 		ETHER_FIRST_MULTI(step, ac, enm);
1032 		while (enm != NULL) {
1033 			h = ether_crc32_be(enm->enm_addrlo,
1034 			    ETHER_ADDR_LEN) >> 23;
1035 			hashtbl[h / 32] |= 1 << (h % 32);
1036 			ETHER_NEXT_MULTI(step, enm);
1037 		}
1038 	}
1039 
1040 	mue_dataport_write(sc, MUE_DP_SEL_VHF, MUE_DP_SEL_VHF_VLAN_LEN,
1041 	    MUE_DP_SEL_VHF_HASH_LEN, hashtbl);
1042 	mue_csr_write(sc, reg, rxfilt);
1043 }
1044 
1045 void
1046 mue_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1047 {
1048 	struct mue_chain *c = (struct mue_chain *)priv;
1049 	struct mue_softc *sc = c->mue_sc;
1050 	struct ifnet *ifp = GET_IFP(sc);
1051 	struct mbuf_list ml = MBUF_LIST_INITIALIZER();
1052 	struct mbuf *m;
1053 	struct mue_rxbuf_hdr hdr;
1054 	u_char *buf = c->mue_buf;
1055 	uint32_t total_len;
1056 	int pktlen = 0;
1057 	int s;
1058 
1059 	if (usbd_is_dying(sc->mue_udev))
1060 		return;
1061 
1062 	if (!(ifp->if_flags & IFF_RUNNING))
1063 		return;
1064 
1065 	if (status != USBD_NORMAL_COMPLETION) {
1066 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
1067 			return;
1068 		if (usbd_ratecheck(&sc->mue_rx_notice)) {
1069 			printf("%s: usb errors on rx: %s\n",
1070 			    sc->mue_dev.dv_xname, usbd_errstr(status));
1071 		}
1072 		if (status == USBD_STALLED)
1073 			usbd_clear_endpoint_stall_async(sc->mue_ep[MUE_ENDPT_RX]);
1074 		goto done;
1075 	}
1076 
1077 	usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
1078 
1079 	do {
1080 		if (total_len < sizeof(hdr)) {
1081 			ifp->if_ierrors++;
1082 			goto done;
1083 		}
1084 
1085 		buf += pktlen;
1086 
1087 		memcpy(&hdr, buf, sizeof(hdr));
1088 		total_len -= sizeof(hdr);
1089 
1090 		if (letoh32(hdr.rx_cmd_a) & MUE_RX_CMD_A_RED) {
1091 			ifp->if_ierrors++;
1092 			goto done;
1093 		}
1094 
1095 		pktlen = letoh32(hdr.rx_cmd_a) & MUE_RX_CMD_A_LEN_MASK;
1096 		if (sc->mue_flags & LAN7500)
1097 			pktlen -= 2;
1098 
1099 		if (pktlen > total_len) {
1100 			ifp->if_ierrors++;
1101 			goto done;
1102 		}
1103 
1104 		buf += sizeof(hdr);
1105 
1106 		if (total_len < pktlen)
1107 			total_len = 0;
1108 		else
1109 			total_len -= pktlen;
1110 
1111 		m = m_devget(buf, pktlen - ETHER_CRC_LEN, ETHER_ALIGN);
1112 		if (m == NULL) {
1113 			DPRINTF(("unable to allocate mbuf for next packet\n"));
1114 			ifp->if_ierrors++;
1115 			goto done;
1116 		}
1117 		ml_enqueue(&ml, m);
1118 	} while (total_len > 0);
1119 
1120 done:
1121 	s = splnet();
1122 	if_input(ifp, &ml);
1123 	splx(s);
1124 
1125 	memset(c->mue_buf, 0, sc->mue_bufsz);
1126 
1127 	/* Setup new transfer. */
1128 	usbd_setup_xfer(xfer, sc->mue_ep[MUE_ENDPT_RX],
1129 	    c, c->mue_buf, sc->mue_bufsz, USBD_SHORT_XFER_OK | USBD_NO_COPY,
1130 	    USBD_NO_TIMEOUT, mue_rxeof);
1131 	usbd_transfer(xfer);
1132 
1133 	DPRINTFN(10,("%s: %s: start rx\n", sc->mue_dev.dv_xname, __func__));
1134 }
1135 
1136 void
1137 mue_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
1138 {
1139 	struct mue_chain *c = priv;
1140 	struct mue_softc *sc = c->mue_sc;
1141 	struct ifnet *ifp = GET_IFP(sc);
1142 	int s;
1143 
1144 	if (usbd_is_dying(sc->mue_udev))
1145 		return;
1146 
1147 	s = splnet();
1148 
1149 	DPRINTFN(10,("%s: %s: enter status=%d\n", sc->mue_dev.dv_xname,
1150 	    __func__, status));
1151 
1152 	if (status != USBD_NORMAL_COMPLETION) {
1153 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
1154 			splx(s);
1155 			return;
1156 		}
1157 		ifp->if_oerrors++;
1158 		printf("%s: usb error on tx: %s\n", sc->mue_dev.dv_xname,
1159 		    usbd_errstr(status));
1160 		if (status == USBD_STALLED)
1161 			usbd_clear_endpoint_stall_async(sc->mue_ep[MUE_ENDPT_TX]);
1162 		splx(s);
1163 		return;
1164 	}
1165 
1166 	ifp->if_timer = 0;
1167 	ifq_clr_oactive(&ifp->if_snd);
1168 
1169 	m_freem(c->mue_mbuf);
1170 	c->mue_mbuf = NULL;
1171 
1172 	if (ifq_empty(&ifp->if_snd) == 0)
1173 		mue_start(ifp);
1174 
1175 	splx(s);
1176 }
1177 
1178 void
1179 mue_init(void *xsc)
1180 {
1181 	struct mue_softc *sc = xsc;
1182 	struct ifnet *ifp = GET_IFP(sc);
1183 	int s;
1184 
1185 	s = splnet();
1186 
1187 	/* Cancel pending I/O and free all TX/RX buffers. */
1188 	mue_reset(sc);
1189 
1190 	/* Set MAC address. */
1191 	mue_set_macaddr(sc);
1192 
1193 	/* Init RX ring. */
1194 	if (mue_rx_list_init(sc) == ENOBUFS) {
1195 		printf("%s: rx list init failed\n", sc->mue_dev.dv_xname);
1196 		splx(s);
1197 		return;
1198 	}
1199 
1200 	/* Init TX ring. */
1201 	if (mue_tx_list_init(sc) == ENOBUFS) {
1202 		printf("%s: tx list init failed\n", sc->mue_dev.dv_xname);
1203 		splx(s);
1204 		return;
1205 	}
1206 
1207 	/* Program promiscuous mode and multicast filters. */
1208 	mue_iff(sc);
1209 
1210 	if (mue_open_pipes(sc) != 0) {
1211 		splx(s);
1212 		return;
1213 	}
1214 
1215 	sc->mue_link = 0;
1216 	ifp->if_flags |= IFF_RUNNING;
1217 	ifq_clr_oactive(&ifp->if_snd);
1218 
1219 	splx(s);
1220 
1221 	timeout_add_sec(&sc->mue_stat_ch, 1);
1222 }
1223 
1224 int
1225 mue_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1226 {
1227 	struct mue_softc *sc = ifp->if_softc;
1228 	struct ifreq *ifr = (struct ifreq *)data;
1229 	int s, error = 0;
1230 
1231 	s = splnet();
1232 
1233 	switch(cmd) {
1234 	case SIOCSIFADDR:
1235 		ifp->if_flags |= IFF_UP;
1236 		if (!(ifp->if_flags & IFF_RUNNING))
1237 			mue_init(sc);
1238 		break;
1239 	case SIOCSIFFLAGS:
1240 		if (ifp->if_flags & IFF_UP) {
1241 			if (ifp->if_flags & IFF_RUNNING)
1242 				error = ENETRESET;
1243 			else
1244 				mue_init(sc);
1245 		} else {
1246 			if (ifp->if_flags & IFF_RUNNING)
1247 				mue_stop(sc);
1248 		}
1249 		break;
1250 	case SIOCGIFMEDIA:
1251 	case SIOCSIFMEDIA:
1252 		error = ifmedia_ioctl(ifp, ifr, &sc->mue_mii.mii_media, cmd);
1253 		break;
1254 	default:
1255 		error = ether_ioctl(ifp, &sc->arpcom, cmd, data);
1256 	}
1257 
1258 	if (error == ENETRESET) {
1259 		if (ifp->if_flags & IFF_RUNNING)
1260 			mue_iff(sc);
1261 		error = 0;
1262 	}
1263 
1264 	splx(s);
1265 
1266 	return(error);
1267 }
1268 
1269 void
1270 mue_watchdog(struct ifnet *ifp)
1271 {
1272 	struct mue_softc *sc = ifp->if_softc;
1273 	struct mue_chain *c;
1274 	usbd_status stat;
1275 	int s;
1276 
1277 	ifp->if_oerrors++;
1278 	printf("%s: watchdog timeout\n", sc->mue_dev.dv_xname);
1279 
1280 	s = splusb();
1281 	c = &sc->mue_cdata.mue_tx_chain[0];
1282 	usbd_get_xfer_status(c->mue_xfer, NULL, NULL, NULL, &stat);
1283 	mue_txeof(c->mue_xfer, c, stat);
1284 
1285 	if (!ifq_empty(&ifp->if_snd))
1286 		mue_start(ifp);
1287 	splx(s);
1288 }
1289 
1290 void
1291 mue_reset(struct mue_softc *sc)
1292 {
1293 	if (usbd_is_dying(sc->mue_udev))
1294 		return;
1295 
1296 	/* Wait a little while for the chip to get its brains in order. */
1297 	DELAY(1000);
1298 }
1299 
1300 void
1301 mue_start(struct ifnet *ifp)
1302 {
1303 	struct mue_softc *sc = ifp->if_softc;
1304 	struct mbuf *m_head = NULL;
1305 
1306 	if (!sc->mue_link)
1307 		return;
1308 
1309 	if (ifq_is_oactive(&ifp->if_snd))
1310 		return;
1311 
1312 	m_head = ifq_dequeue(&ifp->if_snd);
1313 	if (m_head == NULL)
1314 		return;
1315 
1316 	if (mue_encap(sc, m_head, 0)) {
1317 		m_freem(m_head);
1318 		ifq_set_oactive(&ifp->if_snd);
1319 		return;
1320 	}
1321 
1322 	/* If there's a BPF listener, bounce a copy of this frame to him. */
1323 #if NBPFILTER > 0
1324 	if (ifp->if_bpf)
1325 		bpf_mtap(ifp->if_bpf, m_head, BPF_DIRECTION_OUT);
1326 #endif
1327 
1328 	ifq_set_oactive(&ifp->if_snd);
1329 
1330 	/* Set a timeout in case the chip goes out to lunch. */
1331 	ifp->if_timer = 5;
1332 }
1333 
1334 void
1335 mue_stop(struct mue_softc *sc)
1336 {
1337 	struct ifnet *ifp;
1338 	usbd_status err;
1339 	int i;
1340 
1341 	ifp = GET_IFP(sc);
1342 	ifp->if_timer = 0;
1343 	ifp->if_flags &= ~IFF_RUNNING;
1344 	ifq_clr_oactive(&ifp->if_snd);
1345 
1346 	timeout_del(&sc->mue_stat_ch);
1347 
1348 	/* Stop transfers. */
1349 	if (sc->mue_ep[MUE_ENDPT_RX] != NULL) {
1350 		err = usbd_close_pipe(sc->mue_ep[MUE_ENDPT_RX]);
1351 		if (err) {
1352 			printf("%s: close rx pipe failed: %s\n",
1353 			    sc->mue_dev.dv_xname, usbd_errstr(err));
1354 		}
1355 		sc->mue_ep[MUE_ENDPT_RX] = NULL;
1356 	}
1357 
1358 	if (sc->mue_ep[MUE_ENDPT_TX] != NULL) {
1359 		err = usbd_close_pipe(sc->mue_ep[MUE_ENDPT_TX]);
1360 		if (err) {
1361 			printf("%s: close tx pipe failed: %s\n",
1362 			    sc->mue_dev.dv_xname, usbd_errstr(err));
1363 		}
1364 		sc->mue_ep[MUE_ENDPT_TX] = NULL;
1365 	}
1366 
1367 	if (sc->mue_ep[MUE_ENDPT_INTR] != NULL) {
1368 		err = usbd_close_pipe(sc->mue_ep[MUE_ENDPT_INTR]);
1369 		if (err) {
1370 			printf("%s: close intr pipe failed: %s\n",
1371 			    sc->mue_dev.dv_xname, usbd_errstr(err));
1372 		}
1373 		sc->mue_ep[MUE_ENDPT_INTR] = NULL;
1374 	}
1375 
1376 	/* Free RX resources. */
1377 	for (i = 0; i < MUE_RX_LIST_CNT; i++) {
1378 		if (sc->mue_cdata.mue_rx_chain[i].mue_mbuf != NULL) {
1379 			m_freem(sc->mue_cdata.mue_rx_chain[i].mue_mbuf);
1380 			sc->mue_cdata.mue_rx_chain[i].mue_mbuf = NULL;
1381 		}
1382 		if (sc->mue_cdata.mue_rx_chain[i].mue_xfer != NULL) {
1383 			usbd_free_xfer(sc->mue_cdata.mue_rx_chain[i].mue_xfer);
1384 			sc->mue_cdata.mue_rx_chain[i].mue_xfer = NULL;
1385 		}
1386 	}
1387 
1388 	/* Free TX resources. */
1389 	for (i = 0; i < MUE_TX_LIST_CNT; i++) {
1390 		if (sc->mue_cdata.mue_tx_chain[i].mue_mbuf != NULL) {
1391 			m_freem(sc->mue_cdata.mue_tx_chain[i].mue_mbuf);
1392 			sc->mue_cdata.mue_tx_chain[i].mue_mbuf = NULL;
1393 		}
1394 		if (sc->mue_cdata.mue_tx_chain[i].mue_xfer != NULL) {
1395 			usbd_free_xfer(sc->mue_cdata.mue_tx_chain[i].mue_xfer);
1396 			sc->mue_cdata.mue_tx_chain[i].mue_xfer = NULL;
1397 		}
1398 	}
1399 
1400 	sc->mue_link = 0;
1401 }
1402 
1403 void
1404 mue_tick(void *xsc)
1405 {
1406 	struct mue_softc *sc = xsc;
1407 
1408 	if (sc == NULL)
1409 		return;
1410 
1411 	if (usbd_is_dying(sc->mue_udev))
1412 		return;
1413 
1414 	/* Perform periodic stuff in process context. */
1415 	usb_add_task(sc->mue_udev, &sc->mue_tick_task);
1416 }
1417 
1418 void
1419 mue_tick_task(void *xsc)
1420 {
1421 	struct mue_softc *sc =xsc;
1422 	struct mii_data *mii;
1423 	int s;
1424 
1425 	if (sc == NULL)
1426 		return;
1427 
1428 	if (usbd_is_dying(sc->mue_udev))
1429 		return;
1430 
1431 	mii = GET_MII(sc);
1432 
1433 	s = splnet();
1434 	mii_tick(mii);
1435 	if (sc->mue_link == 0)
1436 		mue_miibus_statchg(&sc->mue_dev);
1437 	timeout_add_sec(&sc->mue_stat_ch, 1);
1438 	splx(s);
1439 }
1440