1 /* $OpenBSD: if_axe.c,v 1.126 2014/07/13 15:52:49 mpi Exp $ */ 2 3 /* 4 * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * Copyright (c) 1997, 1998, 1999, 2000-2003 21 * Bill Paul <wpaul@windriver.com>. All rights reserved. 22 * 23 * Redistribution and use in source and binary forms, with or without 24 * modification, are permitted provided that the following conditions 25 * are met: 26 * 1. Redistributions of source code must retain the above copyright 27 * notice, this list of conditions and the following disclaimer. 28 * 2. Redistributions in binary form must reproduce the above copyright 29 * notice, this list of conditions and the following disclaimer in the 30 * documentation and/or other materials provided with the distribution. 31 * 3. All advertising materials mentioning features or use of this software 32 * must display the following acknowledgement: 33 * This product includes software developed by Bill Paul. 34 * 4. Neither the name of the author nor the names of any co-contributors 35 * may be used to endorse or promote products derived from this software 36 * without specific prior written permission. 37 * 38 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 39 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 41 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 42 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 43 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 44 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 45 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 46 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 47 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 48 * THE POSSIBILITY OF SUCH DAMAGE. 49 */ 50 51 /* 52 * ASIX Electronics AX88172 USB 2.0 ethernet driver. Used in the 53 * LinkSys USB200M and various other adapters. 54 * 55 * Manuals available from: 56 * http://www.asix.com.tw/datasheet/mac/Ax88172.PDF 57 * Note: you need the manual for the AX88170 chip (USB 1.x ethernet 58 * controller) to find the definitions for the RX control register. 59 * http://www.asix.com.tw/datasheet/mac/Ax88170.PDF 60 * 61 * Written by Bill Paul <wpaul@windriver.com> 62 * Senior Engineer 63 * Wind River Systems 64 */ 65 66 /* 67 * The AX88172 provides USB ethernet supports at 10 and 100Mbps. 68 * It uses an external PHY (reference designs use a RealTek chip), 69 * and has a 64-bit multicast hash filter. There is some information 70 * missing from the manual which one needs to know in order to make 71 * the chip function: 72 * 73 * - You must set bit 7 in the RX control register, otherwise the 74 * chip won't receive any packets. 75 * - You must initialize all 3 IPG registers, or you won't be able 76 * to send any packets. 77 * 78 * Note that this device appears to only support loading the station 79 * address via autoload from the EEPROM (i.e. there's no way to manually 80 * set it). 81 * 82 * (Adam Weinberger wanted me to name this driver if_gir.c.) 83 */ 84 85 /* 86 * Ported to OpenBSD 3/28/2004 by Greg Taleck <taleck@oz.net> 87 * with bits and pieces from the aue and url drivers. 88 */ 89 90 #include "bpfilter.h" 91 92 #include <sys/param.h> 93 #include <sys/systm.h> 94 #include <sys/sockio.h> 95 #include <sys/rwlock.h> 96 #include <sys/mbuf.h> 97 #include <sys/kernel.h> 98 #include <sys/socket.h> 99 100 #include <sys/device.h> 101 102 #include <machine/bus.h> 103 104 #include <net/if.h> 105 #include <net/if_dl.h> 106 #include <net/if_media.h> 107 108 #if NBPFILTER > 0 109 #include <net/bpf.h> 110 #endif 111 112 #include <netinet/in.h> 113 #include <netinet/if_ether.h> 114 115 #include <dev/mii/mii.h> 116 #include <dev/mii/miivar.h> 117 118 #include <dev/usb/usb.h> 119 #include <dev/usb/usbdi.h> 120 #include <dev/usb/usbdi_util.h> 121 #include <dev/usb/usbdivar.h> 122 #include <dev/usb/usbdevs.h> 123 124 #include <dev/usb/if_axereg.h> 125 126 #ifdef AXE_DEBUG 127 #define DPRINTF(x) do { if (axedebug) printf x; } while (0) 128 #define DPRINTFN(n,x) do { if (axedebug >= (n)) printf x; } while (0) 129 int axedebug = 0; 130 #else 131 #define DPRINTF(x) 132 #define DPRINTFN(n,x) 133 #endif 134 135 /* 136 * Various supported device vendors/products. 137 */ 138 const struct axe_type axe_devs[] = { 139 { { USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_UF200}, 0 }, 140 { { USB_VENDOR_ACERCM, USB_PRODUCT_ACERCM_EP1427X2}, 0 }, 141 { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_ETHERNET }, AX772 }, 142 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88172}, 0 }, 143 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772}, AX772 }, 144 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772A}, AX772 }, 145 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B}, AX772 | AX772B }, 146 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88772B_1}, AX772 | AX772B }, 147 { { USB_VENDOR_ASIX, USB_PRODUCT_ASIX_AX88178}, AX178 }, 148 { { USB_VENDOR_ATEN, USB_PRODUCT_ATEN_UC210T}, 0 }, 149 { { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D5055 }, AX178 }, 150 { { USB_VENDOR_BILLIONTON, USB_PRODUCT_BILLIONTON_USB2AR}, 0}, 151 { { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_USB200MV2}, AX772 }, 152 { { USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB2_TX }, 0}, 153 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100}, 0 }, 154 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100B1 }, AX772 }, 155 { { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DUBE100C1 }, AX772 | AX772B }, 156 { { USB_VENDOR_GOODWAY, USB_PRODUCT_GOODWAY_GWUSB2E}, 0 }, 157 { { USB_VENDOR_IODATA, USB_PRODUCT_IODATA_ETGUS2 }, AX178 }, 158 { { USB_VENDOR_JVC, USB_PRODUCT_JVC_MP_PRX1}, 0 }, 159 { { USB_VENDOR_LENOVO, USB_PRODUCT_LENOVO_ETHERNET }, AX772 | AX772B }, 160 { { USB_VENDOR_LINKSYS, USB_PRODUCT_LINKSYS_HG20F9}, AX772 | AX772B }, 161 { { USB_VENDOR_LINKSYS2, USB_PRODUCT_LINKSYS2_USB200M}, 0 }, 162 { { USB_VENDOR_LINKSYS4, USB_PRODUCT_LINKSYS4_USB1000 }, AX178 }, 163 { { USB_VENDOR_LOGITEC, USB_PRODUCT_LOGITEC_LAN_GTJU2}, AX178 }, 164 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2GT}, AX178 }, 165 { { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAU2KTX}, 0 }, 166 { { USB_VENDOR_MSI, USB_PRODUCT_MSI_AX88772A}, AX772 }, 167 { { USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_FA120}, 0 }, 168 { { USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01PLUS }, AX772 }, 169 { { USB_VENDOR_PLANEX3, USB_PRODUCT_PLANEX3_GU1000T }, AX178 }, 170 { { USB_VENDOR_SYSTEMTALKS, USB_PRODUCT_SYSTEMTALKS_SGCX2UL}, 0 }, 171 { { USB_VENDOR_SITECOM, USB_PRODUCT_SITECOM_LN029}, 0 }, 172 { { USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN028 }, AX178 } 173 }; 174 175 #define axe_lookup(v, p) ((struct axe_type *)usb_lookup(axe_devs, v, p)) 176 177 int axe_match(struct device *, void *, void *); 178 void axe_attach(struct device *, struct device *, void *); 179 int axe_detach(struct device *, int); 180 181 struct cfdriver axe_cd = { 182 NULL, "axe", DV_IFNET 183 }; 184 185 const struct cfattach axe_ca = { 186 sizeof(struct axe_softc), axe_match, axe_attach, axe_detach 187 }; 188 189 int axe_tx_list_init(struct axe_softc *); 190 int axe_rx_list_init(struct axe_softc *); 191 struct mbuf *axe_newbuf(void); 192 int axe_encap(struct axe_softc *, struct mbuf *, int); 193 void axe_rxeof(struct usbd_xfer *, void *, usbd_status); 194 void axe_txeof(struct usbd_xfer *, void *, usbd_status); 195 void axe_tick(void *); 196 void axe_tick_task(void *); 197 void axe_start(struct ifnet *); 198 int axe_ioctl(struct ifnet *, u_long, caddr_t); 199 void axe_init(void *); 200 void axe_stop(struct axe_softc *); 201 void axe_watchdog(struct ifnet *); 202 int axe_miibus_readreg(struct device *, int, int); 203 void axe_miibus_writereg(struct device *, int, int, int); 204 void axe_miibus_statchg(struct device *); 205 int axe_cmd(struct axe_softc *, int, int, int, void *); 206 int axe_ifmedia_upd(struct ifnet *); 207 void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 208 void axe_reset(struct axe_softc *sc); 209 210 void axe_iff(struct axe_softc *); 211 void axe_lock_mii(struct axe_softc *sc); 212 void axe_unlock_mii(struct axe_softc *sc); 213 214 void axe_ax88178_init(struct axe_softc *); 215 void axe_ax88772_init(struct axe_softc *); 216 217 /* Get exclusive access to the MII registers */ 218 void 219 axe_lock_mii(struct axe_softc *sc) 220 { 221 sc->axe_refcnt++; 222 rw_enter_write(&sc->axe_mii_lock); 223 } 224 225 void 226 axe_unlock_mii(struct axe_softc *sc) 227 { 228 rw_exit_write(&sc->axe_mii_lock); 229 if (--sc->axe_refcnt < 0) 230 usb_detach_wakeup(&sc->axe_dev); 231 } 232 233 int 234 axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf) 235 { 236 usb_device_request_t req; 237 usbd_status err; 238 239 if (usbd_is_dying(sc->axe_udev)) 240 return(0); 241 242 if (AXE_CMD_DIR(cmd)) 243 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 244 else 245 req.bmRequestType = UT_READ_VENDOR_DEVICE; 246 req.bRequest = AXE_CMD_CMD(cmd); 247 USETW(req.wValue, val); 248 USETW(req.wIndex, index); 249 USETW(req.wLength, AXE_CMD_LEN(cmd)); 250 251 err = usbd_do_request(sc->axe_udev, &req, buf); 252 253 if (err) { 254 DPRINTF(("axe_cmd err: cmd: %d\n", cmd)); 255 return(-1); 256 } 257 258 return(0); 259 } 260 261 int 262 axe_miibus_readreg(struct device *dev, int phy, int reg) 263 { 264 struct axe_softc *sc = (void *)dev; 265 usbd_status err; 266 uWord val; 267 int ival; 268 269 if (usbd_is_dying(sc->axe_udev)) { 270 DPRINTF(("axe: dying\n")); 271 return(0); 272 } 273 274 #ifdef notdef 275 /* 276 * The chip tells us the MII address of any supported 277 * PHYs attached to the chip, so only read from those. 278 */ 279 280 DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x\n", phy, reg)); 281 282 if (sc->axe_phyaddrs[0] != AXE_NOPHY && phy != sc->axe_phyaddrs[0]) 283 return (0); 284 285 if (sc->axe_phyaddrs[1] != AXE_NOPHY && phy != sc->axe_phyaddrs[1]) 286 return (0); 287 #endif 288 if (sc->axe_phyno != phy) 289 return (0); 290 291 USETW(val, 0); 292 293 axe_lock_mii(sc); 294 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 295 err = axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, val); 296 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 297 axe_unlock_mii(sc); 298 299 if (err) { 300 printf("axe%d: read PHY failed\n", sc->axe_unit); 301 return(-1); 302 } 303 DPRINTF(("axe_miibus_readreg: phy 0x%x reg 0x%x val 0x%x\n", 304 phy, reg, UGETW(val))); 305 306 ival = UGETW(val); 307 if ((sc->axe_flags & AX772) != 0 && reg == MII_BMSR) { 308 /* 309 * BMSR of AX88772 indicates that it supports extended 310 * capability but the extended status register is 311 * revered for embedded ethernet PHY. So clear the 312 * extended capability bit of BMSR. 313 */ 314 ival &= ~BMSR_EXTCAP; 315 } 316 317 return (ival); 318 } 319 320 void 321 axe_miibus_writereg(struct device *dev, int phy, int reg, int val) 322 { 323 struct axe_softc *sc = (void *)dev; 324 usbd_status err; 325 uWord uval; 326 327 if (usbd_is_dying(sc->axe_udev)) 328 return; 329 if (sc->axe_phyno != phy) 330 return; 331 332 USETW(uval, val); 333 334 axe_lock_mii(sc); 335 axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL); 336 err = axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, uval); 337 axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL); 338 axe_unlock_mii(sc); 339 340 if (err) { 341 printf("axe%d: write PHY failed\n", sc->axe_unit); 342 return; 343 } 344 } 345 346 void 347 axe_miibus_statchg(struct device *dev) 348 { 349 struct axe_softc *sc = (void *)dev; 350 struct mii_data *mii = GET_MII(sc); 351 struct ifnet *ifp; 352 int val, err; 353 354 ifp = GET_IFP(sc); 355 if (mii == NULL || ifp == NULL || 356 (ifp->if_flags & IFF_RUNNING) == 0) 357 return; 358 359 sc->axe_link = 0; 360 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 361 (IFM_ACTIVE | IFM_AVALID)) { 362 switch (IFM_SUBTYPE(mii->mii_media_active)) { 363 case IFM_10_T: 364 case IFM_100_TX: 365 sc->axe_link++; 366 break; 367 case IFM_1000_T: 368 if ((sc->axe_flags & AX178) == 0) 369 break; 370 sc->axe_link++; 371 break; 372 default: 373 break; 374 } 375 } 376 377 /* Lost link, do nothing. */ 378 if (sc->axe_link == 0) 379 return; 380 381 val = 0; 382 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) 383 val |= AXE_MEDIA_FULL_DUPLEX; 384 385 if (sc->axe_flags & AX178 || sc->axe_flags & AX772) { 386 val |= (AXE_178_MEDIA_RX_EN | AXE_178_MEDIA_MAGIC); 387 if (sc->axe_flags & AX178) 388 val |= AXE_178_MEDIA_ENCK; 389 390 switch (IFM_SUBTYPE(mii->mii_media_active)) { 391 case IFM_1000_T: 392 val |= AXE_178_MEDIA_GMII | AXE_178_MEDIA_ENCK; 393 break; 394 case IFM_100_TX: 395 val |= AXE_178_MEDIA_100TX; 396 break; 397 case IFM_10_T: 398 /* doesn't need to be handled */ 399 break; 400 } 401 } 402 403 DPRINTF(("axe_miibus_statchg: val=0x%x\n", val)); 404 err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL); 405 if (err) { 406 printf("%s: media change failed\n", sc->axe_dev.dv_xname); 407 return; 408 } 409 } 410 411 /* 412 * Set media options. 413 */ 414 int 415 axe_ifmedia_upd(struct ifnet *ifp) 416 { 417 struct axe_softc *sc = ifp->if_softc; 418 struct mii_data *mii = GET_MII(sc); 419 420 if (mii->mii_instance) { 421 struct mii_softc *miisc; 422 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 423 mii_phy_reset(miisc); 424 } 425 mii_mediachg(mii); 426 427 return (0); 428 } 429 430 /* 431 * Report current media status. 432 */ 433 void 434 axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 435 { 436 struct axe_softc *sc = ifp->if_softc; 437 struct mii_data *mii = GET_MII(sc); 438 439 mii_pollstat(mii); 440 ifmr->ifm_active = mii->mii_media_active; 441 ifmr->ifm_status = mii->mii_media_status; 442 } 443 444 void 445 axe_iff(struct axe_softc *sc) 446 { 447 struct ifnet *ifp = GET_IFP(sc); 448 struct arpcom *ac = &sc->arpcom; 449 struct ether_multi *enm; 450 struct ether_multistep step; 451 u_int32_t h = 0; 452 uWord urxmode; 453 u_int16_t rxmode; 454 u_int8_t hashtbl[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 455 456 if (usbd_is_dying(sc->axe_udev)) 457 return; 458 459 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, urxmode); 460 rxmode = UGETW(urxmode); 461 rxmode &= ~(AXE_RXCMD_ALLMULTI | AXE_RXCMD_MULTICAST | 462 AXE_RXCMD_PROMISC); 463 ifp->if_flags &= ~IFF_ALLMULTI; 464 465 /* 466 * Always accept broadcast frames. 467 * Always accept frames destined to our station address. 468 */ 469 rxmode |= AXE_RXCMD_BROADCAST; 470 if ((sc->axe_flags & (AX178 | AX772)) == 0) 471 rxmode |= AXE_172_RXCMD_UNICAST; 472 473 if (ifp->if_flags & IFF_PROMISC || ac->ac_multirangecnt > 0) { 474 ifp->if_flags |= IFF_ALLMULTI; 475 rxmode |= AXE_RXCMD_ALLMULTI; 476 if (ifp->if_flags & IFF_PROMISC) 477 rxmode |= AXE_RXCMD_PROMISC; 478 } else { 479 rxmode |= AXE_RXCMD_MULTICAST; 480 481 /* now program new ones */ 482 ETHER_FIRST_MULTI(step, ac, enm); 483 while (enm != NULL) { 484 h = ether_crc32_be(enm->enm_addrlo, 485 ETHER_ADDR_LEN) >> 26; 486 487 hashtbl[h / 8] |= 1 << (h % 8); 488 489 ETHER_NEXT_MULTI(step, enm); 490 } 491 } 492 493 axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl); 494 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 495 } 496 497 void 498 axe_reset(struct axe_softc *sc) 499 { 500 if (usbd_is_dying(sc->axe_udev)) 501 return; 502 /* XXX What to reset? */ 503 504 /* Wait a little while for the chip to get its brains in order. */ 505 DELAY(1000); 506 return; 507 } 508 509 #define AXE_GPIO_WRITE(x,y) do { \ 510 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, (x), NULL); \ 511 usbd_delay_ms(sc->axe_udev, (y)); \ 512 } while (0) 513 514 void 515 axe_ax88178_init(struct axe_softc *sc) 516 { 517 int gpio0 = 0, phymode = 0, ledmode; 518 u_int16_t eeprom, val; 519 520 axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL); 521 /* XXX magic */ 522 axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom); 523 axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL); 524 525 eeprom = letoh16(eeprom); 526 527 DPRINTF((" EEPROM is 0x%x\n", eeprom)); 528 529 /* if EEPROM is invalid we have to use to GPIO0 */ 530 if (eeprom == 0xffff) { 531 phymode = AXE_PHY_MODE_MARVELL; 532 gpio0 = 1; 533 ledmode = 0; 534 } else { 535 phymode = eeprom & 0x7f; 536 gpio0 = (eeprom & 0x80) ? 0 : 1; 537 ledmode = eeprom >> 8; 538 } 539 540 DPRINTF(("use gpio0: %d, phymode 0x%02x, eeprom 0x%04x\n", 541 gpio0, phymode, eeprom)); 542 543 /* power up external phy */ 544 AXE_GPIO_WRITE(AXE_GPIO1|AXE_GPIO1_EN | AXE_GPIO_RELOAD_EEPROM, 40); 545 if (ledmode == 1) { 546 AXE_GPIO_WRITE(AXE_GPIO1_EN, 30); 547 AXE_GPIO_WRITE(AXE_GPIO1_EN | AXE_GPIO1, 30); 548 } else { 549 val = gpio0 == 1 ? AXE_GPIO0 | AXE_GPIO0_EN : 550 AXE_GPIO1 | AXE_GPIO1_EN; 551 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, 30); 552 AXE_GPIO_WRITE(val | AXE_GPIO2_EN, 300); 553 AXE_GPIO_WRITE(val | AXE_GPIO2 | AXE_GPIO2_EN, 30); 554 } 555 556 /* initialize phy */ 557 if (phymode == AXE_PHY_MODE_REALTEK_8211CL) { 558 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x1f, 0x0005); 559 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x0c, 0x0000); 560 val = axe_miibus_readreg(&sc->axe_dev, sc->axe_phyno, 0x0001); 561 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x01, 562 val | 0x0080); 563 axe_miibus_writereg(&sc->axe_dev, sc->axe_phyno, 0x1f, 0x0000); 564 } 565 566 /* soft reset */ 567 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 568 usbd_delay_ms(sc->axe_udev, 150); 569 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 570 AXE_SW_RESET_PRL | AXE_178_RESET_MAGIC, NULL); 571 usbd_delay_ms(sc->axe_udev, 150); 572 /* Enable MII/GMII/RGMII for external PHY */ 573 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0, NULL); 574 usbd_delay_ms(sc->axe_udev, 10); 575 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 576 } 577 578 void 579 axe_ax88772_init(struct axe_softc *sc) 580 { 581 axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL); 582 usbd_delay_ms(sc->axe_udev, 40); 583 584 if (sc->axe_phyno == AXE_PHY_NO_AX772_EPHY) { 585 /* ask for the embedded PHY */ 586 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL); 587 usbd_delay_ms(sc->axe_udev, 10); 588 589 /* power down and reset state, pin reset state */ 590 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL); 591 usbd_delay_ms(sc->axe_udev, 60); 592 593 /* power down/reset state, pin operating state */ 594 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 595 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 596 usbd_delay_ms(sc->axe_udev, 150); 597 598 /* power up, reset */ 599 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL); 600 601 /* power up, operating */ 602 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 603 AXE_SW_RESET_IPRL | AXE_SW_RESET_PRL, NULL); 604 } else { 605 /* ask for external PHY */ 606 axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL); 607 usbd_delay_ms(sc->axe_udev, 10); 608 609 /* power down internal PHY */ 610 axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, 611 AXE_SW_RESET_IPPD | AXE_SW_RESET_PRL, NULL); 612 } 613 614 usbd_delay_ms(sc->axe_udev, 150); 615 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL); 616 } 617 618 static int 619 axe_get_phyno(struct axe_softc *sc, int sel) 620 { 621 int phyno = -1; 622 623 switch (AXE_PHY_TYPE(sc->axe_phyaddrs[sel])) { 624 case PHY_TYPE_100_HOME: 625 case PHY_TYPE_GIG: 626 phyno = AXE_PHY_NO(sc->axe_phyaddrs[sel]); 627 break; 628 case PHY_TYPE_SPECIAL: 629 /* FALLTHROUGH */ 630 case PHY_TYPE_RSVD: 631 /* FALLTHROUGH */ 632 case PHY_TYPE_NON_SUP: 633 /* FALLTHROUGH */ 634 default: 635 break; 636 } 637 638 return (phyno); 639 } 640 641 /* 642 * Probe for a AX88172 chip. 643 */ 644 int 645 axe_match(struct device *parent, void *match, void *aux) 646 { 647 struct usb_attach_arg *uaa = aux; 648 649 if (!uaa->iface) 650 return(UMATCH_NONE); 651 652 return (axe_lookup(uaa->vendor, uaa->product) != NULL ? 653 UMATCH_VENDOR_PRODUCT : UMATCH_NONE); 654 } 655 656 /* 657 * Attach the interface. Allocate softc structures, do ifmedia 658 * setup and ethernet/BPF attach. 659 */ 660 void 661 axe_attach(struct device *parent, struct device *self, void *aux) 662 { 663 struct axe_softc *sc = (struct axe_softc *)self; 664 struct usb_attach_arg *uaa = aux; 665 struct usbd_device *dev = uaa->device; 666 usbd_status err; 667 usb_interface_descriptor_t *id; 668 usb_endpoint_descriptor_t *ed; 669 struct mii_data *mii; 670 u_char eaddr[ETHER_ADDR_LEN]; 671 char *devname = sc->axe_dev.dv_xname; 672 struct ifnet *ifp; 673 int i, s; 674 675 sc->axe_unit = self->dv_unit; /*device_get_unit(self);*/ 676 sc->axe_udev = dev; 677 678 err = usbd_set_config_no(dev, AXE_CONFIG_NO, 1); 679 if (err) { 680 printf("%s: getting interface handle failed\n", 681 sc->axe_dev.dv_xname); 682 return; 683 } 684 685 sc->axe_flags = axe_lookup(uaa->vendor, uaa->product)->axe_flags; 686 687 usb_init_task(&sc->axe_tick_task, axe_tick_task, sc, 688 USB_TASK_TYPE_GENERIC); 689 rw_init(&sc->axe_mii_lock, "axemii"); 690 usb_init_task(&sc->axe_stop_task, (void (*)(void *))axe_stop, sc, 691 USB_TASK_TYPE_GENERIC); 692 693 err = usbd_device2interface_handle(dev, AXE_IFACE_IDX, &sc->axe_iface); 694 if (err) { 695 printf("%s: getting interface handle failed\n", 696 sc->axe_dev.dv_xname); 697 return; 698 } 699 700 sc->axe_product = uaa->product; 701 sc->axe_vendor = uaa->vendor; 702 703 id = usbd_get_interface_descriptor(sc->axe_iface); 704 705 /* decide on what our bufsize will be */ 706 if (sc->axe_flags & (AX178 | AX772)) 707 sc->axe_bufsz = (sc->axe_udev->speed == USB_SPEED_HIGH) ? 708 AXE_178_MAX_BUFSZ : AXE_178_MIN_BUFSZ; 709 else 710 sc->axe_bufsz = AXE_172_BUFSZ; 711 712 /* Find endpoints. */ 713 for (i = 0; i < id->bNumEndpoints; i++) { 714 ed = usbd_interface2endpoint_descriptor(sc->axe_iface, i); 715 if (!ed) { 716 printf("%s: couldn't get ep %d\n", 717 sc->axe_dev.dv_xname, i); 718 return; 719 } 720 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 721 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 722 sc->axe_ed[AXE_ENDPT_RX] = ed->bEndpointAddress; 723 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 724 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) { 725 sc->axe_ed[AXE_ENDPT_TX] = ed->bEndpointAddress; 726 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 727 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) { 728 sc->axe_ed[AXE_ENDPT_INTR] = ed->bEndpointAddress; 729 } 730 } 731 732 s = splnet(); 733 734 /* We need the PHYID for init dance in some cases */ 735 axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, (void *)&sc->axe_phyaddrs); 736 737 DPRINTF((" phyaddrs[0]: %x phyaddrs[1]: %x\n", 738 sc->axe_phyaddrs[0], sc->axe_phyaddrs[1])); 739 740 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_PRI); 741 if (sc->axe_phyno == -1) 742 sc->axe_phyno = axe_get_phyno(sc, AXE_PHY_SEL_SEC); 743 if (sc->axe_phyno == -1) { 744 printf("%s:", sc->axe_dev.dv_xname); 745 printf(" no valid PHY address found, assuming PHY address 0\n"); 746 sc->axe_phyno = 0; 747 } 748 749 DPRINTF((" get_phyno %d\n", sc->axe_phyno)); 750 751 if (sc->axe_flags & AX178) 752 axe_ax88178_init(sc); 753 else if (sc->axe_flags & AX772) 754 axe_ax88772_init(sc); 755 756 /* 757 * Get station address. 758 */ 759 if (sc->axe_flags & (AX178 | AX772)) 760 axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, &eaddr); 761 else 762 axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, &eaddr); 763 764 /* 765 * Load IPG values 766 */ 767 axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, (void *)&sc->axe_ipgs); 768 769 /* 770 * An ASIX chip was detected. Inform the world. 771 */ 772 printf("%s:", sc->axe_dev.dv_xname); 773 if (sc->axe_flags & AX178) 774 printf(" AX88178"); 775 else if (sc->axe_flags & AX772B) 776 printf(" AX88772B"); 777 else if (sc->axe_flags & AX772) 778 printf(" AX88772"); 779 else 780 printf(" AX88172"); 781 printf(", address %s\n", ether_sprintf(eaddr)); 782 783 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); 784 785 /* Initialize interface info.*/ 786 ifp = &sc->arpcom.ac_if; 787 ifp->if_softc = sc; 788 strlcpy(ifp->if_xname, devname, IFNAMSIZ); 789 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 790 ifp->if_ioctl = axe_ioctl; 791 ifp->if_start = axe_start; 792 ifp->if_watchdog = axe_watchdog; 793 IFQ_SET_READY(&ifp->if_snd); 794 795 ifp->if_capabilities = IFCAP_VLAN_MTU; 796 797 /* Initialize MII/media info. */ 798 mii = &sc->axe_mii; 799 mii->mii_ifp = ifp; 800 mii->mii_readreg = axe_miibus_readreg; 801 mii->mii_writereg = axe_miibus_writereg; 802 mii->mii_statchg = axe_miibus_statchg; 803 mii->mii_flags = MIIF_AUTOTSLEEP; 804 805 ifmedia_init(&mii->mii_media, 0, axe_ifmedia_upd, axe_ifmedia_sts); 806 mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 807 808 if (LIST_FIRST(&mii->mii_phys) == NULL) { 809 ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL); 810 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE); 811 } else 812 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO); 813 814 /* Attach the interface. */ 815 if_attach(ifp); 816 ether_ifattach(ifp); 817 818 timeout_set(&sc->axe_stat_ch, axe_tick, sc); 819 820 splx(s); 821 } 822 823 int 824 axe_detach(struct device *self, int flags) 825 { 826 struct axe_softc *sc = (struct axe_softc *)self; 827 int s; 828 struct ifnet *ifp = GET_IFP(sc); 829 830 DPRINTFN(2,("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__)); 831 832 if (timeout_initialized(&sc->axe_stat_ch)) 833 timeout_del(&sc->axe_stat_ch); 834 835 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) 836 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]); 837 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) 838 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]); 839 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) 840 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 841 842 /* 843 * Remove any pending tasks. They cannot be executing because they run 844 * in the same thread as detach. 845 */ 846 usb_rem_task(sc->axe_udev, &sc->axe_tick_task); 847 usb_rem_task(sc->axe_udev, &sc->axe_stop_task); 848 849 s = splusb(); 850 851 if (--sc->axe_refcnt >= 0) { 852 /* Wait for processes to go away */ 853 usb_detach_wait(&sc->axe_dev); 854 } 855 856 if (ifp->if_flags & IFF_RUNNING) 857 axe_stop(sc); 858 859 mii_detach(&sc->axe_mii, MII_PHY_ANY, MII_OFFSET_ANY); 860 ifmedia_delete_instance(&sc->axe_mii.mii_media, IFM_INST_ANY); 861 if (ifp->if_softc != NULL) { 862 ether_ifdetach(ifp); 863 if_detach(ifp); 864 } 865 866 #ifdef DIAGNOSTIC 867 if (sc->axe_ep[AXE_ENDPT_TX] != NULL || 868 sc->axe_ep[AXE_ENDPT_RX] != NULL || 869 sc->axe_ep[AXE_ENDPT_INTR] != NULL) 870 printf("%s: detach has active endpoints\n", 871 sc->axe_dev.dv_xname); 872 #endif 873 874 if (--sc->axe_refcnt >= 0) { 875 /* Wait for processes to go away. */ 876 usb_detach_wait(&sc->axe_dev); 877 } 878 splx(s); 879 880 return (0); 881 } 882 883 struct mbuf * 884 axe_newbuf(void) 885 { 886 struct mbuf *m; 887 888 MGETHDR(m, M_DONTWAIT, MT_DATA); 889 if (m == NULL) 890 return (NULL); 891 892 MCLGET(m, M_DONTWAIT); 893 if (!(m->m_flags & M_EXT)) { 894 m_freem(m); 895 return (NULL); 896 } 897 898 m->m_len = m->m_pkthdr.len = MCLBYTES; 899 m_adj(m, ETHER_ALIGN); 900 901 return (m); 902 } 903 904 int 905 axe_rx_list_init(struct axe_softc *sc) 906 { 907 struct axe_cdata *cd; 908 struct axe_chain *c; 909 int i; 910 911 DPRINTF(("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__)); 912 913 cd = &sc->axe_cdata; 914 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 915 c = &cd->axe_rx_chain[i]; 916 c->axe_sc = sc; 917 c->axe_idx = i; 918 c->axe_mbuf = NULL; 919 if (c->axe_xfer == NULL) { 920 c->axe_xfer = usbd_alloc_xfer(sc->axe_udev); 921 if (c->axe_xfer == NULL) 922 return (ENOBUFS); 923 c->axe_buf = usbd_alloc_buffer(c->axe_xfer, 924 sc->axe_bufsz); 925 if (c->axe_buf == NULL) { 926 usbd_free_xfer(c->axe_xfer); 927 return (ENOBUFS); 928 } 929 } 930 } 931 932 return (0); 933 } 934 935 int 936 axe_tx_list_init(struct axe_softc *sc) 937 { 938 struct axe_cdata *cd; 939 struct axe_chain *c; 940 int i; 941 942 DPRINTF(("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__)); 943 944 cd = &sc->axe_cdata; 945 for (i = 0; i < AXE_TX_LIST_CNT; i++) { 946 c = &cd->axe_tx_chain[i]; 947 c->axe_sc = sc; 948 c->axe_idx = i; 949 c->axe_mbuf = NULL; 950 if (c->axe_xfer == NULL) { 951 c->axe_xfer = usbd_alloc_xfer(sc->axe_udev); 952 if (c->axe_xfer == NULL) 953 return (ENOBUFS); 954 c->axe_buf = usbd_alloc_buffer(c->axe_xfer, 955 sc->axe_bufsz); 956 if (c->axe_buf == NULL) { 957 usbd_free_xfer(c->axe_xfer); 958 return (ENOBUFS); 959 } 960 } 961 } 962 963 return (0); 964 } 965 966 /* 967 * A frame has been uploaded: pass the resulting mbuf chain up to 968 * the higher level protocols. 969 */ 970 void 971 axe_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 972 { 973 struct axe_chain *c = (struct axe_chain *)priv; 974 struct axe_softc *sc = c->axe_sc; 975 struct ifnet *ifp = GET_IFP(sc); 976 u_char *buf = c->axe_buf; 977 u_int32_t total_len; 978 u_int16_t pktlen = 0; 979 struct mbuf *m; 980 struct axe_sframe_hdr hdr; 981 int s; 982 983 DPRINTFN(10,("%s: %s: enter\n", sc->axe_dev.dv_xname,__func__)); 984 985 if (usbd_is_dying(sc->axe_udev)) 986 return; 987 988 if (!(ifp->if_flags & IFF_RUNNING)) 989 return; 990 991 if (status != USBD_NORMAL_COMPLETION) { 992 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 993 return; 994 if (usbd_ratecheck(&sc->axe_rx_notice)) { 995 printf("%s: usb errors on rx: %s\n", 996 sc->axe_dev.dv_xname, usbd_errstr(status)); 997 } 998 if (status == USBD_STALLED) 999 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_RX]); 1000 goto done; 1001 } 1002 1003 usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL); 1004 1005 do { 1006 if (sc->axe_flags & (AX178 | AX772)) { 1007 if (total_len < sizeof(hdr)) { 1008 ifp->if_ierrors++; 1009 goto done; 1010 } 1011 1012 buf += pktlen; 1013 1014 memcpy(&hdr, buf, sizeof(hdr)); 1015 total_len -= sizeof(hdr); 1016 1017 if (((letoh16(hdr.len) & AXE_RH1M_RXLEN_MASK) ^ 1018 (letoh16(hdr.ilen) & AXE_RH1M_RXLEN_MASK)) != 1019 AXE_RH1M_RXLEN_MASK) { 1020 ifp->if_ierrors++; 1021 goto done; 1022 } 1023 pktlen = letoh16(hdr.len) & AXE_RH1M_RXLEN_MASK; 1024 if (pktlen > total_len) { 1025 ifp->if_ierrors++; 1026 goto done; 1027 } 1028 1029 buf += sizeof(hdr); 1030 1031 if ((pktlen % 2) != 0) 1032 pktlen++; 1033 1034 if (total_len < pktlen) 1035 total_len = 0; 1036 else 1037 total_len -= pktlen; 1038 } else { 1039 pktlen = total_len; /* crc on the end? */ 1040 total_len = 0; 1041 } 1042 1043 m = axe_newbuf(); 1044 if (m == NULL) { 1045 ifp->if_ierrors++; 1046 goto done; 1047 } 1048 1049 ifp->if_ipackets++; 1050 m->m_pkthdr.rcvif = ifp; 1051 m->m_pkthdr.len = m->m_len = pktlen; 1052 1053 memcpy(mtod(m, char *), buf, pktlen); 1054 1055 /* push the packet up */ 1056 s = splnet(); 1057 #if NBPFILTER > 0 1058 if (ifp->if_bpf) 1059 bpf_mtap(ifp->if_bpf, m, BPF_DIRECTION_IN); 1060 #endif 1061 1062 ether_input_mbuf(ifp, m); 1063 1064 splx(s); 1065 1066 } while (total_len > 0); 1067 1068 done: 1069 memset(c->axe_buf, 0, sc->axe_bufsz); 1070 1071 /* Setup new transfer. */ 1072 usbd_setup_xfer(xfer, sc->axe_ep[AXE_ENDPT_RX], 1073 c, c->axe_buf, sc->axe_bufsz, 1074 USBD_SHORT_XFER_OK | USBD_NO_COPY, 1075 USBD_NO_TIMEOUT, axe_rxeof); 1076 usbd_transfer(xfer); 1077 1078 DPRINTFN(10,("%s: %s: start rx\n", sc->axe_dev.dv_xname, __func__)); 1079 1080 return; 1081 } 1082 1083 /* 1084 * A frame was downloaded to the chip. It's safe for us to clean up 1085 * the list buffers. 1086 */ 1087 1088 void 1089 axe_txeof(struct usbd_xfer *xfer, void *priv, usbd_status status) 1090 { 1091 struct axe_softc *sc; 1092 struct axe_chain *c; 1093 struct ifnet *ifp; 1094 int s; 1095 1096 c = priv; 1097 sc = c->axe_sc; 1098 ifp = &sc->arpcom.ac_if; 1099 1100 if (usbd_is_dying(sc->axe_udev)) 1101 return; 1102 1103 s = splnet(); 1104 1105 if (status != USBD_NORMAL_COMPLETION) { 1106 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) { 1107 splx(s); 1108 return; 1109 } 1110 ifp->if_oerrors++; 1111 printf("axe%d: usb error on tx: %s\n", sc->axe_unit, 1112 usbd_errstr(status)); 1113 if (status == USBD_STALLED) 1114 usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_TX]); 1115 splx(s); 1116 return; 1117 } 1118 1119 ifp->if_timer = 0; 1120 ifp->if_flags &= ~IFF_OACTIVE; 1121 1122 m_freem(c->axe_mbuf); 1123 c->axe_mbuf = NULL; 1124 1125 if (IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1126 axe_start(ifp); 1127 1128 ifp->if_opackets++; 1129 splx(s); 1130 return; 1131 } 1132 1133 void 1134 axe_tick(void *xsc) 1135 { 1136 struct axe_softc *sc = xsc; 1137 1138 if (sc == NULL) 1139 return; 1140 1141 DPRINTFN(0xff, ("%s: %s: enter\n", sc->axe_dev.dv_xname, 1142 __func__)); 1143 1144 if (usbd_is_dying(sc->axe_udev)) 1145 return; 1146 1147 /* Perform periodic stuff in process context */ 1148 usb_add_task(sc->axe_udev, &sc->axe_tick_task); 1149 1150 } 1151 1152 void 1153 axe_tick_task(void *xsc) 1154 { 1155 int s; 1156 struct axe_softc *sc; 1157 struct ifnet *ifp; 1158 struct mii_data *mii; 1159 1160 sc = xsc; 1161 1162 if (sc == NULL) 1163 return; 1164 1165 if (usbd_is_dying(sc->axe_udev)) 1166 return; 1167 1168 ifp = GET_IFP(sc); 1169 mii = GET_MII(sc); 1170 if (mii == NULL) 1171 return; 1172 1173 s = splnet(); 1174 1175 mii_tick(mii); 1176 if (sc->axe_link == 0) 1177 axe_miibus_statchg(&sc->axe_dev); 1178 timeout_add_sec(&sc->axe_stat_ch, 1); 1179 1180 splx(s); 1181 } 1182 1183 int 1184 axe_encap(struct axe_softc *sc, struct mbuf *m, int idx) 1185 { 1186 struct axe_chain *c; 1187 usbd_status err; 1188 struct axe_sframe_hdr hdr; 1189 int length, boundary; 1190 1191 c = &sc->axe_cdata.axe_tx_chain[idx]; 1192 1193 if (sc->axe_flags & (AX178 | AX772)) { 1194 boundary = (sc->axe_udev->speed == USB_SPEED_HIGH) ? 512 : 64; 1195 1196 hdr.len = htole16(m->m_pkthdr.len); 1197 hdr.ilen = ~hdr.len; 1198 1199 memcpy(c->axe_buf, &hdr, sizeof(hdr)); 1200 length = sizeof(hdr); 1201 1202 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf + length); 1203 length += m->m_pkthdr.len; 1204 1205 if ((length % boundary) == 0) { 1206 hdr.len = 0x0000; 1207 hdr.ilen = 0xffff; 1208 memcpy(c->axe_buf + length, &hdr, sizeof(hdr)); 1209 length += sizeof(hdr); 1210 } 1211 1212 } else { 1213 m_copydata(m, 0, m->m_pkthdr.len, c->axe_buf); 1214 length = m->m_pkthdr.len; 1215 } 1216 1217 c->axe_mbuf = m; 1218 1219 usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_TX], 1220 c, c->axe_buf, length, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, 1221 10000, axe_txeof); 1222 1223 /* Transmit */ 1224 err = usbd_transfer(c->axe_xfer); 1225 if (err != USBD_IN_PROGRESS) { 1226 axe_stop(sc); 1227 return(EIO); 1228 } 1229 1230 sc->axe_cdata.axe_tx_cnt++; 1231 1232 return(0); 1233 } 1234 1235 void 1236 axe_start(struct ifnet *ifp) 1237 { 1238 struct axe_softc *sc; 1239 struct mbuf *m_head = NULL; 1240 1241 sc = ifp->if_softc; 1242 1243 if (!sc->axe_link) 1244 return; 1245 1246 if (ifp->if_flags & IFF_OACTIVE) 1247 return; 1248 1249 IFQ_POLL(&ifp->if_snd, m_head); 1250 if (m_head == NULL) 1251 return; 1252 1253 if (axe_encap(sc, m_head, 0)) { 1254 ifp->if_flags |= IFF_OACTIVE; 1255 return; 1256 } 1257 IFQ_DEQUEUE(&ifp->if_snd, m_head); 1258 1259 /* 1260 * If there's a BPF listener, bounce a copy of this frame 1261 * to him. 1262 */ 1263 #if NBPFILTER > 0 1264 if (ifp->if_bpf) 1265 bpf_mtap(ifp->if_bpf, m_head, BPF_DIRECTION_OUT); 1266 #endif 1267 1268 ifp->if_flags |= IFF_OACTIVE; 1269 1270 /* 1271 * Set a timeout in case the chip goes out to lunch. 1272 */ 1273 ifp->if_timer = 5; 1274 1275 return; 1276 } 1277 1278 void 1279 axe_init(void *xsc) 1280 { 1281 struct axe_softc *sc = xsc; 1282 struct ifnet *ifp = &sc->arpcom.ac_if; 1283 struct axe_chain *c; 1284 usbd_status err; 1285 uWord urxmode; 1286 int rxmode; 1287 int i, s; 1288 1289 s = splnet(); 1290 1291 /* 1292 * Cancel pending I/O and free all RX/TX buffers. 1293 */ 1294 axe_reset(sc); 1295 1296 /* set MAC address */ 1297 if (sc->axe_flags & (AX178 | AX772)) 1298 axe_cmd(sc, AXE_178_CMD_WRITE_NODEID, 0, 0, 1299 &sc->arpcom.ac_enaddr); 1300 1301 /* Enable RX logic. */ 1302 1303 /* Init RX ring. */ 1304 if (axe_rx_list_init(sc) == ENOBUFS) { 1305 printf("axe%d: rx list init failed\n", sc->axe_unit); 1306 splx(s); 1307 return; 1308 } 1309 1310 /* Init TX ring. */ 1311 if (axe_tx_list_init(sc) == ENOBUFS) { 1312 printf("axe%d: tx list init failed\n", sc->axe_unit); 1313 splx(s); 1314 return; 1315 } 1316 1317 /* Set transmitter IPG values */ 1318 if (sc->axe_flags & (AX178 | AX772)) 1319 axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->axe_ipgs[2], 1320 (sc->axe_ipgs[1] << 8) | (sc->axe_ipgs[0]), NULL); 1321 else { 1322 axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->axe_ipgs[0], NULL); 1323 axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->axe_ipgs[1], NULL); 1324 axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->axe_ipgs[2], NULL); 1325 } 1326 1327 /* Program promiscuous mode and multicast filters. */ 1328 axe_iff(sc); 1329 1330 /* Enable receiver, set RX mode */ 1331 axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, urxmode); 1332 rxmode = UGETW(urxmode); 1333 rxmode |= AXE_RXCMD_ENABLE; 1334 if (sc->axe_flags & AX772B) 1335 rxmode |= AXE_772B_RXCMD_RH1M; 1336 else if (sc->axe_flags & (AX178 | AX772)) { 1337 if (sc->axe_udev->speed == USB_SPEED_HIGH) { 1338 /* largest possible USB buffer size for AX88178 */ 1339 rxmode |= AXE_178_RXCMD_MFB; 1340 } 1341 } 1342 axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL); 1343 1344 /* Open RX and TX pipes. */ 1345 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_RX], 1346 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_RX]); 1347 if (err) { 1348 printf("axe%d: open rx pipe failed: %s\n", 1349 sc->axe_unit, usbd_errstr(err)); 1350 splx(s); 1351 return; 1352 } 1353 1354 err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_TX], 1355 USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_TX]); 1356 if (err) { 1357 printf("axe%d: open tx pipe failed: %s\n", 1358 sc->axe_unit, usbd_errstr(err)); 1359 splx(s); 1360 return; 1361 } 1362 1363 /* Start up the receive pipe. */ 1364 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 1365 c = &sc->axe_cdata.axe_rx_chain[i]; 1366 usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_RX], 1367 c, c->axe_buf, sc->axe_bufsz, 1368 USBD_SHORT_XFER_OK | USBD_NO_COPY, 1369 USBD_NO_TIMEOUT, axe_rxeof); 1370 usbd_transfer(c->axe_xfer); 1371 } 1372 1373 sc->axe_link = 0; 1374 ifp->if_flags |= IFF_RUNNING; 1375 ifp->if_flags &= ~IFF_OACTIVE; 1376 1377 splx(s); 1378 1379 timeout_add_sec(&sc->axe_stat_ch, 1); 1380 return; 1381 } 1382 1383 int 1384 axe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1385 { 1386 struct axe_softc *sc = ifp->if_softc; 1387 struct ifreq *ifr = (struct ifreq *)data; 1388 struct ifaddr *ifa = (struct ifaddr *)data; 1389 int s, error = 0; 1390 1391 s = splnet(); 1392 1393 switch(cmd) { 1394 case SIOCSIFADDR: 1395 ifp->if_flags |= IFF_UP; 1396 if (!(ifp->if_flags & IFF_RUNNING)) 1397 axe_init(sc); 1398 #ifdef INET 1399 if (ifa->ifa_addr->sa_family == AF_INET) 1400 arp_ifinit(&sc->arpcom, ifa); 1401 #endif 1402 break; 1403 1404 case SIOCSIFFLAGS: 1405 if (ifp->if_flags & IFF_UP) { 1406 if (ifp->if_flags & IFF_RUNNING) 1407 error = ENETRESET; 1408 else 1409 axe_init(sc); 1410 } else { 1411 if (ifp->if_flags & IFF_RUNNING) 1412 axe_stop(sc); 1413 } 1414 break; 1415 1416 case SIOCGIFMEDIA: 1417 case SIOCSIFMEDIA: 1418 error = ifmedia_ioctl(ifp, ifr, &sc->axe_mii.mii_media, cmd); 1419 break; 1420 1421 default: 1422 error = ether_ioctl(ifp, &sc->arpcom, cmd, data); 1423 } 1424 1425 if (error == ENETRESET) { 1426 if (ifp->if_flags & IFF_RUNNING) 1427 axe_iff(sc); 1428 error = 0; 1429 } 1430 1431 splx(s); 1432 return(error); 1433 } 1434 1435 void 1436 axe_watchdog(struct ifnet *ifp) 1437 { 1438 struct axe_softc *sc; 1439 struct axe_chain *c; 1440 usbd_status stat; 1441 int s; 1442 1443 sc = ifp->if_softc; 1444 1445 ifp->if_oerrors++; 1446 printf("axe%d: watchdog timeout\n", sc->axe_unit); 1447 1448 s = splusb(); 1449 c = &sc->axe_cdata.axe_tx_chain[0]; 1450 usbd_get_xfer_status(c->axe_xfer, NULL, NULL, NULL, &stat); 1451 axe_txeof(c->axe_xfer, c, stat); 1452 1453 if (!IFQ_IS_EMPTY(&ifp->if_snd)) 1454 axe_start(ifp); 1455 splx(s); 1456 } 1457 1458 /* 1459 * Stop the adapter and free any mbufs allocated to the 1460 * RX and TX lists. 1461 */ 1462 void 1463 axe_stop(struct axe_softc *sc) 1464 { 1465 usbd_status err; 1466 struct ifnet *ifp; 1467 int i; 1468 1469 axe_reset(sc); 1470 1471 ifp = &sc->arpcom.ac_if; 1472 ifp->if_timer = 0; 1473 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1474 1475 timeout_del(&sc->axe_stat_ch); 1476 1477 /* Stop transfers. */ 1478 if (sc->axe_ep[AXE_ENDPT_RX] != NULL) { 1479 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]); 1480 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_RX]); 1481 if (err) { 1482 printf("axe%d: close rx pipe failed: %s\n", 1483 sc->axe_unit, usbd_errstr(err)); 1484 } 1485 sc->axe_ep[AXE_ENDPT_RX] = NULL; 1486 } 1487 1488 if (sc->axe_ep[AXE_ENDPT_TX] != NULL) { 1489 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]); 1490 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_TX]); 1491 if (err) { 1492 printf("axe%d: close tx pipe failed: %s\n", 1493 sc->axe_unit, usbd_errstr(err)); 1494 } 1495 sc->axe_ep[AXE_ENDPT_TX] = NULL; 1496 } 1497 1498 if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) { 1499 usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 1500 err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_INTR]); 1501 if (err) { 1502 printf("axe%d: close intr pipe failed: %s\n", 1503 sc->axe_unit, usbd_errstr(err)); 1504 } 1505 sc->axe_ep[AXE_ENDPT_INTR] = NULL; 1506 } 1507 1508 /* Free RX resources. */ 1509 for (i = 0; i < AXE_RX_LIST_CNT; i++) { 1510 if (sc->axe_cdata.axe_rx_chain[i].axe_mbuf != NULL) { 1511 m_freem(sc->axe_cdata.axe_rx_chain[i].axe_mbuf); 1512 sc->axe_cdata.axe_rx_chain[i].axe_mbuf = NULL; 1513 } 1514 if (sc->axe_cdata.axe_rx_chain[i].axe_xfer != NULL) { 1515 usbd_free_xfer(sc->axe_cdata.axe_rx_chain[i].axe_xfer); 1516 sc->axe_cdata.axe_rx_chain[i].axe_xfer = NULL; 1517 } 1518 } 1519 1520 /* Free TX resources. */ 1521 for (i = 0; i < AXE_TX_LIST_CNT; i++) { 1522 if (sc->axe_cdata.axe_tx_chain[i].axe_mbuf != NULL) { 1523 m_freem(sc->axe_cdata.axe_tx_chain[i].axe_mbuf); 1524 sc->axe_cdata.axe_tx_chain[i].axe_mbuf = NULL; 1525 } 1526 if (sc->axe_cdata.axe_tx_chain[i].axe_xfer != NULL) { 1527 usbd_free_xfer(sc->axe_cdata.axe_tx_chain[i].axe_xfer); 1528 sc->axe_cdata.axe_tx_chain[i].axe_xfer = NULL; 1529 } 1530 } 1531 1532 sc->axe_link = 0; 1533 } 1534 1535