1 /* $OpenBSD: ehcivar.h,v 1.22 2012/05/12 17:39:51 mpi Exp $ */ 2 /* $NetBSD: ehcivar.h,v 1.19 2005/04/29 15:04:29 augustss Exp $ */ 3 4 /* 5 * Copyright (c) 2001 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net). 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 typedef struct ehci_soft_qtd { 34 ehci_qtd_t qtd; 35 struct ehci_soft_qtd *nextqtd; /* mirrors nextqtd in TD */ 36 ehci_physaddr_t physaddr; 37 usb_dma_t dma; /* qTD's DMA infos */ 38 int offs; /* qTD's offset in usb_dma_t */ 39 LIST_ENTRY(ehci_soft_qtd) hnext; 40 u_int16_t len; 41 } ehci_soft_qtd_t; 42 #define EHCI_SQTD_SIZE ((sizeof (struct ehci_soft_qtd) + EHCI_QTD_ALIGN - 1) / EHCI_QTD_ALIGN * EHCI_QTD_ALIGN) 43 #define EHCI_SQTD_CHUNK (EHCI_PAGE_SIZE / EHCI_SQTD_SIZE) 44 45 typedef struct ehci_soft_qh { 46 ehci_qh_t qh; 47 struct ehci_soft_qh *next; 48 struct ehci_soft_qh *prev; 49 struct ehci_soft_qtd *sqtd; 50 ehci_physaddr_t physaddr; 51 usb_dma_t dma; /* QH's DMA infos */ 52 int offs; /* QH's offset in usb_dma_t */ 53 int islot; 54 } ehci_soft_qh_t; 55 #define EHCI_SQH_SIZE ((sizeof (struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN) 56 #define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE) 57 58 typedef struct ehci_soft_itd { 59 ehci_itd_t itd; 60 union { 61 struct { 62 /* soft_itds links in a periodic frame*/ 63 struct ehci_soft_itd *next; 64 struct ehci_soft_itd *prev; 65 } frame_list; 66 /* circular list of free itds */ 67 LIST_ENTRY(ehci_soft_itd) free_list; 68 } u; 69 struct ehci_soft_itd *xfer_next; /* Next soft_itd in xfer */ 70 ehci_physaddr_t physaddr; 71 usb_dma_t dma; 72 int offs; 73 int slot; 74 struct timeval t; /* store free time */ 75 } ehci_soft_itd_t; 76 #define EHCI_ITD_SIZE ((sizeof(struct ehci_soft_itd) + EHCI_QH_ALIGN - 1) / EHCI_ITD_ALIGN * EHCI_ITD_ALIGN) 77 #define EHCI_ITD_CHUNK (EHCI_PAGE_SIZE / EHCI_ITD_SIZE) 78 79 struct ehci_xfer { 80 struct usbd_xfer xfer; 81 struct usb_task abort_task; 82 TAILQ_ENTRY(ehci_xfer) inext; /* list of active xfers */ 83 ehci_soft_qtd_t *sqtdstart; 84 ehci_soft_qtd_t *sqtdend; 85 ehci_soft_itd_t *itdstart; 86 ehci_soft_itd_t *itdend; 87 u_int isoc_len; 88 u_int32_t ehci_xfer_flags; 89 #ifdef DIAGNOSTIC 90 int isdone; 91 #endif 92 }; 93 #define EHCI_XFER_ABORTING 0x0001 /* xfer is aborting. */ 94 #define EHCI_XFER_ABORTWAIT 0x0002 /* abort completion is being awaited. */ 95 96 #define EXFER(xfer) ((struct ehci_xfer *)(xfer)) 97 98 /* Information about an entry in the interrupt list. */ 99 struct ehci_soft_islot { 100 ehci_soft_qh_t *sqh; /* Queue Head. */ 101 }; 102 103 #define EHCI_FRAMELIST_MAXCOUNT 1024 104 #define EHCI_IPOLLRATES 8 /* Poll rates (1ms, 2, 4, 8 .. 128) */ 105 #define EHCI_INTRQHS ((1 << EHCI_IPOLLRATES) - 1) 106 #define EHCI_IQHIDX(lev, pos) \ 107 ((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1) 108 #define EHCI_ILEV_IVAL(lev) (1 << (lev)) 109 110 111 #define EHCI_HASH_SIZE 128 112 #define EHCI_COMPANION_MAX 8 113 114 #define EHCI_FREE_LIST_INTERVAL 100 115 116 typedef struct ehci_softc { 117 struct usbd_bus sc_bus; /* base device */ 118 bus_space_tag_t iot; 119 bus_space_handle_t ioh; 120 bus_size_t sc_size; 121 u_int sc_offs; /* offset to operational regs */ 122 int sc_flags; /* misc flags */ 123 #define EHCIF_DROPPED_INTR_WORKAROUND 0x01 124 125 char sc_vendor[16]; /* vendor string for root hub */ 126 int sc_id_vendor; /* vendor ID for root hub */ 127 128 u_int32_t sc_cmd; /* shadow of cmd reg during suspend */ 129 void *sc_shutdownhook; /* cookie from shutdown hook */ 130 131 usb_dma_t sc_fldma; 132 ehci_link_t *sc_flist; 133 u_int sc_flsize; 134 u_int sc_rand; /* XXX need proper intr scheduling */ 135 136 struct ehci_soft_islot sc_islots[EHCI_INTRQHS]; 137 138 /* jcmm - an array matching sc_flist, but with software pointers, 139 * not hardware address pointers 140 */ 141 struct ehci_soft_itd **sc_softitds; 142 143 TAILQ_HEAD(, ehci_xfer) sc_intrhead; 144 145 ehci_soft_qh_t *sc_freeqhs; 146 ehci_soft_qtd_t *sc_freeqtds; 147 LIST_HEAD(sc_freeitds, ehci_soft_itd) sc_freeitds; 148 149 int sc_noport; 150 u_int8_t sc_addr; /* device address */ 151 u_int8_t sc_conf; /* device configuration */ 152 usbd_xfer_handle sc_intrxfer; 153 char sc_isreset; 154 char sc_softwake; 155 156 u_int32_t sc_eintrs; 157 ehci_soft_qh_t *sc_async_head; 158 159 SIMPLEQ_HEAD(, usbd_xfer) sc_free_xfers; /* free xfers */ 160 161 struct rwlock sc_doorbell_lock; 162 163 struct timeout sc_tmo_intrlist; 164 165 struct device *sc_child; /* /dev/usb# device */ 166 } ehci_softc_t; 167 168 #define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a)) 169 #define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a)) 170 #define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a)) 171 #define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x)) 172 #define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x)) 173 #define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x)) 174 #define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a)) 175 #define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a)) 176 #define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a)) 177 #define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x)) 178 #define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x)) 179 #define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x)) 180 181 usbd_status ehci_init(ehci_softc_t *); 182 int ehci_intr(void *); 183 int ehci_detach(ehci_softc_t *, int); 184 int ehci_activate(struct device *, int); 185 void ehci_shutdown(void *); 186