1 /* $OpenBSD: dwc2.c,v 1.49 2019/11/27 11:16:59 mpi Exp $ */ 2 /* $NetBSD: dwc2.c,v 1.32 2014/09/02 23:26:20 macallan Exp $ */ 3 4 /*- 5 * Copyright (c) 2013 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Nick Hudson 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #if 0 34 #include "opt_usb.h" 35 #endif 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/malloc.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/select.h> 43 #include <sys/proc.h> 44 #include <sys/queue.h> 45 #include <sys/endian.h> 46 #if 0 47 #include <sys/cpu.h> 48 #endif 49 50 #include <machine/bus.h> 51 52 #include <dev/usb/usb.h> 53 #include <dev/usb/usbdi.h> 54 #include <dev/usb/usbdivar.h> 55 #include <dev/usb/usb_mem.h> 56 57 #if 0 58 #include <dev/usb/usbroothub_subr.h> 59 #endif 60 61 #include <dev/usb/dwc2/dwc2.h> 62 #include <dev/usb/dwc2/dwc2var.h> 63 64 #include <dev/usb/dwc2/dwc2_core.h> 65 #include <dev/usb/dwc2/dwc2_hcd.h> 66 67 #ifdef DWC2_COUNTERS 68 #define DWC2_EVCNT_ADD(a,b) ((void)((a).ev_count += (b))) 69 #else 70 #define DWC2_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0) 71 #endif 72 #define DWC2_EVCNT_INCR(a) DWC2_EVCNT_ADD((a), 1) 73 74 #ifdef DWC2_DEBUG 75 #define DPRINTFN(n,fmt,...) do { \ 76 if (dwc2debug >= (n)) { \ 77 printf("%s: " fmt, \ 78 __FUNCTION__,## __VA_ARGS__); \ 79 } \ 80 } while (0) 81 #define DPRINTF(...) DPRINTFN(1, __VA_ARGS__) 82 int dwc2debug = 0; 83 #else 84 #define DPRINTF(...) do { } while (0) 85 #define DPRINTFN(...) do { } while (0) 86 #endif 87 88 STATIC usbd_status dwc2_open(struct usbd_pipe *); 89 STATIC int dwc2_setaddr(struct usbd_device *, int); 90 STATIC void dwc2_poll(struct usbd_bus *); 91 STATIC void dwc2_softintr(void *); 92 93 #if 0 94 STATIC usbd_status dwc2_allocm(struct usbd_bus *, struct usb_dma *, uint32_t); 95 STATIC void dwc2_freem(struct usbd_bus *, struct usb_dma *); 96 #endif 97 98 STATIC struct usbd_xfer *dwc2_allocx(struct usbd_bus *); 99 STATIC void dwc2_freex(struct usbd_bus *, struct usbd_xfer *); 100 #if 0 101 STATIC void dwc2_get_lock(struct usbd_bus *, struct mutex **); 102 #endif 103 104 STATIC usbd_status dwc2_root_ctrl_transfer(struct usbd_xfer *); 105 STATIC usbd_status dwc2_root_ctrl_start(struct usbd_xfer *); 106 STATIC void dwc2_root_ctrl_abort(struct usbd_xfer *); 107 STATIC void dwc2_root_ctrl_close(struct usbd_pipe *); 108 STATIC void dwc2_root_ctrl_done(struct usbd_xfer *); 109 110 STATIC usbd_status dwc2_root_intr_transfer(struct usbd_xfer *); 111 STATIC usbd_status dwc2_root_intr_start(struct usbd_xfer *); 112 STATIC void dwc2_root_intr_abort(struct usbd_xfer *); 113 STATIC void dwc2_root_intr_close(struct usbd_pipe *); 114 STATIC void dwc2_root_intr_done(struct usbd_xfer *); 115 116 STATIC usbd_status dwc2_device_ctrl_transfer(struct usbd_xfer *); 117 STATIC usbd_status dwc2_device_ctrl_start(struct usbd_xfer *); 118 STATIC void dwc2_device_ctrl_abort(struct usbd_xfer *); 119 STATIC void dwc2_device_ctrl_close(struct usbd_pipe *); 120 STATIC void dwc2_device_ctrl_done(struct usbd_xfer *); 121 122 STATIC usbd_status dwc2_device_bulk_transfer(struct usbd_xfer *); 123 STATIC usbd_status dwc2_device_bulk_start(struct usbd_xfer *); 124 STATIC void dwc2_device_bulk_abort(struct usbd_xfer *); 125 STATIC void dwc2_device_bulk_close(struct usbd_pipe *); 126 STATIC void dwc2_device_bulk_done(struct usbd_xfer *); 127 128 STATIC usbd_status dwc2_device_intr_transfer(struct usbd_xfer *); 129 STATIC usbd_status dwc2_device_intr_start(struct usbd_xfer *); 130 STATIC void dwc2_device_intr_abort(struct usbd_xfer *); 131 STATIC void dwc2_device_intr_close(struct usbd_pipe *); 132 STATIC void dwc2_device_intr_done(struct usbd_xfer *); 133 134 STATIC usbd_status dwc2_device_isoc_transfer(struct usbd_xfer *); 135 STATIC usbd_status dwc2_device_isoc_start(struct usbd_xfer *); 136 STATIC void dwc2_device_isoc_abort(struct usbd_xfer *); 137 STATIC void dwc2_device_isoc_close(struct usbd_pipe *); 138 STATIC void dwc2_device_isoc_done(struct usbd_xfer *); 139 140 STATIC usbd_status dwc2_device_start(struct usbd_xfer *); 141 142 STATIC void dwc2_close_pipe(struct usbd_pipe *); 143 STATIC void dwc2_abort_xfer(struct usbd_xfer *, usbd_status); 144 145 STATIC void dwc2_device_clear_toggle(struct usbd_pipe *); 146 STATIC void dwc2_noop(struct usbd_pipe *pipe); 147 148 STATIC int dwc2_interrupt(struct dwc2_softc *); 149 STATIC void dwc2_rhc(void *); 150 151 STATIC void dwc2_timeout(void *); 152 STATIC void dwc2_timeout_task(void *); 153 154 STATIC_INLINE void 155 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 156 struct usbd_xfer *xfer) 157 { 158 } 159 160 STATIC_INLINE void 161 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 162 struct usbd_xfer *xfer) 163 { 164 } 165 166 #define DWC2_INTR_ENDPT 1 167 168 STATIC struct usbd_bus_methods dwc2_bus_methods = { 169 .open_pipe = dwc2_open, 170 .dev_setaddr = dwc2_setaddr, 171 .soft_intr = dwc2_softintr, 172 .do_poll = dwc2_poll, 173 #if 0 174 .allocm = dwc2_allocm, 175 .freem = dwc2_freem, 176 #endif 177 .allocx = dwc2_allocx, 178 .freex = dwc2_freex, 179 #if 0 180 .get_lock = dwc2_get_lock, 181 #endif 182 }; 183 184 STATIC struct usbd_pipe_methods dwc2_root_ctrl_methods = { 185 .transfer = dwc2_root_ctrl_transfer, 186 .start = dwc2_root_ctrl_start, 187 .abort = dwc2_root_ctrl_abort, 188 .close = dwc2_root_ctrl_close, 189 .cleartoggle = dwc2_noop, 190 .done = dwc2_root_ctrl_done, 191 }; 192 193 STATIC struct usbd_pipe_methods dwc2_root_intr_methods = { 194 .transfer = dwc2_root_intr_transfer, 195 .start = dwc2_root_intr_start, 196 .abort = dwc2_root_intr_abort, 197 .close = dwc2_root_intr_close, 198 .cleartoggle = dwc2_noop, 199 .done = dwc2_root_intr_done, 200 }; 201 202 STATIC struct usbd_pipe_methods dwc2_device_ctrl_methods = { 203 .transfer = dwc2_device_ctrl_transfer, 204 .start = dwc2_device_ctrl_start, 205 .abort = dwc2_device_ctrl_abort, 206 .close = dwc2_device_ctrl_close, 207 .cleartoggle = dwc2_noop, 208 .done = dwc2_device_ctrl_done, 209 }; 210 211 STATIC struct usbd_pipe_methods dwc2_device_intr_methods = { 212 .transfer = dwc2_device_intr_transfer, 213 .start = dwc2_device_intr_start, 214 .abort = dwc2_device_intr_abort, 215 .close = dwc2_device_intr_close, 216 .cleartoggle = dwc2_device_clear_toggle, 217 .done = dwc2_device_intr_done, 218 }; 219 220 STATIC struct usbd_pipe_methods dwc2_device_bulk_methods = { 221 .transfer = dwc2_device_bulk_transfer, 222 .start = dwc2_device_bulk_start, 223 .abort = dwc2_device_bulk_abort, 224 .close = dwc2_device_bulk_close, 225 .cleartoggle = dwc2_device_clear_toggle, 226 .done = dwc2_device_bulk_done, 227 }; 228 229 STATIC struct usbd_pipe_methods dwc2_device_isoc_methods = { 230 .transfer = dwc2_device_isoc_transfer, 231 .start = dwc2_device_isoc_start, 232 .abort = dwc2_device_isoc_abort, 233 .close = dwc2_device_isoc_close, 234 .cleartoggle = dwc2_noop, 235 .done = dwc2_device_isoc_done, 236 }; 237 238 #if 0 239 STATIC usbd_status 240 dwc2_allocm(struct usbd_bus *bus, struct usb_dma *dma, uint32_t size) 241 { 242 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 243 usbd_status status; 244 245 DPRINTFN(10, "\n"); 246 247 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 248 if (status == USBD_NOMEM) 249 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 250 return status; 251 } 252 253 STATIC void 254 dwc2_freem(struct usbd_bus *bus, struct usb_dma *dma) 255 { 256 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 257 258 DPRINTFN(10, "\n"); 259 260 if (dma->block->flags & USB_DMA_RESERVE) { 261 usb_reserve_freem(&sc->sc_dma_reserve, dma); 262 return; 263 } 264 usb_freemem(&sc->sc_bus, dma); 265 } 266 #endif 267 268 /* 269 * Work around the half configured control (default) pipe when setting 270 * the address of a device. 271 */ 272 STATIC int 273 dwc2_setaddr(struct usbd_device *dev, int addr) 274 { 275 if (usbd_set_address(dev, addr)) 276 return (1); 277 278 dev->address = addr; 279 280 /* 281 * Re-establish the default pipe with the new address and the 282 * new max packet size. 283 */ 284 dwc2_close_pipe(dev->default_pipe); 285 if (dwc2_open(dev->default_pipe)) 286 return (EINVAL); 287 288 return (0); 289 } 290 291 struct usbd_xfer * 292 dwc2_allocx(struct usbd_bus *bus) 293 { 294 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 295 struct dwc2_xfer *dxfer; 296 297 DPRINTFN(10, "\n"); 298 299 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget); 300 dxfer = pool_get(&sc->sc_xferpool, PR_NOWAIT); 301 if (dxfer != NULL) { 302 memset(dxfer, 0, sizeof(*dxfer)); 303 304 dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg, 305 DWC2_MAXISOCPACKETS, GFP_ATOMIC); 306 if (dxfer->urb == NULL) { 307 pool_put(&sc->sc_xferpool, dxfer); 308 return NULL; 309 } 310 311 #ifdef DWC2_DEBUG 312 dxfer->xfer.busy_free = XFER_ONQU; 313 #endif 314 } 315 return (struct usbd_xfer *)dxfer; 316 } 317 318 void 319 dwc2_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 320 { 321 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 322 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 323 324 DPRINTFN(10, "\n"); 325 326 #ifdef DWC2_DEBUG 327 if (xfer->busy_free != XFER_ONQU) { 328 DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->busy_free); 329 } 330 xfer->busy_free = XFER_FREE; 331 #endif 332 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput); 333 dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, DWC2_MAXISOCPACKETS); 334 pool_put(&sc->sc_xferpool, xfer); 335 } 336 337 #if 0 338 STATIC void 339 dwc2_get_lock(struct usbd_bus *bus, struct mutex **lock) 340 { 341 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 342 343 *lock = &sc->sc_lock; 344 } 345 #endif 346 347 STATIC void 348 dwc2_rhc(void *addr) 349 { 350 struct dwc2_softc *sc = addr; 351 struct usbd_xfer *xfer; 352 u_char *p; 353 354 DPRINTF("\n"); 355 xfer = sc->sc_intrxfer; 356 357 if (xfer == NULL) { 358 /* Just ignore the change. */ 359 return; 360 361 } 362 /* set port bit */ 363 p = KERNADDR(&xfer->dmabuf, 0); 364 365 p[0] = 0x02; /* we only have one port (1 << 1) */ 366 367 xfer->actlen = xfer->length; 368 xfer->status = USBD_NORMAL_COMPLETION; 369 370 usb_transfer_complete(xfer); 371 } 372 373 STATIC void 374 dwc2_softintr(void *v) 375 { 376 struct usbd_bus *bus = v; 377 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 378 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 379 struct dwc2_xfer *dxfer; 380 381 mtx_enter(&hsotg->lock); 382 while ((dxfer = TAILQ_FIRST(&sc->sc_complete)) != NULL) { 383 384 KASSERTMSG(!timeout_pending(&dxfer->xfer.timeout_handle), 385 "xfer %p pipe %p\n", dxfer, dxfer->xfer.pipe); 386 387 /* 388 * dwc2_abort_xfer will remove this transfer from the 389 * sc_complete queue 390 */ 391 /*XXXNH not tested */ 392 if (dxfer->flags & DWC2_XFER_ABORTING) { 393 wakeup(&dxfer->flags); 394 continue; 395 } 396 397 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 398 399 mtx_leave(&hsotg->lock); 400 usb_transfer_complete(&dxfer->xfer); 401 mtx_enter(&hsotg->lock); 402 } 403 mtx_leave(&hsotg->lock); 404 } 405 406 STATIC void 407 dwc2_timeout(void *addr) 408 { 409 struct usbd_xfer *xfer = addr; 410 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 411 412 DPRINTF("xfer=%p\n", xfer); 413 414 if (sc->sc_dying) { 415 dwc2_timeout_task(addr); 416 return; 417 } 418 419 /* Execute the abort in a process context. */ 420 usb_init_task(&xfer->abort_task, dwc2_timeout_task, addr, 421 USB_TASK_TYPE_ABORT); 422 usb_add_task(xfer->device, &xfer->abort_task); 423 } 424 425 STATIC void 426 dwc2_timeout_task(void *addr) 427 { 428 struct usbd_xfer *xfer = addr; 429 int s; 430 431 DPRINTF("xfer=%p\n", xfer); 432 433 s = splusb(); 434 dwc2_abort_xfer(xfer, USBD_TIMEOUT); 435 splx(s); 436 } 437 438 usbd_status 439 dwc2_open(struct usbd_pipe *pipe) 440 { 441 struct usbd_device *dev = pipe->device; 442 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 443 struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe); 444 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 445 uint8_t addr = dev->address; 446 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 447 usbd_status err; 448 449 DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype, 450 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out"); 451 452 if (sc->sc_dying) { 453 return USBD_IOERROR; 454 } 455 456 if (addr == sc->sc_addr) { 457 switch (ed->bEndpointAddress) { 458 case USB_CONTROL_ENDPOINT: 459 pipe->methods = &dwc2_root_ctrl_methods; 460 break; 461 case UE_DIR_IN | DWC2_INTR_ENDPT: 462 pipe->methods = &dwc2_root_intr_methods; 463 break; 464 default: 465 DPRINTF("bad bEndpointAddress 0x%02x\n", 466 ed->bEndpointAddress); 467 return USBD_INVAL; 468 } 469 DPRINTF("root hub pipe open\n"); 470 return USBD_NORMAL_COMPLETION; 471 } 472 473 switch (xfertype) { 474 case UE_CONTROL: 475 pipe->methods = &dwc2_device_ctrl_methods; 476 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 477 0, &dpipe->req_dma); 478 if (err) 479 return err; 480 break; 481 case UE_INTERRUPT: 482 pipe->methods = &dwc2_device_intr_methods; 483 break; 484 case UE_ISOCHRONOUS: 485 pipe->methods = &dwc2_device_isoc_methods; 486 break; 487 case UE_BULK: 488 pipe->methods = &dwc2_device_bulk_methods; 489 break; 490 default: 491 DPRINTF("bad xfer type %d\n", xfertype); 492 return USBD_INVAL; 493 } 494 495 dpipe->priv = NULL; /* QH */ 496 497 return USBD_NORMAL_COMPLETION; 498 } 499 500 STATIC void 501 dwc2_poll(struct usbd_bus *bus) 502 { 503 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 504 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 505 506 mtx_enter(&hsotg->lock); 507 dwc2_interrupt(sc); 508 mtx_leave(&hsotg->lock); 509 } 510 511 /* 512 * Close a reqular pipe. 513 * Assumes that there are no pending transactions. 514 */ 515 STATIC void 516 dwc2_close_pipe(struct usbd_pipe *pipe) 517 { 518 /* nothing */ 519 } 520 521 /* 522 * Abort a device request. 523 */ 524 STATIC void 525 dwc2_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 526 { 527 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 528 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 529 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 530 struct dwc2_xfer *d, *tmp; 531 bool wake; 532 int err; 533 534 splsoftassert(IPL_SOFTUSB); 535 536 DPRINTF("xfer=%p\n", xfer); 537 538 if (sc->sc_dying) { 539 xfer->status = status; 540 timeout_del(&xfer->timeout_handle); 541 usb_rem_task(xfer->device, &xfer->abort_task); 542 usb_transfer_complete(xfer); 543 return; 544 } 545 546 /* 547 * If an abort is already in progress then just wait for it to 548 * complete and return. 549 */ 550 if (dxfer->flags & DWC2_XFER_ABORTING) { 551 xfer->status = status; 552 dxfer->flags |= DWC2_XFER_ABORTWAIT; 553 while (dxfer->flags & DWC2_XFER_ABORTING) 554 tsleep_nsec(&dxfer->flags, PZERO, "dwc2xfer", INFSLP); 555 return; 556 } 557 558 mtx_enter(&hsotg->lock); 559 560 /* The transfer might have been completed already. */ 561 if (xfer->status != USBD_IN_PROGRESS) { 562 DPRINTF("xfer=%p already completed\n", xfer); 563 mtx_leave(&hsotg->lock); 564 return; 565 } 566 567 /* 568 * Step 1: Make the stack ignore it and stop the timeout. 569 */ 570 dxfer->flags |= DWC2_XFER_ABORTING; 571 572 xfer->status = status; /* make software ignore it */ 573 timeout_del(&xfer->timeout_handle); 574 usb_rem_task(xfer->device, &xfer->abort_task); 575 576 /* XXXNH suboptimal */ 577 TAILQ_FOREACH_SAFE(d, &sc->sc_complete, xnext, tmp) { 578 if (d == dxfer) { 579 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 580 } 581 } 582 583 err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb); 584 if (err) { 585 DPRINTF("dwc2_hcd_urb_dequeue failed\n"); 586 } 587 588 mtx_leave(&hsotg->lock); 589 590 /* 591 * Step 2: Execute callback. 592 */ 593 wake = dxfer->flags & DWC2_XFER_ABORTWAIT; 594 dxfer->flags &= ~(DWC2_XFER_ABORTING | DWC2_XFER_ABORTWAIT); 595 596 usb_transfer_complete(xfer); 597 if (wake) { 598 wakeup(&dxfer->flags); 599 } 600 } 601 602 STATIC void 603 dwc2_noop(struct usbd_pipe *pipe) 604 { 605 606 } 607 608 STATIC void 609 dwc2_device_clear_toggle(struct usbd_pipe *pipe) 610 { 611 612 DPRINTF("toggle %d -> 0", pipe->endpoint->savedtoggle); 613 } 614 615 /***********************************************************************/ 616 617 /* 618 * Data structures and routines to emulate the root hub. 619 */ 620 621 STATIC const usb_device_descriptor_t dwc2_devd = { 622 .bLength = sizeof(usb_device_descriptor_t), 623 .bDescriptorType = UDESC_DEVICE, 624 .bcdUSB = {0x00, 0x02}, 625 .bDeviceClass = UDCLASS_HUB, 626 .bDeviceSubClass = UDSUBCLASS_HUB, 627 .bDeviceProtocol = UDPROTO_HSHUBSTT, 628 .bMaxPacketSize = 64, 629 .bcdDevice = {0x00, 0x01}, 630 .iManufacturer = 1, 631 .iProduct = 2, 632 .bNumConfigurations = 1, 633 }; 634 635 struct dwc2_config_desc { 636 usb_config_descriptor_t confd; 637 usb_interface_descriptor_t ifcd; 638 usb_endpoint_descriptor_t endpd; 639 } __packed; 640 641 STATIC const struct dwc2_config_desc dwc2_confd = { 642 .confd = { 643 .bLength = USB_CONFIG_DESCRIPTOR_SIZE, 644 .bDescriptorType = UDESC_CONFIG, 645 .wTotalLength[0] = sizeof(dwc2_confd), 646 .bNumInterface = 1, 647 .bConfigurationValue = 1, 648 .iConfiguration = 0, 649 .bmAttributes = UC_BUS_POWERED | UC_SELF_POWERED, 650 .bMaxPower = 0, 651 }, 652 .ifcd = { 653 .bLength = USB_INTERFACE_DESCRIPTOR_SIZE, 654 .bDescriptorType = UDESC_INTERFACE, 655 .bInterfaceNumber = 0, 656 .bAlternateSetting = 0, 657 .bNumEndpoints = 1, 658 .bInterfaceClass = UICLASS_HUB, 659 .bInterfaceSubClass = UISUBCLASS_HUB, 660 .bInterfaceProtocol = UIPROTO_HSHUBSTT, 661 .iInterface = 0 662 }, 663 .endpd = { 664 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 665 .bDescriptorType = UDESC_ENDPOINT, 666 .bEndpointAddress = UE_DIR_IN | DWC2_INTR_ENDPT, 667 .bmAttributes = UE_INTERRUPT, 668 .wMaxPacketSize = {8, 0}, /* max packet */ 669 .bInterval = 255, 670 }, 671 }; 672 673 #define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) } 674 #if 0 675 /* appears to be unused */ 676 STATIC const usb_hub_descriptor_t dwc2_hubd = { 677 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 678 .bDescriptorType = UDESC_HUB, 679 .bNbrPorts = 1, 680 HSETW(.wHubCharacteristics, (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL)), 681 .bPwrOn2PwrGood = 50, 682 .bHubContrCurrent = 0, 683 .DeviceRemovable = {0}, /* port is removable */ 684 }; 685 #endif 686 687 STATIC usbd_status 688 dwc2_root_ctrl_transfer(struct usbd_xfer *xfer) 689 { 690 usbd_status err; 691 692 err = usb_insert_transfer(xfer); 693 if (err) 694 return err; 695 696 return dwc2_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 697 } 698 699 STATIC usbd_status 700 dwc2_root_ctrl_start(struct usbd_xfer *xfer) 701 { 702 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 703 usb_device_request_t *req; 704 uint8_t *buf; 705 uint16_t len; 706 int value, index, l, s, totlen; 707 usbd_status err = USBD_IOERROR; 708 709 if (sc->sc_dying) 710 return USBD_IOERROR; 711 712 req = &xfer->request; 713 714 DPRINTFN(4, "type=0x%02x request=%02x\n", 715 req->bmRequestType, req->bRequest); 716 717 len = UGETW(req->wLength); 718 value = UGETW(req->wValue); 719 index = UGETW(req->wIndex); 720 721 buf = len ? KERNADDR(&xfer->dmabuf, 0) : NULL; 722 723 totlen = 0; 724 725 #define C(x,y) ((x) | ((y) << 8)) 726 switch (C(req->bRequest, req->bmRequestType)) { 727 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 728 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 729 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 730 /* 731 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 732 * for the integrated root hub. 733 */ 734 break; 735 case C(UR_GET_CONFIG, UT_READ_DEVICE): 736 if (len > 0) { 737 *buf = sc->sc_conf; 738 totlen = 1; 739 } 740 break; 741 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 742 DPRINTFN(8, "wValue=0x%04x\n", value); 743 744 if (len == 0) 745 break; 746 switch (value) { 747 case C(0, UDESC_DEVICE): 748 l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 749 // USETW(dwc2_devd.idVendor, sc->sc_id_vendor); 750 memcpy(buf, &dwc2_devd, l); 751 buf += l; 752 len -= l; 753 totlen += l; 754 755 break; 756 case C(0, UDESC_CONFIG): 757 l = min(len, sizeof(dwc2_confd)); 758 memcpy(buf, &dwc2_confd, l); 759 buf += l; 760 len -= l; 761 totlen += l; 762 763 break; 764 #define sd ((usb_string_descriptor_t *)buf) 765 case C(0, UDESC_STRING): 766 totlen = usbd_str(sd, len, "\001"); 767 break; 768 case C(1, UDESC_STRING): 769 totlen = usbd_str(sd, len, sc->sc_vendor); 770 break; 771 case C(2, UDESC_STRING): 772 totlen = usbd_str(sd, len, "DWC2 root hub"); 773 break; 774 #undef sd 775 default: 776 goto fail; 777 } 778 break; 779 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 780 if (len > 0) { 781 *buf = 0; 782 totlen = 1; 783 } 784 break; 785 case C(UR_GET_STATUS, UT_READ_DEVICE): 786 if (len > 1) { 787 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 788 totlen = 2; 789 } 790 break; 791 case C(UR_GET_STATUS, UT_READ_INTERFACE): 792 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 793 if (len > 1) { 794 USETW(((usb_status_t *)buf)->wStatus, 0); 795 totlen = 2; 796 } 797 break; 798 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 799 DPRINTF("UR_SET_ADDRESS, UT_WRITE_DEVICE: addr %d\n", 800 value); 801 if (value >= USB_MAX_DEVICES) 802 goto fail; 803 804 sc->sc_addr = value; 805 break; 806 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 807 if (value != 0 && value != 1) 808 goto fail; 809 810 sc->sc_conf = value; 811 break; 812 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 813 break; 814 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 815 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 816 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 817 err = USBD_IOERROR; 818 goto fail; 819 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 820 break; 821 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 822 break; 823 default: 824 /* Hub requests - XXXNH len check? */ 825 err = dwc2_hcd_hub_control(sc->sc_hsotg, 826 C(req->bRequest, req->bmRequestType), value, index, 827 buf, len); 828 if (err) { 829 err = USBD_IOERROR; 830 goto fail; 831 } 832 totlen = len; 833 } 834 xfer->actlen = totlen; 835 err = USBD_NORMAL_COMPLETION; 836 837 fail: 838 s = splusb(); 839 xfer->status = err; 840 usb_transfer_complete(xfer); 841 splx(s); 842 843 return err; 844 } 845 846 STATIC void 847 dwc2_root_ctrl_abort(struct usbd_xfer *xfer) 848 { 849 DPRINTFN(10, "\n"); 850 851 /* Nothing to do, all transfers are synchronous. */ 852 } 853 854 STATIC void 855 dwc2_root_ctrl_close(struct usbd_pipe *pipe) 856 { 857 DPRINTFN(10, "\n"); 858 859 /* Nothing to do. */ 860 } 861 862 STATIC void 863 dwc2_root_ctrl_done(struct usbd_xfer *xfer) 864 { 865 DPRINTFN(10, "\n"); 866 867 /* Nothing to do. */ 868 } 869 870 STATIC usbd_status 871 dwc2_root_intr_transfer(struct usbd_xfer *xfer) 872 { 873 usbd_status err; 874 875 DPRINTF("\n"); 876 877 /* Insert last in queue. */ 878 err = usb_insert_transfer(xfer); 879 if (err) 880 return err; 881 882 /* Pipe isn't running, start first */ 883 return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 884 } 885 886 STATIC usbd_status 887 dwc2_root_intr_start(struct usbd_xfer *xfer) 888 { 889 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 890 891 DPRINTF("\n"); 892 893 if (sc->sc_dying) 894 return USBD_IOERROR; 895 896 KASSERT(sc->sc_intrxfer == NULL); 897 sc->sc_intrxfer = xfer; 898 899 return USBD_IN_PROGRESS; 900 } 901 902 /* Abort a root interrupt request. */ 903 STATIC void 904 dwc2_root_intr_abort(struct usbd_xfer *xfer) 905 { 906 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 907 908 DPRINTF("xfer=%p\n", xfer); 909 910 KASSERT(xfer->pipe->intrxfer == xfer); 911 912 sc->sc_intrxfer = NULL; 913 914 xfer->status = USBD_CANCELLED; 915 usb_transfer_complete(xfer); 916 } 917 918 STATIC void 919 dwc2_root_intr_close(struct usbd_pipe *pipe) 920 { 921 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 922 923 DPRINTF("\n"); 924 925 sc->sc_intrxfer = NULL; 926 } 927 928 STATIC void 929 dwc2_root_intr_done(struct usbd_xfer *xfer) 930 { 931 932 DPRINTF("\n"); 933 } 934 935 /***********************************************************************/ 936 937 STATIC usbd_status 938 dwc2_device_ctrl_transfer(struct usbd_xfer *xfer) 939 { 940 usbd_status err; 941 942 DPRINTF("\n"); 943 944 /* Insert last in queue. */ 945 err = usb_insert_transfer(xfer); 946 if (err) 947 return err; 948 949 /* Pipe isn't running, start first */ 950 return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 951 } 952 953 STATIC usbd_status 954 dwc2_device_ctrl_start(struct usbd_xfer *xfer) 955 { 956 usbd_status err; 957 958 DPRINTF("\n"); 959 960 xfer->status = USBD_IN_PROGRESS; 961 err = dwc2_device_start(xfer); 962 963 return err; 964 } 965 966 STATIC void 967 dwc2_device_ctrl_abort(struct usbd_xfer *xfer) 968 { 969 DPRINTF("xfer=%p\n", xfer); 970 dwc2_abort_xfer(xfer, USBD_CANCELLED); 971 } 972 973 STATIC void 974 dwc2_device_ctrl_close(struct usbd_pipe *pipe) 975 { 976 977 DPRINTF("pipe=%p\n", pipe); 978 dwc2_close_pipe(pipe); 979 } 980 981 STATIC void 982 dwc2_device_ctrl_done(struct usbd_xfer *xfer) 983 { 984 985 DPRINTF("xfer=%p\n", xfer); 986 } 987 988 /***********************************************************************/ 989 990 STATIC usbd_status 991 dwc2_device_bulk_transfer(struct usbd_xfer *xfer) 992 { 993 usbd_status err; 994 995 DPRINTF("xfer=%p\n", xfer); 996 997 /* Insert last in queue. */ 998 err = usb_insert_transfer(xfer); 999 if (err) 1000 return err; 1001 1002 /* Pipe isn't running, start first */ 1003 return dwc2_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1004 } 1005 1006 STATIC usbd_status 1007 dwc2_device_bulk_start(struct usbd_xfer *xfer) 1008 { 1009 usbd_status err; 1010 1011 DPRINTF("xfer=%p\n", xfer); 1012 1013 xfer->status = USBD_IN_PROGRESS; 1014 err = dwc2_device_start(xfer); 1015 1016 return err; 1017 } 1018 1019 STATIC void 1020 dwc2_device_bulk_abort(struct usbd_xfer *xfer) 1021 { 1022 DPRINTF("xfer=%p\n", xfer); 1023 1024 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1025 } 1026 1027 STATIC void 1028 dwc2_device_bulk_close(struct usbd_pipe *pipe) 1029 { 1030 1031 DPRINTF("pipe=%p\n", pipe); 1032 1033 dwc2_close_pipe(pipe); 1034 } 1035 1036 STATIC void 1037 dwc2_device_bulk_done(struct usbd_xfer *xfer) 1038 { 1039 1040 DPRINTF("xfer=%p\n", xfer); 1041 } 1042 1043 /***********************************************************************/ 1044 1045 STATIC usbd_status 1046 dwc2_device_intr_transfer(struct usbd_xfer *xfer) 1047 { 1048 usbd_status err; 1049 1050 DPRINTF("xfer=%p\n", xfer); 1051 1052 /* Insert last in queue. */ 1053 err = usb_insert_transfer(xfer); 1054 if (err) 1055 return err; 1056 1057 /* Pipe isn't running, start first */ 1058 return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1059 } 1060 1061 STATIC usbd_status 1062 dwc2_device_intr_start(struct usbd_xfer *xfer) 1063 { 1064 usbd_status err; 1065 1066 xfer->status = USBD_IN_PROGRESS; 1067 err = dwc2_device_start(xfer); 1068 1069 return err; 1070 } 1071 1072 /* Abort a device interrupt request. */ 1073 STATIC void 1074 dwc2_device_intr_abort(struct usbd_xfer *xfer) 1075 { 1076 KASSERT(xfer->pipe->intrxfer == xfer); 1077 1078 DPRINTF("xfer=%p\n", xfer); 1079 1080 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1081 } 1082 1083 STATIC void 1084 dwc2_device_intr_close(struct usbd_pipe *pipe) 1085 { 1086 1087 DPRINTF("pipe=%p\n", pipe); 1088 1089 dwc2_close_pipe(pipe); 1090 } 1091 1092 STATIC void 1093 dwc2_device_intr_done(struct usbd_xfer *xfer) 1094 { 1095 1096 DPRINTF("\n"); 1097 1098 if (xfer->pipe->repeat) { 1099 xfer->status = USBD_IN_PROGRESS; 1100 dwc2_device_start(xfer); 1101 } 1102 } 1103 1104 /***********************************************************************/ 1105 1106 usbd_status 1107 dwc2_device_isoc_transfer(struct usbd_xfer *xfer) 1108 { 1109 usbd_status err; 1110 1111 DPRINTF("xfer=%p\n", xfer); 1112 1113 /* Insert last in queue. */ 1114 err = usb_insert_transfer(xfer); 1115 if (err) 1116 return err; 1117 1118 /* Pipe isn't running, start first */ 1119 return dwc2_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1120 } 1121 1122 usbd_status 1123 dwc2_device_isoc_start(struct usbd_xfer *xfer) 1124 { 1125 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1126 struct dwc2_softc *sc = DWC2_DPIPE2SC(dpipe); 1127 usbd_status err; 1128 1129 /* Why would you do that anyway? */ 1130 if (sc->sc_bus.use_polling) 1131 return (USBD_INVAL); 1132 1133 xfer->status = USBD_IN_PROGRESS; 1134 err = dwc2_device_start(xfer); 1135 1136 return err; 1137 } 1138 1139 void 1140 dwc2_device_isoc_abort(struct usbd_xfer *xfer) 1141 { 1142 DPRINTF("xfer=%p\n", xfer); 1143 1144 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1145 } 1146 1147 void 1148 dwc2_device_isoc_close(struct usbd_pipe *pipe) 1149 { 1150 DPRINTF("\n"); 1151 1152 dwc2_close_pipe(pipe); 1153 } 1154 1155 void 1156 dwc2_device_isoc_done(struct usbd_xfer *xfer) 1157 { 1158 1159 DPRINTF("\n"); 1160 } 1161 1162 1163 usbd_status 1164 dwc2_device_start(struct usbd_xfer *xfer) 1165 { 1166 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 1167 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1168 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1169 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1170 struct dwc2_hcd_urb *dwc2_urb; 1171 1172 struct usbd_device *dev = xfer->pipe->device; 1173 usb_endpoint_descriptor_t *ed = xfer->pipe->endpoint->edesc; 1174 uint8_t addr = dev->address; 1175 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1176 uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress); 1177 uint8_t dir = UE_GET_DIR(ed->bEndpointAddress); 1178 uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize)); 1179 uint32_t len; 1180 1181 uint32_t flags = 0; 1182 uint32_t off = 0; 1183 int retval, err = USBD_IN_PROGRESS; 1184 int alloc_bandwidth = 0; 1185 int i; 1186 1187 DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->pipe); 1188 1189 if (xfertype == UE_ISOCHRONOUS || 1190 xfertype == UE_INTERRUPT) { 1191 mtx_enter(&hsotg->lock); 1192 if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer)) 1193 alloc_bandwidth = 1; 1194 mtx_leave(&hsotg->lock); 1195 } 1196 1197 /* 1198 * For Control pipe the direction is from the request, all other 1199 * transfers have been set correctly at pipe open time. 1200 */ 1201 if (xfertype == UE_CONTROL) { 1202 usb_device_request_t *req = &xfer->request; 1203 1204 DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x " 1205 "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d " 1206 "mps=%d\n", 1207 xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue), 1208 UGETW(req->wIndex), UGETW(req->wLength), dev->address, 1209 epnum, dir == UT_READ ? "in" :"out", dev->speed, mps); 1210 1211 /* Copy request packet to our DMA buffer */ 1212 memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req)); 1213 usb_syncmem(&dpipe->req_dma, 0, sizeof(*req), 1214 BUS_DMASYNC_PREWRITE); 1215 len = UGETW(req->wLength); 1216 if ((req->bmRequestType & UT_READ) == UT_READ) { 1217 dir = UE_DIR_IN; 1218 } else { 1219 dir = UE_DIR_OUT; 1220 } 1221 1222 DPRINTFN(3, "req = %p dma = %llx len %d dir %s\n", 1223 KERNADDR(&dpipe->req_dma, 0), 1224 (long long)DMAADDR(&dpipe->req_dma, 0), 1225 len, dir == UE_DIR_IN ? "in" : "out"); 1226 } else { 1227 DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d," 1228 " mps=%d dir %s\n", xfer, xfer->length, xfer->flags, addr, 1229 epnum, mps, dir == UT_READ ? "in" :"out"); 1230 1231 len = xfer->length; 1232 } 1233 1234 dwc2_urb = dxfer->urb; 1235 if (!dwc2_urb) 1236 return USBD_NOMEM; 1237 1238 memset(dwc2_urb, 0, sizeof(*dwc2_urb) + 1239 sizeof(dwc2_urb->iso_descs[0]) * DWC2_MAXISOCPACKETS); 1240 1241 dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir, 1242 mps); 1243 1244 if (xfertype == UE_CONTROL) { 1245 dwc2_urb->setup_usbdma = &dpipe->req_dma; 1246 dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0); 1247 dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0); 1248 } else { 1249 /* XXXNH - % mps required? */ 1250 if ((xfer->flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0) 1251 flags |= URB_SEND_ZERO_PACKET; 1252 } 1253 flags |= URB_GIVEBACK_ASAP; 1254 1255 /* 1256 * control transfers with no data phase don't touch usbdma, but 1257 * everything else does. 1258 */ 1259 if (!(xfertype == UE_CONTROL && len == 0)) { 1260 dwc2_urb->usbdma = &xfer->dmabuf; 1261 dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0); 1262 dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0); 1263 } 1264 dwc2_urb->length = len; 1265 dwc2_urb->flags = flags; 1266 dwc2_urb->status = -EINPROGRESS; 1267 dwc2_urb->packet_count = xfer->nframes; 1268 1269 if (xfertype == UE_INTERRUPT || 1270 xfertype == UE_ISOCHRONOUS) { 1271 uint16_t ival; 1272 1273 if (xfertype == UE_INTERRUPT && 1274 dpipe->pipe.interval != USBD_DEFAULT_INTERVAL) { 1275 ival = dpipe->pipe.interval; 1276 } else { 1277 ival = ed->bInterval; 1278 } 1279 1280 if (ival < 1) { 1281 retval = -ENODEV; 1282 goto fail; 1283 } 1284 if (dev->speed == USB_SPEED_HIGH || 1285 (dev->speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) { 1286 if (ival > 16) { 1287 /* 1288 * illegal with HS/FS, but there were 1289 * documentation bugs in the spec 1290 */ 1291 ival = 256; 1292 } else { 1293 ival = (1 << (ival - 1)); 1294 } 1295 } else { 1296 if (xfertype == UE_INTERRUPT && ival < 10) 1297 ival = 10; 1298 } 1299 dwc2_urb->interval = ival; 1300 } 1301 1302 xfer->actlen = 0; 1303 1304 KASSERT(xfertype != UE_ISOCHRONOUS || 1305 xfer->nframes < DWC2_MAXISOCPACKETS); 1306 KASSERTMSG(xfer->nframes == 0 || xfertype == UE_ISOCHRONOUS, 1307 "nframes %d xfertype %d\n", xfer->nframes, xfertype); 1308 1309 for (off = i = 0; i < xfer->nframes; ++i) { 1310 DPRINTFN(3, "xfer=%p frame=%d offset=%d length=%d\n", xfer, i, 1311 off, xfer->frlengths[i]); 1312 1313 dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off, 1314 xfer->frlengths[i]); 1315 off += xfer->frlengths[i]; 1316 } 1317 1318 /* might need to check cpu_intr_p */ 1319 mtx_enter(&hsotg->lock); 1320 1321 if (xfer->timeout && !sc->sc_bus.use_polling) { 1322 timeout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 1323 dwc2_timeout, xfer); 1324 } 1325 1326 dwc2_urb->priv = xfer; 1327 retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, &dpipe->priv, 0); 1328 if (retval) 1329 goto fail; 1330 1331 if (alloc_bandwidth) { 1332 dwc2_allocate_bus_bandwidth(hsotg, 1333 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1334 xfer); 1335 } 1336 1337 fail: 1338 mtx_leave(&hsotg->lock); 1339 1340 switch (retval) { 1341 case 0: 1342 break; 1343 case -ENODEV: 1344 err = USBD_INVAL; 1345 break; 1346 case -ENOMEM: 1347 err = USBD_NOMEM; 1348 break; 1349 default: 1350 err = USBD_IOERROR; 1351 } 1352 1353 return err; 1354 1355 } 1356 1357 void 1358 dwc2_worker(struct task *wk, void *priv) 1359 { 1360 struct dwc2_softc *sc = priv; 1361 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1362 1363 /* db_enter(); */ 1364 #if 0 1365 struct usbd_xfer *xfer = dwork->xfer; 1366 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 1367 1368 dwc2_hcd_endpoint_disable(sc->dwc_dev.hcd, dpipe->priv, 250); 1369 dwc_free(NULL, dpipe->urb); 1370 #endif 1371 1372 if (wk == &hsotg->wf_otg) { 1373 dwc2_conn_id_status_change(wk); 1374 } else if (wk == &hsotg->start_work.work) { 1375 dwc2_hcd_start_func(wk); 1376 } else if (wk == &hsotg->reset_work.work) { 1377 dwc2_hcd_reset_func(wk); 1378 } else { 1379 #if 0 1380 KASSERT(dwork->xfer != NULL); 1381 KASSERT(dxfer->queued == true); 1382 1383 if (!(dxfer->flags & DWC2_XFER_ABORTING)) { 1384 dwc2_start_standard_chain(xfer); 1385 } 1386 dxfer->queued = false; 1387 wakeup(&dxfer->flags); 1388 #endif 1389 } 1390 } 1391 1392 int 1393 dwc2_intr(void *p) 1394 { 1395 struct dwc2_softc *sc = p; 1396 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1397 int ret = 0; 1398 1399 mtx_enter(&hsotg->lock); 1400 1401 if (sc->sc_dying) 1402 goto done; 1403 1404 if (sc->sc_bus.use_polling) { 1405 uint32_t intrs; 1406 1407 intrs = dwc2_read_core_intr(hsotg); 1408 DWC2_WRITE_4(hsotg, GINTSTS, intrs); 1409 } else { 1410 ret = dwc2_interrupt(sc); 1411 } 1412 1413 done: 1414 mtx_leave(&hsotg->lock); 1415 1416 return ret; 1417 } 1418 1419 int 1420 dwc2_interrupt(struct dwc2_softc *sc) 1421 { 1422 int ret = 0; 1423 1424 if (sc->sc_hcdenabled) { 1425 ret |= dwc2_handle_hcd_intr(sc->sc_hsotg); 1426 } 1427 1428 ret |= dwc2_handle_common_intr(sc->sc_hsotg); 1429 1430 return ret; 1431 } 1432 1433 /***********************************************************************/ 1434 1435 int 1436 dwc2_detach(struct dwc2_softc *sc, int flags) 1437 { 1438 int rv = 0; 1439 1440 if (sc->sc_child != NULL) 1441 rv = config_detach(sc->sc_child, flags); 1442 1443 return rv; 1444 } 1445 1446 /***********************************************************************/ 1447 int 1448 dwc2_init(struct dwc2_softc *sc) 1449 { 1450 int err = 0; 1451 1452 sc->sc_bus.usbrev = USBREV_2_0; 1453 sc->sc_bus.methods = &dwc2_bus_methods; 1454 sc->sc_bus.pipe_size = sizeof(struct dwc2_pipe); 1455 sc->sc_hcdenabled = false; 1456 1457 TAILQ_INIT(&sc->sc_complete); 1458 1459 sc->sc_rhc_si = softintr_establish(IPL_SOFTUSB, dwc2_rhc, sc); 1460 1461 #if 0 1462 usb_setup_reserve(&sc->sc_bus, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 1463 USB_MEM_RESERVE); 1464 #endif 1465 1466 pool_init(&sc->sc_xferpool, sizeof(struct dwc2_xfer), 0, IPL_USB, 0, 1467 "dwc2xfer", NULL); 1468 pool_init(&sc->sc_qhpool, sizeof(struct dwc2_qh), 0, IPL_USB, 0, 1469 "dwc2qh", NULL); 1470 pool_init(&sc->sc_qtdpool, sizeof(struct dwc2_qtd), 0, IPL_USB, 0, 1471 "dwc2qtd", NULL); 1472 1473 sc->sc_hsotg = malloc(sizeof(struct dwc2_hsotg), M_DEVBUF, 1474 M_ZERO | M_WAITOK); 1475 1476 sc->sc_hsotg->hsotg_sc = sc; 1477 sc->sc_hsotg->dev = &sc->sc_bus.bdev; 1478 sc->sc_hcdenabled = true; 1479 1480 err = dwc2_hcd_init(sc->sc_hsotg, sc->sc_params); 1481 if (err) { 1482 err = -err; 1483 goto fail; 1484 } 1485 1486 return 0; 1487 1488 fail: 1489 free(sc->sc_hsotg, M_DEVBUF, sizeof(struct dwc2_hsotg)); 1490 softintr_disestablish(sc->sc_rhc_si); 1491 1492 return err; 1493 } 1494 1495 int 1496 dwc2_dma_config(struct dwc2_softc *sc, struct dwc2_core_dma_config *config) 1497 { 1498 sc->sc_dma_config = config; 1499 return dwc2_hcd_dma_config(sc->sc_hsotg, sc->sc_dma_config); 1500 } 1501 1502 #if 0 1503 /* 1504 * curmode is a mode indication bit 0 = device, 1 = host 1505 */ 1506 STATIC const char * const intnames[32] = { 1507 "curmode", "modemis", "otgint", "sof", 1508 "rxflvl", "nptxfemp", "ginnakeff", "goutnakeff", 1509 "ulpickint", "i2cint", "erlysusp", "usbsusp", 1510 "usbrst", "enumdone", "isooutdrop", "eopf", 1511 "restore_done", "epmis", "iepint", "oepint", 1512 "incompisoin", "incomplp", "fetsusp", "resetdet", 1513 "prtint", "hchint", "ptxfemp", "lpm", 1514 "conidstschng", "disconnint", "sessreqint", "wkupint" 1515 }; 1516 1517 1518 /***********************************************************************/ 1519 1520 #endif 1521 1522 1523 void 1524 dw_timeout(void *arg) 1525 { 1526 struct delayed_work *dw = arg; 1527 1528 task_set(&dw->work, dw->dw_fn, dw->dw_arg); 1529 task_add(dw->dw_wq, &dw->work); 1530 } 1531 1532 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr, 1533 int *hub_port) 1534 { 1535 struct usbd_xfer *xfer = context; 1536 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1537 struct usbd_device *dev = dpipe->pipe.device; 1538 1539 if (dev->myhsport != NULL) { 1540 *hub_addr = dev->myhsport->parent->address; 1541 *hub_port = dev->myhsport->portno; 1542 } 1543 } 1544 1545 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 1546 { 1547 struct usbd_xfer *xfer = context; 1548 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1549 struct usbd_device *dev = dpipe->pipe.device; 1550 1551 return dev->speed; 1552 } 1553 1554 /* 1555 * Sets the final status of an URB and returns it to the upper layer. Any 1556 * required cleanup of the URB is performed. 1557 * 1558 * Must be called with interrupt disabled and spinlock held 1559 */ 1560 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 1561 int status) 1562 { 1563 struct usbd_xfer *xfer; 1564 struct dwc2_xfer *dxfer; 1565 struct dwc2_softc *sc; 1566 usb_endpoint_descriptor_t *ed; 1567 uint8_t xfertype; 1568 1569 if (!qtd) { 1570 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__); 1571 return; 1572 } 1573 1574 if (!qtd->urb) { 1575 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__); 1576 return; 1577 } 1578 1579 xfer = qtd->urb->priv; 1580 if (!xfer) { 1581 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__); 1582 return; 1583 } 1584 1585 dxfer = DWC2_XFER2DXFER(xfer); 1586 sc = DWC2_XFER2SC(xfer); 1587 ed = xfer->pipe->endpoint->edesc; 1588 xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1589 1590 xfer->actlen = dwc2_hcd_urb_get_actual_length(qtd->urb); 1591 1592 DPRINTFN(3, "xfer=%p actlen=%d\n", xfer, xfer->actlen); 1593 1594 if (xfertype == UE_ISOCHRONOUS && dbg_perio()) { 1595 int i; 1596 1597 for (i = 0; i < xfer->nframes; i++) 1598 dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n", 1599 i, qtd->urb->iso_descs[i].status); 1600 } 1601 1602 if (xfertype == UE_ISOCHRONOUS) { 1603 int i; 1604 1605 xfer->actlen = 0; 1606 for (i = 0; i < xfer->nframes; ++i) { 1607 xfer->frlengths[i] = 1608 dwc2_hcd_urb_get_iso_desc_actual_length( 1609 qtd->urb, i); 1610 xfer->actlen += xfer->frlengths[i]; 1611 } 1612 } 1613 1614 if (!status) { 1615 if (!(xfer->flags & USBD_SHORT_XFER_OK) && 1616 xfer->actlen < xfer->length) 1617 status = -EIO; 1618 } 1619 1620 switch (status) { 1621 case 0: 1622 xfer->status = USBD_NORMAL_COMPLETION; 1623 break; 1624 case -EPIPE: 1625 xfer->status = USBD_STALLED; 1626 break; 1627 case -ETIMEDOUT: 1628 xfer->status = USBD_TIMEOUT; 1629 break; 1630 case -EPROTO: 1631 xfer->status = USBD_INVAL; 1632 break; 1633 case -EIO: 1634 xfer->status = USBD_IOERROR; 1635 break; 1636 case -EOVERFLOW: 1637 xfer->status = USBD_IOERROR; 1638 break; 1639 default: 1640 printf("%s: unknown error status %d\n", __func__, status); 1641 } 1642 1643 if (xfertype == UE_ISOCHRONOUS || 1644 xfertype == UE_INTERRUPT) { 1645 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1646 1647 dwc2_free_bus_bandwidth(hsotg, 1648 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1649 xfer); 1650 } 1651 1652 qtd->urb = NULL; 1653 timeout_del(&xfer->timeout_handle); 1654 usb_rem_task(xfer->device, &xfer->abort_task); 1655 1656 MUTEX_ASSERT_LOCKED(&hsotg->lock); 1657 1658 TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext); 1659 1660 mtx_leave(&hsotg->lock); 1661 usb_schedsoftintr(&sc->sc_bus); 1662 mtx_enter(&hsotg->lock); 1663 } 1664 1665 1666 int 1667 _dwc2_hcd_start(struct dwc2_hsotg *hsotg) 1668 { 1669 dev_dbg(hsotg->dev, "DWC OTG HCD START\n"); 1670 1671 mtx_enter(&hsotg->lock); 1672 1673 hsotg->op_state = OTG_STATE_A_HOST; 1674 1675 dwc2_hcd_reinit(hsotg); 1676 1677 /* Try to enable port. */ 1678 dwc2_handle_hcd_intr(hsotg); 1679 1680 /*XXXNH*/ 1681 delay(50); 1682 1683 mtx_leave(&hsotg->lock); 1684 return 0; 1685 } 1686 1687 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg) 1688 { 1689 1690 return false; 1691 } 1692