1 /* $OpenBSD: sdmmcvar.h,v 1.22 2013/09/12 11:54:04 rapha Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _SDMMCVAR_H_ 20 #define _SDMMCVAR_H_ 21 22 #include <sys/queue.h> 23 #include <sys/rwlock.h> 24 25 #include <scsi/scsi_all.h> 26 #include <scsi/scsiconf.h> 27 28 #include <dev/sdmmc/sdmmcchip.h> 29 #include <dev/sdmmc/sdmmcreg.h> 30 31 struct sdmmc_csd { 32 int csdver; /* CSD structure format */ 33 int mmcver; /* MMC version (for CID format) */ 34 int capacity; /* total number of sectors */ 35 int sector_size; /* sector size in bytes */ 36 int read_bl_len; /* block length for reads */ 37 /* ... */ 38 }; 39 40 struct sdmmc_cid { 41 int mid; /* manufacturer identification number */ 42 int oid; /* OEM/product identification number */ 43 char pnm[8]; /* product name (MMC v1 has the longest) */ 44 int rev; /* product revision */ 45 int psn; /* product serial number */ 46 int mdt; /* manufacturing date */ 47 }; 48 49 typedef u_int32_t sdmmc_response[4]; 50 51 struct sdmmc_softc; 52 53 struct sdmmc_task { 54 void (*func)(void *arg); 55 void *arg; 56 int onqueue; 57 struct sdmmc_softc *sc; 58 TAILQ_ENTRY(sdmmc_task) next; 59 }; 60 61 #define sdmmc_init_task(xtask, xfunc, xarg) do { \ 62 (xtask)->func = (xfunc); \ 63 (xtask)->arg = (xarg); \ 64 (xtask)->onqueue = 0; \ 65 (xtask)->sc = NULL; \ 66 } while (0) 67 68 #define sdmmc_task_pending(xtask) ((xtask)->onqueue) 69 70 struct sdmmc_command { 71 struct sdmmc_task c_task; /* task queue entry */ 72 u_int16_t c_opcode; /* SD or MMC command index */ 73 u_int32_t c_arg; /* SD/MMC command argument */ 74 sdmmc_response c_resp; /* response buffer */ 75 void *c_data; /* buffer to send or read into */ 76 int c_datalen; /* length of data buffer */ 77 int c_blklen; /* block length */ 78 int c_flags; /* see below */ 79 #define SCF_ITSDONE 0x0001 /* command is complete */ 80 #define SCF_CMD(flags) ((flags) & 0x00f0) 81 #define SCF_CMD_AC 0x0000 82 #define SCF_CMD_ADTC 0x0010 83 #define SCF_CMD_BC 0x0020 84 #define SCF_CMD_BCR 0x0030 85 #define SCF_CMD_READ 0x0040 /* read command (data expected) */ 86 #define SCF_RSP_BSY 0x0100 87 #define SCF_RSP_136 0x0200 88 #define SCF_RSP_CRC 0x0400 89 #define SCF_RSP_IDX 0x0800 90 #define SCF_RSP_PRESENT 0x1000 91 /* response types */ 92 #define SCF_RSP_R0 0 /* none */ 93 #define SCF_RSP_R1 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 94 #define SCF_RSP_R1B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 95 #define SCF_RSP_R2 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136) 96 #define SCF_RSP_R3 (SCF_RSP_PRESENT) 97 #define SCF_RSP_R4 (SCF_RSP_PRESENT) 98 #define SCF_RSP_R5 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 99 #define SCF_RSP_R5B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 100 #define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 101 #define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 102 int c_error; /* errno value on completion */ 103 104 /* Host controller owned fields for data xfer in progress */ 105 int c_resid; /* remaining I/O */ 106 u_char *c_buf; /* remaining data */ 107 }; 108 109 /* 110 * Decoded PC Card 16 based Card Information Structure (CIS), 111 * per card (function 0) and per function (1 and greater). 112 */ 113 struct sdmmc_cis { 114 u_int16_t manufacturer; 115 #define SDMMC_VENDOR_INVALID 0xffff 116 u_int16_t product; 117 #define SDMMC_PRODUCT_INVALID 0xffff 118 u_int8_t function; 119 #define SDMMC_FUNCTION_INVALID 0xff 120 u_char cis1_major; 121 u_char cis1_minor; 122 char cis1_info_buf[256]; 123 char *cis1_info[4]; 124 }; 125 126 /* 127 * Structure describing either an SD card I/O function or a SD/MMC 128 * memory card from a "stack of cards" that responded to CMD2. For a 129 * combo card with one I/O function and one memory card, there will be 130 * two of these structures allocated. Each card slot has such a list 131 * of sdmmc_function structures. 132 */ 133 struct sdmmc_function { 134 /* common members */ 135 struct sdmmc_softc *sc; /* card slot softc */ 136 u_int16_t rca; /* relative card address */ 137 int flags; 138 #define SFF_ERROR 0x0001 /* function is poo; ignore it */ 139 #define SFF_SDHC 0x0002 /* SD High Capacity card */ 140 SIMPLEQ_ENTRY(sdmmc_function) sf_list; 141 /* SD card I/O function members */ 142 int number; /* I/O function number or -1 */ 143 struct device *child; /* function driver */ 144 struct sdmmc_cis cis; /* decoded CIS */ 145 /* SD/MMC memory card members */ 146 struct sdmmc_csd csd; /* decoded CSD value */ 147 struct sdmmc_cid cid; /* decoded CID value */ 148 sdmmc_response raw_cid; /* temp. storage for decoding */ 149 }; 150 151 /* 152 * Structure describing a single SD/MMC/SDIO card slot. 153 */ 154 struct sdmmc_softc { 155 struct device sc_dev; /* base device */ 156 #define DEVNAME(sc) ((sc)->sc_dev.dv_xname) 157 sdmmc_chipset_tag_t sct; /* host controller chipset tag */ 158 sdmmc_chipset_handle_t sch; /* host controller chipset handle */ 159 int sc_flags; 160 #define SMF_SD_MODE 0x0001 /* host in SD mode (MMC otherwise) */ 161 #define SMF_IO_MODE 0x0002 /* host in I/O mode (SD mode only) */ 162 #define SMF_MEM_MODE 0x0004 /* host in memory mode (SD or MMC) */ 163 #define SMF_CARD_PRESENT 0x0010 /* card presence noticed */ 164 #define SMF_CARD_ATTACHED 0x0020 /* card driver(s) attached */ 165 #define SMF_STOP_AFTER_MULTIPLE 0x0040 /* send a stop after a multiple cmd */ 166 #define SMF_CONFIG_PENDING 0x0080 /* config_pending_incr() called */ 167 168 uint32_t sc_caps; /* host capability */ 169 #define SMC_CAPS_AUTO_STOP 0x0001 /* send CMD12 automagically by host */ 170 #define SMC_CAPS_4BIT_MODE 0x0002 /* 4-bits data bus width */ 171 #define SMC_CAPS_DMA 0x0004 /* DMA transfer */ 172 #define SMC_CAPS_SPI_MODE 0x0008 /* SPI mode */ 173 #define SMC_CAPS_POLL_CARD_DET 0x0010 /* Polling card detect */ 174 #define SMC_CAPS_SINGLE_ONLY 0x0020 /* only single read/write */ 175 #define SMC_CAPS_8BIT_MODE 0x0040 /* 8-bits data bus width */ 176 #define SMC_CAPS_MULTI_SEG_DMA 0x0080 /* multiple segment DMA transfer */ 177 #define SMC_CAPS_SD_HIGHSPEED 0x0100 /* SD high-speed timing */ 178 #define SMC_CAPS_MMC_HIGHSPEED 0x0200 /* MMC high-speed timing */ 179 180 int sc_function_count; /* number of I/O functions (SDIO) */ 181 struct sdmmc_function *sc_card; /* selected card */ 182 struct sdmmc_function *sc_fn0; /* function 0, the card itself */ 183 SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */ 184 int sc_dying; /* bus driver is shutting down */ 185 struct proc *sc_task_thread; /* asynchronous tasks */ 186 TAILQ_HEAD(, sdmmc_task) sc_tskq; /* task thread work queue */ 187 struct sdmmc_task sc_discover_task; /* card attach/detach task */ 188 struct sdmmc_task sc_intr_task; /* card interrupt task */ 189 struct rwlock sc_lock; /* lock around host controller */ 190 void *sc_scsibus; /* SCSI bus emulation softc */ 191 TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */ 192 long sc_max_xfer; /* maximum transfer size */ 193 }; 194 195 /* 196 * Attach devices at the sdmmc bus. 197 */ 198 struct sdmmc_attach_args { 199 struct scsi_link *scsi_link; /* XXX */ 200 struct sdmmc_function *sf; 201 }; 202 203 #define IPL_SDMMC IPL_BIO 204 #define splsdmmc() splbio() 205 206 #define SDMMC_ASSERT_LOCKED(sc) \ 207 rw_assert_wrlock(&(sc)->sc_lock) 208 209 void sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *); 210 void sdmmc_del_task(struct sdmmc_task *); 211 212 struct sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *); 213 void sdmmc_function_free(struct sdmmc_function *); 214 int sdmmc_set_bus_power(struct sdmmc_softc *, u_int32_t, u_int32_t); 215 int sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *); 216 int sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_command *); 217 void sdmmc_go_idle_state(struct sdmmc_softc *); 218 int sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *); 219 int sdmmc_set_relative_addr(struct sdmmc_softc *, 220 struct sdmmc_function *); 221 int sdmmc_send_if_cond(struct sdmmc_softc *, uint32_t); 222 223 void sdmmc_intr_enable(struct sdmmc_function *); 224 void sdmmc_intr_disable(struct sdmmc_function *); 225 void *sdmmc_intr_establish(struct device *, int (*)(void *), 226 void *, const char *); 227 void sdmmc_intr_disestablish(void *); 228 void sdmmc_intr_task(void *); 229 230 int sdmmc_io_enable(struct sdmmc_softc *); 231 void sdmmc_io_scan(struct sdmmc_softc *); 232 int sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *); 233 void sdmmc_io_attach(struct sdmmc_softc *); 234 void sdmmc_io_detach(struct sdmmc_softc *); 235 u_int8_t sdmmc_io_read_1(struct sdmmc_function *, int); 236 u_int16_t sdmmc_io_read_2(struct sdmmc_function *, int); 237 u_int32_t sdmmc_io_read_4(struct sdmmc_function *, int); 238 int sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int); 239 void sdmmc_io_write_1(struct sdmmc_function *, int, u_int8_t); 240 void sdmmc_io_write_2(struct sdmmc_function *, int, u_int16_t); 241 void sdmmc_io_write_4(struct sdmmc_function *, int, u_int32_t); 242 int sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int); 243 int sdmmc_io_function_ready(struct sdmmc_function *); 244 int sdmmc_io_function_enable(struct sdmmc_function *); 245 void sdmmc_io_function_disable(struct sdmmc_function *); 246 247 int sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *); 248 void sdmmc_print_cis(struct sdmmc_function *); 249 void sdmmc_check_cis_quirks(struct sdmmc_function *); 250 251 int sdmmc_mem_enable(struct sdmmc_softc *); 252 void sdmmc_mem_scan(struct sdmmc_softc *); 253 int sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *); 254 int sdmmc_mem_read_block(struct sdmmc_function *, int, u_char *, size_t); 255 int sdmmc_mem_write_block(struct sdmmc_function *, int, u_char *, size_t); 256 257 /* ioctls */ 258 259 #include <sys/ioccom.h> 260 261 struct bio_sdmmc_command { 262 void *cookie; 263 struct sdmmc_command cmd; 264 }; 265 266 struct bio_sdmmc_debug { 267 void *cookie; 268 int debug; 269 }; 270 271 #define SDIOCEXECMMC _IOWR('S',0, struct bio_sdmmc_command) 272 #define SDIOCEXECAPP _IOWR('S',1, struct bio_sdmmc_command) 273 #define SDIOCSETDEBUG _IOWR('S',2, struct bio_sdmmc_debug) 274 275 #endif 276