1 /* $OpenBSD: sdmmc_mem.c,v 1.29 2016/05/05 20:40:48 kettenis Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* Routines for SD/MMC memory cards. */ 20 21 #include <sys/param.h> 22 #include <sys/device.h> 23 #include <sys/kernel.h> 24 #include <sys/malloc.h> 25 #include <sys/systm.h> 26 27 #include <dev/sdmmc/sdmmcchip.h> 28 #include <dev/sdmmc/sdmmcreg.h> 29 #include <dev/sdmmc/sdmmcvar.h> 30 31 typedef struct { uint32_t _bits[512/32]; } __packed __aligned(4) sdmmc_bitfield512_t; 32 33 void sdmmc_be512_to_bitfield512(sdmmc_bitfield512_t *); 34 35 int sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response, 36 struct sdmmc_function *); 37 int sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response, 38 struct sdmmc_function *); 39 void sdmmc_print_cid(struct sdmmc_cid *); 40 41 int sdmmc_mem_send_op_cond(struct sdmmc_softc *, u_int32_t, u_int32_t *); 42 int sdmmc_mem_set_blocklen(struct sdmmc_softc *, struct sdmmc_function *); 43 44 int sdmmc_mem_send_scr(struct sdmmc_softc *, uint32_t *); 45 int sdmmc_mem_decode_scr(struct sdmmc_softc *, uint32_t *, 46 struct sdmmc_function *); 47 48 int sdmmc_mem_send_cxd_data(struct sdmmc_softc *, int, void *, size_t); 49 int sdmmc_set_bus_width(struct sdmmc_function *, int); 50 int sdmmc_mem_mmc_switch(struct sdmmc_function *, uint8_t, uint8_t, uint8_t); 51 52 int sdmmc_mem_sd_init(struct sdmmc_softc *, struct sdmmc_function *); 53 int sdmmc_mem_mmc_init(struct sdmmc_softc *, struct sdmmc_function *); 54 int sdmmc_mem_single_read_block(struct sdmmc_function *, int, u_char *, 55 size_t); 56 int sdmmc_mem_read_block_subr(struct sdmmc_function *, bus_dmamap_t, 57 int, u_char *, size_t); 58 int sdmmc_mem_single_write_block(struct sdmmc_function *, int, u_char *, 59 size_t); 60 int sdmmc_mem_write_block_subr(struct sdmmc_function *, bus_dmamap_t, 61 int, u_char *, size_t); 62 63 #ifdef SDMMC_DEBUG 64 #define DPRINTF(s) printf s 65 #else 66 #define DPRINTF(s) /**/ 67 #endif 68 69 /* 70 * Initialize SD/MMC memory cards and memory in SDIO "combo" cards. 71 */ 72 int 73 sdmmc_mem_enable(struct sdmmc_softc *sc) 74 { 75 u_int32_t host_ocr; 76 u_int32_t card_ocr; 77 78 rw_assert_wrlock(&sc->sc_lock); 79 80 /* Set host mode to SD "combo" card or SD memory-only. */ 81 SET(sc->sc_flags, SMF_SD_MODE|SMF_MEM_MODE); 82 83 /* Reset memory (*must* do that before CMD55 or CMD1). */ 84 sdmmc_go_idle_state(sc); 85 86 /* 87 * Read the SD/MMC memory OCR value by issuing CMD55 followed 88 * by ACMD41 to read the OCR value from memory-only SD cards. 89 * MMC cards will not respond to CMD55 or ACMD41 and this is 90 * how we distinguish them from SD cards. 91 */ 92 mmc_mode: 93 if (sdmmc_mem_send_op_cond(sc, 0, &card_ocr) != 0) { 94 if (ISSET(sc->sc_flags, SMF_SD_MODE) && 95 !ISSET(sc->sc_flags, SMF_IO_MODE)) { 96 /* Not a SD card, switch to MMC mode. */ 97 CLR(sc->sc_flags, SMF_SD_MODE); 98 goto mmc_mode; 99 } 100 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 101 DPRINTF(("%s: can't read memory OCR\n", 102 DEVNAME(sc))); 103 return 1; 104 } else { 105 /* Not a "combo" card. */ 106 CLR(sc->sc_flags, SMF_MEM_MODE); 107 return 0; 108 } 109 } 110 111 /* Set the lowest voltage supported by the card and host. */ 112 host_ocr = sdmmc_chip_host_ocr(sc->sct, sc->sch); 113 if (sdmmc_set_bus_power(sc, host_ocr, card_ocr) != 0) { 114 DPRINTF(("%s: can't supply voltage requested by card\n", 115 DEVNAME(sc))); 116 return 1; 117 } 118 119 /* Tell the card(s) to enter the idle state (again). */ 120 sdmmc_go_idle_state(sc); 121 122 host_ocr &= card_ocr; /* only allow the common voltages */ 123 124 if (sdmmc_send_if_cond(sc, card_ocr) == 0) 125 host_ocr |= SD_OCR_SDHC_CAP; 126 127 /* Send the new OCR value until all cards are ready. */ 128 if (sdmmc_mem_send_op_cond(sc, host_ocr, NULL) != 0) { 129 DPRINTF(("%s: can't send memory OCR\n", DEVNAME(sc))); 130 return 1; 131 } 132 return 0; 133 } 134 135 /* 136 * Read the CSD and CID from all cards and assign each card a unique 137 * relative card address (RCA). CMD2 is ignored by SDIO-only cards. 138 */ 139 void 140 sdmmc_mem_scan(struct sdmmc_softc *sc) 141 { 142 struct sdmmc_command cmd; 143 struct sdmmc_function *sf; 144 u_int16_t next_rca; 145 int error; 146 int i; 147 148 rw_assert_wrlock(&sc->sc_lock); 149 150 /* 151 * CMD2 is a broadcast command understood by SD cards and MMC 152 * cards. All cards begin to respond to the command, but back 153 * off if another card drives the CMD line to a different level. 154 * Only one card will get its entire response through. That 155 * card remains silent once it has been assigned a RCA. 156 */ 157 for (i = 0; i < 100; i++) { 158 bzero(&cmd, sizeof cmd); 159 cmd.c_opcode = MMC_ALL_SEND_CID; 160 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R2; 161 162 error = sdmmc_mmc_command(sc, &cmd); 163 if (error == ETIMEDOUT) { 164 /* No more cards there. */ 165 break; 166 } else if (error != 0) { 167 DPRINTF(("%s: can't read CID\n", DEVNAME(sc))); 168 break; 169 } 170 171 /* In MMC mode, find the next available RCA. */ 172 next_rca = 1; 173 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) 174 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) 175 next_rca++; 176 177 /* Allocate a sdmmc_function structure. */ 178 sf = sdmmc_function_alloc(sc); 179 sf->rca = next_rca; 180 181 /* 182 * Remember the CID returned in the CMD2 response for 183 * later decoding. 184 */ 185 bcopy(cmd.c_resp, sf->raw_cid, sizeof sf->raw_cid); 186 187 /* 188 * Silence the card by assigning it a unique RCA, or 189 * querying it for its RCA in the case of SD. 190 */ 191 if (sdmmc_set_relative_addr(sc, sf) != 0) { 192 printf("%s: can't set mem RCA\n", DEVNAME(sc)); 193 sdmmc_function_free(sf); 194 break; 195 } 196 197 #if 0 198 /* Verify that the RCA has been set by selecting the card. */ 199 if (sdmmc_select_card(sc, sf) != 0) { 200 printf("%s: can't select mem RCA %d\n", 201 DEVNAME(sc), sf->rca); 202 sdmmc_function_free(sf); 203 break; 204 } 205 206 /* Deselect. */ 207 (void)sdmmc_select_card(sc, NULL); 208 #endif 209 210 /* 211 * If this is a memory-only card, the card responding 212 * first becomes an alias for SDIO function 0. 213 */ 214 if (sc->sc_fn0 == NULL) 215 sc->sc_fn0 = sf; 216 217 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 218 } 219 220 /* 221 * All cards are either inactive or awaiting further commands. 222 * Read the CSDs and decode the raw CID for each card. 223 */ 224 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) { 225 bzero(&cmd, sizeof cmd); 226 cmd.c_opcode = MMC_SEND_CSD; 227 cmd.c_arg = MMC_ARG_RCA(sf->rca); 228 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R2; 229 230 if (sdmmc_mmc_command(sc, &cmd) != 0) { 231 SET(sf->flags, SFF_ERROR); 232 continue; 233 } 234 235 if (sdmmc_decode_csd(sc, cmd.c_resp, sf) != 0 || 236 sdmmc_decode_cid(sc, sf->raw_cid, sf) != 0) { 237 SET(sf->flags, SFF_ERROR); 238 continue; 239 } 240 241 #ifdef SDMMC_DEBUG 242 printf("%s: CID: ", DEVNAME(sc)); 243 sdmmc_print_cid(&sf->cid); 244 #endif 245 } 246 } 247 248 int 249 sdmmc_decode_csd(struct sdmmc_softc *sc, sdmmc_response resp, 250 struct sdmmc_function *sf) 251 { 252 struct sdmmc_csd *csd = &sf->csd; 253 254 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 255 /* 256 * CSD version 1.0 corresponds to SD system 257 * specification version 1.0 - 1.10. (SanDisk, 3.5.3) 258 */ 259 csd->csdver = SD_CSD_CSDVER(resp); 260 switch (csd->csdver) { 261 case SD_CSD_CSDVER_2_0: 262 sf->flags |= SFF_SDHC; 263 csd->capacity = SD_CSD_V2_CAPACITY(resp); 264 csd->read_bl_len = SD_CSD_V2_BL_LEN; 265 break; 266 case SD_CSD_CSDVER_1_0: 267 csd->capacity = SD_CSD_CAPACITY(resp); 268 csd->read_bl_len = SD_CSD_READ_BL_LEN(resp); 269 break; 270 default: 271 printf("%s: unknown SD CSD structure version 0x%x\n", 272 DEVNAME(sc), csd->csdver); 273 return 1; 274 break; 275 } 276 csd->ccc = SD_CSD_CCC(resp); 277 } else { 278 csd->csdver = MMC_CSD_CSDVER(resp); 279 if (csd->csdver == MMC_CSD_CSDVER_1_0 || 280 csd->csdver == MMC_CSD_CSDVER_2_0 || 281 csd->csdver == MMC_CSD_CSDVER_EXT_CSD) { 282 csd->mmcver = MMC_CSD_MMCVER(resp); 283 csd->capacity = MMC_CSD_CAPACITY(resp); 284 csd->read_bl_len = MMC_CSD_READ_BL_LEN(resp); 285 } else { 286 printf("%s: unknown MMC CSD structure version 0x%x\n", 287 DEVNAME(sc), csd->csdver); 288 return 1; 289 } 290 } 291 csd->sector_size = MIN(1 << csd->read_bl_len, 292 sdmmc_chip_host_maxblklen(sc->sct, sc->sch)); 293 if (csd->sector_size < (1<<csd->read_bl_len)) 294 csd->capacity *= (1<<csd->read_bl_len) / 295 csd->sector_size; 296 297 return 0; 298 } 299 300 int 301 sdmmc_decode_cid(struct sdmmc_softc *sc, sdmmc_response resp, 302 struct sdmmc_function *sf) 303 { 304 struct sdmmc_cid *cid = &sf->cid; 305 306 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 307 cid->mid = SD_CID_MID(resp); 308 cid->oid = SD_CID_OID(resp); 309 SD_CID_PNM_CPY(resp, cid->pnm); 310 cid->rev = SD_CID_REV(resp); 311 cid->psn = SD_CID_PSN(resp); 312 cid->mdt = SD_CID_MDT(resp); 313 } else { 314 switch(sf->csd.mmcver) { 315 case MMC_CSD_MMCVER_1_0: 316 case MMC_CSD_MMCVER_1_4: 317 cid->mid = MMC_CID_MID_V1(resp); 318 MMC_CID_PNM_V1_CPY(resp, cid->pnm); 319 cid->rev = MMC_CID_REV_V1(resp); 320 cid->psn = MMC_CID_PSN_V1(resp); 321 cid->mdt = MMC_CID_MDT_V1(resp); 322 break; 323 case MMC_CSD_MMCVER_2_0: 324 case MMC_CSD_MMCVER_3_1: 325 case MMC_CSD_MMCVER_4_0: 326 cid->mid = MMC_CID_MID_V2(resp); 327 cid->oid = MMC_CID_OID_V2(resp); 328 MMC_CID_PNM_V2_CPY(resp, cid->pnm); 329 cid->psn = MMC_CID_PSN_V2(resp); 330 break; 331 default: 332 printf("%s: unknown MMC version %d\n", 333 DEVNAME(sc), sf->csd.mmcver); 334 return 1; 335 } 336 } 337 return 0; 338 } 339 340 #ifdef SDMMC_DEBUG 341 void 342 sdmmc_print_cid(struct sdmmc_cid *cid) 343 { 344 printf("mid=0x%02x oid=0x%04x pnm=\"%s\" rev=0x%02x psn=0x%08x" 345 " mdt=%03x\n", cid->mid, cid->oid, cid->pnm, cid->rev, cid->psn, 346 cid->mdt); 347 } 348 #endif 349 350 int 351 sdmmc_mem_send_scr(struct sdmmc_softc *sc, uint32_t *scr) 352 { 353 struct sdmmc_command cmd; 354 void *ptr = NULL; 355 int datalen = 8; 356 int error = 0; 357 358 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 359 if (ptr == NULL) 360 goto out; 361 362 memset(&cmd, 0, sizeof(cmd)); 363 cmd.c_data = ptr; 364 cmd.c_datalen = datalen; 365 cmd.c_blklen = datalen; 366 cmd.c_arg = 0; 367 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1; 368 cmd.c_opcode = SD_APP_SEND_SCR; 369 370 error = sdmmc_app_command(sc, &cmd); 371 if (error == 0) 372 memcpy(scr, ptr, datalen); 373 374 out: 375 if (ptr != NULL) 376 free(ptr, M_DEVBUF, datalen); 377 378 return error; 379 } 380 381 int 382 sdmmc_mem_decode_scr(struct sdmmc_softc *sc, uint32_t *raw_scr, 383 struct sdmmc_function *sf) 384 { 385 sdmmc_response resp; 386 int ver; 387 388 memset(resp, 0, sizeof(resp)); 389 /* 390 * Change the raw SCR to a response. 391 */ 392 resp[0] = be32toh(raw_scr[1]) >> 8; // LSW 393 resp[1] = be32toh(raw_scr[0]); // MSW 394 resp[0] |= (resp[1] & 0xff) << 24; 395 resp[1] >>= 8; 396 397 ver = SCR_STRUCTURE(resp); 398 sf->scr.sd_spec = SCR_SD_SPEC(resp); 399 sf->scr.bus_width = SCR_SD_BUS_WIDTHS(resp); 400 401 DPRINTF(("%s: %s: %08x%08x ver=%d, spec=%d, bus width=%d\n", 402 DEVNAME(sc), __func__, resp[1], resp[0], 403 ver, sf->scr.sd_spec, sf->scr.bus_width)); 404 405 if (ver != 0) { 406 DPRINTF(("%s: unknown SCR structure version: %d\n", 407 DEVNAME(sc), ver)); 408 return EINVAL; 409 } 410 return 0; 411 } 412 413 int 414 sdmmc_mem_send_cxd_data(struct sdmmc_softc *sc, int opcode, void *data, 415 size_t datalen) 416 { 417 struct sdmmc_command cmd; 418 void *ptr = NULL; 419 int error = 0; 420 421 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 422 if (ptr == NULL) { 423 error = ENOMEM; 424 goto out; 425 } 426 427 memset(&cmd, 0, sizeof(cmd)); 428 cmd.c_data = ptr; 429 cmd.c_datalen = datalen; 430 cmd.c_blklen = datalen; 431 cmd.c_opcode = opcode; 432 cmd.c_arg = 0; 433 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ; 434 if (opcode == MMC_SEND_EXT_CSD) 435 SET(cmd.c_flags, SCF_RSP_R1); 436 else 437 SET(cmd.c_flags, SCF_RSP_R2); 438 439 error = sdmmc_mmc_command(sc, &cmd); 440 if (error == 0) 441 memcpy(data, ptr, datalen); 442 443 out: 444 if (ptr != NULL) 445 free(ptr, M_DEVBUF, 0); 446 447 return error; 448 } 449 450 int 451 sdmmc_set_bus_width(struct sdmmc_function *sf, int width) 452 { 453 struct sdmmc_softc *sc = sf->sc; 454 struct sdmmc_command cmd; 455 int error; 456 457 memset(&cmd, 0, sizeof(cmd)); 458 cmd.c_opcode = SD_APP_SET_BUS_WIDTH; 459 cmd.c_flags = SCF_RSP_R1 | SCF_CMD_AC; 460 461 switch (width) { 462 case 1: 463 cmd.c_arg = SD_ARG_BUS_WIDTH_1; 464 break; 465 466 case 4: 467 cmd.c_arg = SD_ARG_BUS_WIDTH_4; 468 break; 469 470 default: 471 return EINVAL; 472 } 473 474 error = sdmmc_app_command(sc, &cmd); 475 if (error == 0) 476 error = sdmmc_chip_bus_width(sc->sct, sc->sch, width); 477 return error; 478 } 479 480 int 481 sdmmc_mem_sd_switch(struct sdmmc_function *sf, int mode, int group, 482 int function, sdmmc_bitfield512_t *status) 483 { 484 struct sdmmc_softc *sc = sf->sc; 485 struct sdmmc_command cmd; 486 void *ptr = NULL; 487 int gsft, error = 0; 488 const int statlen = 64; 489 490 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 491 !ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) 492 return EINVAL; 493 494 if (group <= 0 || group > 6 || 495 function < 0 || function > 15) 496 return EINVAL; 497 498 gsft = (group - 1) << 2; 499 500 ptr = malloc(statlen, M_DEVBUF, M_NOWAIT | M_ZERO); 501 if (ptr == NULL) 502 goto out; 503 504 memset(&cmd, 0, sizeof(cmd)); 505 cmd.c_data = ptr; 506 cmd.c_datalen = statlen; 507 cmd.c_blklen = statlen; 508 cmd.c_opcode = SD_SEND_SWITCH_FUNC; 509 cmd.c_arg = 510 (!!mode << 31) | (function << gsft) | (0x00ffffff & ~(0xf << gsft)); 511 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1; 512 513 error = sdmmc_mmc_command(sc, &cmd); 514 if (error == 0) 515 memcpy(status, ptr, statlen); 516 517 out: 518 if (ptr != NULL) 519 free(ptr, M_DEVBUF, statlen); 520 521 if (error == 0) 522 sdmmc_be512_to_bitfield512(status); 523 524 return error; 525 } 526 527 int 528 sdmmc_mem_mmc_switch(struct sdmmc_function *sf, uint8_t set, uint8_t index, 529 uint8_t value) 530 { 531 struct sdmmc_softc *sc = sf->sc; 532 struct sdmmc_command cmd; 533 534 memset(&cmd, 0, sizeof(cmd)); 535 cmd.c_opcode = MMC_SWITCH; 536 cmd.c_arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 537 (index << 16) | (value << 8) | set; 538 cmd.c_flags = SCF_RSP_R1B | SCF_CMD_AC; 539 540 return sdmmc_mmc_command(sc, &cmd); 541 } 542 543 /* 544 * Initialize a SD/MMC memory card. 545 */ 546 int 547 sdmmc_mem_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 548 { 549 int error = 0; 550 551 rw_assert_wrlock(&sc->sc_lock); 552 553 if (sdmmc_select_card(sc, sf) != 0 || 554 sdmmc_mem_set_blocklen(sc, sf) != 0) 555 error = 1; 556 557 if (ISSET(sc->sc_flags, SMF_SD_MODE)) 558 error = sdmmc_mem_sd_init(sc, sf); 559 else 560 error = sdmmc_mem_mmc_init(sc, sf); 561 562 return error; 563 } 564 565 /* make 512-bit BE quantity __bitfield()-compatible */ 566 void 567 sdmmc_be512_to_bitfield512(sdmmc_bitfield512_t *buf) { 568 size_t i; 569 uint32_t tmp0, tmp1; 570 const size_t bitswords = nitems(buf->_bits); 571 for (i = 0; i < bitswords/2; i++) { 572 tmp0 = buf->_bits[i]; 573 tmp1 = buf->_bits[bitswords - 1 - i]; 574 buf->_bits[i] = be32toh(tmp1); 575 buf->_bits[bitswords - 1 - i] = be32toh(tmp0); 576 } 577 } 578 579 int 580 sdmmc_mem_sd_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 581 { 582 int support_func, best_func, error; 583 sdmmc_bitfield512_t status; /* Switch Function Status */ 584 uint32_t raw_scr[2]; 585 586 /* 587 * All SD cards are supposed to support Default Speed mode 588 * with frequencies up to 25 MHz. Bump up the clock frequency 589 * now as data transfers don't seem to work on the Realtek 590 * RTS5229 host controller if it is running at a low clock 591 * frequency. Reading the SCR requires a data transfer. 592 */ 593 error = sdmmc_chip_bus_clock(sc->sct, sc->sch, SDMMC_SDCLK_25MHZ, 594 SDMMC_TIMING_LEGACY); 595 if (error) { 596 printf("%s: can't change bus clock\n", DEVNAME(sc)); 597 return error; 598 } 599 600 error = sdmmc_mem_send_scr(sc, raw_scr); 601 if (error) { 602 printf("%s: SD_SEND_SCR send failed\n", DEVNAME(sc)); 603 return error; 604 } 605 error = sdmmc_mem_decode_scr(sc, raw_scr, sf); 606 if (error) 607 return error; 608 609 if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE) && 610 ISSET(sf->scr.bus_width, SCR_SD_BUS_WIDTHS_4BIT)) { 611 DPRINTF(("%s: change bus width\n", DEVNAME(sc))); 612 error = sdmmc_set_bus_width(sf, 4); 613 if (error) { 614 printf("%s: can't change bus width\n", DEVNAME(sc)); 615 return error; 616 } 617 } 618 619 best_func = 0; 620 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 621 ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) { 622 DPRINTF(("%s: switch func mode 0\n", DEVNAME(sc))); 623 error = sdmmc_mem_sd_switch(sf, 0, 1, 0, &status); 624 if (error) { 625 printf("%s: switch func mode 0 failed\n", DEVNAME(sc)); 626 return error; 627 } 628 629 support_func = SFUNC_STATUS_GROUP(&status, 1); 630 631 if (support_func & (1 << SD_ACCESS_MODE_SDR25)) 632 best_func = 1; 633 } 634 635 if (best_func != 0) { 636 DPRINTF(("%s: switch func mode 1(func=%d)\n", 637 DEVNAME(sc), best_func)); 638 error = 639 sdmmc_mem_sd_switch(sf, 1, 1, best_func, &status); 640 if (error) { 641 printf("%s: switch func mode 1 failed:" 642 " group 1 function %d(0x%2x)\n", 643 DEVNAME(sc), best_func, support_func); 644 return error; 645 } 646 647 /* Wait 400KHz x 8 clock (2.5us * 8 + slop) */ 648 delay(25); 649 650 /* High Speed mode, Frequency up to 50MHz. */ 651 error = sdmmc_chip_bus_clock(sc->sct, sc->sch, 652 SDMMC_SDCLK_50MHZ, SDMMC_TIMING_HIGHSPEED); 653 if (error) { 654 printf("%s: can't change bus clock\n", DEVNAME(sc)); 655 return error; 656 } 657 } 658 659 return 0; 660 } 661 662 int 663 sdmmc_mem_mmc_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 664 { 665 int width, value; 666 int card_type; 667 int error = 0; 668 u_int8_t ext_csd[512]; 669 int speed = 20000; 670 int timing = SDMMC_TIMING_LEGACY; 671 u_int32_t sectors = 0; 672 673 if (sf->csd.mmcver >= MMC_CSD_MMCVER_4_0) { 674 /* read EXT_CSD */ 675 error = sdmmc_mem_send_cxd_data(sc, 676 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 677 if (error != 0) { 678 SET(sf->flags, SFF_ERROR); 679 printf("%s: can't read EXT_CSD\n", DEVNAME(sc)); 680 return error; 681 } 682 683 card_type = ext_csd[EXT_CSD_CARD_TYPE]; 684 685 if (card_type & EXT_CSD_CARD_TYPE_F_52M_1_8V && 686 ISSET(sc->sc_caps, SMC_CAPS_MMC_DDR52)) { 687 speed = 52000; 688 timing = SDMMC_TIMING_MMC_DDR52; 689 } else if (card_type & EXT_CSD_CARD_TYPE_F_52M && 690 ISSET(sc->sc_caps, SMC_CAPS_MMC_HIGHSPEED)) { 691 speed = 52000; 692 timing = SDMMC_TIMING_HIGHSPEED; 693 } else if (card_type & EXT_CSD_CARD_TYPE_F_26M) { 694 speed = 26000; 695 } else { 696 printf("%s: unknown CARD_TYPE 0x%x\n", DEVNAME(sc), 697 ext_csd[EXT_CSD_CARD_TYPE]); 698 } 699 700 if (timing != SDMMC_TIMING_LEGACY) { 701 /* switch to high speed timing */ 702 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 703 EXT_CSD_HS_TIMING, EXT_CSD_HS_TIMING_HS); 704 if (error != 0) { 705 printf("%s: can't change high speed\n", 706 DEVNAME(sc)); 707 return error; 708 } 709 710 sdmmc_delay(10000); 711 } 712 713 error = sdmmc_chip_bus_clock(sc->sct, sc->sch, speed, SDMMC_TIMING_HIGHSPEED); 714 if (error != 0) { 715 printf("%s: can't change bus clock\n", DEVNAME(sc)); 716 return error; 717 } 718 719 if (timing != SDMMC_TIMING_LEGACY) { 720 /* read EXT_CSD again */ 721 error = sdmmc_mem_send_cxd_data(sc, 722 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 723 if (error != 0) { 724 printf("%s: can't re-read EXT_CSD\n", DEVNAME(sc)); 725 return error; 726 } 727 if (ext_csd[EXT_CSD_HS_TIMING] != EXT_CSD_HS_TIMING_HS) { 728 printf("%s, HS_TIMING set failed\n", DEVNAME(sc)); 729 return EINVAL; 730 } 731 } 732 733 if (ISSET(sc->sc_caps, SMC_CAPS_8BIT_MODE)) { 734 width = 8; 735 value = EXT_CSD_BUS_WIDTH_8; 736 } else if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE)) { 737 width = 4; 738 value = EXT_CSD_BUS_WIDTH_4; 739 } else { 740 width = 1; 741 value = EXT_CSD_BUS_WIDTH_1; 742 } 743 744 if (width != 1) { 745 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 746 EXT_CSD_BUS_WIDTH, value); 747 if (error == 0) 748 error = sdmmc_chip_bus_width(sc->sct, 749 sc->sch, width); 750 else { 751 DPRINTF(("%s: can't change bus width" 752 " (%d bit)\n", DEVNAME(sc), width)); 753 return error; 754 } 755 756 /* XXXX: need bus test? (using by CMD14 & CMD19) */ 757 sdmmc_delay(10000); 758 } 759 760 if (timing == SDMMC_TIMING_MMC_DDR52) { 761 switch (width) { 762 case 4: 763 value = EXT_CSD_BUS_WIDTH_4_DDR; 764 break; 765 case 8: 766 value = EXT_CSD_BUS_WIDTH_8_DDR; 767 break; 768 } 769 770 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 771 EXT_CSD_BUS_WIDTH, value); 772 if (error) { 773 printf("%s: can't switch to DDR\n", 774 DEVNAME(sc)); 775 return error; 776 } 777 778 sdmmc_delay(10000); 779 780 error = sdmmc_chip_signal_voltage(sc->sct, sc->sch, 781 SDMMC_SIGNAL_VOLTAGE_180); 782 if (error) { 783 printf("%s: can't switch signalling voltage\n", 784 DEVNAME(sc)); 785 return error; 786 } 787 788 error = sdmmc_chip_bus_clock(sc->sct, sc->sch, speed, timing); 789 if (error != 0) { 790 printf("%s: can't change bus clock\n", DEVNAME(sc)); 791 return error; 792 } 793 794 sdmmc_delay(10000); 795 } 796 797 sectors = ext_csd[EXT_CSD_SEC_COUNT + 0] << 0 | 798 ext_csd[EXT_CSD_SEC_COUNT + 1] << 8 | 799 ext_csd[EXT_CSD_SEC_COUNT + 2] << 16 | 800 ext_csd[EXT_CSD_SEC_COUNT + 3] << 24; 801 802 if (sectors > (2u * 1024 * 1024 * 1024) / 512) { 803 sf->flags |= SFF_SDHC; 804 sf->csd.capacity = sectors; 805 } 806 } 807 808 return error; 809 } 810 811 /* 812 * Get or set the card's memory OCR value (SD or MMC). 813 */ 814 int 815 sdmmc_mem_send_op_cond(struct sdmmc_softc *sc, u_int32_t ocr, 816 u_int32_t *ocrp) 817 { 818 struct sdmmc_command cmd; 819 int error; 820 int i; 821 822 rw_assert_wrlock(&sc->sc_lock); 823 824 /* 825 * If we change the OCR value, retry the command until the OCR 826 * we receive in response has the "CARD BUSY" bit set, meaning 827 * that all cards are ready for identification. 828 */ 829 for (i = 0; i < 100; i++) { 830 bzero(&cmd, sizeof cmd); 831 cmd.c_arg = ocr; 832 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R3; 833 834 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 835 cmd.c_opcode = SD_APP_OP_COND; 836 error = sdmmc_app_command(sc, &cmd); 837 } else { 838 cmd.c_arg &= ~MMC_OCR_ACCESS_MODE_MASK; 839 cmd.c_arg |= MMC_OCR_SECTOR_MODE; 840 cmd.c_opcode = MMC_SEND_OP_COND; 841 error = sdmmc_mmc_command(sc, &cmd); 842 } 843 if (error != 0) 844 break; 845 if (ISSET(MMC_R3(cmd.c_resp), MMC_OCR_MEM_READY) || 846 ocr == 0) 847 break; 848 error = ETIMEDOUT; 849 sdmmc_delay(10000); 850 } 851 if (error == 0 && ocrp != NULL) 852 *ocrp = MMC_R3(cmd.c_resp); 853 854 return error; 855 } 856 857 /* 858 * Set the read block length appropriately for this card, according to 859 * the card CSD register value. 860 */ 861 int 862 sdmmc_mem_set_blocklen(struct sdmmc_softc *sc, struct sdmmc_function *sf) 863 { 864 struct sdmmc_command cmd; 865 866 rw_assert_wrlock(&sc->sc_lock); 867 868 bzero(&cmd, sizeof cmd); 869 cmd.c_opcode = MMC_SET_BLOCKLEN; 870 cmd.c_arg = sf->csd.sector_size; 871 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1; 872 DPRINTF(("%s: read_bl_len=%d sector_size=%d\n", DEVNAME(sc), 873 1 << sf->csd.read_bl_len, sf->csd.sector_size)); 874 875 return sdmmc_mmc_command(sc, &cmd); 876 } 877 878 int 879 sdmmc_mem_read_block_subr(struct sdmmc_function *sf, bus_dmamap_t dmap, 880 int blkno, u_char *data, size_t datalen) 881 { 882 struct sdmmc_softc *sc = sf->sc; 883 struct sdmmc_command cmd; 884 int error; 885 886 887 if ((error = sdmmc_select_card(sc, sf)) != 0) 888 goto err; 889 890 bzero(&cmd, sizeof cmd); 891 cmd.c_data = data; 892 cmd.c_datalen = datalen; 893 cmd.c_blklen = sf->csd.sector_size; 894 cmd.c_opcode = (datalen / cmd.c_blklen) > 1 ? 895 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 896 if (sf->flags & SFF_SDHC) 897 cmd.c_arg = blkno; 898 else 899 cmd.c_arg = blkno << 9; 900 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1; 901 cmd.c_dmamap = dmap; 902 903 error = sdmmc_mmc_command(sc, &cmd); 904 if (error != 0) 905 goto err; 906 907 if (ISSET(sc->sc_flags, SMF_STOP_AFTER_MULTIPLE) && 908 cmd.c_opcode == MMC_READ_BLOCK_MULTIPLE) { 909 bzero(&cmd, sizeof cmd); 910 cmd.c_opcode = MMC_STOP_TRANSMISSION; 911 cmd.c_arg = MMC_ARG_RCA(sf->rca); 912 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B; 913 error = sdmmc_mmc_command(sc, &cmd); 914 if (error != 0) 915 goto err; 916 } 917 918 do { 919 bzero(&cmd, sizeof cmd); 920 cmd.c_opcode = MMC_SEND_STATUS; 921 cmd.c_arg = MMC_ARG_RCA(sf->rca); 922 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1; 923 error = sdmmc_mmc_command(sc, &cmd); 924 if (error != 0) 925 break; 926 /* XXX time out */ 927 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 928 929 err: 930 return (error); 931 } 932 933 int 934 sdmmc_mem_single_read_block(struct sdmmc_function *sf, int blkno, u_char *data, 935 size_t datalen) 936 { 937 int error = 0; 938 int i; 939 940 for (i = 0; i < datalen / sf->csd.sector_size; i++) { 941 error = sdmmc_mem_read_block_subr(sf, NULL, blkno + i, 942 data + i * sf->csd.sector_size, sf->csd.sector_size); 943 if (error) 944 break; 945 } 946 947 return (error); 948 } 949 950 int 951 sdmmc_mem_read_block(struct sdmmc_function *sf, int blkno, u_char *data, 952 size_t datalen) 953 { 954 struct sdmmc_softc *sc = sf->sc; 955 int error; 956 957 rw_enter_write(&sc->sc_lock); 958 959 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 960 error = sdmmc_mem_single_read_block(sf, blkno, data, datalen); 961 goto out; 962 } 963 964 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 965 error = sdmmc_mem_read_block_subr(sf, NULL, blkno, 966 data, datalen); 967 goto out; 968 } 969 970 /* DMA transfer */ 971 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, 972 NULL, BUS_DMA_NOWAIT|BUS_DMA_READ); 973 if (error) 974 goto out; 975 976 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 977 BUS_DMASYNC_PREREAD); 978 979 error = sdmmc_mem_read_block_subr(sf, sc->sc_dmap, blkno, data, 980 datalen); 981 if (error) 982 goto unload; 983 984 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 985 BUS_DMASYNC_POSTREAD); 986 unload: 987 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 988 989 out: 990 rw_exit(&sc->sc_lock); 991 return (error); 992 } 993 994 int 995 sdmmc_mem_write_block_subr(struct sdmmc_function *sf, bus_dmamap_t dmap, 996 int blkno, u_char *data, size_t datalen) 997 { 998 struct sdmmc_softc *sc = sf->sc; 999 struct sdmmc_command cmd; 1000 int error; 1001 1002 if ((error = sdmmc_select_card(sc, sf)) != 0) 1003 goto err; 1004 1005 bzero(&cmd, sizeof cmd); 1006 cmd.c_data = data; 1007 cmd.c_datalen = datalen; 1008 cmd.c_blklen = sf->csd.sector_size; 1009 cmd.c_opcode = (datalen / cmd.c_blklen) > 1 ? 1010 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1011 if (sf->flags & SFF_SDHC) 1012 cmd.c_arg = blkno; 1013 else 1014 cmd.c_arg = blkno << 9; 1015 cmd.c_flags = SCF_CMD_ADTC | SCF_RSP_R1; 1016 cmd.c_dmamap = dmap; 1017 1018 error = sdmmc_mmc_command(sc, &cmd); 1019 if (error != 0) 1020 goto err; 1021 1022 if (ISSET(sc->sc_flags, SMF_STOP_AFTER_MULTIPLE) && 1023 cmd.c_opcode == MMC_WRITE_BLOCK_MULTIPLE) { 1024 bzero(&cmd, sizeof cmd); 1025 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1026 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B; 1027 error = sdmmc_mmc_command(sc, &cmd); 1028 if (error != 0) 1029 goto err; 1030 } 1031 1032 do { 1033 bzero(&cmd, sizeof cmd); 1034 cmd.c_opcode = MMC_SEND_STATUS; 1035 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1036 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1; 1037 error = sdmmc_mmc_command(sc, &cmd); 1038 if (error != 0) 1039 break; 1040 /* XXX time out */ 1041 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1042 1043 err: 1044 return (error); 1045 } 1046 1047 int 1048 sdmmc_mem_single_write_block(struct sdmmc_function *sf, int blkno, u_char *data, 1049 size_t datalen) 1050 { 1051 int error = 0; 1052 int i; 1053 1054 for (i = 0; i < datalen / sf->csd.sector_size; i++) { 1055 error = sdmmc_mem_write_block_subr(sf, NULL, blkno + i, 1056 data + i * sf->csd.sector_size, sf->csd.sector_size); 1057 if (error) 1058 break; 1059 } 1060 1061 return (error); 1062 } 1063 1064 int 1065 sdmmc_mem_write_block(struct sdmmc_function *sf, int blkno, u_char *data, 1066 size_t datalen) 1067 { 1068 struct sdmmc_softc *sc = sf->sc; 1069 int error; 1070 1071 rw_enter_write(&sc->sc_lock); 1072 1073 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1074 error = sdmmc_mem_single_write_block(sf, blkno, data, datalen); 1075 goto out; 1076 } 1077 1078 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1079 error = sdmmc_mem_write_block_subr(sf, NULL, blkno, 1080 data, datalen); 1081 goto out; 1082 } 1083 1084 /* DMA transfer */ 1085 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, 1086 NULL, BUS_DMA_NOWAIT|BUS_DMA_WRITE); 1087 if (error) 1088 goto out; 1089 1090 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1091 BUS_DMASYNC_PREWRITE); 1092 1093 error = sdmmc_mem_write_block_subr(sf, sc->sc_dmap, blkno, data, 1094 datalen); 1095 if (error) 1096 goto unload; 1097 1098 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1099 BUS_DMASYNC_POSTWRITE); 1100 unload: 1101 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1102 1103 out: 1104 rw_exit(&sc->sc_lock); 1105 return (error); 1106 } 1107