1 /* $OpenBSD: if_xe.c,v 1.22 2001/07/08 23:38:07 fgsch Exp $ */ 2 3 /* 4 * Copyright (c) 1999 Niklas Hallqvist, Brandon Creighton, Job de Haas 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Niklas Hallqvist, 18 * C Stone and Job de Haas. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * A driver for Xircom ethernet PC-cards. 36 * 37 * The driver has been inspired by the xirc2ps_cs.c driver found in Linux' 38 * PCMCIA package written by Werner Koch <werner.koch@guug.de>: 39 * [xirc2ps_cs.c wk 14.04.97] (1.31 1998/12/09 19:32:55) 40 * I will note that no code was used verbatim from that driver as it is under 41 * the much too strong GNU General Public License, it was only used as a 42 * "specification" of sorts. 43 * Other inspirations have been if_fxp.c, if_ep_pcmcia.c and elink3.c as 44 * they were found in OpenBSD 2.4. 45 */ 46 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/ioctl.h> 53 #include <sys/mbuf.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/socket.h> 57 #include <sys/syslog.h> 58 59 #include <net/if.h> 60 #include <net/if_dl.h> 61 #include <net/if_media.h> 62 #include <net/if_types.h> 63 64 #ifdef INET 65 #include <netinet/in.h> 66 #include <netinet/in_systm.h> 67 #include <netinet/in_var.h> 68 #include <netinet/ip.h> 69 #include <netinet/if_ether.h> 70 #endif 71 72 #ifdef IPX 73 #include <netipx/ipx.h> 74 #include <netipx/ipx_if.h> 75 #endif 76 77 #ifdef NS 78 #include <netns/ns.h> 79 #include <netns/ns_if.h> 80 #endif 81 82 #if NBPFILTER > 0 83 #include <net/bpf.h> 84 #include <net/bpfdesc.h> 85 #endif 86 87 /* 88 * Maximum number of bytes to read per interrupt. Linux recommends 89 * somewhere between 2000-22000. 90 * XXX This is currently a hard maximum. 91 */ 92 #define MAX_BYTES_INTR 12000 93 94 #include <dev/mii/miivar.h> 95 96 #include <dev/pcmcia/pcmciareg.h> 97 #include <dev/pcmcia/pcmciavar.h> 98 #include <dev/pcmcia/pcmciadevs.h> 99 #include <dev/pcmcia/if_xereg.h> 100 101 #ifdef __GNUC__ 102 #define INLINE __inline 103 #else 104 #define INLINE 105 #endif /* __GNUC__ */ 106 107 #ifdef XEDEBUG 108 109 #define XED_CONFIG 0x1 110 #define XED_MII 0x2 111 #define XED_INTR 0x4 112 #define XED_FIFO 0x8 113 114 #ifndef XEDEBUG_DEF 115 #define XEDEBUG_DEF (XED_CONFIG|XED_INTR) 116 #endif /* XEDEBUG_DEF */ 117 118 int xedebug = XEDEBUG_DEF; 119 120 #define DPRINTF(cat, x) if (xedebug & (cat)) printf x 121 122 #else /* XEDEBUG */ 123 #define DPRINTF(cat, x) (void)0 124 #endif /* XEDEBUG */ 125 126 int xe_pcmcia_match __P((struct device *, void *, void *)); 127 void xe_pcmcia_attach __P((struct device *, struct device *, void *)); 128 int xe_pcmcia_detach __P((struct device *, int)); 129 int xe_pcmcia_activate __P((struct device *, enum devact)); 130 131 /* 132 * In case this chipset ever turns up out of pcmcia attachments (very 133 * unlikely) do the driver splitup. 134 */ 135 struct xe_softc { 136 struct device sc_dev; /* Generic device info */ 137 u_int32_t sc_flags; /* Misc. flags */ 138 void *sc_ih; /* Interrupt handler */ 139 struct arpcom sc_arpcom; /* Ethernet common part */ 140 struct ifmedia sc_media; /* Media control */ 141 struct mii_data sc_mii; /* MII media information */ 142 int sc_all_mcasts; /* Receive all multicasts */ 143 bus_space_tag_t sc_bst; /* Bus cookie */ 144 bus_space_handle_t sc_bsh; /* Bus I/O handle */ 145 bus_addr_t sc_offset; /* Offset of registers */ 146 u_int8_t sc_rev; /* Chip revision */ 147 }; 148 149 #define XEF_MOHAWK 0x001 150 #define XEF_DINGO 0x002 151 #define XEF_MODEM 0x004 152 #define XEF_UNSUPPORTED 0x008 153 #define XEF_CE 0x010 154 #define XEF_CE2 0x020 155 #define XEF_CE3 0x040 156 #define XEF_CE33 0x080 157 #define XEF_CE56 0x100 158 159 struct xe_pcmcia_softc { 160 struct xe_softc sc_xe; /* Generic device info */ 161 struct pcmcia_mem_handle sc_pcmh; /* PCMCIA memspace info */ 162 int sc_mem_window; /* mem window */ 163 struct pcmcia_io_handle sc_pcioh; /* iospace info */ 164 int sc_io_window; /* io window info */ 165 struct pcmcia_function *sc_pf; /* PCMCIA function */ 166 }; 167 168 /* Autoconfig definition of driver back-end */ 169 struct cfdriver xe_cd = { 170 NULL, "xe", DV_IFNET 171 }; 172 173 struct cfattach xe_pcmcia_ca = { 174 sizeof (struct xe_pcmcia_softc), xe_pcmcia_match, xe_pcmcia_attach, 175 xe_pcmcia_detach, xe_pcmcia_activate 176 }; 177 178 void xe_cycle_power __P((struct xe_softc *)); 179 int xe_ether_ioctl __P((struct ifnet *, u_long cmd, caddr_t)); 180 void xe_full_reset __P((struct xe_softc *)); 181 void xe_init __P((struct xe_softc *)); 182 int xe_intr __P((void *)); 183 int xe_ioctl __P((struct ifnet *, u_long, caddr_t)); 184 int xe_mdi_read __P((struct device *, int, int)); 185 void xe_mdi_write __P((struct device *, int, int, int)); 186 int xe_mediachange __P((struct ifnet *)); 187 void xe_mediastatus __P((struct ifnet *, struct ifmediareq *)); 188 int xe_pcmcia_funce_enaddr __P((struct device *, u_int8_t *)); 189 u_int32_t xe_pcmcia_interpret_manfid __P((struct device *)); 190 int xe_pcmcia_lan_nid_ciscallback __P((struct pcmcia_tuple *, void *)); 191 int xe_pcmcia_manfid_ciscallback __P((struct pcmcia_tuple *, void *)); 192 u_int16_t xe_get __P((struct xe_softc *)); 193 void xe_reset __P((struct xe_softc *)); 194 void xe_set_address __P((struct xe_softc *)); 195 void xe_start __P((struct ifnet *)); 196 void xe_statchg __P((struct device *)); 197 void xe_stop __P((struct xe_softc *)); 198 void xe_watchdog __P((struct ifnet *)); 199 #ifdef XEDEBUG 200 void xe_reg_dump __P((struct xe_softc *)); 201 #endif /* XEDEBUG */ 202 203 int 204 xe_pcmcia_match(parent, match, aux) 205 struct device *parent; 206 void *match, *aux; 207 { 208 struct pcmcia_attach_args *pa = aux; 209 210 if (pa->pf->function != PCMCIA_FUNCTION_NETWORK) 211 return (0); 212 213 switch (pa->manufacturer) { 214 case PCMCIA_VENDOR_COMPAQ: 215 case PCMCIA_VENDOR_COMPAQ2: 216 return (0); 217 218 case PCMCIA_VENDOR_INTEL: 219 case PCMCIA_VENDOR_XIRCOM: 220 /* XXX Per-productid checking here. */ 221 return (1); 222 223 default: 224 return (0); 225 } 226 } 227 228 void 229 xe_pcmcia_attach(parent, self, aux) 230 struct device *parent, *self; 231 void *aux; 232 { 233 struct xe_pcmcia_softc *psc = (struct xe_pcmcia_softc *)self; 234 struct xe_softc *sc = &psc->sc_xe; 235 struct pcmcia_attach_args *pa = aux; 236 struct pcmcia_function *pf = pa->pf; 237 struct pcmcia_config_entry *cfe; 238 struct ifnet *ifp; 239 u_int8_t myla[ETHER_ADDR_LEN], *enaddr = NULL; 240 int state = 0; 241 struct pcmcia_mem_handle pcmh; 242 int ccr_window; 243 bus_addr_t ccr_offset; 244 245 246 psc->sc_pf = pf; 247 248 #if 0 249 /* Figure out what card we are. */ 250 sc->sc_flags = xe_pcmcia_interpret_manfid(parent); 251 #endif 252 if (sc->sc_flags & XEF_UNSUPPORTED) { 253 printf(": card unsupported\n"); 254 goto bad; 255 } 256 257 /* Tell the pcmcia framework where the CCR is. */ 258 pf->ccr_base = 0x800; 259 pf->ccr_mask = 0x67; 260 261 /* Fake a cfe. */ 262 SIMPLEQ_FIRST(&pa->pf->cfe_head) = cfe = (struct pcmcia_config_entry *) 263 malloc(sizeof *cfe, M_DEVBUF, M_NOWAIT); 264 if (!cfe) { 265 printf(": function enable failed\n"); 266 return; 267 } 268 bzero(cfe, sizeof *cfe); 269 270 /* 271 * XXX Use preprocessor symbols instead. 272 * Enable ethernet & its interrupts, wiring them to -INT 273 * No I/O base. 274 */ 275 cfe->number = 0x5; 276 cfe->flags = 0; /* XXX Check! */ 277 cfe->iftype = PCMCIA_IFTYPE_IO; 278 cfe->num_iospace = 0; 279 cfe->num_memspace = 0; 280 cfe->irqmask = 0x8eb0; 281 282 /* Enable the card. */ 283 pcmcia_function_init(pa->pf, cfe); 284 if (pcmcia_function_enable(pa->pf)) { 285 printf(": function enable failed\n"); 286 goto bad; 287 } 288 289 state++; 290 291 if (pcmcia_io_alloc(pa->pf, 0, 16, 16, &psc->sc_pcioh)) { 292 printf(": io allocation failed\n"); 293 goto bad; 294 } 295 296 state++; 297 298 if (pcmcia_io_map(pa->pf, PCMCIA_WIDTH_IO16, 0, 16, &psc->sc_pcioh, 299 &psc->sc_io_window)) { 300 printf(": can't map io space\n"); 301 goto bad; 302 } 303 sc->sc_bst = psc->sc_pcioh.iot; 304 sc->sc_bsh = psc->sc_pcioh.ioh; 305 sc->sc_offset = 0; 306 307 printf(" port 0x%lx/%d", psc->sc_pcioh.addr, 16); 308 309 #if 0 310 if (pcmcia_mem_alloc(pf, 16, &psc->sc_pcmh)) { 311 printf(": pcmcia memory allocation failed\n"); 312 goto bad; 313 } 314 state++; 315 316 if (pcmcia_mem_map(pf, PCMCIA_MEM_ATTR, 0x300, 16, &psc->sc_pcmh, 317 &sc->sc_offset, &psc->sc_mem_window)) { 318 printf(": pcmcia memory mapping failed\n"); 319 goto bad; 320 } 321 322 sc->sc_bst = psc->sc_pcmh.memt; 323 sc->sc_bsh = psc->sc_pcmh.memh; 324 #endif 325 326 /* Figure out what card we are. */ 327 sc->sc_flags = xe_pcmcia_interpret_manfid(parent); 328 329 /* 330 * Configuration as adviced by DINGO documentation. 331 * We only know about this flag after the manfid interpretation. 332 * Dingo has some extra configuration registers in the CCR space. 333 */ 334 if (sc->sc_flags & XEF_DINGO) { 335 if (pcmcia_mem_alloc(pf, PCMCIA_CCR_SIZE_DINGO, &pcmh)) { 336 DPRINTF(XED_CONFIG, ("bad mem alloc\n")); 337 goto bad; 338 } 339 340 if (pcmcia_mem_map(pf, PCMCIA_MEM_ATTR, pf->ccr_base, 341 PCMCIA_CCR_SIZE_DINGO, &pcmh, &ccr_offset, 342 &ccr_window)) { 343 DPRINTF(XED_CONFIG, ("bad mem map\n")); 344 pcmcia_mem_free(pf, &pcmh); 345 goto bad; 346 } 347 348 bus_space_write_1(pcmh.memt, pcmh.memh, 349 ccr_offset + PCMCIA_CCR_DCOR0, PCMCIA_CCR_DCOR0_SFINT); 350 bus_space_write_1(pcmh.memt, pcmh.memh, 351 ccr_offset + PCMCIA_CCR_DCOR1, 352 PCMCIA_CCR_DCOR1_FORCE_LEVIREQ | PCMCIA_CCR_DCOR1_D6); 353 bus_space_write_1(pcmh.memt, pcmh.memh, 354 ccr_offset + PCMCIA_CCR_DCOR2, 0); 355 bus_space_write_1(pcmh.memt, pcmh.memh, 356 ccr_offset + PCMCIA_CCR_DCOR3, 0); 357 bus_space_write_1(pcmh.memt, pcmh.memh, 358 ccr_offset + PCMCIA_CCR_DCOR4, 0); 359 360 /* We don't need them anymore and can free them (I think). */ 361 pcmcia_mem_unmap(pf, ccr_window); 362 pcmcia_mem_free(pf, &pcmh); 363 } 364 365 /* 366 * Try to get the ethernet address from FUNCE/LAN_NID tuple. 367 */ 368 if (xe_pcmcia_funce_enaddr(parent, myla)) 369 enaddr = myla; 370 ifp = &sc->sc_arpcom.ac_if; 371 if (enaddr) 372 bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN); 373 else { 374 printf(", unable to get ethernet address\n"); 375 goto bad; 376 } 377 378 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 379 ifp->if_softc = sc; 380 ifp->if_flags = 381 IFF_BROADCAST | IFF_NOTRAILERS | IFF_SIMPLEX | IFF_MULTICAST; 382 ifp->if_ioctl = xe_ioctl; 383 ifp->if_start = xe_start; 384 ifp->if_watchdog = xe_watchdog; 385 IFQ_SET_READY(&ifp->if_snd); 386 387 /* Establish the interrupt. */ 388 sc->sc_ih = pcmcia_intr_establish(pa->pf, IPL_NET, xe_intr, sc); 389 if (sc->sc_ih == NULL) { 390 printf(", couldn't establish interrupt\n"); 391 goto bad; 392 } 393 394 printf(": address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr)); 395 396 /* Reset and initialize the card. */ 397 xe_full_reset(sc); 398 399 /* Initialize our media structures and probe the phy. */ 400 sc->sc_mii.mii_ifp = ifp; 401 sc->sc_mii.mii_readreg = xe_mdi_read; 402 sc->sc_mii.mii_writereg = xe_mdi_write; 403 sc->sc_mii.mii_statchg = xe_statchg; 404 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, xe_mediachange, 405 xe_mediastatus); 406 DPRINTF(XED_MII | XED_CONFIG, 407 ("bmsr %x\n", xe_mdi_read(&sc->sc_dev, 0, 1))); 408 mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 409 0); 410 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) 411 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO, 0, 412 NULL); 413 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO); 414 415 /* 416 * Attach the interface. 417 */ 418 if_attach(ifp); 419 ether_ifattach(ifp); 420 421 /* 422 * Reset and initialize the card again for DINGO (as found in Linux 423 * driver). Without this Dingo will get a watchdog timeout the first 424 * time. The ugly media tickling seems to be necessary for getting 425 * autonegotiation to work too. 426 */ 427 if (sc->sc_flags & XEF_DINGO) { 428 xe_full_reset(sc); 429 xe_init(sc); 430 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO); 431 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_NONE); 432 xe_stop(sc); 433 } 434 435 #ifdef notyet 436 pcmcia_function_disable(pa->pf); 437 #endif /* notyet */ 438 439 return; 440 441 bad: 442 if (state > 2) 443 pcmcia_io_unmap(pf, psc->sc_io_window); 444 if (state > 1) 445 pcmcia_io_free(pf, &psc->sc_pcioh); 446 if (state > 0) 447 pcmcia_function_disable(pa->pf); 448 free(cfe, M_DEVBUF); 449 } 450 451 int 452 xe_pcmcia_detach(dev, flags) 453 struct device *dev; 454 int flags; 455 { 456 struct xe_pcmcia_softc *psc = (struct xe_pcmcia_softc *)dev; 457 struct xe_softc *sc = &psc->sc_xe; 458 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 459 int rv = 0; 460 461 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 462 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 463 464 pcmcia_io_unmap(psc->sc_pf, psc->sc_io_window); 465 pcmcia_io_free(psc->sc_pf, &psc->sc_pcioh); 466 467 ether_ifdetach(ifp); 468 if_detach(ifp); 469 470 return (rv); 471 } 472 473 int 474 xe_pcmcia_activate(dev, act) 475 struct device *dev; 476 enum devact act; 477 { 478 struct xe_pcmcia_softc *sc = (struct xe_pcmcia_softc *)dev; 479 struct ifnet *ifp = &sc->sc_xe.sc_arpcom.ac_if; 480 int s; 481 482 s = splnet(); 483 switch (act) { 484 case DVACT_ACTIVATE: 485 pcmcia_function_enable(sc->sc_pf); 486 printf("%s:", sc->sc_xe.sc_dev.dv_xname); 487 sc->sc_xe.sc_ih = 488 pcmcia_intr_establish(sc->sc_pf, IPL_NET, xe_intr, sc); 489 printf("\n"); 490 xe_init(&sc->sc_xe); 491 break; 492 493 case DVACT_DEACTIVATE: 494 ifp->if_timer = 0; 495 if (ifp->if_flags & IFF_RUNNING) 496 xe_stop(&sc->sc_xe); 497 pcmcia_intr_disestablish(sc->sc_pf, sc->sc_xe.sc_ih); 498 pcmcia_function_disable(sc->sc_pf); 499 break; 500 } 501 splx(s); 502 return (0); 503 } 504 505 /* 506 * XXX These two functions might be OK to factor out into pcmcia.c since 507 * if_sm_pcmcia.c uses similar ones. 508 */ 509 int 510 xe_pcmcia_funce_enaddr(parent, myla) 511 struct device *parent; 512 u_int8_t *myla; 513 { 514 /* XXX The Linux driver has more ways to do this in case of failure. */ 515 return (pcmcia_scan_cis(parent, xe_pcmcia_lan_nid_ciscallback, myla)); 516 } 517 518 int 519 xe_pcmcia_lan_nid_ciscallback(tuple, arg) 520 struct pcmcia_tuple *tuple; 521 void *arg; 522 { 523 u_int8_t *myla = arg; 524 int i; 525 526 if (tuple->code == PCMCIA_CISTPL_FUNCE) { 527 if (tuple->length < 2) 528 return (0); 529 530 switch (pcmcia_tuple_read_1(tuple, 0)) { 531 case PCMCIA_TPLFE_TYPE_LAN_NID: 532 if (pcmcia_tuple_read_1(tuple, 1) != ETHER_ADDR_LEN) 533 return (0); 534 break; 535 536 case 0x02: 537 /* 538 * Not sure about this, I don't have a CE2 539 * that puts the ethernet addr here. 540 */ 541 if (pcmcia_tuple_read_1(tuple, 1) != 13) 542 return (0); 543 break; 544 545 default: 546 return (0); 547 } 548 549 for (i = 0; i < ETHER_ADDR_LEN; i++) 550 myla[i] = pcmcia_tuple_read_1(tuple, i + 2); 551 return (1); 552 } 553 554 /* Yet another spot where this might be. */ 555 if (tuple->code == 0x89) { 556 pcmcia_tuple_read_1(tuple, 1); 557 for (i = 0; i < ETHER_ADDR_LEN; i++) 558 myla[i] = pcmcia_tuple_read_1(tuple, i + 2); 559 return (1); 560 } 561 return (0); 562 } 563 564 u_int32_t 565 xe_pcmcia_interpret_manfid (parent) 566 struct device *parent; 567 { 568 u_int32_t flags = 0; 569 struct pcmcia_softc *psc = (struct pcmcia_softc *)parent; 570 char *tptr; 571 572 if (!pcmcia_scan_cis(parent, xe_pcmcia_manfid_ciscallback, &flags)) 573 return (XEF_UNSUPPORTED); 574 575 if (flags & XEF_CE) { 576 tptr = memchr(psc->card.cis1_info[2], 'C', 577 strlen(psc->card.cis1_info[2])); 578 /* XXX not sure if other CE2s hide "CE2" in different places */ 579 if (tptr && *(tptr + 1) == 'E' && *(tptr + 2) == '2') { 580 flags ^= (XEF_CE | XEF_UNSUPPORTED); 581 flags |= XEF_CE2; 582 } 583 } 584 return (flags); 585 } 586 587 int 588 xe_pcmcia_manfid_ciscallback(tuple, arg) 589 struct pcmcia_tuple *tuple; 590 void *arg; 591 { 592 u_int32_t *flagsp = arg; 593 u_int8_t media, product; 594 595 if (tuple->code == PCMCIA_CISTPL_MANFID) { 596 if (tuple->length < 2) 597 return (0); 598 599 media = pcmcia_tuple_read_1(tuple, 3); 600 product = pcmcia_tuple_read_1(tuple, 4); 601 602 if (!(product & XEPROD_CREDITCARD) || 603 !(media & XEMEDIA_ETHER)) { 604 *flagsp |= XEF_UNSUPPORTED; 605 return (1); 606 } 607 608 if (media & XEMEDIA_MODEM) 609 *flagsp |= XEF_MODEM; 610 611 switch (product & XEPROD_IDMASK) { 612 case 1: 613 /* XXX Can be CE2 too (we double-check later). */ 614 *flagsp |= XEF_CE | XEF_UNSUPPORTED; 615 break; 616 case 2: 617 *flagsp |= XEF_CE2; 618 break; 619 case 3: 620 if (!(*flagsp & XEF_MODEM)) 621 *flagsp |= XEF_MOHAWK; 622 *flagsp |= XEF_CE3; 623 break; 624 case 4: 625 *flagsp |= XEF_CE33; 626 break; 627 case 5: 628 *flagsp |= XEF_CE56 | XEF_MOHAWK; 629 break; 630 case 6: 631 case 7: 632 *flagsp |= XEF_CE56 | XEF_MOHAWK | XEF_DINGO; 633 break; 634 default: 635 *flagsp |= XEF_UNSUPPORTED; 636 break; 637 } 638 639 return (1); 640 } 641 return (0); 642 } 643 644 int 645 xe_intr(arg) 646 void *arg; 647 { 648 struct xe_softc *sc = arg; 649 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 650 u_int8_t esr, rsr, isr, rx_status, savedpage; 651 u_int16_t tx_status, recvcount = 0, tempint; 652 653 ifp->if_timer = 0; /* turn watchdog timer off */ 654 655 if (sc->sc_flags & XEF_MOHAWK) { 656 /* Disable interrupt (Linux does it). */ 657 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 658 0); 659 } 660 661 savedpage = 662 bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + PR); 663 664 PAGE(sc, 0); 665 esr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ESR); 666 isr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ISR0); 667 rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RSR); 668 669 /* Check to see if card has been ejected. */ 670 if (isr == 0xff) { 671 printf("%s: interrupt for dead card\n", sc->sc_dev.dv_xname); 672 goto end; 673 } 674 675 PAGE(sc, 40); 676 rx_status = 677 bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RXST0); 678 tx_status = 679 bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + TXST0); 680 681 /* 682 * XXX Linux writes to RXST0 and TXST* here. My CE2 works just fine 683 * without it, and I can't see an obvious reason for it. 684 */ 685 686 PAGE(sc, 0); 687 while (esr & FULL_PKT_RCV) { 688 if (!(rsr & RSR_RX_OK)) 689 break; 690 691 /* Compare bytes read this interrupt to hard maximum. */ 692 if (recvcount > MAX_BYTES_INTR) { 693 DPRINTF(XED_INTR, 694 ("%s: too many bytes this interrupt\n", 695 sc->sc_dev.dv_xname)); 696 ifp->if_iqdrops++; 697 /* Drop packet. */ 698 bus_space_write_2(sc->sc_bst, sc->sc_bsh, 699 sc->sc_offset + DO0, DO_SKIP_RX_PKT); 700 } 701 tempint = xe_get(sc); 702 recvcount += tempint; 703 ifp->if_ibytes += tempint; 704 esr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 705 sc->sc_offset + ESR); 706 rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 707 sc->sc_offset + RSR); 708 } 709 710 /* Packet too long? */ 711 if (rsr & RSR_TOO_LONG) { 712 ifp->if_ierrors++; 713 DPRINTF(XED_INTR, 714 ("%s: packet too long\n", sc->sc_dev.dv_xname)); 715 } 716 717 /* CRC error? */ 718 if (rsr & RSR_CRCERR) { 719 ifp->if_ierrors++; 720 DPRINTF(XED_INTR, 721 ("%s: CRC error detected\n", sc->sc_dev.dv_xname)); 722 } 723 724 /* Alignment error? */ 725 if (rsr & RSR_ALIGNERR) { 726 ifp->if_ierrors++; 727 DPRINTF(XED_INTR, 728 ("%s: alignment error detected\n", sc->sc_dev.dv_xname)); 729 } 730 731 /* Check for rx overrun. */ 732 if (rx_status & RX_OVERRUN) { 733 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 734 CLR_RX_OVERRUN); 735 DPRINTF(XED_INTR, ("overrun cleared\n")); 736 } 737 738 /* Try to start more packets transmitting. */ 739 if (IFQ_IS_EMPTY(&ifp->if_snd) == 0) 740 xe_start(ifp); 741 742 /* Detected excessive collisions? */ 743 if ((tx_status & EXCESSIVE_COLL) && ifp->if_opackets > 0) { 744 DPRINTF(XED_INTR, 745 ("%s: excessive collisions\n", sc->sc_dev.dv_xname)); 746 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 747 RESTART_TX); 748 ifp->if_oerrors++; 749 } 750 751 if ((tx_status & TX_ABORT) && ifp->if_opackets > 0) 752 ifp->if_oerrors++; 753 754 end: 755 /* Reenable interrupts. */ 756 PAGE(sc, savedpage); 757 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 758 ENABLE_INT); 759 760 return (1); 761 } 762 763 u_int16_t 764 xe_get(sc) 765 struct xe_softc *sc; 766 { 767 u_int8_t rsr; 768 struct mbuf *top, **mp, *m; 769 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 770 u_int16_t pktlen, len, recvcount = 0; 771 u_int8_t *data; 772 773 PAGE(sc, 0); 774 rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RSR); 775 776 pktlen = 777 bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RBC0) & 778 RBC_COUNT_MASK; 779 if (pktlen == 0) { 780 /* 781 * XXX At least one CE2 sets RBC0 == 0 occasionally, and only 782 * when MPE is set. It is not known why. 783 */ 784 return (0); 785 } 786 recvcount += pktlen; 787 788 MGETHDR(m, M_DONTWAIT, MT_DATA); 789 if (m == 0) 790 return (recvcount); 791 m->m_pkthdr.rcvif = ifp; 792 m->m_pkthdr.len = pktlen; 793 len = MHLEN; 794 top = 0; 795 mp = ⊤ 796 797 while (pktlen > 0) { 798 if (top) { 799 MGET(m, M_DONTWAIT, MT_DATA); 800 if (m == 0) { 801 m_freem(top); 802 return (recvcount); 803 } 804 len = MLEN; 805 } 806 if (pktlen >= MINCLSIZE) { 807 MCLGET(m, M_DONTWAIT); 808 if (!(m->m_flags & M_EXT)) { 809 m_freem(m); 810 m_freem(top); 811 return (recvcount); 812 } 813 len = MCLBYTES; 814 } 815 if (!top) { 816 caddr_t newdata = (caddr_t)ALIGN(m->m_data + 817 sizeof (struct ether_header)) - 818 sizeof (struct ether_header); 819 len -= newdata - m->m_data; 820 m->m_data = newdata; 821 } 822 len = min(pktlen, len); 823 824 data = mtod(m, u_int8_t *); 825 if (len > 1) { 826 len &= ~1; 827 bus_space_read_raw_multi_2(sc->sc_bst, sc->sc_bsh, 828 sc->sc_offset + EDP, data, len); 829 } else 830 *data = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 831 sc->sc_offset + EDP); 832 m->m_len = len; 833 pktlen -= len; 834 *mp = m; 835 mp = &m->m_next; 836 } 837 838 /* Skip Rx packet. */ 839 bus_space_write_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + DO0, 840 DO_SKIP_RX_PKT); 841 842 ifp->if_ipackets++; 843 844 #if NBPFILTER > 0 845 if (ifp->if_bpf) 846 bpf_mtap(ifp->if_bpf, top); 847 #endif 848 849 ether_input_mbuf(ifp, top); 850 return (recvcount); 851 } 852 853 854 /* 855 * Serial management for the MII. 856 * The DELAY's below stem from the fact that the maximum frequency 857 * acceptable on the MDC pin is 2.5 MHz and fast processors can easily 858 * go much faster than that. 859 */ 860 861 /* Let the MII serial management be idle for one period. */ 862 static INLINE void xe_mdi_idle __P((struct xe_softc *)); 863 static INLINE void 864 xe_mdi_idle(sc) 865 struct xe_softc *sc; 866 { 867 bus_space_tag_t bst = sc->sc_bst; 868 bus_space_handle_t bsh = sc->sc_bsh; 869 bus_addr_t offset = sc->sc_offset; 870 871 /* Drive MDC low... */ 872 bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW); 873 DELAY(1); 874 875 /* and high again. */ 876 bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH); 877 DELAY(1); 878 } 879 880 /* Pulse out one bit of data. */ 881 static INLINE void xe_mdi_pulse __P((struct xe_softc *, int)); 882 static INLINE void 883 xe_mdi_pulse(sc, data) 884 struct xe_softc *sc; 885 int data; 886 { 887 bus_space_tag_t bst = sc->sc_bst; 888 bus_space_handle_t bsh = sc->sc_bsh; 889 bus_addr_t offset = sc->sc_offset; 890 u_int8_t bit = data ? MDIO_HIGH : MDIO_LOW; 891 892 /* First latch the data bit MDIO with clock bit MDC low...*/ 893 bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_LOW); 894 DELAY(1); 895 896 /* then raise the clock again, preserving the data bit. */ 897 bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_HIGH); 898 DELAY(1); 899 } 900 901 /* Probe one bit of data. */ 902 static INLINE int xe_mdi_probe __P((struct xe_softc *sc)); 903 static INLINE int 904 xe_mdi_probe(sc) 905 struct xe_softc *sc; 906 { 907 bus_space_tag_t bst = sc->sc_bst; 908 bus_space_handle_t bsh = sc->sc_bsh; 909 bus_addr_t offset = sc->sc_offset; 910 u_int8_t x; 911 912 /* Pull clock bit MDCK low... */ 913 bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW); 914 DELAY(1); 915 916 /* Read data and drive clock high again. */ 917 x = bus_space_read_1(bst, bsh, offset + GP2) & MDIO; 918 bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH); 919 DELAY(1); 920 921 return (x); 922 } 923 924 /* Pulse out a sequence of data bits. */ 925 static INLINE void xe_mdi_pulse_bits __P((struct xe_softc *, u_int32_t, int)); 926 static INLINE void 927 xe_mdi_pulse_bits(sc, data, len) 928 struct xe_softc *sc; 929 u_int32_t data; 930 int len; 931 { 932 u_int32_t mask; 933 934 for (mask = 1 << (len - 1); mask; mask >>= 1) 935 xe_mdi_pulse(sc, data & mask); 936 } 937 938 /* Read a PHY register. */ 939 int 940 xe_mdi_read(self, phy, reg) 941 struct device *self; 942 int phy; 943 int reg; 944 { 945 struct xe_softc *sc = (struct xe_softc *)self; 946 int i; 947 u_int32_t mask; 948 u_int32_t data = 0; 949 950 PAGE(sc, 2); 951 for (i = 0; i < 32; i++) /* Synchronize. */ 952 xe_mdi_pulse(sc, 1); 953 xe_mdi_pulse_bits(sc, 0x06, 4); /* Start + Read opcode */ 954 xe_mdi_pulse_bits(sc, phy, 5); /* PHY address */ 955 xe_mdi_pulse_bits(sc, reg, 5); /* PHY register */ 956 xe_mdi_idle(sc); /* Turn around. */ 957 xe_mdi_probe(sc); /* Drop initial zero bit. */ 958 959 for (mask = 1 << 15; mask; mask >>= 1) 960 if (xe_mdi_probe(sc)) 961 data |= mask; 962 xe_mdi_idle(sc); 963 964 DPRINTF(XED_MII, 965 ("xe_mdi_read: phy %d reg %d -> %x\n", phy, reg, data)); 966 return (data); 967 } 968 969 /* Write a PHY register. */ 970 void 971 xe_mdi_write(self, phy, reg, value) 972 struct device *self; 973 int phy; 974 int reg; 975 int value; 976 { 977 struct xe_softc *sc = (struct xe_softc *)self; 978 int i; 979 980 PAGE(sc, 2); 981 for (i = 0; i < 32; i++) /* Synchronize. */ 982 xe_mdi_pulse(sc, 1); 983 xe_mdi_pulse_bits(sc, 0x05, 4); /* Start + Write opcode */ 984 xe_mdi_pulse_bits(sc, phy, 5); /* PHY address */ 985 xe_mdi_pulse_bits(sc, reg, 5); /* PHY register */ 986 xe_mdi_pulse_bits(sc, 0x02, 2); /* Turn around. */ 987 xe_mdi_pulse_bits(sc, value, 16); /* Write the data */ 988 xe_mdi_idle(sc); /* Idle away. */ 989 990 DPRINTF(XED_MII, 991 ("xe_mdi_write: phy %d reg %d val %x\n", phy, reg, value)); 992 } 993 994 void 995 xe_statchg(self) 996 struct device *self; 997 { 998 /* XXX Update ifp->if_baudrate */ 999 } 1000 1001 /* 1002 * Change media according to request. 1003 */ 1004 int 1005 xe_mediachange(ifp) 1006 struct ifnet *ifp; 1007 { 1008 if (ifp->if_flags & IFF_UP) 1009 xe_init(ifp->if_softc); 1010 return (0); 1011 } 1012 1013 /* 1014 * Notify the world which media we're using. 1015 */ 1016 void 1017 xe_mediastatus(ifp, ifmr) 1018 struct ifnet *ifp; 1019 struct ifmediareq *ifmr; 1020 { 1021 struct xe_softc *sc = ifp->if_softc; 1022 1023 mii_pollstat(&sc->sc_mii); 1024 ifmr->ifm_status = sc->sc_mii.mii_media_status; 1025 ifmr->ifm_active = sc->sc_mii.mii_media_active; 1026 } 1027 1028 void 1029 xe_reset(sc) 1030 struct xe_softc *sc; 1031 { 1032 int s; 1033 1034 s = splnet(); 1035 xe_stop(sc); 1036 xe_full_reset(sc); 1037 xe_init(sc); 1038 splx(s); 1039 } 1040 1041 void 1042 xe_watchdog(ifp) 1043 struct ifnet *ifp; 1044 { 1045 struct xe_softc *sc = ifp->if_softc; 1046 1047 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1048 ++sc->sc_arpcom.ac_if.if_oerrors; 1049 1050 xe_reset(sc); 1051 } 1052 1053 void 1054 xe_stop(sc) 1055 register struct xe_softc *sc; 1056 { 1057 /* Disable interrupts. */ 1058 PAGE(sc, 0); 1059 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 0); 1060 1061 PAGE(sc, 1); 1062 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + IMR0, 0); 1063 1064 /* Power down, wait. */ 1065 PAGE(sc, 4); 1066 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + GP1, 0); 1067 DELAY(40000); 1068 1069 /* Cancel watchdog timer. */ 1070 sc->sc_arpcom.ac_if.if_timer = 0; 1071 } 1072 1073 void 1074 xe_init(sc) 1075 struct xe_softc *sc; 1076 { 1077 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1078 int s; 1079 1080 DPRINTF(XED_CONFIG, ("xe_init\n")); 1081 1082 s = splimp(); 1083 1084 xe_set_address(sc); 1085 1086 /* Set current media. */ 1087 mii_mediachg(&sc->sc_mii); 1088 1089 ifp->if_flags |= IFF_RUNNING; 1090 ifp->if_flags &= ~IFF_OACTIVE; 1091 splx(s); 1092 } 1093 1094 /* 1095 * Start outputting on the interface. 1096 * Always called as splnet(). 1097 */ 1098 void 1099 xe_start(ifp) 1100 struct ifnet *ifp; 1101 { 1102 struct xe_softc *sc = ifp->if_softc; 1103 bus_space_tag_t bst = sc->sc_bst; 1104 bus_space_handle_t bsh = sc->sc_bsh; 1105 bus_addr_t offset = sc->sc_offset; 1106 unsigned int s, len, pad = 0; 1107 struct mbuf *m0, *m; 1108 u_int16_t space; 1109 1110 /* Don't transmit if interface is busy or not running. */ 1111 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1112 return; 1113 1114 /* Peek at the next packet. */ 1115 IFQ_POLL(&ifp->if_snd, m0); 1116 if (m0 == 0) 1117 return; 1118 1119 /* We need to use m->m_pkthdr.len, so require the header. */ 1120 if (!(m0->m_flags & M_PKTHDR)) 1121 panic("xe_start: no header mbuf"); 1122 1123 len = m0->m_pkthdr.len; 1124 1125 /* Pad to ETHER_MIN_LEN - ETHER_CRC_LEN. */ 1126 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 1127 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 1128 1129 PAGE(sc, 0); 1130 space = bus_space_read_2(bst, bsh, offset + TSO0) & 0x7fff; 1131 if (len + pad + 2 > space) { 1132 DPRINTF(XED_FIFO, 1133 ("%s: not enough space in output FIFO (%d > %d)\n", 1134 sc->sc_dev.dv_xname, len + pad + 2, space)); 1135 return; 1136 } 1137 1138 IFQ_DEQUEUE(&ifp->if_snd, m0); 1139 1140 #if NBPFILTER > 0 1141 if (ifp->if_bpf) 1142 bpf_mtap(ifp->if_bpf, m0); 1143 #endif 1144 1145 /* 1146 * Do the output at splhigh() so that an interrupt from another device 1147 * won't cause a FIFO underrun. 1148 */ 1149 s = splhigh(); 1150 1151 bus_space_write_2(bst, bsh, offset + TSO2, (u_int16_t)len + pad + 2); 1152 bus_space_write_2(bst, bsh, offset + EDP, (u_int16_t)len + pad); 1153 for (m = m0; m; ) { 1154 if (m->m_len > 1) 1155 bus_space_write_raw_multi_2(bst, bsh, offset + EDP, 1156 mtod(m, u_int8_t *), m->m_len & ~1); 1157 if (m->m_len & 1) 1158 bus_space_write_1(bst, bsh, offset + EDP, 1159 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1160 MFREE(m, m0); 1161 m = m0; 1162 } 1163 if (sc->sc_flags & XEF_MOHAWK) 1164 bus_space_write_1(bst, bsh, offset + CR, TX_PKT | ENABLE_INT); 1165 else { 1166 for (; pad > 1; pad -= 2) 1167 bus_space_write_2(bst, bsh, offset + EDP, 0); 1168 if (pad == 1) 1169 bus_space_write_1(bst, bsh, offset + EDP, 0); 1170 } 1171 1172 splx(s); 1173 1174 ifp->if_timer = 5; 1175 ++ifp->if_opackets; 1176 } 1177 1178 int 1179 xe_ether_ioctl(ifp, cmd, data) 1180 struct ifnet *ifp; 1181 u_long cmd; 1182 caddr_t data; 1183 { 1184 struct ifaddr *ifa = (struct ifaddr *)data; 1185 struct xe_softc *sc = ifp->if_softc; 1186 #ifdef NS 1187 struct ns_addr *ina; 1188 #endif /* NS */ 1189 1190 switch (cmd) { 1191 case SIOCSIFADDR: 1192 ifp->if_flags |= IFF_UP; 1193 1194 switch (ifa->ifa_addr->sa_family) { 1195 #ifdef INET 1196 case AF_INET: 1197 xe_init(sc); 1198 arp_ifinit(&sc->sc_arpcom, ifa); 1199 break; 1200 #endif /* INET */ 1201 1202 #ifdef NS 1203 case AF_NS: 1204 ina = &IA_SNS(ifa)->sns_addr; 1205 1206 if (ns_nullhost(*ina)) 1207 ina->x_host = 1208 *(union ns_host *)sc->sc_arpcom.ac_enaddr; 1209 else 1210 bcopy(ina->x_host.c_host, 1211 sc->sc_arpcom.ac_enaddr, ifp->if_addrlen); 1212 /* Set new address. */ 1213 xe_init(sc); 1214 break; 1215 #endif /* NS */ 1216 1217 default: 1218 xe_init(sc); 1219 break; 1220 } 1221 break; 1222 1223 default: 1224 return (EINVAL); 1225 } 1226 1227 return (0); 1228 } 1229 1230 int 1231 xe_ioctl(ifp, command, data) 1232 struct ifnet *ifp; 1233 u_long command; 1234 caddr_t data; 1235 { 1236 struct xe_softc *sc = ifp->if_softc; 1237 struct ifreq *ifr = (struct ifreq *)data; 1238 int s, error = 0; 1239 1240 s = splimp(); 1241 1242 switch (command) { 1243 case SIOCSIFADDR: 1244 error = xe_ether_ioctl(ifp, command, data); 1245 break; 1246 1247 case SIOCSIFFLAGS: 1248 sc->sc_all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1249 1250 PAGE(sc, 0x42); 1251 if ((ifp->if_flags & IFF_PROMISC) || 1252 (ifp->if_flags & IFF_ALLMULTI)) 1253 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1254 sc->sc_offset + SWC1, 1255 SWC1_PROMISC | SWC1_MCAST_PROM); 1256 else 1257 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1258 sc->sc_offset + SWC1, 0); 1259 1260 /* 1261 * If interface is marked up and not running, then start it. 1262 * If it is marked down and running, stop it. 1263 * XXX If it's up then re-initialize it. This is so flags 1264 * such as IFF_PROMISC are handled. 1265 */ 1266 if (ifp->if_flags & IFF_UP) { 1267 xe_init(sc); 1268 } else { 1269 if (ifp->if_flags & IFF_RUNNING) 1270 xe_stop(sc); 1271 } 1272 break; 1273 1274 case SIOCADDMULTI: 1275 case SIOCDELMULTI: 1276 sc->sc_all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1277 error = (command == SIOCADDMULTI) ? 1278 ether_addmulti(ifr, &sc->sc_arpcom) : 1279 ether_delmulti(ifr, &sc->sc_arpcom); 1280 1281 if (error == ENETRESET) { 1282 /* 1283 * Multicast list has changed; set the hardware 1284 * filter accordingly. 1285 */ 1286 if (!sc->sc_all_mcasts && 1287 !(ifp->if_flags & IFF_PROMISC)) 1288 xe_set_address(sc); 1289 1290 /* 1291 * xe_set_address() can turn on all_mcasts if we run 1292 * out of space, so check it again rather than else {}. 1293 */ 1294 if (sc->sc_all_mcasts) 1295 xe_init(sc); 1296 error = 0; 1297 } 1298 break; 1299 1300 case SIOCSIFMEDIA: 1301 case SIOCGIFMEDIA: 1302 error = 1303 ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command); 1304 break; 1305 1306 default: 1307 error = EINVAL; 1308 } 1309 splx(s); 1310 return (error); 1311 } 1312 1313 void 1314 xe_set_address(sc) 1315 struct xe_softc *sc; 1316 { 1317 bus_space_tag_t bst = sc->sc_bst; 1318 bus_space_handle_t bsh = sc->sc_bsh; 1319 bus_addr_t offset = sc->sc_offset; 1320 struct arpcom *arp = &sc->sc_arpcom; 1321 struct ether_multi *enm; 1322 struct ether_multistep step; 1323 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1324 int i, page, pos, num; 1325 1326 PAGE(sc, 0x50); 1327 for (i = 0; i < 6; i++) { 1328 bus_space_write_1(bst, bsh, offset + IA + i, 1329 sc->sc_arpcom.ac_enaddr[(sc->sc_flags & XEF_MOHAWK) ? 1330 5 - i : i]); 1331 } 1332 1333 if (arp->ac_multicnt > 0) { 1334 if (arp->ac_multicnt > 9) { 1335 PAGE(sc, 0x42); 1336 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1337 sc->sc_offset + SWC1, 1338 SWC1_PROMISC | SWC1_MCAST_PROM); 1339 return; 1340 } 1341 1342 ETHER_FIRST_MULTI(step, arp, enm); 1343 1344 pos = IA + 6; 1345 for (page = 0x50, num = arp->ac_multicnt; num > 0 && enm; 1346 num--) { 1347 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 1348 sizeof(enm->enm_addrlo)) != 0) { 1349 /* 1350 * The multicast address is really a range; 1351 * it's easier just to accept all multicasts. 1352 * XXX should we be setting IFF_ALLMULTI here? 1353 */ 1354 ifp->if_flags |= IFF_ALLMULTI; 1355 sc->sc_all_mcasts=1; 1356 break; 1357 } 1358 1359 for (i = 0; i < 6; i++) { 1360 bus_space_write_1(bst, bsh, offset + pos, 1361 enm->enm_addrlo[ 1362 (sc->sc_flags & XEF_MOHAWK) ? 5 - i : i]); 1363 1364 if (++pos > 15) { 1365 pos = IA; 1366 page++; 1367 PAGE(sc, page); 1368 } 1369 } 1370 } 1371 } 1372 } 1373 1374 void 1375 xe_cycle_power(sc) 1376 struct xe_softc *sc; 1377 { 1378 bus_space_tag_t bst = sc->sc_bst; 1379 bus_space_handle_t bsh = sc->sc_bsh; 1380 bus_addr_t offset = sc->sc_offset; 1381 1382 PAGE(sc, 4); 1383 DELAY(1); 1384 bus_space_write_1(bst, bsh, offset + GP1, 0); 1385 DELAY(40000); 1386 if (sc->sc_flags & XEF_MOHAWK) 1387 bus_space_write_1(bst, bsh, offset + GP1, POWER_UP); 1388 else 1389 /* XXX What is bit 2 (aka AIC)? */ 1390 bus_space_write_1(bst, bsh, offset + GP1, POWER_UP | 4); 1391 DELAY(20000); 1392 } 1393 1394 void 1395 xe_full_reset(sc) 1396 struct xe_softc *sc; 1397 { 1398 bus_space_tag_t bst = sc->sc_bst; 1399 bus_space_handle_t bsh = sc->sc_bsh; 1400 bus_addr_t offset = sc->sc_offset; 1401 1402 /* Do an as extensive reset as possible on all functions. */ 1403 xe_cycle_power(sc); 1404 bus_space_write_1(bst, bsh, offset + CR, SOFT_RESET); 1405 DELAY(20000); 1406 bus_space_write_1(bst, bsh, offset + CR, 0); 1407 DELAY(20000); 1408 if (sc->sc_flags & XEF_MOHAWK) { 1409 PAGE(sc, 4); 1410 /* 1411 * Drive GP1 low to power up ML6692 and GP2 high to power up 1412 * the 10Mhz chip. XXX What chip is that? The phy? 1413 */ 1414 bus_space_write_1(bst, bsh, offset + GP0, 1415 GP1_OUT | GP2_OUT | GP2_WR); 1416 } 1417 DELAY(500000); 1418 1419 /* Get revision information. XXX Symbolic constants. */ 1420 sc->sc_rev = bus_space_read_1(bst, bsh, offset + BV) & 1421 ((sc->sc_flags & XEF_MOHAWK) ? 0x70 : 0x30) >> 4; 1422 1423 /* Media selection. XXX Maybe manual overriding too? */ 1424 if (!(sc->sc_flags & XEF_MOHAWK)) { 1425 PAGE(sc, 4); 1426 /* 1427 * XXX I have no idea what this really does, it is from the 1428 * Linux driver. 1429 */ 1430 bus_space_write_1(bst, bsh, offset + GP0, GP1_OUT); 1431 } 1432 DELAY(40000); 1433 1434 /* Setup the ethernet interrupt mask. */ 1435 PAGE(sc, 1); 1436 bus_space_write_1(bst, bsh, offset + IMR0, 1437 ISR_TX_OFLOW | ISR_PKT_TX | ISR_MAC_INT | /* ISR_RX_EARLY | */ 1438 ISR_RX_FULL | ISR_RX_PKT_REJ | ISR_FORCED_INT); 1439 #if 0 1440 bus_space_write_1(bst, bsh, offset + IMR0, 0xff); 1441 #endif 1442 if (!(sc->sc_flags & XEF_DINGO)) 1443 /* XXX What is this? Not for Dingo at least. */ 1444 bus_space_write_1(bst, bsh, offset + IMR1, 1); 1445 1446 /* 1447 * Disable source insertion. 1448 * XXX Dingo does not have this bit, but Linux does it unconditionally. 1449 */ 1450 if (!(sc->sc_flags & XEF_DINGO)) { 1451 PAGE(sc, 0x42); 1452 bus_space_write_1(bst, bsh, offset + SWC0, 0x20); 1453 } 1454 1455 /* Set the local memory dividing line. */ 1456 if (sc->sc_rev != 1) { 1457 PAGE(sc, 2); 1458 /* XXX Symbolic constant preferrable. */ 1459 bus_space_write_2(bst, bsh, offset + RBS0, 0x2000); 1460 } 1461 1462 xe_set_address(sc); 1463 1464 /* 1465 * Apparently the receive byte pointer can be bad after a reset, so 1466 * we hardwire it correctly. 1467 */ 1468 PAGE(sc, 0); 1469 bus_space_write_2(bst, bsh, offset + DO0, DO_CHG_OFFSET); 1470 1471 /* Setup ethernet MAC registers. XXX Symbolic constants. */ 1472 PAGE(sc, 0x40); 1473 bus_space_write_1(bst, bsh, offset + RX0MSK, 1474 PKT_TOO_LONG | CRC_ERR | RX_OVERRUN | RX_ABORT | RX_OK); 1475 bus_space_write_1(bst, bsh, offset + TX0MSK, 1476 CARRIER_LOST | EXCESSIVE_COLL | TX_UNDERRUN | LATE_COLLISION | 1477 SQE | TX_ABORT | TX_OK); 1478 if (!(sc->sc_flags & XEF_DINGO)) 1479 /* XXX From Linux, dunno what 0xb0 means. */ 1480 bus_space_write_1(bst, bsh, offset + TX1MSK, 0xb0); 1481 bus_space_write_1(bst, bsh, offset + RXST0, 0); 1482 bus_space_write_1(bst, bsh, offset + TXST0, 0); 1483 bus_space_write_1(bst, bsh, offset + TXST1, 0); 1484 1485 /* Enable MII function if available. */ 1486 if (LIST_FIRST(&sc->sc_mii.mii_phys)) { 1487 PAGE(sc, 2); 1488 bus_space_write_1(bst, bsh, offset + MSR, 1489 bus_space_read_1(bst, bsh, offset + MSR) | SELECT_MII); 1490 DELAY(20000); 1491 } else { 1492 PAGE(sc, 0); 1493 1494 /* XXX Do we need to do this? */ 1495 PAGE(sc, 0x42); 1496 bus_space_write_1(bst, bsh, offset + SWC1, SWC1_AUTO_MEDIA); 1497 DELAY(50000); 1498 1499 /* XXX Linux probes the media here. */ 1500 } 1501 1502 /* Configure the LED registers. */ 1503 PAGE(sc, 2); 1504 1505 /* XXX This is not good for 10base2. */ 1506 bus_space_write_1(bst, bsh, offset + LED, 1507 LED_TX_ACT << LED1_SHIFT | LED_10MB_LINK << LED0_SHIFT); 1508 if (sc->sc_flags & XEF_DINGO) 1509 bus_space_write_1(bst, bsh, offset + LED3, 1510 LED_100MB_LINK << LED3_SHIFT); 1511 1512 /* Enable receiver and go online. */ 1513 PAGE(sc, 0x40); 1514 bus_space_write_1(bst, bsh, offset + CMD0, ENABLE_RX | ONLINE); 1515 1516 #if 0 1517 /* XXX Linux does this here - is it necessary? */ 1518 PAGE(sc, 1); 1519 bus_space_write_1(bst, bsh, offset + IMR0, 0xff); 1520 if (!(sc->sc_flags & XEF_DINGO)) 1521 /* XXX What is this? Not for Dingo at least. */ 1522 bus_space_write_1(bst, bsh, offset + IMR1, 1); 1523 #endif 1524 1525 /* Enable interrupts. */ 1526 PAGE(sc, 0); 1527 bus_space_write_1(bst, bsh, offset + CR, ENABLE_INT); 1528 1529 /* XXX This is pure magic for me, found in the Linux driver. */ 1530 if ((sc->sc_flags & (XEF_DINGO | XEF_MODEM)) == XEF_MODEM) { 1531 if ((bus_space_read_1(bst, bsh, offset + 0x10) & 0x01) == 0) 1532 /* Unmask the master interrupt bit. */ 1533 bus_space_write_1(bst, bsh, offset + 0x10, 0x11); 1534 } 1535 1536 /* 1537 * The Linux driver says this: 1538 * We should switch back to page 0 to avoid a bug in revision 0 1539 * where regs with offset below 8 can't be read after an access 1540 * to the MAC registers. 1541 */ 1542 PAGE(sc, 0); 1543 } 1544 1545 #ifdef XEDEBUG 1546 void 1547 xe_reg_dump(sc) 1548 struct xe_softc *sc; 1549 { 1550 int page, i; 1551 bus_space_tag_t bst = sc->sc_bst; 1552 bus_space_handle_t bsh = sc->sc_bsh; 1553 bus_addr_t offset = sc->sc_offset; 1554 1555 printf("%x: Common registers: ", sc->sc_dev.dv_xname); 1556 for (i = 0; i < 8; i++) { 1557 printf(" %2.2x", bus_space_read_1(bst, bsh, offset + i)); 1558 } 1559 printf("\n"); 1560 1561 for (page = 0; page < 8; page++) { 1562 printf("%s: Register page %2.2x: ", sc->sc_dev.dv_xname, page); 1563 PAGE(sc, page); 1564 for (i = 8; i < 16; i++) { 1565 printf(" %2.2x", 1566 bus_space_read_1(bst, bsh, offset + i)); 1567 } 1568 printf("\n"); 1569 } 1570 1571 for (page = 0x40; page < 0x5f; page++) { 1572 if (page == 0x43 || (page >= 0x46 && page <= 0x4f) || 1573 (page >= 0x51 && page <= 0x5e)) 1574 continue; 1575 printf("%s: Register page %2.2x: ", sc->sc_dev.dv_xname, page); 1576 PAGE(sc, page); 1577 for (i = 8; i < 16; i++) { 1578 printf(" %2.2x", 1579 bus_space_read_1(bst, bsh, offset + i)); 1580 } 1581 printf("\n"); 1582 } 1583 } 1584 #endif /* XEDEBUG */ 1585