1 /* $OpenBSD: if_xe.c,v 1.40 2011/07/03 15:47:17 matthew Exp $ */ 2 3 /* 4 * Copyright (c) 1999 Niklas Hallqvist, Brandon Creighton, Job de Haas 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Niklas Hallqvist, 18 * C Stone and Job de Haas. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * A driver for Xircom ethernet PC-cards. 36 * 37 * The driver has been inspired by the xirc2ps_cs.c driver found in Linux' 38 * PCMCIA package written by Werner Koch <werner.koch@guug.de>: 39 * [xirc2ps_cs.c wk 14.04.97] (1.31 1998/12/09 19:32:55) 40 * I will note that no code was used verbatim from that driver as it is under 41 * the much too strong GNU General Public License, it was only used as a 42 * "specification" of sorts. 43 * Other inspirations have been if_fxp.c, if_ep_pcmcia.c and elink3.c as 44 * they were found in OpenBSD 2.4. 45 */ 46 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/ioctl.h> 53 #include <sys/mbuf.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/socket.h> 57 #include <sys/syslog.h> 58 59 #include <net/if.h> 60 #include <net/if_dl.h> 61 #include <net/if_media.h> 62 #include <net/if_types.h> 63 64 #ifdef INET 65 #include <netinet/in.h> 66 #include <netinet/in_systm.h> 67 #include <netinet/in_var.h> 68 #include <netinet/ip.h> 69 #include <netinet/if_ether.h> 70 #endif 71 72 #if NBPFILTER > 0 73 #include <net/bpf.h> 74 #endif 75 76 /* 77 * Maximum number of bytes to read per interrupt. Linux recommends 78 * somewhere between 2000-22000. 79 * XXX This is currently a hard maximum. 80 */ 81 #define MAX_BYTES_INTR 12000 82 83 #include <dev/mii/miivar.h> 84 85 #include <dev/pcmcia/pcmciareg.h> 86 #include <dev/pcmcia/pcmciavar.h> 87 #include <dev/pcmcia/pcmciadevs.h> 88 #include <dev/pcmcia/if_xereg.h> 89 90 #ifdef __GNUC__ 91 #define INLINE __inline 92 #else 93 #define INLINE 94 #endif /* __GNUC__ */ 95 96 #ifdef XEDEBUG 97 98 #define XED_CONFIG 0x1 99 #define XED_MII 0x2 100 #define XED_INTR 0x4 101 #define XED_FIFO 0x8 102 103 #ifndef XEDEBUG_DEF 104 #define XEDEBUG_DEF (XED_CONFIG|XED_INTR) 105 #endif /* XEDEBUG_DEF */ 106 107 int xedebug = XEDEBUG_DEF; 108 109 #define DPRINTF(cat, x) if (xedebug & (cat)) printf x 110 111 #else /* XEDEBUG */ 112 #define DPRINTF(cat, x) (void)0 113 #endif /* XEDEBUG */ 114 115 int xe_pcmcia_match(struct device *, void *, void *); 116 void xe_pcmcia_attach(struct device *, struct device *, void *); 117 int xe_pcmcia_detach(struct device *, int); 118 int xe_pcmcia_activate(struct device *, int); 119 120 /* 121 * In case this chipset ever turns up out of pcmcia attachments (very 122 * unlikely) do the driver splitup. 123 */ 124 struct xe_softc { 125 struct device sc_dev; /* Generic device info */ 126 u_int32_t sc_flags; /* Misc. flags */ 127 void *sc_ih; /* Interrupt handler */ 128 struct arpcom sc_arpcom; /* Ethernet common part */ 129 struct ifmedia sc_media; /* Media control */ 130 struct mii_data sc_mii; /* MII media information */ 131 int sc_all_mcasts; /* Receive all multicasts */ 132 bus_space_tag_t sc_bst; /* Bus cookie */ 133 bus_space_handle_t sc_bsh; /* Bus I/O handle */ 134 bus_size_t sc_offset; /* Offset of registers */ 135 u_int8_t sc_rev; /* Chip revision */ 136 }; 137 138 #define XEF_MOHAWK 0x001 139 #define XEF_DINGO 0x002 140 #define XEF_MODEM 0x004 141 #define XEF_UNSUPPORTED 0x008 142 #define XEF_CE 0x010 143 #define XEF_CE2 0x020 144 #define XEF_CE3 0x040 145 #define XEF_CE33 0x080 146 #define XEF_CE56 0x100 147 148 struct xe_pcmcia_softc { 149 struct xe_softc sc_xe; /* Generic device info */ 150 struct pcmcia_mem_handle sc_pcmh; /* PCMCIA memspace info */ 151 int sc_mem_window; /* mem window */ 152 struct pcmcia_io_handle sc_pcioh; /* iospace info */ 153 int sc_io_window; /* io window info */ 154 struct pcmcia_function *sc_pf; /* PCMCIA function */ 155 }; 156 157 /* Autoconfig definition of driver back-end */ 158 struct cfdriver xe_cd = { 159 NULL, "xe", DV_IFNET 160 }; 161 162 struct cfattach xe_pcmcia_ca = { 163 sizeof (struct xe_pcmcia_softc), xe_pcmcia_match, xe_pcmcia_attach, 164 xe_pcmcia_detach, xe_pcmcia_activate 165 }; 166 167 void xe_cycle_power(struct xe_softc *); 168 void xe_full_reset(struct xe_softc *); 169 void xe_init(struct xe_softc *); 170 int xe_intr(void *); 171 int xe_ioctl(struct ifnet *, u_long, caddr_t); 172 int xe_mdi_read(struct device *, int, int); 173 void xe_mdi_write(struct device *, int, int, int); 174 int xe_mediachange(struct ifnet *); 175 void xe_mediastatus(struct ifnet *, struct ifmediareq *); 176 int xe_pcmcia_funce_enaddr(struct device *, u_int8_t *); 177 u_int32_t xe_pcmcia_interpret_manfid(struct device *); 178 int xe_pcmcia_lan_nid_ciscallback(struct pcmcia_tuple *, void *); 179 int xe_pcmcia_manfid_ciscallback(struct pcmcia_tuple *, void *); 180 u_int16_t xe_get(struct xe_softc *); 181 void xe_reset(struct xe_softc *); 182 void xe_set_address(struct xe_softc *); 183 void xe_start(struct ifnet *); 184 void xe_statchg(struct device *); 185 void xe_stop(struct xe_softc *); 186 void xe_watchdog(struct ifnet *); 187 #ifdef XEDEBUG 188 void xe_reg_dump(struct xe_softc *); 189 #endif /* XEDEBUG */ 190 191 int 192 xe_pcmcia_match(parent, match, aux) 193 struct device *parent; 194 void *match, *aux; 195 { 196 struct pcmcia_attach_args *pa = aux; 197 198 if (pa->pf->function != PCMCIA_FUNCTION_NETWORK) 199 return (0); 200 201 switch (pa->manufacturer) { 202 case PCMCIA_VENDOR_COMPAQ: 203 case PCMCIA_VENDOR_COMPAQ2: 204 return (0); 205 206 case PCMCIA_VENDOR_INTEL: 207 case PCMCIA_VENDOR_XIRCOM: 208 /* XXX Per-productid checking here. */ 209 return (1); 210 211 default: 212 return (0); 213 } 214 } 215 216 void 217 xe_pcmcia_attach(parent, self, aux) 218 struct device *parent, *self; 219 void *aux; 220 { 221 struct xe_pcmcia_softc *psc = (struct xe_pcmcia_softc *)self; 222 struct xe_softc *sc = &psc->sc_xe; 223 struct pcmcia_attach_args *pa = aux; 224 struct pcmcia_function *pf = pa->pf; 225 struct pcmcia_config_entry *cfe = NULL; 226 struct ifnet *ifp; 227 u_int8_t myla[ETHER_ADDR_LEN], *enaddr = NULL; 228 int state = 0; 229 struct pcmcia_mem_handle pcmh; 230 int ccr_window; 231 bus_size_t ccr_offset; 232 const char *intrstr; 233 234 psc->sc_pf = pf; 235 236 #if 0 237 /* Figure out what card we are. */ 238 sc->sc_flags = xe_pcmcia_interpret_manfid(parent); 239 #endif 240 if (sc->sc_flags & XEF_UNSUPPORTED) { 241 printf(": card unsupported\n"); 242 goto bad; 243 } 244 245 /* Tell the pcmcia framework where the CCR is. */ 246 pf->ccr_base = 0x800; 247 pf->ccr_mask = 0x67; 248 249 /* Fake a cfe. */ 250 SIMPLEQ_FIRST(&pa->pf->cfe_head) = cfe = (struct pcmcia_config_entry *) 251 malloc(sizeof *cfe, M_DEVBUF, M_NOWAIT | M_ZERO); 252 if (!cfe) { 253 printf(": function enable failed\n"); 254 return; 255 } 256 257 /* 258 * XXX Use preprocessor symbols instead. 259 * Enable ethernet & its interrupts, wiring them to -INT 260 * No I/O base. 261 */ 262 cfe->number = 0x5; 263 cfe->flags = 0; /* XXX Check! */ 264 cfe->iftype = PCMCIA_IFTYPE_IO; 265 cfe->num_iospace = 0; 266 cfe->num_memspace = 0; 267 cfe->irqmask = 0x8eb0; 268 269 /* Enable the card. */ 270 pcmcia_function_init(pa->pf, cfe); 271 if (pcmcia_function_enable(pa->pf)) { 272 printf(": function enable failed\n"); 273 goto bad; 274 } 275 276 state++; 277 278 if (pcmcia_io_alloc(pa->pf, 0, 16, 16, &psc->sc_pcioh)) { 279 printf(": io allocation failed\n"); 280 goto bad; 281 } 282 283 state++; 284 285 if (pcmcia_io_map(pa->pf, PCMCIA_WIDTH_IO16, 0, 16, &psc->sc_pcioh, 286 &psc->sc_io_window)) { 287 printf(": can't map io space\n"); 288 goto bad; 289 } 290 sc->sc_bst = psc->sc_pcioh.iot; 291 sc->sc_bsh = psc->sc_pcioh.ioh; 292 sc->sc_offset = 0; 293 294 printf(" port 0x%lx/%d", psc->sc_pcioh.addr, 16); 295 296 #if 0 297 if (pcmcia_mem_alloc(pf, 16, &psc->sc_pcmh)) { 298 printf(": pcmcia memory allocation failed\n"); 299 goto bad; 300 } 301 state++; 302 303 if (pcmcia_mem_map(pf, PCMCIA_MEM_ATTR, 0x300, 16, &psc->sc_pcmh, 304 &sc->sc_offset, &psc->sc_mem_window)) { 305 printf(": pcmcia memory mapping failed\n"); 306 goto bad; 307 } 308 309 sc->sc_bst = psc->sc_pcmh.memt; 310 sc->sc_bsh = psc->sc_pcmh.memh; 311 #endif 312 313 /* Figure out what card we are. */ 314 sc->sc_flags = xe_pcmcia_interpret_manfid(parent); 315 316 /* 317 * Configuration as advised by DINGO documentation. 318 * We only know about this flag after the manfid interpretation. 319 * Dingo has some extra configuration registers in the CCR space. 320 */ 321 if (sc->sc_flags & XEF_DINGO) { 322 if (pcmcia_mem_alloc(pf, PCMCIA_CCR_SIZE_DINGO, &pcmh)) { 323 DPRINTF(XED_CONFIG, ("bad mem alloc\n")); 324 goto bad; 325 } 326 327 if (pcmcia_mem_map(pf, PCMCIA_MEM_ATTR, pf->ccr_base, 328 PCMCIA_CCR_SIZE_DINGO, &pcmh, &ccr_offset, 329 &ccr_window)) { 330 DPRINTF(XED_CONFIG, ("bad mem map\n")); 331 pcmcia_mem_free(pf, &pcmh); 332 goto bad; 333 } 334 335 bus_space_write_1(pcmh.memt, pcmh.memh, 336 ccr_offset + PCMCIA_CCR_DCOR0, PCMCIA_CCR_DCOR0_SFINT); 337 bus_space_write_1(pcmh.memt, pcmh.memh, 338 ccr_offset + PCMCIA_CCR_DCOR1, 339 PCMCIA_CCR_DCOR1_FORCE_LEVIREQ | PCMCIA_CCR_DCOR1_D6); 340 bus_space_write_1(pcmh.memt, pcmh.memh, 341 ccr_offset + PCMCIA_CCR_DCOR2, 0); 342 bus_space_write_1(pcmh.memt, pcmh.memh, 343 ccr_offset + PCMCIA_CCR_DCOR3, 0); 344 bus_space_write_1(pcmh.memt, pcmh.memh, 345 ccr_offset + PCMCIA_CCR_DCOR4, 0); 346 347 /* We don't need them anymore and can free them (I think). */ 348 pcmcia_mem_unmap(pf, ccr_window); 349 pcmcia_mem_free(pf, &pcmh); 350 } 351 352 /* 353 * Try to get the ethernet address from FUNCE/LAN_NID tuple. 354 */ 355 if (xe_pcmcia_funce_enaddr(parent, myla)) 356 enaddr = myla; 357 ifp = &sc->sc_arpcom.ac_if; 358 if (enaddr) 359 bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN); 360 else { 361 printf(", unable to get ethernet address\n"); 362 goto bad; 363 } 364 365 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 366 ifp->if_softc = sc; 367 ifp->if_flags = 368 IFF_BROADCAST | IFF_NOTRAILERS | IFF_SIMPLEX | IFF_MULTICAST; 369 ifp->if_ioctl = xe_ioctl; 370 ifp->if_start = xe_start; 371 ifp->if_watchdog = xe_watchdog; 372 IFQ_SET_READY(&ifp->if_snd); 373 374 /* Establish the interrupt. */ 375 sc->sc_ih = pcmcia_intr_establish(pa->pf, IPL_NET, xe_intr, sc, 376 sc->sc_dev.dv_xname); 377 if (sc->sc_ih == NULL) { 378 printf(", couldn't establish interrupt\n"); 379 goto bad; 380 } 381 intrstr = pcmcia_intr_string(psc->sc_pf, sc->sc_ih); 382 printf("%s%s: address %s\n", *intrstr ? ", " : "", intrstr, 383 ether_sprintf(sc->sc_arpcom.ac_enaddr)); 384 385 /* Reset and initialize the card. */ 386 xe_full_reset(sc); 387 388 /* Initialize our media structures and probe the phy. */ 389 sc->sc_mii.mii_ifp = ifp; 390 sc->sc_mii.mii_readreg = xe_mdi_read; 391 sc->sc_mii.mii_writereg = xe_mdi_write; 392 sc->sc_mii.mii_statchg = xe_statchg; 393 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, xe_mediachange, 394 xe_mediastatus); 395 DPRINTF(XED_MII | XED_CONFIG, 396 ("bmsr %x\n", xe_mdi_read(&sc->sc_dev, 0, 1))); 397 mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 398 0); 399 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) 400 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO, 0, 401 NULL); 402 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO); 403 404 /* 405 * Attach the interface. 406 */ 407 if_attach(ifp); 408 ether_ifattach(ifp); 409 410 /* 411 * Reset and initialize the card again for DINGO (as found in Linux 412 * driver). Without this Dingo will get a watchdog timeout the first 413 * time. The ugly media tickling seems to be necessary for getting 414 * autonegotiation to work too. 415 */ 416 if (sc->sc_flags & XEF_DINGO) { 417 xe_full_reset(sc); 418 xe_init(sc); 419 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO); 420 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_NONE); 421 xe_stop(sc); 422 } 423 return; 424 425 bad: 426 if (state > 2) 427 pcmcia_io_unmap(pf, psc->sc_io_window); 428 if (state > 1) 429 pcmcia_io_free(pf, &psc->sc_pcioh); 430 if (state > 0) 431 pcmcia_function_disable(pa->pf); 432 free(cfe, M_DEVBUF); 433 } 434 435 int 436 xe_pcmcia_detach(dev, flags) 437 struct device *dev; 438 int flags; 439 { 440 struct xe_pcmcia_softc *psc = (struct xe_pcmcia_softc *)dev; 441 struct xe_softc *sc = &psc->sc_xe; 442 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 443 int rv = 0; 444 445 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 446 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 447 448 pcmcia_io_unmap(psc->sc_pf, psc->sc_io_window); 449 pcmcia_io_free(psc->sc_pf, &psc->sc_pcioh); 450 451 ether_ifdetach(ifp); 452 if_detach(ifp); 453 454 return (rv); 455 } 456 457 int 458 xe_pcmcia_activate(dev, act) 459 struct device *dev; 460 int act; 461 { 462 struct xe_pcmcia_softc *sc = (struct xe_pcmcia_softc *)dev; 463 struct ifnet *ifp = &sc->sc_xe.sc_arpcom.ac_if; 464 465 switch (act) { 466 case DVACT_SUSPEND: 467 if (ifp->if_flags & IFF_RUNNING) 468 xe_stop(&sc->sc_xe); 469 ifp->if_flags &= ~IFF_RUNNING; 470 if (sc->sc_xe.sc_ih) 471 pcmcia_intr_disestablish(sc->sc_pf, sc->sc_xe.sc_ih); 472 sc->sc_xe.sc_ih = NULL; 473 pcmcia_function_disable(sc->sc_pf); 474 break; 475 case DVACT_RESUME: 476 pcmcia_function_enable(sc->sc_pf); 477 sc->sc_xe.sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_NET, 478 xe_intr, sc, sc->sc_xe.sc_dev.dv_xname); 479 /* XXX this is a ridiculous */ 480 xe_reset(&sc->sc_xe); 481 if ((ifp->if_flags & IFF_UP) == 0) 482 xe_stop(&sc->sc_xe); 483 break; 484 case DVACT_DEACTIVATE: 485 ifp->if_timer = 0; 486 ifp->if_flags &= ~IFF_RUNNING; 487 if (sc->sc_xe.sc_ih) 488 pcmcia_intr_disestablish(sc->sc_pf, sc->sc_xe.sc_ih); 489 sc->sc_xe.sc_ih = NULL; 490 pcmcia_function_disable(sc->sc_pf); 491 break; 492 } 493 return (0); 494 } 495 496 /* 497 * XXX These two functions might be OK to factor out into pcmcia.c since 498 * if_sm_pcmcia.c uses similar ones. 499 */ 500 int 501 xe_pcmcia_funce_enaddr(parent, myla) 502 struct device *parent; 503 u_int8_t *myla; 504 { 505 /* XXX The Linux driver has more ways to do this in case of failure. */ 506 return (pcmcia_scan_cis(parent, xe_pcmcia_lan_nid_ciscallback, myla)); 507 } 508 509 int 510 xe_pcmcia_lan_nid_ciscallback(tuple, arg) 511 struct pcmcia_tuple *tuple; 512 void *arg; 513 { 514 u_int8_t *myla = arg; 515 int i; 516 517 if (tuple->code == PCMCIA_CISTPL_FUNCE) { 518 if (tuple->length < 2) 519 return (0); 520 521 switch (pcmcia_tuple_read_1(tuple, 0)) { 522 case PCMCIA_TPLFE_TYPE_LAN_NID: 523 if (pcmcia_tuple_read_1(tuple, 1) != ETHER_ADDR_LEN) 524 return (0); 525 break; 526 527 case 0x02: 528 /* 529 * Not sure about this, I don't have a CE2 530 * that puts the ethernet addr here. 531 */ 532 if (pcmcia_tuple_read_1(tuple, 1) != 13) 533 return (0); 534 break; 535 536 default: 537 return (0); 538 } 539 540 for (i = 0; i < ETHER_ADDR_LEN; i++) 541 myla[i] = pcmcia_tuple_read_1(tuple, i + 2); 542 return (1); 543 } 544 545 /* Yet another spot where this might be. */ 546 if (tuple->code == 0x89) { 547 pcmcia_tuple_read_1(tuple, 1); 548 for (i = 0; i < ETHER_ADDR_LEN; i++) 549 myla[i] = pcmcia_tuple_read_1(tuple, i + 2); 550 return (1); 551 } 552 return (0); 553 } 554 555 u_int32_t 556 xe_pcmcia_interpret_manfid (parent) 557 struct device *parent; 558 { 559 u_int32_t flags = 0; 560 struct pcmcia_softc *psc = (struct pcmcia_softc *)parent; 561 char *tptr; 562 563 if (!pcmcia_scan_cis(parent, xe_pcmcia_manfid_ciscallback, &flags)) 564 return (XEF_UNSUPPORTED); 565 566 if (flags & XEF_CE) { 567 tptr = memchr(psc->card.cis1_info[2], 'C', 568 strlen(psc->card.cis1_info[2])); 569 /* XXX not sure if other CE2s hide "CE2" in different places */ 570 if (tptr && *(tptr + 1) == 'E' && *(tptr + 2) == '2') { 571 flags ^= (XEF_CE | XEF_UNSUPPORTED); 572 flags |= XEF_CE2; 573 } 574 } 575 return (flags); 576 } 577 578 int 579 xe_pcmcia_manfid_ciscallback(tuple, arg) 580 struct pcmcia_tuple *tuple; 581 void *arg; 582 { 583 u_int32_t *flagsp = arg; 584 u_int8_t media, product; 585 586 if (tuple->code == PCMCIA_CISTPL_MANFID) { 587 if (tuple->length < 2) 588 return (0); 589 590 media = pcmcia_tuple_read_1(tuple, 3); 591 product = pcmcia_tuple_read_1(tuple, 4); 592 593 if (!(product & XEPROD_CREDITCARD) || 594 !(media & XEMEDIA_ETHER)) { 595 *flagsp |= XEF_UNSUPPORTED; 596 return (1); 597 } 598 599 if (media & XEMEDIA_MODEM) 600 *flagsp |= XEF_MODEM; 601 602 switch (product & XEPROD_IDMASK) { 603 case 1: 604 /* XXX Can be CE2 too (we double-check later). */ 605 *flagsp |= XEF_CE | XEF_UNSUPPORTED; 606 break; 607 case 2: 608 *flagsp |= XEF_CE2; 609 break; 610 case 3: 611 if (!(*flagsp & XEF_MODEM)) 612 *flagsp |= XEF_MOHAWK; 613 *flagsp |= XEF_CE3; 614 break; 615 case 4: 616 *flagsp |= XEF_CE33; 617 break; 618 case 5: 619 *flagsp |= XEF_CE56 | XEF_MOHAWK; 620 break; 621 case 6: 622 case 7: 623 *flagsp |= XEF_CE56 | XEF_MOHAWK | XEF_DINGO; 624 break; 625 default: 626 *flagsp |= XEF_UNSUPPORTED; 627 break; 628 } 629 630 return (1); 631 } 632 return (0); 633 } 634 635 int 636 xe_intr(arg) 637 void *arg; 638 { 639 struct xe_softc *sc = arg; 640 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 641 u_int8_t esr, rsr, isr, rx_status, savedpage; 642 u_int16_t tx_status, recvcount = 0, tempint; 643 644 ifp->if_timer = 0; /* turn watchdog timer off */ 645 646 if (sc->sc_flags & XEF_MOHAWK) { 647 /* Disable interrupt (Linux does it). */ 648 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 649 0); 650 } 651 652 savedpage = 653 bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + PR); 654 655 PAGE(sc, 0); 656 esr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ESR); 657 isr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ISR0); 658 rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RSR); 659 660 /* Check to see if card has been ejected. */ 661 if (isr == 0xff) { 662 printf("%s: interrupt for dead card\n", sc->sc_dev.dv_xname); 663 goto end; 664 } 665 666 PAGE(sc, 40); 667 rx_status = 668 bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RXST0); 669 tx_status = 670 bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + TXST0); 671 672 /* 673 * XXX Linux writes to RXST0 and TXST* here. My CE2 works just fine 674 * without it, and I can't see an obvious reason for it. 675 */ 676 677 PAGE(sc, 0); 678 while (esr & FULL_PKT_RCV) { 679 if (!(rsr & RSR_RX_OK)) 680 break; 681 682 /* Compare bytes read this interrupt to hard maximum. */ 683 if (recvcount > MAX_BYTES_INTR) { 684 DPRINTF(XED_INTR, 685 ("%s: too many bytes this interrupt\n", 686 sc->sc_dev.dv_xname)); 687 ifp->if_iqdrops++; 688 /* Drop packet. */ 689 bus_space_write_2(sc->sc_bst, sc->sc_bsh, 690 sc->sc_offset + DO0, DO_SKIP_RX_PKT); 691 } 692 tempint = xe_get(sc); 693 recvcount += tempint; 694 ifp->if_ibytes += tempint; 695 esr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 696 sc->sc_offset + ESR); 697 rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 698 sc->sc_offset + RSR); 699 } 700 701 /* Packet too long? */ 702 if (rsr & RSR_TOO_LONG) { 703 ifp->if_ierrors++; 704 DPRINTF(XED_INTR, 705 ("%s: packet too long\n", sc->sc_dev.dv_xname)); 706 } 707 708 /* CRC error? */ 709 if (rsr & RSR_CRCERR) { 710 ifp->if_ierrors++; 711 DPRINTF(XED_INTR, 712 ("%s: CRC error detected\n", sc->sc_dev.dv_xname)); 713 } 714 715 /* Alignment error? */ 716 if (rsr & RSR_ALIGNERR) { 717 ifp->if_ierrors++; 718 DPRINTF(XED_INTR, 719 ("%s: alignment error detected\n", sc->sc_dev.dv_xname)); 720 } 721 722 /* Check for rx overrun. */ 723 if (rx_status & RX_OVERRUN) { 724 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 725 CLR_RX_OVERRUN); 726 DPRINTF(XED_INTR, ("overrun cleared\n")); 727 } 728 729 /* Try to start more packets transmitting. */ 730 if (IFQ_IS_EMPTY(&ifp->if_snd) == 0) 731 xe_start(ifp); 732 733 /* Detected excessive collisions? */ 734 if ((tx_status & EXCESSIVE_COLL) && ifp->if_opackets > 0) { 735 DPRINTF(XED_INTR, 736 ("%s: excessive collisions\n", sc->sc_dev.dv_xname)); 737 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 738 RESTART_TX); 739 ifp->if_oerrors++; 740 } 741 742 if ((tx_status & TX_ABORT) && ifp->if_opackets > 0) 743 ifp->if_oerrors++; 744 745 end: 746 /* Reenable interrupts. */ 747 PAGE(sc, savedpage); 748 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 749 ENABLE_INT); 750 751 return (1); 752 } 753 754 u_int16_t 755 xe_get(sc) 756 struct xe_softc *sc; 757 { 758 u_int8_t rsr; 759 struct mbuf *top, **mp, *m; 760 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 761 u_int16_t pktlen, len, recvcount = 0; 762 u_int8_t *data; 763 764 PAGE(sc, 0); 765 rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RSR); 766 767 pktlen = 768 bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RBC0) & 769 RBC_COUNT_MASK; 770 if (pktlen == 0) { 771 /* 772 * XXX At least one CE2 sets RBC0 == 0 occasionally, and only 773 * when MPE is set. It is not known why. 774 */ 775 return (0); 776 } 777 recvcount += pktlen; 778 779 MGETHDR(m, M_DONTWAIT, MT_DATA); 780 if (m == 0) 781 return (recvcount); 782 m->m_pkthdr.rcvif = ifp; 783 m->m_pkthdr.len = pktlen; 784 len = MHLEN; 785 top = 0; 786 mp = ⊤ 787 788 while (pktlen > 0) { 789 if (top) { 790 MGET(m, M_DONTWAIT, MT_DATA); 791 if (m == 0) { 792 m_freem(top); 793 return (recvcount); 794 } 795 len = MLEN; 796 } 797 if (pktlen >= MINCLSIZE) { 798 MCLGET(m, M_DONTWAIT); 799 if (!(m->m_flags & M_EXT)) { 800 m_freem(m); 801 m_freem(top); 802 return (recvcount); 803 } 804 len = MCLBYTES; 805 } 806 if (!top) { 807 caddr_t newdata = (caddr_t)ALIGN(m->m_data + 808 sizeof (struct ether_header)) - 809 sizeof (struct ether_header); 810 len -= newdata - m->m_data; 811 m->m_data = newdata; 812 } 813 len = min(pktlen, len); 814 815 data = mtod(m, u_int8_t *); 816 if (len > 1) { 817 len &= ~1; 818 bus_space_read_raw_multi_2(sc->sc_bst, sc->sc_bsh, 819 sc->sc_offset + EDP, data, len); 820 } else 821 *data = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 822 sc->sc_offset + EDP); 823 m->m_len = len; 824 pktlen -= len; 825 *mp = m; 826 mp = &m->m_next; 827 } 828 829 /* Skip Rx packet. */ 830 bus_space_write_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + DO0, 831 DO_SKIP_RX_PKT); 832 833 ifp->if_ipackets++; 834 835 #if NBPFILTER > 0 836 if (ifp->if_bpf) 837 bpf_mtap(ifp->if_bpf, top, BPF_DIRECTION_IN); 838 #endif 839 840 ether_input_mbuf(ifp, top); 841 return (recvcount); 842 } 843 844 845 /* 846 * Serial management for the MII. 847 * The DELAY's below stem from the fact that the maximum frequency 848 * acceptable on the MDC pin is 2.5 MHz and fast processors can easily 849 * go much faster than that. 850 */ 851 852 /* Let the MII serial management be idle for one period. */ 853 static INLINE void xe_mdi_idle(struct xe_softc *); 854 static INLINE void 855 xe_mdi_idle(sc) 856 struct xe_softc *sc; 857 { 858 bus_space_tag_t bst = sc->sc_bst; 859 bus_space_handle_t bsh = sc->sc_bsh; 860 bus_size_t offset = sc->sc_offset; 861 862 /* Drive MDC low... */ 863 bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW); 864 DELAY(1); 865 866 /* and high again. */ 867 bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH); 868 DELAY(1); 869 } 870 871 /* Pulse out one bit of data. */ 872 static INLINE void xe_mdi_pulse(struct xe_softc *, int); 873 static INLINE void 874 xe_mdi_pulse(sc, data) 875 struct xe_softc *sc; 876 int data; 877 { 878 bus_space_tag_t bst = sc->sc_bst; 879 bus_space_handle_t bsh = sc->sc_bsh; 880 bus_size_t offset = sc->sc_offset; 881 u_int8_t bit = data ? MDIO_HIGH : MDIO_LOW; 882 883 /* First latch the data bit MDIO with clock bit MDC low...*/ 884 bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_LOW); 885 DELAY(1); 886 887 /* then raise the clock again, preserving the data bit. */ 888 bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_HIGH); 889 DELAY(1); 890 } 891 892 /* Probe one bit of data. */ 893 static INLINE int xe_mdi_probe(struct xe_softc *sc); 894 static INLINE int 895 xe_mdi_probe(sc) 896 struct xe_softc *sc; 897 { 898 bus_space_tag_t bst = sc->sc_bst; 899 bus_space_handle_t bsh = sc->sc_bsh; 900 bus_size_t offset = sc->sc_offset; 901 u_int8_t x; 902 903 /* Pull clock bit MDCK low... */ 904 bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW); 905 DELAY(1); 906 907 /* Read data and drive clock high again. */ 908 x = bus_space_read_1(bst, bsh, offset + GP2) & MDIO; 909 bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH); 910 DELAY(1); 911 912 return (x); 913 } 914 915 /* Pulse out a sequence of data bits. */ 916 static INLINE void xe_mdi_pulse_bits(struct xe_softc *, u_int32_t, int); 917 static INLINE void 918 xe_mdi_pulse_bits(sc, data, len) 919 struct xe_softc *sc; 920 u_int32_t data; 921 int len; 922 { 923 u_int32_t mask; 924 925 for (mask = 1 << (len - 1); mask; mask >>= 1) 926 xe_mdi_pulse(sc, data & mask); 927 } 928 929 /* Read a PHY register. */ 930 int 931 xe_mdi_read(self, phy, reg) 932 struct device *self; 933 int phy; 934 int reg; 935 { 936 struct xe_softc *sc = (struct xe_softc *)self; 937 int i; 938 u_int32_t mask; 939 u_int32_t data = 0; 940 941 PAGE(sc, 2); 942 for (i = 0; i < 32; i++) /* Synchronize. */ 943 xe_mdi_pulse(sc, 1); 944 xe_mdi_pulse_bits(sc, 0x06, 4); /* Start + Read opcode */ 945 xe_mdi_pulse_bits(sc, phy, 5); /* PHY address */ 946 xe_mdi_pulse_bits(sc, reg, 5); /* PHY register */ 947 xe_mdi_idle(sc); /* Turn around. */ 948 xe_mdi_probe(sc); /* Drop initial zero bit. */ 949 950 for (mask = 1 << 15; mask; mask >>= 1) 951 if (xe_mdi_probe(sc)) 952 data |= mask; 953 xe_mdi_idle(sc); 954 955 DPRINTF(XED_MII, 956 ("xe_mdi_read: phy %d reg %d -> %x\n", phy, reg, data)); 957 return (data); 958 } 959 960 /* Write a PHY register. */ 961 void 962 xe_mdi_write(self, phy, reg, value) 963 struct device *self; 964 int phy; 965 int reg; 966 int value; 967 { 968 struct xe_softc *sc = (struct xe_softc *)self; 969 int i; 970 971 PAGE(sc, 2); 972 for (i = 0; i < 32; i++) /* Synchronize. */ 973 xe_mdi_pulse(sc, 1); 974 xe_mdi_pulse_bits(sc, 0x05, 4); /* Start + Write opcode */ 975 xe_mdi_pulse_bits(sc, phy, 5); /* PHY address */ 976 xe_mdi_pulse_bits(sc, reg, 5); /* PHY register */ 977 xe_mdi_pulse_bits(sc, 0x02, 2); /* Turn around. */ 978 xe_mdi_pulse_bits(sc, value, 16); /* Write the data */ 979 xe_mdi_idle(sc); /* Idle away. */ 980 981 DPRINTF(XED_MII, 982 ("xe_mdi_write: phy %d reg %d val %x\n", phy, reg, value)); 983 } 984 985 void 986 xe_statchg(self) 987 struct device *self; 988 { 989 /* XXX Update ifp->if_baudrate */ 990 } 991 992 /* 993 * Change media according to request. 994 */ 995 int 996 xe_mediachange(ifp) 997 struct ifnet *ifp; 998 { 999 if (ifp->if_flags & IFF_UP) 1000 xe_init(ifp->if_softc); 1001 return (0); 1002 } 1003 1004 /* 1005 * Notify the world which media we're using. 1006 */ 1007 void 1008 xe_mediastatus(ifp, ifmr) 1009 struct ifnet *ifp; 1010 struct ifmediareq *ifmr; 1011 { 1012 struct xe_softc *sc = ifp->if_softc; 1013 1014 mii_pollstat(&sc->sc_mii); 1015 ifmr->ifm_status = sc->sc_mii.mii_media_status; 1016 ifmr->ifm_active = sc->sc_mii.mii_media_active; 1017 } 1018 1019 void 1020 xe_reset(sc) 1021 struct xe_softc *sc; 1022 { 1023 int s; 1024 1025 s = splnet(); 1026 xe_stop(sc); 1027 xe_full_reset(sc); 1028 xe_init(sc); 1029 splx(s); 1030 } 1031 1032 void 1033 xe_watchdog(ifp) 1034 struct ifnet *ifp; 1035 { 1036 struct xe_softc *sc = ifp->if_softc; 1037 1038 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1039 ++sc->sc_arpcom.ac_if.if_oerrors; 1040 1041 xe_reset(sc); 1042 } 1043 1044 void 1045 xe_stop(sc) 1046 register struct xe_softc *sc; 1047 { 1048 /* Disable interrupts. */ 1049 PAGE(sc, 0); 1050 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 0); 1051 1052 PAGE(sc, 1); 1053 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + IMR0, 0); 1054 1055 /* Power down, wait. */ 1056 PAGE(sc, 4); 1057 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + GP1, 0); 1058 DELAY(40000); 1059 1060 /* Cancel watchdog timer. */ 1061 sc->sc_arpcom.ac_if.if_timer = 0; 1062 } 1063 1064 void 1065 xe_init(sc) 1066 struct xe_softc *sc; 1067 { 1068 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1069 int s; 1070 1071 DPRINTF(XED_CONFIG, ("xe_init\n")); 1072 1073 s = splnet(); 1074 1075 xe_set_address(sc); 1076 1077 /* Set current media. */ 1078 mii_mediachg(&sc->sc_mii); 1079 1080 ifp->if_flags |= IFF_RUNNING; 1081 ifp->if_flags &= ~IFF_OACTIVE; 1082 splx(s); 1083 } 1084 1085 /* 1086 * Start outputting on the interface. 1087 * Always called as splnet(). 1088 */ 1089 void 1090 xe_start(ifp) 1091 struct ifnet *ifp; 1092 { 1093 struct xe_softc *sc = ifp->if_softc; 1094 bus_space_tag_t bst = sc->sc_bst; 1095 bus_space_handle_t bsh = sc->sc_bsh; 1096 bus_size_t offset = sc->sc_offset; 1097 unsigned int s, len, pad = 0; 1098 struct mbuf *m0, *m; 1099 u_int16_t space; 1100 1101 /* Don't transmit if interface is busy or not running. */ 1102 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1103 return; 1104 1105 /* Peek at the next packet. */ 1106 IFQ_POLL(&ifp->if_snd, m0); 1107 if (m0 == 0) 1108 return; 1109 1110 /* We need to use m->m_pkthdr.len, so require the header. */ 1111 if (!(m0->m_flags & M_PKTHDR)) 1112 panic("xe_start: no header mbuf"); 1113 1114 len = m0->m_pkthdr.len; 1115 1116 /* Pad to ETHER_MIN_LEN - ETHER_CRC_LEN. */ 1117 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 1118 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 1119 1120 PAGE(sc, 0); 1121 space = bus_space_read_2(bst, bsh, offset + TSO0) & 0x7fff; 1122 if (len + pad + 2 > space) { 1123 DPRINTF(XED_FIFO, 1124 ("%s: not enough space in output FIFO (%d > %d)\n", 1125 sc->sc_dev.dv_xname, len + pad + 2, space)); 1126 return; 1127 } 1128 1129 IFQ_DEQUEUE(&ifp->if_snd, m0); 1130 1131 #if NBPFILTER > 0 1132 if (ifp->if_bpf) 1133 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1134 #endif 1135 1136 /* 1137 * Do the output at splhigh() so that an interrupt from another device 1138 * won't cause a FIFO underrun. 1139 */ 1140 s = splhigh(); 1141 1142 bus_space_write_2(bst, bsh, offset + TSO2, (u_int16_t)len + pad + 2); 1143 bus_space_write_2(bst, bsh, offset + EDP, (u_int16_t)len + pad); 1144 for (m = m0; m; ) { 1145 if (m->m_len > 1) 1146 bus_space_write_raw_multi_2(bst, bsh, offset + EDP, 1147 mtod(m, u_int8_t *), m->m_len & ~1); 1148 if (m->m_len & 1) 1149 bus_space_write_1(bst, bsh, offset + EDP, 1150 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1151 MFREE(m, m0); 1152 m = m0; 1153 } 1154 if (sc->sc_flags & XEF_MOHAWK) 1155 bus_space_write_1(bst, bsh, offset + CR, TX_PKT | ENABLE_INT); 1156 else { 1157 for (; pad > 1; pad -= 2) 1158 bus_space_write_2(bst, bsh, offset + EDP, 0); 1159 if (pad == 1) 1160 bus_space_write_1(bst, bsh, offset + EDP, 0); 1161 } 1162 1163 splx(s); 1164 1165 ifp->if_timer = 5; 1166 ++ifp->if_opackets; 1167 } 1168 1169 int 1170 xe_ioctl(ifp, command, data) 1171 struct ifnet *ifp; 1172 u_long command; 1173 caddr_t data; 1174 { 1175 struct xe_softc *sc = ifp->if_softc; 1176 struct ifaddr *ifa = (struct ifaddr *)data; 1177 struct ifreq *ifr = (struct ifreq *)data; 1178 int s, error = 0; 1179 1180 s = splnet(); 1181 1182 switch (command) { 1183 case SIOCSIFADDR: 1184 ifp->if_flags |= IFF_UP; 1185 xe_init(sc); 1186 #ifdef INET 1187 if (ifa->ifa_addr->sa_family == AF_INET) 1188 arp_ifinit(&sc->sc_arpcom, ifa); 1189 #endif /* INET */ 1190 break; 1191 1192 case SIOCSIFFLAGS: 1193 sc->sc_all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1194 1195 PAGE(sc, 0x42); 1196 if ((ifp->if_flags & IFF_PROMISC) || 1197 (ifp->if_flags & IFF_ALLMULTI)) 1198 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1199 sc->sc_offset + SWC1, 1200 SWC1_PROMISC | SWC1_MCAST_PROM); 1201 else 1202 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1203 sc->sc_offset + SWC1, 0); 1204 1205 /* 1206 * If interface is marked up and not running, then start it. 1207 * If it is marked down and running, stop it. 1208 * XXX If it's up then re-initialize it. This is so flags 1209 * such as IFF_PROMISC are handled. 1210 */ 1211 if (ifp->if_flags & IFF_UP) { 1212 xe_init(sc); 1213 } else { 1214 if (ifp->if_flags & IFF_RUNNING) 1215 xe_stop(sc); 1216 } 1217 break; 1218 1219 case SIOCADDMULTI: 1220 case SIOCDELMULTI: 1221 sc->sc_all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1222 error = (command == SIOCADDMULTI) ? 1223 ether_addmulti(ifr, &sc->sc_arpcom) : 1224 ether_delmulti(ifr, &sc->sc_arpcom); 1225 1226 if (error == ENETRESET) { 1227 /* 1228 * Multicast list has changed; set the hardware 1229 * filter accordingly. 1230 */ 1231 if (!sc->sc_all_mcasts && 1232 !(ifp->if_flags & IFF_PROMISC)) 1233 xe_set_address(sc); 1234 1235 /* 1236 * xe_set_address() can turn on all_mcasts if we run 1237 * out of space, so check it again rather than else {}. 1238 */ 1239 if (sc->sc_all_mcasts) 1240 xe_init(sc); 1241 error = 0; 1242 } 1243 break; 1244 1245 case SIOCSIFMEDIA: 1246 case SIOCGIFMEDIA: 1247 error = 1248 ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command); 1249 break; 1250 1251 default: 1252 error = ENOTTY; 1253 } 1254 1255 splx(s); 1256 return (error); 1257 } 1258 1259 void 1260 xe_set_address(sc) 1261 struct xe_softc *sc; 1262 { 1263 bus_space_tag_t bst = sc->sc_bst; 1264 bus_space_handle_t bsh = sc->sc_bsh; 1265 bus_size_t offset = sc->sc_offset; 1266 struct arpcom *arp = &sc->sc_arpcom; 1267 struct ether_multi *enm; 1268 struct ether_multistep step; 1269 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1270 int i, page, pos, num; 1271 1272 PAGE(sc, 0x50); 1273 for (i = 0; i < 6; i++) { 1274 bus_space_write_1(bst, bsh, offset + IA + i, 1275 sc->sc_arpcom.ac_enaddr[(sc->sc_flags & XEF_MOHAWK) ? 1276 5 - i : i]); 1277 } 1278 1279 if (arp->ac_multicnt > 0) { 1280 if (arp->ac_multicnt > 9) { 1281 PAGE(sc, 0x42); 1282 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1283 sc->sc_offset + SWC1, 1284 SWC1_PROMISC | SWC1_MCAST_PROM); 1285 return; 1286 } 1287 1288 ETHER_FIRST_MULTI(step, arp, enm); 1289 1290 pos = IA + 6; 1291 for (page = 0x50, num = arp->ac_multicnt; num > 0 && enm; 1292 num--) { 1293 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 1294 sizeof(enm->enm_addrlo)) != 0) { 1295 /* 1296 * The multicast address is really a range; 1297 * it's easier just to accept all multicasts. 1298 * XXX should we be setting IFF_ALLMULTI here? 1299 */ 1300 ifp->if_flags |= IFF_ALLMULTI; 1301 sc->sc_all_mcasts=1; 1302 break; 1303 } 1304 1305 for (i = 0; i < 6; i++) { 1306 bus_space_write_1(bst, bsh, offset + pos, 1307 enm->enm_addrlo[ 1308 (sc->sc_flags & XEF_MOHAWK) ? 5 - i : i]); 1309 1310 if (++pos > 15) { 1311 pos = IA; 1312 page++; 1313 PAGE(sc, page); 1314 } 1315 } 1316 } 1317 } 1318 } 1319 1320 void 1321 xe_cycle_power(sc) 1322 struct xe_softc *sc; 1323 { 1324 bus_space_tag_t bst = sc->sc_bst; 1325 bus_space_handle_t bsh = sc->sc_bsh; 1326 bus_size_t offset = sc->sc_offset; 1327 1328 PAGE(sc, 4); 1329 DELAY(1); 1330 bus_space_write_1(bst, bsh, offset + GP1, 0); 1331 DELAY(40000); 1332 if (sc->sc_flags & XEF_MOHAWK) 1333 bus_space_write_1(bst, bsh, offset + GP1, POWER_UP); 1334 else 1335 /* XXX What is bit 2 (aka AIC)? */ 1336 bus_space_write_1(bst, bsh, offset + GP1, POWER_UP | 4); 1337 DELAY(20000); 1338 } 1339 1340 void 1341 xe_full_reset(sc) 1342 struct xe_softc *sc; 1343 { 1344 bus_space_tag_t bst = sc->sc_bst; 1345 bus_space_handle_t bsh = sc->sc_bsh; 1346 bus_size_t offset = sc->sc_offset; 1347 1348 /* Do an as extensive reset as possible on all functions. */ 1349 xe_cycle_power(sc); 1350 bus_space_write_1(bst, bsh, offset + CR, SOFT_RESET); 1351 DELAY(20000); 1352 bus_space_write_1(bst, bsh, offset + CR, 0); 1353 DELAY(20000); 1354 if (sc->sc_flags & XEF_MOHAWK) { 1355 PAGE(sc, 4); 1356 /* 1357 * Drive GP1 low to power up ML6692 and GP2 high to power up 1358 * the 10MHz chip. XXX What chip is that? The phy? 1359 */ 1360 bus_space_write_1(bst, bsh, offset + GP0, 1361 GP1_OUT | GP2_OUT | GP2_WR); 1362 } 1363 DELAY(500000); 1364 1365 /* Get revision information. XXX Symbolic constants. */ 1366 sc->sc_rev = bus_space_read_1(bst, bsh, offset + BV) & 1367 ((sc->sc_flags & XEF_MOHAWK) ? 0x70 : 0x30) >> 4; 1368 1369 /* Media selection. XXX Maybe manual overriding too? */ 1370 if (!(sc->sc_flags & XEF_MOHAWK)) { 1371 PAGE(sc, 4); 1372 /* 1373 * XXX I have no idea what this really does, it is from the 1374 * Linux driver. 1375 */ 1376 bus_space_write_1(bst, bsh, offset + GP0, GP1_OUT); 1377 } 1378 DELAY(40000); 1379 1380 /* Setup the ethernet interrupt mask. */ 1381 PAGE(sc, 1); 1382 bus_space_write_1(bst, bsh, offset + IMR0, 1383 ISR_TX_OFLOW | ISR_PKT_TX | ISR_MAC_INT | /* ISR_RX_EARLY | */ 1384 ISR_RX_FULL | ISR_RX_PKT_REJ | ISR_FORCED_INT); 1385 #if 0 1386 bus_space_write_1(bst, bsh, offset + IMR0, 0xff); 1387 #endif 1388 if (!(sc->sc_flags & XEF_DINGO)) 1389 /* XXX What is this? Not for Dingo at least. */ 1390 bus_space_write_1(bst, bsh, offset + IMR1, 1); 1391 1392 /* 1393 * Disable source insertion. 1394 * XXX Dingo does not have this bit, but Linux does it unconditionally. 1395 */ 1396 if (!(sc->sc_flags & XEF_DINGO)) { 1397 PAGE(sc, 0x42); 1398 bus_space_write_1(bst, bsh, offset + SWC0, 0x20); 1399 } 1400 1401 /* Set the local memory dividing line. */ 1402 if (sc->sc_rev != 1) { 1403 PAGE(sc, 2); 1404 /* XXX Symbolic constant preferrable. */ 1405 bus_space_write_2(bst, bsh, offset + RBS0, 0x2000); 1406 } 1407 1408 xe_set_address(sc); 1409 1410 /* 1411 * Apparently the receive byte pointer can be bad after a reset, so 1412 * we hardwire it correctly. 1413 */ 1414 PAGE(sc, 0); 1415 bus_space_write_2(bst, bsh, offset + DO0, DO_CHG_OFFSET); 1416 1417 /* Setup ethernet MAC registers. XXX Symbolic constants. */ 1418 PAGE(sc, 0x40); 1419 bus_space_write_1(bst, bsh, offset + RX0MSK, 1420 PKT_TOO_LONG | CRC_ERR | RX_OVERRUN | RX_ABORT | RX_OK); 1421 bus_space_write_1(bst, bsh, offset + TX0MSK, 1422 CARRIER_LOST | EXCESSIVE_COLL | TX_UNDERRUN | LATE_COLLISION | 1423 SQE | TX_ABORT | TX_OK); 1424 if (!(sc->sc_flags & XEF_DINGO)) 1425 /* XXX From Linux, dunno what 0xb0 means. */ 1426 bus_space_write_1(bst, bsh, offset + TX1MSK, 0xb0); 1427 bus_space_write_1(bst, bsh, offset + RXST0, 0); 1428 bus_space_write_1(bst, bsh, offset + TXST0, 0); 1429 bus_space_write_1(bst, bsh, offset + TXST1, 0); 1430 1431 /* Enable MII function if available. */ 1432 if (LIST_FIRST(&sc->sc_mii.mii_phys)) { 1433 PAGE(sc, 2); 1434 bus_space_write_1(bst, bsh, offset + MSR, 1435 bus_space_read_1(bst, bsh, offset + MSR) | SELECT_MII); 1436 DELAY(20000); 1437 } else { 1438 PAGE(sc, 0); 1439 1440 /* XXX Do we need to do this? */ 1441 PAGE(sc, 0x42); 1442 bus_space_write_1(bst, bsh, offset + SWC1, SWC1_AUTO_MEDIA); 1443 DELAY(50000); 1444 1445 /* XXX Linux probes the media here. */ 1446 } 1447 1448 /* Configure the LED registers. */ 1449 PAGE(sc, 2); 1450 1451 /* XXX This is not good for 10base2. */ 1452 bus_space_write_1(bst, bsh, offset + LED, 1453 LED_TX_ACT << LED1_SHIFT | LED_10MB_LINK << LED0_SHIFT); 1454 if (sc->sc_flags & XEF_DINGO) 1455 bus_space_write_1(bst, bsh, offset + LED3, 1456 LED_100MB_LINK << LED3_SHIFT); 1457 1458 /* Enable receiver and go online. */ 1459 PAGE(sc, 0x40); 1460 bus_space_write_1(bst, bsh, offset + CMD0, ENABLE_RX | ONLINE); 1461 1462 #if 0 1463 /* XXX Linux does this here - is it necessary? */ 1464 PAGE(sc, 1); 1465 bus_space_write_1(bst, bsh, offset + IMR0, 0xff); 1466 if (!(sc->sc_flags & XEF_DINGO)) 1467 /* XXX What is this? Not for Dingo at least. */ 1468 bus_space_write_1(bst, bsh, offset + IMR1, 1); 1469 #endif 1470 1471 /* Enable interrupts. */ 1472 PAGE(sc, 0); 1473 bus_space_write_1(bst, bsh, offset + CR, ENABLE_INT); 1474 1475 /* XXX This is pure magic for me, found in the Linux driver. */ 1476 if ((sc->sc_flags & (XEF_DINGO | XEF_MODEM)) == XEF_MODEM) { 1477 if ((bus_space_read_1(bst, bsh, offset + 0x10) & 0x01) == 0) 1478 /* Unmask the master interrupt bit. */ 1479 bus_space_write_1(bst, bsh, offset + 0x10, 0x11); 1480 } 1481 1482 /* 1483 * The Linux driver says this: 1484 * We should switch back to page 0 to avoid a bug in revision 0 1485 * where regs with offset below 8 can't be read after an access 1486 * to the MAC registers. 1487 */ 1488 PAGE(sc, 0); 1489 } 1490 1491 #ifdef XEDEBUG 1492 void 1493 xe_reg_dump(sc) 1494 struct xe_softc *sc; 1495 { 1496 int page, i; 1497 bus_space_tag_t bst = sc->sc_bst; 1498 bus_space_handle_t bsh = sc->sc_bsh; 1499 bus_size_t offset = sc->sc_offset; 1500 1501 printf("%x: Common registers: ", sc->sc_dev.dv_xname); 1502 for (i = 0; i < 8; i++) { 1503 printf(" %2.2x", bus_space_read_1(bst, bsh, offset + i)); 1504 } 1505 printf("\n"); 1506 1507 for (page = 0; page < 8; page++) { 1508 printf("%s: Register page %2.2x: ", sc->sc_dev.dv_xname, page); 1509 PAGE(sc, page); 1510 for (i = 8; i < 16; i++) { 1511 printf(" %2.2x", 1512 bus_space_read_1(bst, bsh, offset + i)); 1513 } 1514 printf("\n"); 1515 } 1516 1517 for (page = 0x40; page < 0x5f; page++) { 1518 if (page == 0x43 || (page >= 0x46 && page <= 0x4f) || 1519 (page >= 0x51 && page <= 0x5e)) 1520 continue; 1521 printf("%s: Register page %2.2x: ", sc->sc_dev.dv_xname, page); 1522 PAGE(sc, page); 1523 for (i = 8; i < 16; i++) { 1524 printf(" %2.2x", 1525 bus_space_read_1(bst, bsh, offset + i)); 1526 } 1527 printf("\n"); 1528 } 1529 } 1530 #endif /* XEDEBUG */ 1531