1 /* $OpenBSD: if_xe.c,v 1.37 2009/02/09 19:14:31 chl Exp $ */ 2 3 /* 4 * Copyright (c) 1999 Niklas Hallqvist, Brandon Creighton, Job de Haas 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Niklas Hallqvist, 18 * C Stone and Job de Haas. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * A driver for Xircom ethernet PC-cards. 36 * 37 * The driver has been inspired by the xirc2ps_cs.c driver found in Linux' 38 * PCMCIA package written by Werner Koch <werner.koch@guug.de>: 39 * [xirc2ps_cs.c wk 14.04.97] (1.31 1998/12/09 19:32:55) 40 * I will note that no code was used verbatim from that driver as it is under 41 * the much too strong GNU General Public License, it was only used as a 42 * "specification" of sorts. 43 * Other inspirations have been if_fxp.c, if_ep_pcmcia.c and elink3.c as 44 * they were found in OpenBSD 2.4. 45 */ 46 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/ioctl.h> 53 #include <sys/mbuf.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/socket.h> 57 #include <sys/syslog.h> 58 59 #include <net/if.h> 60 #include <net/if_dl.h> 61 #include <net/if_media.h> 62 #include <net/if_types.h> 63 64 #ifdef INET 65 #include <netinet/in.h> 66 #include <netinet/in_systm.h> 67 #include <netinet/in_var.h> 68 #include <netinet/ip.h> 69 #include <netinet/if_ether.h> 70 #endif 71 72 #if NBPFILTER > 0 73 #include <net/bpf.h> 74 #endif 75 76 /* 77 * Maximum number of bytes to read per interrupt. Linux recommends 78 * somewhere between 2000-22000. 79 * XXX This is currently a hard maximum. 80 */ 81 #define MAX_BYTES_INTR 12000 82 83 #include <dev/mii/miivar.h> 84 85 #include <dev/pcmcia/pcmciareg.h> 86 #include <dev/pcmcia/pcmciavar.h> 87 #include <dev/pcmcia/pcmciadevs.h> 88 #include <dev/pcmcia/if_xereg.h> 89 90 #ifdef __GNUC__ 91 #define INLINE __inline 92 #else 93 #define INLINE 94 #endif /* __GNUC__ */ 95 96 #ifdef XEDEBUG 97 98 #define XED_CONFIG 0x1 99 #define XED_MII 0x2 100 #define XED_INTR 0x4 101 #define XED_FIFO 0x8 102 103 #ifndef XEDEBUG_DEF 104 #define XEDEBUG_DEF (XED_CONFIG|XED_INTR) 105 #endif /* XEDEBUG_DEF */ 106 107 int xedebug = XEDEBUG_DEF; 108 109 #define DPRINTF(cat, x) if (xedebug & (cat)) printf x 110 111 #else /* XEDEBUG */ 112 #define DPRINTF(cat, x) (void)0 113 #endif /* XEDEBUG */ 114 115 int xe_pcmcia_match(struct device *, void *, void *); 116 void xe_pcmcia_attach(struct device *, struct device *, void *); 117 int xe_pcmcia_detach(struct device *, int); 118 int xe_pcmcia_activate(struct device *, enum devact); 119 120 /* 121 * In case this chipset ever turns up out of pcmcia attachments (very 122 * unlikely) do the driver splitup. 123 */ 124 struct xe_softc { 125 struct device sc_dev; /* Generic device info */ 126 u_int32_t sc_flags; /* Misc. flags */ 127 void *sc_ih; /* Interrupt handler */ 128 struct arpcom sc_arpcom; /* Ethernet common part */ 129 struct ifmedia sc_media; /* Media control */ 130 struct mii_data sc_mii; /* MII media information */ 131 int sc_all_mcasts; /* Receive all multicasts */ 132 bus_space_tag_t sc_bst; /* Bus cookie */ 133 bus_space_handle_t sc_bsh; /* Bus I/O handle */ 134 bus_size_t sc_offset; /* Offset of registers */ 135 u_int8_t sc_rev; /* Chip revision */ 136 }; 137 138 #define XEF_MOHAWK 0x001 139 #define XEF_DINGO 0x002 140 #define XEF_MODEM 0x004 141 #define XEF_UNSUPPORTED 0x008 142 #define XEF_CE 0x010 143 #define XEF_CE2 0x020 144 #define XEF_CE3 0x040 145 #define XEF_CE33 0x080 146 #define XEF_CE56 0x100 147 148 struct xe_pcmcia_softc { 149 struct xe_softc sc_xe; /* Generic device info */ 150 struct pcmcia_mem_handle sc_pcmh; /* PCMCIA memspace info */ 151 int sc_mem_window; /* mem window */ 152 struct pcmcia_io_handle sc_pcioh; /* iospace info */ 153 int sc_io_window; /* io window info */ 154 struct pcmcia_function *sc_pf; /* PCMCIA function */ 155 }; 156 157 /* Autoconfig definition of driver back-end */ 158 struct cfdriver xe_cd = { 159 NULL, "xe", DV_IFNET 160 }; 161 162 struct cfattach xe_pcmcia_ca = { 163 sizeof (struct xe_pcmcia_softc), xe_pcmcia_match, xe_pcmcia_attach, 164 xe_pcmcia_detach, xe_pcmcia_activate 165 }; 166 167 void xe_cycle_power(struct xe_softc *); 168 void xe_full_reset(struct xe_softc *); 169 void xe_init(struct xe_softc *); 170 int xe_intr(void *); 171 int xe_ioctl(struct ifnet *, u_long, caddr_t); 172 int xe_mdi_read(struct device *, int, int); 173 void xe_mdi_write(struct device *, int, int, int); 174 int xe_mediachange(struct ifnet *); 175 void xe_mediastatus(struct ifnet *, struct ifmediareq *); 176 int xe_pcmcia_funce_enaddr(struct device *, u_int8_t *); 177 u_int32_t xe_pcmcia_interpret_manfid(struct device *); 178 int xe_pcmcia_lan_nid_ciscallback(struct pcmcia_tuple *, void *); 179 int xe_pcmcia_manfid_ciscallback(struct pcmcia_tuple *, void *); 180 u_int16_t xe_get(struct xe_softc *); 181 void xe_reset(struct xe_softc *); 182 void xe_set_address(struct xe_softc *); 183 void xe_start(struct ifnet *); 184 void xe_statchg(struct device *); 185 void xe_stop(struct xe_softc *); 186 void xe_watchdog(struct ifnet *); 187 #ifdef XEDEBUG 188 void xe_reg_dump(struct xe_softc *); 189 #endif /* XEDEBUG */ 190 191 int 192 xe_pcmcia_match(parent, match, aux) 193 struct device *parent; 194 void *match, *aux; 195 { 196 struct pcmcia_attach_args *pa = aux; 197 198 if (pa->pf->function != PCMCIA_FUNCTION_NETWORK) 199 return (0); 200 201 switch (pa->manufacturer) { 202 case PCMCIA_VENDOR_COMPAQ: 203 case PCMCIA_VENDOR_COMPAQ2: 204 return (0); 205 206 case PCMCIA_VENDOR_INTEL: 207 case PCMCIA_VENDOR_XIRCOM: 208 /* XXX Per-productid checking here. */ 209 return (1); 210 211 default: 212 return (0); 213 } 214 } 215 216 void 217 xe_pcmcia_attach(parent, self, aux) 218 struct device *parent, *self; 219 void *aux; 220 { 221 struct xe_pcmcia_softc *psc = (struct xe_pcmcia_softc *)self; 222 struct xe_softc *sc = &psc->sc_xe; 223 struct pcmcia_attach_args *pa = aux; 224 struct pcmcia_function *pf = pa->pf; 225 struct pcmcia_config_entry *cfe = NULL; 226 struct ifnet *ifp; 227 u_int8_t myla[ETHER_ADDR_LEN], *enaddr = NULL; 228 int state = 0; 229 struct pcmcia_mem_handle pcmh; 230 int ccr_window; 231 bus_size_t ccr_offset; 232 const char *intrstr; 233 234 psc->sc_pf = pf; 235 236 #if 0 237 /* Figure out what card we are. */ 238 sc->sc_flags = xe_pcmcia_interpret_manfid(parent); 239 #endif 240 if (sc->sc_flags & XEF_UNSUPPORTED) { 241 printf(": card unsupported\n"); 242 goto bad; 243 } 244 245 /* Tell the pcmcia framework where the CCR is. */ 246 pf->ccr_base = 0x800; 247 pf->ccr_mask = 0x67; 248 249 /* Fake a cfe. */ 250 SIMPLEQ_FIRST(&pa->pf->cfe_head) = cfe = (struct pcmcia_config_entry *) 251 malloc(sizeof *cfe, M_DEVBUF, M_NOWAIT | M_ZERO); 252 if (!cfe) { 253 printf(": function enable failed\n"); 254 return; 255 } 256 257 /* 258 * XXX Use preprocessor symbols instead. 259 * Enable ethernet & its interrupts, wiring them to -INT 260 * No I/O base. 261 */ 262 cfe->number = 0x5; 263 cfe->flags = 0; /* XXX Check! */ 264 cfe->iftype = PCMCIA_IFTYPE_IO; 265 cfe->num_iospace = 0; 266 cfe->num_memspace = 0; 267 cfe->irqmask = 0x8eb0; 268 269 /* Enable the card. */ 270 pcmcia_function_init(pa->pf, cfe); 271 if (pcmcia_function_enable(pa->pf)) { 272 printf(": function enable failed\n"); 273 goto bad; 274 } 275 276 state++; 277 278 if (pcmcia_io_alloc(pa->pf, 0, 16, 16, &psc->sc_pcioh)) { 279 printf(": io allocation failed\n"); 280 goto bad; 281 } 282 283 state++; 284 285 if (pcmcia_io_map(pa->pf, PCMCIA_WIDTH_IO16, 0, 16, &psc->sc_pcioh, 286 &psc->sc_io_window)) { 287 printf(": can't map io space\n"); 288 goto bad; 289 } 290 sc->sc_bst = psc->sc_pcioh.iot; 291 sc->sc_bsh = psc->sc_pcioh.ioh; 292 sc->sc_offset = 0; 293 294 printf(" port 0x%lx/%d", psc->sc_pcioh.addr, 16); 295 296 #if 0 297 if (pcmcia_mem_alloc(pf, 16, &psc->sc_pcmh)) { 298 printf(": pcmcia memory allocation failed\n"); 299 goto bad; 300 } 301 state++; 302 303 if (pcmcia_mem_map(pf, PCMCIA_MEM_ATTR, 0x300, 16, &psc->sc_pcmh, 304 &sc->sc_offset, &psc->sc_mem_window)) { 305 printf(": pcmcia memory mapping failed\n"); 306 goto bad; 307 } 308 309 sc->sc_bst = psc->sc_pcmh.memt; 310 sc->sc_bsh = psc->sc_pcmh.memh; 311 #endif 312 313 /* Figure out what card we are. */ 314 sc->sc_flags = xe_pcmcia_interpret_manfid(parent); 315 316 /* 317 * Configuration as advised by DINGO documentation. 318 * We only know about this flag after the manfid interpretation. 319 * Dingo has some extra configuration registers in the CCR space. 320 */ 321 if (sc->sc_flags & XEF_DINGO) { 322 if (pcmcia_mem_alloc(pf, PCMCIA_CCR_SIZE_DINGO, &pcmh)) { 323 DPRINTF(XED_CONFIG, ("bad mem alloc\n")); 324 goto bad; 325 } 326 327 if (pcmcia_mem_map(pf, PCMCIA_MEM_ATTR, pf->ccr_base, 328 PCMCIA_CCR_SIZE_DINGO, &pcmh, &ccr_offset, 329 &ccr_window)) { 330 DPRINTF(XED_CONFIG, ("bad mem map\n")); 331 pcmcia_mem_free(pf, &pcmh); 332 goto bad; 333 } 334 335 bus_space_write_1(pcmh.memt, pcmh.memh, 336 ccr_offset + PCMCIA_CCR_DCOR0, PCMCIA_CCR_DCOR0_SFINT); 337 bus_space_write_1(pcmh.memt, pcmh.memh, 338 ccr_offset + PCMCIA_CCR_DCOR1, 339 PCMCIA_CCR_DCOR1_FORCE_LEVIREQ | PCMCIA_CCR_DCOR1_D6); 340 bus_space_write_1(pcmh.memt, pcmh.memh, 341 ccr_offset + PCMCIA_CCR_DCOR2, 0); 342 bus_space_write_1(pcmh.memt, pcmh.memh, 343 ccr_offset + PCMCIA_CCR_DCOR3, 0); 344 bus_space_write_1(pcmh.memt, pcmh.memh, 345 ccr_offset + PCMCIA_CCR_DCOR4, 0); 346 347 /* We don't need them anymore and can free them (I think). */ 348 pcmcia_mem_unmap(pf, ccr_window); 349 pcmcia_mem_free(pf, &pcmh); 350 } 351 352 /* 353 * Try to get the ethernet address from FUNCE/LAN_NID tuple. 354 */ 355 if (xe_pcmcia_funce_enaddr(parent, myla)) 356 enaddr = myla; 357 ifp = &sc->sc_arpcom.ac_if; 358 if (enaddr) 359 bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN); 360 else { 361 printf(", unable to get ethernet address\n"); 362 goto bad; 363 } 364 365 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 366 ifp->if_softc = sc; 367 ifp->if_flags = 368 IFF_BROADCAST | IFF_NOTRAILERS | IFF_SIMPLEX | IFF_MULTICAST; 369 ifp->if_ioctl = xe_ioctl; 370 ifp->if_start = xe_start; 371 ifp->if_watchdog = xe_watchdog; 372 IFQ_SET_READY(&ifp->if_snd); 373 374 /* Establish the interrupt. */ 375 sc->sc_ih = pcmcia_intr_establish(pa->pf, IPL_NET, xe_intr, sc, 376 sc->sc_dev.dv_xname); 377 if (sc->sc_ih == NULL) { 378 printf(", couldn't establish interrupt\n"); 379 goto bad; 380 } 381 intrstr = pcmcia_intr_string(psc->sc_pf, sc->sc_ih); 382 printf("%s%s: address %s\n", *intrstr ? ", " : "", intrstr, 383 ether_sprintf(sc->sc_arpcom.ac_enaddr)); 384 385 /* Reset and initialize the card. */ 386 xe_full_reset(sc); 387 388 /* Initialize our media structures and probe the phy. */ 389 sc->sc_mii.mii_ifp = ifp; 390 sc->sc_mii.mii_readreg = xe_mdi_read; 391 sc->sc_mii.mii_writereg = xe_mdi_write; 392 sc->sc_mii.mii_statchg = xe_statchg; 393 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, xe_mediachange, 394 xe_mediastatus); 395 DPRINTF(XED_MII | XED_CONFIG, 396 ("bmsr %x\n", xe_mdi_read(&sc->sc_dev, 0, 1))); 397 mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 398 0); 399 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) 400 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO, 0, 401 NULL); 402 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO); 403 404 /* 405 * Attach the interface. 406 */ 407 if_attach(ifp); 408 ether_ifattach(ifp); 409 410 /* 411 * Reset and initialize the card again for DINGO (as found in Linux 412 * driver). Without this Dingo will get a watchdog timeout the first 413 * time. The ugly media tickling seems to be necessary for getting 414 * autonegotiation to work too. 415 */ 416 if (sc->sc_flags & XEF_DINGO) { 417 xe_full_reset(sc); 418 xe_init(sc); 419 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO); 420 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_NONE); 421 xe_stop(sc); 422 } 423 424 #ifdef notyet 425 pcmcia_function_disable(pa->pf); 426 #endif /* notyet */ 427 428 return; 429 430 bad: 431 if (state > 2) 432 pcmcia_io_unmap(pf, psc->sc_io_window); 433 if (state > 1) 434 pcmcia_io_free(pf, &psc->sc_pcioh); 435 if (state > 0) 436 pcmcia_function_disable(pa->pf); 437 free(cfe, M_DEVBUF); 438 } 439 440 int 441 xe_pcmcia_detach(dev, flags) 442 struct device *dev; 443 int flags; 444 { 445 struct xe_pcmcia_softc *psc = (struct xe_pcmcia_softc *)dev; 446 struct xe_softc *sc = &psc->sc_xe; 447 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 448 int rv = 0; 449 450 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 451 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 452 453 pcmcia_io_unmap(psc->sc_pf, psc->sc_io_window); 454 pcmcia_io_free(psc->sc_pf, &psc->sc_pcioh); 455 456 ether_ifdetach(ifp); 457 if_detach(ifp); 458 459 return (rv); 460 } 461 462 int 463 xe_pcmcia_activate(dev, act) 464 struct device *dev; 465 enum devact act; 466 { 467 struct xe_pcmcia_softc *sc = (struct xe_pcmcia_softc *)dev; 468 struct ifnet *ifp = &sc->sc_xe.sc_arpcom.ac_if; 469 int s; 470 471 s = splnet(); 472 switch (act) { 473 case DVACT_ACTIVATE: 474 pcmcia_function_enable(sc->sc_pf); 475 sc->sc_xe.sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_NET, 476 xe_intr, sc, sc->sc_xe.sc_dev.dv_xname); 477 xe_init(&sc->sc_xe); 478 break; 479 480 case DVACT_DEACTIVATE: 481 ifp->if_timer = 0; 482 if (ifp->if_flags & IFF_RUNNING) 483 xe_stop(&sc->sc_xe); 484 pcmcia_intr_disestablish(sc->sc_pf, sc->sc_xe.sc_ih); 485 pcmcia_function_disable(sc->sc_pf); 486 break; 487 } 488 splx(s); 489 return (0); 490 } 491 492 /* 493 * XXX These two functions might be OK to factor out into pcmcia.c since 494 * if_sm_pcmcia.c uses similar ones. 495 */ 496 int 497 xe_pcmcia_funce_enaddr(parent, myla) 498 struct device *parent; 499 u_int8_t *myla; 500 { 501 /* XXX The Linux driver has more ways to do this in case of failure. */ 502 return (pcmcia_scan_cis(parent, xe_pcmcia_lan_nid_ciscallback, myla)); 503 } 504 505 int 506 xe_pcmcia_lan_nid_ciscallback(tuple, arg) 507 struct pcmcia_tuple *tuple; 508 void *arg; 509 { 510 u_int8_t *myla = arg; 511 int i; 512 513 if (tuple->code == PCMCIA_CISTPL_FUNCE) { 514 if (tuple->length < 2) 515 return (0); 516 517 switch (pcmcia_tuple_read_1(tuple, 0)) { 518 case PCMCIA_TPLFE_TYPE_LAN_NID: 519 if (pcmcia_tuple_read_1(tuple, 1) != ETHER_ADDR_LEN) 520 return (0); 521 break; 522 523 case 0x02: 524 /* 525 * Not sure about this, I don't have a CE2 526 * that puts the ethernet addr here. 527 */ 528 if (pcmcia_tuple_read_1(tuple, 1) != 13) 529 return (0); 530 break; 531 532 default: 533 return (0); 534 } 535 536 for (i = 0; i < ETHER_ADDR_LEN; i++) 537 myla[i] = pcmcia_tuple_read_1(tuple, i + 2); 538 return (1); 539 } 540 541 /* Yet another spot where this might be. */ 542 if (tuple->code == 0x89) { 543 pcmcia_tuple_read_1(tuple, 1); 544 for (i = 0; i < ETHER_ADDR_LEN; i++) 545 myla[i] = pcmcia_tuple_read_1(tuple, i + 2); 546 return (1); 547 } 548 return (0); 549 } 550 551 u_int32_t 552 xe_pcmcia_interpret_manfid (parent) 553 struct device *parent; 554 { 555 u_int32_t flags = 0; 556 struct pcmcia_softc *psc = (struct pcmcia_softc *)parent; 557 char *tptr; 558 559 if (!pcmcia_scan_cis(parent, xe_pcmcia_manfid_ciscallback, &flags)) 560 return (XEF_UNSUPPORTED); 561 562 if (flags & XEF_CE) { 563 tptr = memchr(psc->card.cis1_info[2], 'C', 564 strlen(psc->card.cis1_info[2])); 565 /* XXX not sure if other CE2s hide "CE2" in different places */ 566 if (tptr && *(tptr + 1) == 'E' && *(tptr + 2) == '2') { 567 flags ^= (XEF_CE | XEF_UNSUPPORTED); 568 flags |= XEF_CE2; 569 } 570 } 571 return (flags); 572 } 573 574 int 575 xe_pcmcia_manfid_ciscallback(tuple, arg) 576 struct pcmcia_tuple *tuple; 577 void *arg; 578 { 579 u_int32_t *flagsp = arg; 580 u_int8_t media, product; 581 582 if (tuple->code == PCMCIA_CISTPL_MANFID) { 583 if (tuple->length < 2) 584 return (0); 585 586 media = pcmcia_tuple_read_1(tuple, 3); 587 product = pcmcia_tuple_read_1(tuple, 4); 588 589 if (!(product & XEPROD_CREDITCARD) || 590 !(media & XEMEDIA_ETHER)) { 591 *flagsp |= XEF_UNSUPPORTED; 592 return (1); 593 } 594 595 if (media & XEMEDIA_MODEM) 596 *flagsp |= XEF_MODEM; 597 598 switch (product & XEPROD_IDMASK) { 599 case 1: 600 /* XXX Can be CE2 too (we double-check later). */ 601 *flagsp |= XEF_CE | XEF_UNSUPPORTED; 602 break; 603 case 2: 604 *flagsp |= XEF_CE2; 605 break; 606 case 3: 607 if (!(*flagsp & XEF_MODEM)) 608 *flagsp |= XEF_MOHAWK; 609 *flagsp |= XEF_CE3; 610 break; 611 case 4: 612 *flagsp |= XEF_CE33; 613 break; 614 case 5: 615 *flagsp |= XEF_CE56 | XEF_MOHAWK; 616 break; 617 case 6: 618 case 7: 619 *flagsp |= XEF_CE56 | XEF_MOHAWK | XEF_DINGO; 620 break; 621 default: 622 *flagsp |= XEF_UNSUPPORTED; 623 break; 624 } 625 626 return (1); 627 } 628 return (0); 629 } 630 631 int 632 xe_intr(arg) 633 void *arg; 634 { 635 struct xe_softc *sc = arg; 636 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 637 u_int8_t esr, rsr, isr, rx_status, savedpage; 638 u_int16_t tx_status, recvcount = 0, tempint; 639 640 ifp->if_timer = 0; /* turn watchdog timer off */ 641 642 if (sc->sc_flags & XEF_MOHAWK) { 643 /* Disable interrupt (Linux does it). */ 644 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 645 0); 646 } 647 648 savedpage = 649 bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + PR); 650 651 PAGE(sc, 0); 652 esr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ESR); 653 isr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ISR0); 654 rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RSR); 655 656 /* Check to see if card has been ejected. */ 657 if (isr == 0xff) { 658 printf("%s: interrupt for dead card\n", sc->sc_dev.dv_xname); 659 goto end; 660 } 661 662 PAGE(sc, 40); 663 rx_status = 664 bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RXST0); 665 tx_status = 666 bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + TXST0); 667 668 /* 669 * XXX Linux writes to RXST0 and TXST* here. My CE2 works just fine 670 * without it, and I can't see an obvious reason for it. 671 */ 672 673 PAGE(sc, 0); 674 while (esr & FULL_PKT_RCV) { 675 if (!(rsr & RSR_RX_OK)) 676 break; 677 678 /* Compare bytes read this interrupt to hard maximum. */ 679 if (recvcount > MAX_BYTES_INTR) { 680 DPRINTF(XED_INTR, 681 ("%s: too many bytes this interrupt\n", 682 sc->sc_dev.dv_xname)); 683 ifp->if_iqdrops++; 684 /* Drop packet. */ 685 bus_space_write_2(sc->sc_bst, sc->sc_bsh, 686 sc->sc_offset + DO0, DO_SKIP_RX_PKT); 687 } 688 tempint = xe_get(sc); 689 recvcount += tempint; 690 ifp->if_ibytes += tempint; 691 esr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 692 sc->sc_offset + ESR); 693 rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 694 sc->sc_offset + RSR); 695 } 696 697 /* Packet too long? */ 698 if (rsr & RSR_TOO_LONG) { 699 ifp->if_ierrors++; 700 DPRINTF(XED_INTR, 701 ("%s: packet too long\n", sc->sc_dev.dv_xname)); 702 } 703 704 /* CRC error? */ 705 if (rsr & RSR_CRCERR) { 706 ifp->if_ierrors++; 707 DPRINTF(XED_INTR, 708 ("%s: CRC error detected\n", sc->sc_dev.dv_xname)); 709 } 710 711 /* Alignment error? */ 712 if (rsr & RSR_ALIGNERR) { 713 ifp->if_ierrors++; 714 DPRINTF(XED_INTR, 715 ("%s: alignment error detected\n", sc->sc_dev.dv_xname)); 716 } 717 718 /* Check for rx overrun. */ 719 if (rx_status & RX_OVERRUN) { 720 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 721 CLR_RX_OVERRUN); 722 DPRINTF(XED_INTR, ("overrun cleared\n")); 723 } 724 725 /* Try to start more packets transmitting. */ 726 if (IFQ_IS_EMPTY(&ifp->if_snd) == 0) 727 xe_start(ifp); 728 729 /* Detected excessive collisions? */ 730 if ((tx_status & EXCESSIVE_COLL) && ifp->if_opackets > 0) { 731 DPRINTF(XED_INTR, 732 ("%s: excessive collisions\n", sc->sc_dev.dv_xname)); 733 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 734 RESTART_TX); 735 ifp->if_oerrors++; 736 } 737 738 if ((tx_status & TX_ABORT) && ifp->if_opackets > 0) 739 ifp->if_oerrors++; 740 741 end: 742 /* Reenable interrupts. */ 743 PAGE(sc, savedpage); 744 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 745 ENABLE_INT); 746 747 return (1); 748 } 749 750 u_int16_t 751 xe_get(sc) 752 struct xe_softc *sc; 753 { 754 u_int8_t rsr; 755 struct mbuf *top, **mp, *m; 756 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 757 u_int16_t pktlen, len, recvcount = 0; 758 u_int8_t *data; 759 760 PAGE(sc, 0); 761 rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RSR); 762 763 pktlen = 764 bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RBC0) & 765 RBC_COUNT_MASK; 766 if (pktlen == 0) { 767 /* 768 * XXX At least one CE2 sets RBC0 == 0 occasionally, and only 769 * when MPE is set. It is not known why. 770 */ 771 return (0); 772 } 773 recvcount += pktlen; 774 775 MGETHDR(m, M_DONTWAIT, MT_DATA); 776 if (m == 0) 777 return (recvcount); 778 m->m_pkthdr.rcvif = ifp; 779 m->m_pkthdr.len = pktlen; 780 len = MHLEN; 781 top = 0; 782 mp = ⊤ 783 784 while (pktlen > 0) { 785 if (top) { 786 MGET(m, M_DONTWAIT, MT_DATA); 787 if (m == 0) { 788 m_freem(top); 789 return (recvcount); 790 } 791 len = MLEN; 792 } 793 if (pktlen >= MINCLSIZE) { 794 MCLGET(m, M_DONTWAIT); 795 if (!(m->m_flags & M_EXT)) { 796 m_freem(m); 797 m_freem(top); 798 return (recvcount); 799 } 800 len = MCLBYTES; 801 } 802 if (!top) { 803 caddr_t newdata = (caddr_t)ALIGN(m->m_data + 804 sizeof (struct ether_header)) - 805 sizeof (struct ether_header); 806 len -= newdata - m->m_data; 807 m->m_data = newdata; 808 } 809 len = min(pktlen, len); 810 811 data = mtod(m, u_int8_t *); 812 if (len > 1) { 813 len &= ~1; 814 bus_space_read_raw_multi_2(sc->sc_bst, sc->sc_bsh, 815 sc->sc_offset + EDP, data, len); 816 } else 817 *data = bus_space_read_1(sc->sc_bst, sc->sc_bsh, 818 sc->sc_offset + EDP); 819 m->m_len = len; 820 pktlen -= len; 821 *mp = m; 822 mp = &m->m_next; 823 } 824 825 /* Skip Rx packet. */ 826 bus_space_write_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + DO0, 827 DO_SKIP_RX_PKT); 828 829 ifp->if_ipackets++; 830 831 #if NBPFILTER > 0 832 if (ifp->if_bpf) 833 bpf_mtap(ifp->if_bpf, top, BPF_DIRECTION_IN); 834 #endif 835 836 ether_input_mbuf(ifp, top); 837 return (recvcount); 838 } 839 840 841 /* 842 * Serial management for the MII. 843 * The DELAY's below stem from the fact that the maximum frequency 844 * acceptable on the MDC pin is 2.5 MHz and fast processors can easily 845 * go much faster than that. 846 */ 847 848 /* Let the MII serial management be idle for one period. */ 849 static INLINE void xe_mdi_idle(struct xe_softc *); 850 static INLINE void 851 xe_mdi_idle(sc) 852 struct xe_softc *sc; 853 { 854 bus_space_tag_t bst = sc->sc_bst; 855 bus_space_handle_t bsh = sc->sc_bsh; 856 bus_size_t offset = sc->sc_offset; 857 858 /* Drive MDC low... */ 859 bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW); 860 DELAY(1); 861 862 /* and high again. */ 863 bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH); 864 DELAY(1); 865 } 866 867 /* Pulse out one bit of data. */ 868 static INLINE void xe_mdi_pulse(struct xe_softc *, int); 869 static INLINE void 870 xe_mdi_pulse(sc, data) 871 struct xe_softc *sc; 872 int data; 873 { 874 bus_space_tag_t bst = sc->sc_bst; 875 bus_space_handle_t bsh = sc->sc_bsh; 876 bus_size_t offset = sc->sc_offset; 877 u_int8_t bit = data ? MDIO_HIGH : MDIO_LOW; 878 879 /* First latch the data bit MDIO with clock bit MDC low...*/ 880 bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_LOW); 881 DELAY(1); 882 883 /* then raise the clock again, preserving the data bit. */ 884 bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_HIGH); 885 DELAY(1); 886 } 887 888 /* Probe one bit of data. */ 889 static INLINE int xe_mdi_probe(struct xe_softc *sc); 890 static INLINE int 891 xe_mdi_probe(sc) 892 struct xe_softc *sc; 893 { 894 bus_space_tag_t bst = sc->sc_bst; 895 bus_space_handle_t bsh = sc->sc_bsh; 896 bus_size_t offset = sc->sc_offset; 897 u_int8_t x; 898 899 /* Pull clock bit MDCK low... */ 900 bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW); 901 DELAY(1); 902 903 /* Read data and drive clock high again. */ 904 x = bus_space_read_1(bst, bsh, offset + GP2) & MDIO; 905 bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH); 906 DELAY(1); 907 908 return (x); 909 } 910 911 /* Pulse out a sequence of data bits. */ 912 static INLINE void xe_mdi_pulse_bits(struct xe_softc *, u_int32_t, int); 913 static INLINE void 914 xe_mdi_pulse_bits(sc, data, len) 915 struct xe_softc *sc; 916 u_int32_t data; 917 int len; 918 { 919 u_int32_t mask; 920 921 for (mask = 1 << (len - 1); mask; mask >>= 1) 922 xe_mdi_pulse(sc, data & mask); 923 } 924 925 /* Read a PHY register. */ 926 int 927 xe_mdi_read(self, phy, reg) 928 struct device *self; 929 int phy; 930 int reg; 931 { 932 struct xe_softc *sc = (struct xe_softc *)self; 933 int i; 934 u_int32_t mask; 935 u_int32_t data = 0; 936 937 PAGE(sc, 2); 938 for (i = 0; i < 32; i++) /* Synchronize. */ 939 xe_mdi_pulse(sc, 1); 940 xe_mdi_pulse_bits(sc, 0x06, 4); /* Start + Read opcode */ 941 xe_mdi_pulse_bits(sc, phy, 5); /* PHY address */ 942 xe_mdi_pulse_bits(sc, reg, 5); /* PHY register */ 943 xe_mdi_idle(sc); /* Turn around. */ 944 xe_mdi_probe(sc); /* Drop initial zero bit. */ 945 946 for (mask = 1 << 15; mask; mask >>= 1) 947 if (xe_mdi_probe(sc)) 948 data |= mask; 949 xe_mdi_idle(sc); 950 951 DPRINTF(XED_MII, 952 ("xe_mdi_read: phy %d reg %d -> %x\n", phy, reg, data)); 953 return (data); 954 } 955 956 /* Write a PHY register. */ 957 void 958 xe_mdi_write(self, phy, reg, value) 959 struct device *self; 960 int phy; 961 int reg; 962 int value; 963 { 964 struct xe_softc *sc = (struct xe_softc *)self; 965 int i; 966 967 PAGE(sc, 2); 968 for (i = 0; i < 32; i++) /* Synchronize. */ 969 xe_mdi_pulse(sc, 1); 970 xe_mdi_pulse_bits(sc, 0x05, 4); /* Start + Write opcode */ 971 xe_mdi_pulse_bits(sc, phy, 5); /* PHY address */ 972 xe_mdi_pulse_bits(sc, reg, 5); /* PHY register */ 973 xe_mdi_pulse_bits(sc, 0x02, 2); /* Turn around. */ 974 xe_mdi_pulse_bits(sc, value, 16); /* Write the data */ 975 xe_mdi_idle(sc); /* Idle away. */ 976 977 DPRINTF(XED_MII, 978 ("xe_mdi_write: phy %d reg %d val %x\n", phy, reg, value)); 979 } 980 981 void 982 xe_statchg(self) 983 struct device *self; 984 { 985 /* XXX Update ifp->if_baudrate */ 986 } 987 988 /* 989 * Change media according to request. 990 */ 991 int 992 xe_mediachange(ifp) 993 struct ifnet *ifp; 994 { 995 if (ifp->if_flags & IFF_UP) 996 xe_init(ifp->if_softc); 997 return (0); 998 } 999 1000 /* 1001 * Notify the world which media we're using. 1002 */ 1003 void 1004 xe_mediastatus(ifp, ifmr) 1005 struct ifnet *ifp; 1006 struct ifmediareq *ifmr; 1007 { 1008 struct xe_softc *sc = ifp->if_softc; 1009 1010 mii_pollstat(&sc->sc_mii); 1011 ifmr->ifm_status = sc->sc_mii.mii_media_status; 1012 ifmr->ifm_active = sc->sc_mii.mii_media_active; 1013 } 1014 1015 void 1016 xe_reset(sc) 1017 struct xe_softc *sc; 1018 { 1019 int s; 1020 1021 s = splnet(); 1022 xe_stop(sc); 1023 xe_full_reset(sc); 1024 xe_init(sc); 1025 splx(s); 1026 } 1027 1028 void 1029 xe_watchdog(ifp) 1030 struct ifnet *ifp; 1031 { 1032 struct xe_softc *sc = ifp->if_softc; 1033 1034 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1035 ++sc->sc_arpcom.ac_if.if_oerrors; 1036 1037 xe_reset(sc); 1038 } 1039 1040 void 1041 xe_stop(sc) 1042 register struct xe_softc *sc; 1043 { 1044 /* Disable interrupts. */ 1045 PAGE(sc, 0); 1046 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 0); 1047 1048 PAGE(sc, 1); 1049 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + IMR0, 0); 1050 1051 /* Power down, wait. */ 1052 PAGE(sc, 4); 1053 bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + GP1, 0); 1054 DELAY(40000); 1055 1056 /* Cancel watchdog timer. */ 1057 sc->sc_arpcom.ac_if.if_timer = 0; 1058 } 1059 1060 void 1061 xe_init(sc) 1062 struct xe_softc *sc; 1063 { 1064 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1065 int s; 1066 1067 DPRINTF(XED_CONFIG, ("xe_init\n")); 1068 1069 s = splnet(); 1070 1071 xe_set_address(sc); 1072 1073 /* Set current media. */ 1074 mii_mediachg(&sc->sc_mii); 1075 1076 ifp->if_flags |= IFF_RUNNING; 1077 ifp->if_flags &= ~IFF_OACTIVE; 1078 splx(s); 1079 } 1080 1081 /* 1082 * Start outputting on the interface. 1083 * Always called as splnet(). 1084 */ 1085 void 1086 xe_start(ifp) 1087 struct ifnet *ifp; 1088 { 1089 struct xe_softc *sc = ifp->if_softc; 1090 bus_space_tag_t bst = sc->sc_bst; 1091 bus_space_handle_t bsh = sc->sc_bsh; 1092 bus_size_t offset = sc->sc_offset; 1093 unsigned int s, len, pad = 0; 1094 struct mbuf *m0, *m; 1095 u_int16_t space; 1096 1097 /* Don't transmit if interface is busy or not running. */ 1098 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1099 return; 1100 1101 /* Peek at the next packet. */ 1102 IFQ_POLL(&ifp->if_snd, m0); 1103 if (m0 == 0) 1104 return; 1105 1106 /* We need to use m->m_pkthdr.len, so require the header. */ 1107 if (!(m0->m_flags & M_PKTHDR)) 1108 panic("xe_start: no header mbuf"); 1109 1110 len = m0->m_pkthdr.len; 1111 1112 /* Pad to ETHER_MIN_LEN - ETHER_CRC_LEN. */ 1113 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 1114 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 1115 1116 PAGE(sc, 0); 1117 space = bus_space_read_2(bst, bsh, offset + TSO0) & 0x7fff; 1118 if (len + pad + 2 > space) { 1119 DPRINTF(XED_FIFO, 1120 ("%s: not enough space in output FIFO (%d > %d)\n", 1121 sc->sc_dev.dv_xname, len + pad + 2, space)); 1122 return; 1123 } 1124 1125 IFQ_DEQUEUE(&ifp->if_snd, m0); 1126 1127 #if NBPFILTER > 0 1128 if (ifp->if_bpf) 1129 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1130 #endif 1131 1132 /* 1133 * Do the output at splhigh() so that an interrupt from another device 1134 * won't cause a FIFO underrun. 1135 */ 1136 s = splhigh(); 1137 1138 bus_space_write_2(bst, bsh, offset + TSO2, (u_int16_t)len + pad + 2); 1139 bus_space_write_2(bst, bsh, offset + EDP, (u_int16_t)len + pad); 1140 for (m = m0; m; ) { 1141 if (m->m_len > 1) 1142 bus_space_write_raw_multi_2(bst, bsh, offset + EDP, 1143 mtod(m, u_int8_t *), m->m_len & ~1); 1144 if (m->m_len & 1) 1145 bus_space_write_1(bst, bsh, offset + EDP, 1146 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1147 MFREE(m, m0); 1148 m = m0; 1149 } 1150 if (sc->sc_flags & XEF_MOHAWK) 1151 bus_space_write_1(bst, bsh, offset + CR, TX_PKT | ENABLE_INT); 1152 else { 1153 for (; pad > 1; pad -= 2) 1154 bus_space_write_2(bst, bsh, offset + EDP, 0); 1155 if (pad == 1) 1156 bus_space_write_1(bst, bsh, offset + EDP, 0); 1157 } 1158 1159 splx(s); 1160 1161 ifp->if_timer = 5; 1162 ++ifp->if_opackets; 1163 } 1164 1165 int 1166 xe_ioctl(ifp, command, data) 1167 struct ifnet *ifp; 1168 u_long command; 1169 caddr_t data; 1170 { 1171 struct xe_softc *sc = ifp->if_softc; 1172 struct ifaddr *ifa = (struct ifaddr *)data; 1173 struct ifreq *ifr = (struct ifreq *)data; 1174 int s, error = 0; 1175 1176 s = splnet(); 1177 1178 switch (command) { 1179 case SIOCSIFADDR: 1180 ifp->if_flags |= IFF_UP; 1181 xe_init(sc); 1182 #ifdef INET 1183 if (ifa->ifa_addr->sa_family == AF_INET) 1184 arp_ifinit(&sc->sc_arpcom, ifa); 1185 #endif /* INET */ 1186 break; 1187 1188 case SIOCSIFFLAGS: 1189 sc->sc_all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1190 1191 PAGE(sc, 0x42); 1192 if ((ifp->if_flags & IFF_PROMISC) || 1193 (ifp->if_flags & IFF_ALLMULTI)) 1194 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1195 sc->sc_offset + SWC1, 1196 SWC1_PROMISC | SWC1_MCAST_PROM); 1197 else 1198 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1199 sc->sc_offset + SWC1, 0); 1200 1201 /* 1202 * If interface is marked up and not running, then start it. 1203 * If it is marked down and running, stop it. 1204 * XXX If it's up then re-initialize it. This is so flags 1205 * such as IFF_PROMISC are handled. 1206 */ 1207 if (ifp->if_flags & IFF_UP) { 1208 xe_init(sc); 1209 } else { 1210 if (ifp->if_flags & IFF_RUNNING) 1211 xe_stop(sc); 1212 } 1213 break; 1214 1215 case SIOCADDMULTI: 1216 case SIOCDELMULTI: 1217 sc->sc_all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1218 error = (command == SIOCADDMULTI) ? 1219 ether_addmulti(ifr, &sc->sc_arpcom) : 1220 ether_delmulti(ifr, &sc->sc_arpcom); 1221 1222 if (error == ENETRESET) { 1223 /* 1224 * Multicast list has changed; set the hardware 1225 * filter accordingly. 1226 */ 1227 if (!sc->sc_all_mcasts && 1228 !(ifp->if_flags & IFF_PROMISC)) 1229 xe_set_address(sc); 1230 1231 /* 1232 * xe_set_address() can turn on all_mcasts if we run 1233 * out of space, so check it again rather than else {}. 1234 */ 1235 if (sc->sc_all_mcasts) 1236 xe_init(sc); 1237 error = 0; 1238 } 1239 break; 1240 1241 case SIOCSIFMEDIA: 1242 case SIOCGIFMEDIA: 1243 error = 1244 ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command); 1245 break; 1246 1247 default: 1248 error = ENOTTY; 1249 } 1250 1251 splx(s); 1252 return (error); 1253 } 1254 1255 void 1256 xe_set_address(sc) 1257 struct xe_softc *sc; 1258 { 1259 bus_space_tag_t bst = sc->sc_bst; 1260 bus_space_handle_t bsh = sc->sc_bsh; 1261 bus_size_t offset = sc->sc_offset; 1262 struct arpcom *arp = &sc->sc_arpcom; 1263 struct ether_multi *enm; 1264 struct ether_multistep step; 1265 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1266 int i, page, pos, num; 1267 1268 PAGE(sc, 0x50); 1269 for (i = 0; i < 6; i++) { 1270 bus_space_write_1(bst, bsh, offset + IA + i, 1271 sc->sc_arpcom.ac_enaddr[(sc->sc_flags & XEF_MOHAWK) ? 1272 5 - i : i]); 1273 } 1274 1275 if (arp->ac_multicnt > 0) { 1276 if (arp->ac_multicnt > 9) { 1277 PAGE(sc, 0x42); 1278 bus_space_write_1(sc->sc_bst, sc->sc_bsh, 1279 sc->sc_offset + SWC1, 1280 SWC1_PROMISC | SWC1_MCAST_PROM); 1281 return; 1282 } 1283 1284 ETHER_FIRST_MULTI(step, arp, enm); 1285 1286 pos = IA + 6; 1287 for (page = 0x50, num = arp->ac_multicnt; num > 0 && enm; 1288 num--) { 1289 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 1290 sizeof(enm->enm_addrlo)) != 0) { 1291 /* 1292 * The multicast address is really a range; 1293 * it's easier just to accept all multicasts. 1294 * XXX should we be setting IFF_ALLMULTI here? 1295 */ 1296 ifp->if_flags |= IFF_ALLMULTI; 1297 sc->sc_all_mcasts=1; 1298 break; 1299 } 1300 1301 for (i = 0; i < 6; i++) { 1302 bus_space_write_1(bst, bsh, offset + pos, 1303 enm->enm_addrlo[ 1304 (sc->sc_flags & XEF_MOHAWK) ? 5 - i : i]); 1305 1306 if (++pos > 15) { 1307 pos = IA; 1308 page++; 1309 PAGE(sc, page); 1310 } 1311 } 1312 } 1313 } 1314 } 1315 1316 void 1317 xe_cycle_power(sc) 1318 struct xe_softc *sc; 1319 { 1320 bus_space_tag_t bst = sc->sc_bst; 1321 bus_space_handle_t bsh = sc->sc_bsh; 1322 bus_size_t offset = sc->sc_offset; 1323 1324 PAGE(sc, 4); 1325 DELAY(1); 1326 bus_space_write_1(bst, bsh, offset + GP1, 0); 1327 DELAY(40000); 1328 if (sc->sc_flags & XEF_MOHAWK) 1329 bus_space_write_1(bst, bsh, offset + GP1, POWER_UP); 1330 else 1331 /* XXX What is bit 2 (aka AIC)? */ 1332 bus_space_write_1(bst, bsh, offset + GP1, POWER_UP | 4); 1333 DELAY(20000); 1334 } 1335 1336 void 1337 xe_full_reset(sc) 1338 struct xe_softc *sc; 1339 { 1340 bus_space_tag_t bst = sc->sc_bst; 1341 bus_space_handle_t bsh = sc->sc_bsh; 1342 bus_size_t offset = sc->sc_offset; 1343 1344 /* Do an as extensive reset as possible on all functions. */ 1345 xe_cycle_power(sc); 1346 bus_space_write_1(bst, bsh, offset + CR, SOFT_RESET); 1347 DELAY(20000); 1348 bus_space_write_1(bst, bsh, offset + CR, 0); 1349 DELAY(20000); 1350 if (sc->sc_flags & XEF_MOHAWK) { 1351 PAGE(sc, 4); 1352 /* 1353 * Drive GP1 low to power up ML6692 and GP2 high to power up 1354 * the 10MHz chip. XXX What chip is that? The phy? 1355 */ 1356 bus_space_write_1(bst, bsh, offset + GP0, 1357 GP1_OUT | GP2_OUT | GP2_WR); 1358 } 1359 DELAY(500000); 1360 1361 /* Get revision information. XXX Symbolic constants. */ 1362 sc->sc_rev = bus_space_read_1(bst, bsh, offset + BV) & 1363 ((sc->sc_flags & XEF_MOHAWK) ? 0x70 : 0x30) >> 4; 1364 1365 /* Media selection. XXX Maybe manual overriding too? */ 1366 if (!(sc->sc_flags & XEF_MOHAWK)) { 1367 PAGE(sc, 4); 1368 /* 1369 * XXX I have no idea what this really does, it is from the 1370 * Linux driver. 1371 */ 1372 bus_space_write_1(bst, bsh, offset + GP0, GP1_OUT); 1373 } 1374 DELAY(40000); 1375 1376 /* Setup the ethernet interrupt mask. */ 1377 PAGE(sc, 1); 1378 bus_space_write_1(bst, bsh, offset + IMR0, 1379 ISR_TX_OFLOW | ISR_PKT_TX | ISR_MAC_INT | /* ISR_RX_EARLY | */ 1380 ISR_RX_FULL | ISR_RX_PKT_REJ | ISR_FORCED_INT); 1381 #if 0 1382 bus_space_write_1(bst, bsh, offset + IMR0, 0xff); 1383 #endif 1384 if (!(sc->sc_flags & XEF_DINGO)) 1385 /* XXX What is this? Not for Dingo at least. */ 1386 bus_space_write_1(bst, bsh, offset + IMR1, 1); 1387 1388 /* 1389 * Disable source insertion. 1390 * XXX Dingo does not have this bit, but Linux does it unconditionally. 1391 */ 1392 if (!(sc->sc_flags & XEF_DINGO)) { 1393 PAGE(sc, 0x42); 1394 bus_space_write_1(bst, bsh, offset + SWC0, 0x20); 1395 } 1396 1397 /* Set the local memory dividing line. */ 1398 if (sc->sc_rev != 1) { 1399 PAGE(sc, 2); 1400 /* XXX Symbolic constant preferrable. */ 1401 bus_space_write_2(bst, bsh, offset + RBS0, 0x2000); 1402 } 1403 1404 xe_set_address(sc); 1405 1406 /* 1407 * Apparently the receive byte pointer can be bad after a reset, so 1408 * we hardwire it correctly. 1409 */ 1410 PAGE(sc, 0); 1411 bus_space_write_2(bst, bsh, offset + DO0, DO_CHG_OFFSET); 1412 1413 /* Setup ethernet MAC registers. XXX Symbolic constants. */ 1414 PAGE(sc, 0x40); 1415 bus_space_write_1(bst, bsh, offset + RX0MSK, 1416 PKT_TOO_LONG | CRC_ERR | RX_OVERRUN | RX_ABORT | RX_OK); 1417 bus_space_write_1(bst, bsh, offset + TX0MSK, 1418 CARRIER_LOST | EXCESSIVE_COLL | TX_UNDERRUN | LATE_COLLISION | 1419 SQE | TX_ABORT | TX_OK); 1420 if (!(sc->sc_flags & XEF_DINGO)) 1421 /* XXX From Linux, dunno what 0xb0 means. */ 1422 bus_space_write_1(bst, bsh, offset + TX1MSK, 0xb0); 1423 bus_space_write_1(bst, bsh, offset + RXST0, 0); 1424 bus_space_write_1(bst, bsh, offset + TXST0, 0); 1425 bus_space_write_1(bst, bsh, offset + TXST1, 0); 1426 1427 /* Enable MII function if available. */ 1428 if (LIST_FIRST(&sc->sc_mii.mii_phys)) { 1429 PAGE(sc, 2); 1430 bus_space_write_1(bst, bsh, offset + MSR, 1431 bus_space_read_1(bst, bsh, offset + MSR) | SELECT_MII); 1432 DELAY(20000); 1433 } else { 1434 PAGE(sc, 0); 1435 1436 /* XXX Do we need to do this? */ 1437 PAGE(sc, 0x42); 1438 bus_space_write_1(bst, bsh, offset + SWC1, SWC1_AUTO_MEDIA); 1439 DELAY(50000); 1440 1441 /* XXX Linux probes the media here. */ 1442 } 1443 1444 /* Configure the LED registers. */ 1445 PAGE(sc, 2); 1446 1447 /* XXX This is not good for 10base2. */ 1448 bus_space_write_1(bst, bsh, offset + LED, 1449 LED_TX_ACT << LED1_SHIFT | LED_10MB_LINK << LED0_SHIFT); 1450 if (sc->sc_flags & XEF_DINGO) 1451 bus_space_write_1(bst, bsh, offset + LED3, 1452 LED_100MB_LINK << LED3_SHIFT); 1453 1454 /* Enable receiver and go online. */ 1455 PAGE(sc, 0x40); 1456 bus_space_write_1(bst, bsh, offset + CMD0, ENABLE_RX | ONLINE); 1457 1458 #if 0 1459 /* XXX Linux does this here - is it necessary? */ 1460 PAGE(sc, 1); 1461 bus_space_write_1(bst, bsh, offset + IMR0, 0xff); 1462 if (!(sc->sc_flags & XEF_DINGO)) 1463 /* XXX What is this? Not for Dingo at least. */ 1464 bus_space_write_1(bst, bsh, offset + IMR1, 1); 1465 #endif 1466 1467 /* Enable interrupts. */ 1468 PAGE(sc, 0); 1469 bus_space_write_1(bst, bsh, offset + CR, ENABLE_INT); 1470 1471 /* XXX This is pure magic for me, found in the Linux driver. */ 1472 if ((sc->sc_flags & (XEF_DINGO | XEF_MODEM)) == XEF_MODEM) { 1473 if ((bus_space_read_1(bst, bsh, offset + 0x10) & 0x01) == 0) 1474 /* Unmask the master interrupt bit. */ 1475 bus_space_write_1(bst, bsh, offset + 0x10, 0x11); 1476 } 1477 1478 /* 1479 * The Linux driver says this: 1480 * We should switch back to page 0 to avoid a bug in revision 0 1481 * where regs with offset below 8 can't be read after an access 1482 * to the MAC registers. 1483 */ 1484 PAGE(sc, 0); 1485 } 1486 1487 #ifdef XEDEBUG 1488 void 1489 xe_reg_dump(sc) 1490 struct xe_softc *sc; 1491 { 1492 int page, i; 1493 bus_space_tag_t bst = sc->sc_bst; 1494 bus_space_handle_t bsh = sc->sc_bsh; 1495 bus_size_t offset = sc->sc_offset; 1496 1497 printf("%x: Common registers: ", sc->sc_dev.dv_xname); 1498 for (i = 0; i < 8; i++) { 1499 printf(" %2.2x", bus_space_read_1(bst, bsh, offset + i)); 1500 } 1501 printf("\n"); 1502 1503 for (page = 0; page < 8; page++) { 1504 printf("%s: Register page %2.2x: ", sc->sc_dev.dv_xname, page); 1505 PAGE(sc, page); 1506 for (i = 8; i < 16; i++) { 1507 printf(" %2.2x", 1508 bus_space_read_1(bst, bsh, offset + i)); 1509 } 1510 printf("\n"); 1511 } 1512 1513 for (page = 0x40; page < 0x5f; page++) { 1514 if (page == 0x43 || (page >= 0x46 && page <= 0x4f) || 1515 (page >= 0x51 && page <= 0x5e)) 1516 continue; 1517 printf("%s: Register page %2.2x: ", sc->sc_dev.dv_xname, page); 1518 PAGE(sc, page); 1519 for (i = 8; i < 16; i++) { 1520 printf(" %2.2x", 1521 bus_space_read_1(bst, bsh, offset + i)); 1522 } 1523 printf("\n"); 1524 } 1525 } 1526 #endif /* XEDEBUG */ 1527