1 /* $OpenBSD: ydsvar.h,v 1.2 2001/07/08 06:43:27 fgsch Exp $ */ 2 /* $NetBSD$ */ 3 4 /* 5 * Copyright (c) 2000, 2001 Kazuki Sakamoto and Minoura Makoto. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #ifndef _DEV_PCI_YDSVAR_H_ 30 #define _DEV_PCI_YDSVAR_H_ 31 32 #define N_PLAY_SLOTS 2 /* We use only 2 (R and L) */ 33 #define N_PLAY_SLOT_CTRL 2 34 #define WORK_SIZE 0x0400 35 36 /* 37 * softc 38 */ 39 struct yds_dma { 40 bus_dmamap_t map; 41 caddr_t addr; /* VA */ 42 bus_dma_segment_t segs[1]; 43 int nsegs; 44 size_t size; 45 struct yds_dma *next; 46 }; 47 48 struct yds_codec_softc { 49 struct device sc_dev; /* base device */ 50 struct yds_softc *sc; 51 int id; 52 int status_data; 53 int status_addr; 54 struct ac97_host_if host_if; 55 struct ac97_codec_if *codec_if; 56 }; 57 58 struct yds_softc { 59 struct device sc_dev; /* base device */ 60 pci_chipset_tag_t sc_pc; 61 pcitag_t sc_pcitag; 62 pcireg_t sc_id; 63 void *sc_ih; /* interrupt vectoring */ 64 bus_space_tag_t memt; 65 bus_space_handle_t memh; 66 bus_dma_tag_t sc_dmatag; /* DMA tag */ 67 u_int sc_flags; 68 69 struct yds_codec_softc sc_codec[2]; /* Primary/Secondary AC97 */ 70 71 struct yds_dma *sc_dmas; /* List of DMA handles */ 72 73 /* 74 * Play/record status 75 */ 76 struct { 77 void (*intr)(void *); /* rint/pint */ 78 void *intr_arg; /* arg for intr */ 79 u_int offset; /* filled up to here */ 80 u_int blksize; 81 u_int factor; /* byte per sample */ 82 u_int length; /* ring buffer length */ 83 struct yds_dma *dma; /* DMA handle for ring buf */ 84 } sc_play, sc_rec; 85 86 /* 87 * DSP control data 88 * 89 * Work space, play control data table, play slot control data, 90 * rec slot control data and effect slot control data are 91 * stored in a single memory segment in this order. 92 */ 93 struct yds_dma sc_ctrldata; 94 /* KVA and offset in buffer of play ctrl data tbl */ 95 u_int32_t *ptbl; 96 off_t ptbloff; 97 /* KVA and offset in buffer of rec slot ctrl data */ 98 struct rec_slot_ctrl_bank *rbank; 99 off_t rbankoff; 100 /* Array of KVA pointers and offset of play slot control data */ 101 struct play_slot_ctrl_bank *pbankp[N_PLAY_SLOT_CTRL_BANK 102 *N_PLAY_SLOTS]; 103 off_t pbankoff; 104 105 /* 106 * Legacy support 107 */ 108 bus_space_tag_t sc_legacy_iot; 109 bus_space_handle_t sc_opl_ioh; 110 struct device *sc_mpu; 111 bus_space_handle_t sc_mpu_ioh; 112 }; 113 #define sc_opl_iot sc_legacy_iot 114 #define sc_mpu_iot sc_legacy_iot 115 116 #endif /* _DEV_PCI_YDSVAR_H_ */ 117