1 /* $OpenBSD: uhci_pci.c,v 1.33 2014/05/16 18:17:03 mpi Exp $ */ 2 /* $NetBSD: uhci_pci.c,v 1.24 2002/10/02 16:51:58 thorpej Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 #include <sys/timeout.h> 39 #include <sys/queue.h> 40 41 #include <machine/bus.h> 42 43 #include <dev/pci/pcivar.h> 44 45 #include <dev/usb/usb.h> 46 #include <dev/usb/usbdi.h> 47 #include <dev/usb/usbdivar.h> 48 #include <dev/usb/usb_mem.h> 49 50 #include <dev/usb/uhcireg.h> 51 #include <dev/usb/uhcivar.h> 52 53 int uhci_pci_match(struct device *, void *, void *); 54 void uhci_pci_attach(struct device *, struct device *, void *); 55 void uhci_pci_attach_deferred(struct device *); 56 int uhci_pci_detach(struct device *, int); 57 int uhci_pci_activate(struct device *, int); 58 59 struct uhci_pci_softc { 60 struct uhci_softc sc; 61 pci_chipset_tag_t sc_pc; 62 pcitag_t sc_tag; 63 void *sc_ih; /* interrupt vectoring */ 64 }; 65 66 struct cfattach uhci_pci_ca = { 67 sizeof(struct uhci_pci_softc), uhci_pci_match, uhci_pci_attach, 68 uhci_pci_detach, uhci_pci_activate 69 }; 70 71 int 72 uhci_pci_match(struct device *parent, void *match, void *aux) 73 { 74 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 75 76 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 77 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 78 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_UHCI) 79 return (1); 80 81 return (0); 82 } 83 84 int 85 uhci_pci_activate(struct device *self, int act) 86 { 87 struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self; 88 89 /* On resume, set legacy support attribute and enable intrs */ 90 switch (act) { 91 case DVACT_RESUME: 92 pci_conf_write(sc->sc_pc, sc->sc_tag, 93 PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN); 94 bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size, 95 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); 96 bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0); 97 break; 98 } 99 100 return uhci_activate(self, act); 101 } 102 103 void 104 uhci_pci_attach(struct device *parent, struct device *self, void *aux) 105 { 106 struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self; 107 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 108 pci_chipset_tag_t pc = pa->pa_pc; 109 pcitag_t tag = pa->pa_tag; 110 char const *intrstr; 111 pci_intr_handle_t ih; 112 const char *vendor; 113 char *devname = sc->sc.sc_bus.bdev.dv_xname; 114 int s; 115 116 /* Map I/O registers */ 117 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 118 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) { 119 printf(": can't map i/o space\n"); 120 return; 121 } 122 123 124 /* Disable interrupts, so we don't get any spurious ones. */ 125 s = splhardusb(); 126 bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0); 127 128 sc->sc_pc = pc; 129 sc->sc_tag = tag; 130 sc->sc.sc_bus.dmatag = pa->pa_dmat; 131 132 /* Map and establish the interrupt. */ 133 if (pci_intr_map(pa, &ih)) { 134 printf(": couldn't map interrupt\n"); 135 goto unmap_ret; 136 } 137 intrstr = pci_intr_string(pc, ih); 138 sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, uhci_intr, sc, 139 devname); 140 if (sc->sc_ih == NULL) { 141 printf(": couldn't establish interrupt"); 142 if (intrstr != NULL) 143 printf(" at %s", intrstr); 144 printf("\n"); 145 goto unmap_ret; 146 } 147 printf(": %s\n", intrstr); 148 149 /* Set LEGSUP register to its default value. */ 150 pci_conf_write(pc, tag, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN); 151 152 switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) { 153 case PCI_USBREV_PRE_1_0: 154 sc->sc.sc_bus.usbrev = USBREV_PRE_1_0; 155 break; 156 case PCI_USBREV_1_0: 157 sc->sc.sc_bus.usbrev = USBREV_1_0; 158 break; 159 case PCI_USBREV_1_1: 160 sc->sc.sc_bus.usbrev = USBREV_1_1; 161 break; 162 default: 163 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN; 164 break; 165 } 166 167 uhci_run(&sc->sc, 0); /* stop the controller */ 168 /* disable interrupts */ 169 bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size, 170 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); 171 bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0); 172 173 /* Figure out vendor for root hub descriptor. */ 174 vendor = pci_findvendor(pa->pa_id); 175 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); 176 if (vendor) 177 strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor)); 178 else 179 snprintf(sc->sc.sc_vendor, sizeof (sc->sc.sc_vendor), 180 "vendor 0x%04x", PCI_VENDOR(pa->pa_id)); 181 182 config_defer(self, uhci_pci_attach_deferred); 183 184 /* Ignore interrupts for now */ 185 sc->sc.sc_bus.dying = 1; 186 187 splx(s); 188 189 return; 190 191 unmap_ret: 192 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 193 splx(s); 194 } 195 196 void 197 uhci_pci_attach_deferred(struct device *self) 198 { 199 struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self; 200 char *devname = sc->sc.sc_bus.bdev.dv_xname; 201 usbd_status r; 202 int s; 203 204 s = splhardusb(); 205 206 sc->sc.sc_bus.dying = 0; 207 r = uhci_init(&sc->sc); 208 if (r != USBD_NORMAL_COMPLETION) { 209 printf("%s: init failed, error=%d\n", devname, r); 210 goto unmap_ret; 211 } 212 splx(s); 213 214 /* Attach usb device. */ 215 config_found(self, &sc->sc.sc_bus, usbctlprint); 216 return; 217 218 unmap_ret: 219 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 220 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 221 splx(s); 222 } 223 224 int 225 uhci_pci_detach(struct device *self, int flags) 226 { 227 struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self; 228 int rv; 229 230 rv = uhci_detach(self, flags); 231 if (rv) 232 return (rv); 233 if (sc->sc_ih != NULL) { 234 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 235 sc->sc_ih = NULL; 236 } 237 if (sc->sc.sc_size) { 238 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 239 sc->sc.sc_size = 0; 240 } 241 242 return (0); 243 } 244