1 /* $OpenBSD: sdhc_pci.c,v 1.14 2013/01/04 23:19:40 stsp Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/param.h> 20 #include <sys/device.h> 21 #include <sys/systm.h> 22 #include <sys/malloc.h> 23 24 #include <dev/pci/pcivar.h> 25 #include <dev/pci/pcidevs.h> 26 #include <dev/sdmmc/sdhcreg.h> 27 #include <dev/sdmmc/sdhcvar.h> 28 #include <dev/sdmmc/sdmmcvar.h> 29 30 /* 31 * 8-bit PCI configuration register that tells us how many slots there 32 * are and which BAR entry corresponds to the first slot. 33 */ 34 #define SDHC_PCI_CONF_SLOT_INFO 0x40 35 #define SDHC_PCI_NUM_SLOTS(info) ((((info) >> 4) & 0x7) + 1) 36 #define SDHC_PCI_FIRST_BAR(info) ((info) & 0x7) 37 38 /* TI specific register */ 39 #define SDHC_PCI_GENERAL_CTL 0x4c 40 #define MMC_SD_DIS 0x02 41 42 /* RICOH specific registers */ 43 #define SDHC_PCI_MODE_KEY 0xf9 44 #define SDHC_PCI_MODE 0x150 45 #define SDHC_PCI_MODE_SD20 0x10 46 #define SDHC_PCI_BASE_FREQ_KEY 0xfc 47 #define SDHC_PCI_BASE_FREQ 0xe1 48 49 struct sdhc_pci_softc { 50 struct sdhc_softc sc; 51 void *sc_ih; 52 }; 53 54 int sdhc_pci_match(struct device *, void *, void *); 55 void sdhc_pci_attach(struct device *, struct device *, void *); 56 void sdhc_takecontroller(struct pci_attach_args *); 57 void sdhc_pci_conf_write(struct pci_attach_args *, int, uint8_t); 58 59 struct cfattach sdhc_pci_ca = { 60 sizeof(struct sdhc_pci_softc), sdhc_pci_match, sdhc_pci_attach, 61 NULL, sdhc_activate 62 }; 63 64 int 65 sdhc_pci_match(struct device *parent, void *match, void *aux) 66 { 67 struct pci_attach_args *pa = aux; 68 69 /* 70 * The Realtek RTS5209 is supported by rtsx(4). Usually the device 71 * class for these is UNDEFINED but there are RTS5209 devices which 72 * are advertising an SYSTEM/SDHC device class in addition to a 73 * separate device advertising the UNDEFINED class. Such devices are 74 * not compatible with sdhc(4), so ignore them. 75 */ 76 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK && 77 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RTS5209) 78 return 0; 79 80 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SYSTEM && 81 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SYSTEM_SDHC) 82 return 1; 83 84 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RICOH && 85 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RICOH_R5U822 || 86 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RICOH_R5U823)) 87 return 1; 88 89 return 0; 90 } 91 92 void 93 sdhc_pci_attach(struct device *parent, struct device *self, void *aux) 94 { 95 struct sdhc_pci_softc *sc = (struct sdhc_pci_softc *)self; 96 struct pci_attach_args *pa = aux; 97 pci_intr_handle_t ih; 98 char const *intrstr; 99 int slotinfo; 100 int nslots; 101 int usedma; 102 int reg; 103 bus_space_tag_t iot; 104 bus_space_handle_t ioh; 105 bus_size_t size; 106 u_int32_t caps = 0; 107 108 /* Some TI controllers needs special treatment. */ 109 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_TI && 110 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_TI_PCI7XX1_SD && 111 pa->pa_function == 4) 112 sdhc_takecontroller(pa); 113 114 /* ENE controllers break if set to 0V bus power. */ 115 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ENE && 116 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENE_SDCARD) 117 sc->sc.sc_flags |= SDHC_F_NOPWR0; 118 119 /* Some RICOH controllers need to be bumped into the right mode. */ 120 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RICOH && 121 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RICOH_R5U823) { 122 /* Enable SD2.0 mode. */ 123 sdhc_pci_conf_write(pa, SDHC_PCI_MODE_KEY, 0xfc); 124 sdhc_pci_conf_write(pa, SDHC_PCI_MODE, SDHC_PCI_MODE_SD20); 125 sdhc_pci_conf_write(pa, SDHC_PCI_MODE_KEY, 0x00); 126 127 /* 128 * Some SD/MMC cards don't work with the default base 129 * clock frequency of 200MHz. Lower it to 50Hz. 130 */ 131 sdhc_pci_conf_write(pa, SDHC_PCI_BASE_FREQ_KEY, 0x01); 132 sdhc_pci_conf_write(pa, SDHC_PCI_BASE_FREQ, 50); 133 sdhc_pci_conf_write(pa, SDHC_PCI_BASE_FREQ_KEY, 0x00); 134 } 135 136 if (pci_intr_map(pa, &ih)) { 137 printf(": can't map interrupt\n"); 138 return; 139 } 140 141 intrstr = pci_intr_string(pa->pa_pc, ih); 142 sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_SDMMC, 143 sdhc_intr, sc, sc->sc.sc_dev.dv_xname); 144 if (sc->sc_ih == NULL) { 145 printf(": can't establish interrupt\n"); 146 return; 147 } 148 printf(": %s\n", intrstr); 149 150 /* Enable use of DMA if supported by the interface. */ 151 usedma = PCI_INTERFACE(pa->pa_class) == SDHC_PCI_INTERFACE_DMA; 152 153 /* 154 * Map and attach all hosts supported by the host controller. 155 */ 156 slotinfo = pci_conf_read(pa->pa_pc, pa->pa_tag, 157 SDHC_PCI_CONF_SLOT_INFO); 158 nslots = SDHC_PCI_NUM_SLOTS(slotinfo); 159 160 /* Allocate an array big enough to hold all the possible hosts */ 161 sc->sc.sc_host = malloc(sizeof(struct sdhc_host *) * nslots, M_DEVBUF, 162 M_WAITOK); 163 164 /* XXX: handle 64-bit BARs */ 165 for (reg = SDHC_PCI_BAR_START + SDHC_PCI_FIRST_BAR(slotinfo) * 166 sizeof(u_int32_t); 167 reg < SDHC_PCI_BAR_END && nslots > 0; 168 reg += sizeof(u_int32_t), nslots--) { 169 170 if (pci_mem_find(pa->pa_pc, pa->pa_tag, reg, 171 NULL, NULL, NULL) != 0) 172 continue; 173 174 if (pci_mapreg_map(pa, reg, PCI_MAPREG_TYPE_MEM, 0, 175 &iot, &ioh, NULL, &size, 0)) { 176 printf("%s at 0x%x: can't map registers\n", 177 sc->sc.sc_dev.dv_xname, reg); 178 continue; 179 } 180 181 if (sdhc_host_found(&sc->sc, iot, ioh, size, usedma, caps) != 0) 182 /* XXX: sc->sc_host leak */ 183 printf("%s at 0x%x: can't initialize host\n", 184 sc->sc.sc_dev.dv_xname, reg); 185 } 186 } 187 188 void 189 sdhc_takecontroller(struct pci_attach_args *pa) 190 { 191 pcitag_t tag; 192 pcireg_t id, reg; 193 194 /* Look at func 3 for the flash device */ 195 tag = pci_make_tag(pa->pa_pc, pa->pa_bus, pa->pa_device, 3); 196 id = pci_conf_read(pa->pa_pc, tag, PCI_ID_REG); 197 if (PCI_PRODUCT(id) != PCI_PRODUCT_TI_PCI7XX1_FLASH) 198 return; 199 200 /* 201 * Disable MMC/SD on the flash media controller so the 202 * SD host takes over. 203 */ 204 reg = pci_conf_read(pa->pa_pc, tag, SDHC_PCI_GENERAL_CTL); 205 reg |= MMC_SD_DIS; 206 pci_conf_write(pa->pa_pc, tag, SDHC_PCI_GENERAL_CTL, reg); 207 } 208 209 void 210 sdhc_pci_conf_write(struct pci_attach_args *pa, int reg, uint8_t val) 211 { 212 pcireg_t tmp; 213 214 tmp = pci_conf_read(pa->pa_pc, pa->pa_tag, reg & ~0x3); 215 tmp &= ~(0xff << ((reg & 0x3) * 8)); 216 tmp |= (val << ((reg & 0x3) * 8)); 217 pci_conf_write(pa->pa_pc, pa->pa_tag, reg & ~0x3, tmp); 218 } 219