1 /* $OpenBSD: maestro.c,v 1.37 2014/07/12 18:48:52 tedu Exp $ */ 2 /* $FreeBSD: /c/ncvs/src/sys/dev/sound/pci/maestro.c,v 1.3 2000/11/21 12:22:11 julian Exp $ */ 3 /* 4 * FreeBSD's ESS Agogo/Maestro driver 5 * Converted from FreeBSD's pcm to OpenBSD's audio. 6 * Copyright (c) 2000, 2001 David Leonard & Marc Espie 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 /*- 31 * (FreeBSD) Credits: 32 * Copyright (c) 2000 Taku YAMAMOTO <taku@cent.saitama-u.ac.jp> 33 * 34 * Part of this code (especially in many magic numbers) was heavily inspired 35 * by the Linux driver originally written by 36 * Alan Cox <alan.cox@linux.org>, modified heavily by 37 * Zach Brown <zab@zabbo.net>. 38 * 39 * busdma()-ize and buffer size reduction were suggested by 40 * Cameron Grant <gandalf@vilnya.demon.co.uk>. 41 * Also he showed me the way to use busdma() suite. 42 * 43 * Internal speaker problems on NEC VersaPro's and Dell Inspiron 7500 44 * were looked at by 45 * Munehiro Matsuda <haro@tk.kubota.co.jp>, 46 * who brought patches based on the Linux driver with some simplification. 47 */ 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/kernel.h> 52 #include <sys/malloc.h> 53 #include <sys/device.h> 54 #include <sys/queue.h> 55 #include <sys/fcntl.h> 56 57 #include <dev/pci/pcidevs.h> 58 #include <dev/pci/pcivar.h> 59 60 #include <sys/audioio.h> 61 #include <dev/audio_if.h> 62 #include <dev/mulaw.h> 63 #include <dev/auconv.h> 64 65 #include <dev/ic/ac97.h> 66 67 /* ----------------------------- 68 * PCI config registers 69 */ 70 71 /* Legacy emulation */ 72 #define CONF_LEGACY 0x40 73 74 #define LEGACY_DISABLED 0x8000 75 76 /* Chip configurations */ 77 #define CONF_MAESTRO 0x50 78 #define MAESTRO_CHIBUS 0x00100000 79 #define MAESTRO_POSTEDWRITE 0x00000080 80 #define MAESTRO_DMA_PCITIMING 0x00000040 81 #define MAESTRO_SWAP_LR 0x00000010 82 83 /* ACPI configurations */ 84 #define CONF_ACPI_STOPCLOCK 0x54 85 #define ACPI_PART_2ndC_CLOCK 15 86 #define ACPI_PART_CODEC_CLOCK 14 87 #define ACPI_PART_978 13 /* Docking station or something */ 88 #define ACPI_PART_SPDIF 12 89 #define ACPI_PART_GLUE 11 /* What? */ 90 #define ACPI_PART_DAA 10 91 #define ACPI_PART_PCI_IF 9 92 #define ACPI_PART_HW_VOL 8 93 #define ACPI_PART_GPIO 7 94 #define ACPI_PART_ASSP 6 95 #define ACPI_PART_SB 5 96 #define ACPI_PART_FM 4 97 #define ACPI_PART_RINGBUS 3 98 #define ACPI_PART_MIDI 2 99 #define ACPI_PART_GAME_PORT 1 100 #define ACPI_PART_WP 0 101 102 103 /* ----------------------------- 104 * I/O ports 105 */ 106 107 /* Direct Sound Processor (aka Wave Processor) */ 108 #define PORT_DSP_DATA 0x00 /* WORD RW */ 109 #define PORT_DSP_INDEX 0x02 /* WORD RW */ 110 #define PORT_INT_STAT 0x04 /* WORD RW */ 111 #define PORT_SAMPLE_CNT 0x06 /* WORD RO */ 112 113 /* WaveCache */ 114 #define PORT_WAVCACHE_INDEX 0x10 /* WORD RW */ 115 #define PORT_WAVCACHE_DATA 0x12 /* WORD RW */ 116 #define WAVCACHE_PCMBAR 0x1fc 117 #define WAVCACHE_WTBAR 0x1f0 118 #define WAVCACHE_BASEADDR_SHIFT 12 119 120 #define WAVCACHE_CHCTL_ADDRTAG_MASK 0xfff8 121 #define WAVCACHE_CHCTL_U8 0x0004 122 #define WAVCACHE_CHCTL_STEREO 0x0002 123 #define WAVCACHE_CHCTL_DECREMENTAL 0x0001 124 125 #define PORT_WAVCACHE_CTRL 0x14 /* WORD RW */ 126 #define WAVCACHE_EXTRA_CH_ENABLED 0x0200 127 #define WAVCACHE_ENABLED 0x0100 128 #define WAVCACHE_CH_60_ENABLED 0x0080 129 #define WAVCACHE_WTSIZE_MASK 0x0060 130 #define WAVCACHE_WTSIZE_1MB 0x0000 131 #define WAVCACHE_WTSIZE_2MB 0x0020 132 #define WAVCACHE_WTSIZE_4MB 0x0040 133 #define WAVCACHE_WTSIZE_8MB 0x0060 134 #define WAVCACHE_SGC_MASK 0x000c 135 #define WAVCACHE_SGC_DISABLED 0x0000 136 #define WAVCACHE_SGC_40_47 0x0004 137 #define WAVCACHE_SGC_32_47 0x0008 138 #define WAVCACHE_TESTMODE 0x0001 139 140 /* Host Interruption */ 141 #define PORT_HOSTINT_CTRL 0x18 /* WORD RW */ 142 #define HOSTINT_CTRL_SOFT_RESET 0x8000 143 #define HOSTINT_CTRL_DSOUND_RESET 0x4000 144 #define HOSTINT_CTRL_HW_VOL_TO_PME 0x0400 145 #define HOSTINT_CTRL_CLKRUN_ENABLED 0x0100 146 #define HOSTINT_CTRL_HWVOL_ENABLED 0x0040 147 #define HOSTINT_CTRL_ASSP_INT_ENABLED 0x0010 148 #define HOSTINT_CTRL_ISDN_INT_ENABLED 0x0008 149 #define HOSTINT_CTRL_DSOUND_INT_ENABLED 0x0004 150 #define HOSTINT_CTRL_MPU401_INT_ENABLED 0x0002 151 #define HOSTINT_CTRL_SB_INT_ENABLED 0x0001 152 153 #define PORT_HOSTINT_STAT 0x1a /* BYTE RW */ 154 #define HOSTINT_STAT_HWVOL 0x40 155 #define HOSTINT_STAT_ASSP 0x10 156 #define HOSTINT_STAT_ISDN 0x08 157 #define HOSTINT_STAT_DSOUND 0x04 158 #define HOSTINT_STAT_MPU401 0x02 159 #define HOSTINT_STAT_SB 0x01 160 161 /* Hardware volume */ 162 #define PORT_HWVOL_VOICE_SHADOW 0x1c /* BYTE RW */ 163 #define PORT_HWVOL_VOICE 0x1d /* BYTE RW */ 164 #define PORT_HWVOL_MASTER_SHADOW 0x1e /* BYTE RW */ 165 #define PORT_HWVOL_MASTER 0x1f /* BYTE RW */ 166 167 /* CODEC */ 168 #define PORT_CODEC_CMD 0x30 /* BYTE W */ 169 #define CODEC_CMD_READ 0x80 170 #define CODEC_CMD_WRITE 0x00 171 #define CODEC_CMD_ADDR_MASK 0x7f 172 173 #define PORT_CODEC_STAT 0x30 /* BYTE R */ 174 #define CODEC_STAT_MASK 0x01 175 #define CODEC_STAT_RW_DONE 0x00 176 #define CODEC_STAT_PROGLESS 0x01 177 178 #define PORT_CODEC_REG 0x32 /* WORD RW */ 179 180 /* Ring bus control */ 181 #define PORT_RINGBUS_CTRL 0x34 /* DWORD RW */ 182 #define RINGBUS_CTRL_I2S_ENABLED 0x80000000 183 #define RINGBUS_CTRL_RINGBUS_ENABLED 0x20000000 184 #define RINGBUS_CTRL_ACLINK_ENABLED 0x10000000 185 #define RINGBUS_CTRL_AC97_SWRESET 0x08000000 186 #define RINGBUS_CTRL_IODMA_PLAYBACK_ENABLED 0x04000000 187 #define RINGBUS_CTRL_IODMA_RECORD_ENABLED 0x02000000 188 189 #define RINGBUS_SRC_MIC 20 190 #define RINGBUS_SRC_I2S 16 191 #define RINGBUS_SRC_ADC 12 192 #define RINGBUS_SRC_MODEM 8 193 #define RINGBUS_SRC_DSOUND 4 194 #define RINGBUS_SRC_ASSP 0 195 196 #define RINGBUS_DEST_MONORAL 000 197 #define RINGBUS_DEST_STEREO 010 198 #define RINGBUS_DEST_NONE 0 199 #define RINGBUS_DEST_DAC 1 200 #define RINGBUS_DEST_MODEM_IN 2 201 #define RINGBUS_DEST_RESERVED3 3 202 #define RINGBUS_DEST_DSOUND_IN 4 203 #define RINGBUS_DEST_ASSP_IN 5 204 205 /* General Purpose I/O */ 206 #define PORT_GPIO_DATA 0x60 /* WORD RW */ 207 #define PORT_GPIO_MASK 0x64 /* WORD RW */ 208 #define PORT_GPIO_DIR 0x68 /* WORD RW */ 209 210 /* Application Specific Signal Processor */ 211 #define PORT_ASSP_MEM_INDEX 0x80 /* DWORD RW */ 212 #define PORT_ASSP_MEM_DATA 0x84 /* WORD RW */ 213 #define PORT_ASSP_CTRL_A 0xa2 /* BYTE RW */ 214 #define PORT_ASSP_CTRL_B 0xa4 /* BYTE RW */ 215 #define PORT_ASSP_CTRL_C 0xa6 /* BYTE RW */ 216 #define PORT_ASSP_HOST_WR_INDEX 0xa8 /* BYTE W */ 217 #define PORT_ASSP_HOST_WR_DATA 0xaa /* BYTE RW */ 218 #define PORT_ASSP_INT_STAT 0xac /* BYTE RW */ 219 220 221 /* ----------------------------- 222 * Wave Processor Indexed Data Registers. 223 */ 224 225 #define WPREG_DATA_PORT 0 226 #define WPREG_CRAM_PTR 1 227 #define WPREG_CRAM_DATA 2 228 #define WPREG_WAVE_DATA 3 229 #define WPREG_WAVE_PTR_LOW 4 230 #define WPREG_WAVE_PTR_HIGH 5 231 232 #define WPREG_TIMER_FREQ 6 233 #define WP_TIMER_FREQ_PRESCALE_MASK 0x00e0 /* actual - 9 */ 234 #define WP_TIMER_FREQ_PRESCALE_SHIFT 5 235 #define WP_TIMER_FREQ_DIVIDE_MASK 0x001f 236 #define WP_TIMER_FREQ_DIVIDE_SHIFT 0 237 238 #define WPREG_WAVE_ROMRAM 7 239 #define WP_WAVE_VIRTUAL_ENABLED 0x0400 240 #define WP_WAVE_8BITRAM_ENABLED 0x0200 241 #define WP_WAVE_DRAM_ENABLED 0x0100 242 #define WP_WAVE_RAMSPLIT_MASK 0x00ff 243 #define WP_WAVE_RAMSPLIT_SHIFT 0 244 245 #define WPREG_BASE 12 246 #define WP_PARAOUT_BASE_MASK 0xf000 247 #define WP_PARAOUT_BASE_SHIFT 12 248 #define WP_PARAIN_BASE_MASK 0x0f00 249 #define WP_PARAIN_BASE_SHIFT 8 250 #define WP_SERIAL0_BASE_MASK 0x00f0 251 #define WP_SERIAL0_BASE_SHIFT 4 252 #define WP_SERIAL1_BASE_MASK 0x000f 253 #define WP_SERIAL1_BASE_SHIFT 0 254 255 #define WPREG_TIMER_ENABLE 17 256 #define WPREG_TIMER_START 23 257 258 259 /* ----------------------------- 260 * Audio Processing Unit. 261 */ 262 #define APUREG_APUTYPE 0 263 #define APU_DMA_ENABLED 0x4000 264 #define APU_INT_ON_LOOP 0x2000 265 #define APU_ENDCURVE 0x1000 266 #define APU_APUTYPE_MASK 0x00f0 267 #define APU_FILTERTYPE_MASK 0x000c 268 #define APU_FILTERQ_MASK 0x0003 269 270 /* APU types */ 271 #define APU_APUTYPE_SHIFT 4 272 273 #define APUTYPE_INACTIVE 0 274 #define APUTYPE_16BITLINEAR 1 275 #define APUTYPE_16BITSTEREO 2 276 #define APUTYPE_8BITLINEAR 3 277 #define APUTYPE_8BITSTEREO 4 278 #define APUTYPE_8BITDIFF 5 279 #define APUTYPE_DIGITALDELAY 6 280 #define APUTYPE_DUALTAP_READER 7 281 #define APUTYPE_CORRELATOR 8 282 #define APUTYPE_INPUTMIXER 9 283 #define APUTYPE_WAVETABLE 10 284 #define APUTYPE_RATECONV 11 285 #define APUTYPE_16BITPINGPONG 12 286 /* APU type 13 through 15 are reserved. */ 287 288 /* Filter types */ 289 #define APU_FILTERTYPE_SHIFT 2 290 291 #define FILTERTYPE_2POLE_LOPASS 0 292 #define FILTERTYPE_2POLE_BANDPASS 1 293 #define FILTERTYPE_2POLE_HIPASS 2 294 #define FILTERTYPE_1POLE_LOPASS 3 295 #define FILTERTYPE_1POLE_HIPASS 4 296 #define FILTERTYPE_PASSTHROUGH 5 297 298 /* Filter Q */ 299 #define APU_FILTERQ_SHIFT 0 300 301 #define FILTERQ_LESSQ 0 302 #define FILTERQ_MOREQ 3 303 304 /* APU register 2 */ 305 #define APUREG_FREQ_LOBYTE 2 306 #define APU_FREQ_LOBYTE_MASK 0xff00 307 #define APU_plus6dB 0x0010 308 309 /* APU register 3 */ 310 #define APUREG_FREQ_HIWORD 3 311 #define APU_FREQ_HIWORD_MASK 0x0fff 312 313 /* Frequency */ 314 #define APU_FREQ_LOBYTE_SHIFT 8 315 #define APU_FREQ_HIWORD_SHIFT 0 316 #define FREQ_Hz2DIV(freq) (((u_int64_t)(freq) << 16) / 48000) 317 318 /* APU register 4 */ 319 #define APUREG_WAVESPACE 4 320 #define APU_STEREO 0x8000 321 #define APU_USE_SYSMEM 0x4000 322 #define APU_PCMBAR_MASK 0x6000 323 #define APU_64KPAGE_MASK 0xff00 324 325 /* PCM Base Address Register selection */ 326 #define APU_PCMBAR_SHIFT 13 327 328 /* 64KW (==128KB) Page */ 329 #define APU_64KPAGE_SHIFT 8 330 331 /* APU register 5 - 7 */ 332 #define APUREG_CURPTR 5 333 #define APUREG_ENDPTR 6 334 #define APUREG_LOOPLEN 7 335 336 /* APU register 9 */ 337 #define APUREG_AMPLITUDE 9 338 #define APU_AMPLITUDE_NOW_MASK 0xff00 339 #define APU_AMPLITUDE_DEST_MASK 0x00ff 340 341 /* Amplitude now? */ 342 #define APU_AMPLITUDE_NOW_SHIFT 8 343 344 /* APU register 10 */ 345 #define APUREG_POSITION 10 346 #define APU_RADIUS_MASK 0x00c0 347 #define APU_PAN_MASK 0x003f 348 349 /* Radius control. */ 350 #define APU_RADIUS_SHIFT 6 351 #define RADIUS_CENTERCIRCLE 0 352 #define RADIUS_MIDDLE 1 353 #define RADIUS_OUTSIDE 2 354 355 /* Polar pan. */ 356 #define APU_PAN_SHIFT 0 357 #define PAN_RIGHT 0x00 358 #define PAN_FRONT 0x08 359 #define PAN_LEFT 0x10 360 361 362 /* ----------------------------- 363 * Limits. 364 */ 365 #define WPWA_MAX ((1 << 22) - 1) 366 #define WPWA_MAXADDR ((1 << 23) - 1) 367 #define MAESTRO_MAXADDR ((1 << 28) - 1) 368 369 370 371 #ifdef AUDIO_DEBUG 372 #define DPRINTF(x) if (maestrodebug) printf x 373 #define DLPRINTF(i, x) if (maestrodebug & i) printf x 374 int maestrodebug = 0; 375 u_long maestrointr_called; 376 u_long maestrodma_effective; 377 378 #define MAESTRODEBUG_INTR 1 379 #define MAESTRODEBUG_TIMER 2 380 #else 381 #define DPRINTF(x) 382 #define DLPRINTF(i, x) 383 #endif 384 385 #define MAESTRO_BUFSIZ 0x4000 386 #define lengthof(array) (sizeof (array) / sizeof (array)[0]) 387 388 #define STEP_VOLUME 0x22 389 #define MIDDLE_VOLUME (STEP_VOLUME * 4) 390 391 typedef struct salloc_pool { 392 struct salloc_zone { 393 SLIST_ENTRY(salloc_zone) link; 394 caddr_t addr; 395 size_t size; 396 } *zones; 397 SLIST_HEAD(salloc_head, salloc_zone) free, used, spare; 398 } *salloc_t; 399 400 struct maestro_softc; 401 402 #define MAESTRO_PLAY 1 403 #define MAESTRO_STEREO 2 404 #define MAESTRO_8BIT 4 405 #define MAESTRO_UNSIGNED 8 406 #define MAESTRO_RUNNING 16 407 408 struct maestro_channel { 409 struct maestro_softc *sc; 410 int num; 411 u_int32_t blocksize; 412 u_int16_t mode; 413 u_int32_t speed; 414 u_int32_t dv; 415 u_int16_t start; 416 u_int16_t threshold; 417 u_int16_t end; 418 u_int16_t current; 419 u_int wpwa; 420 void (*intr)(void *); 421 void *intr_arg; 422 }; 423 424 struct maestro_softc { 425 struct device dev; 426 427 void *ih; 428 pci_chipset_tag_t pc; 429 pcitag_t pt; 430 431 #define MAESTRO_FLAG_SETUPGPIO 0x0001 432 int flags; 433 bus_space_tag_t iot; 434 bus_space_handle_t ioh; 435 bus_dma_tag_t dmat; 436 437 caddr_t dmabase; 438 bus_addr_t physaddr; 439 size_t dmasize; 440 bus_dmamap_t dmamap; 441 bus_dma_segment_t dmaseg; 442 salloc_t dmapool; 443 444 struct ac97_codec_if *codec_if; 445 struct ac97_host_if host_if; 446 struct audio_device *sc_audev; 447 448 int suspend; 449 450 struct maestro_channel play; 451 struct maestro_channel record; 452 }; 453 454 455 typedef u_int16_t wpreg_t; 456 typedef u_int16_t wcreg_t; 457 458 salloc_t salloc_new(caddr_t, size_t, int); 459 void salloc_destroy(salloc_t); 460 caddr_t salloc_alloc(salloc_t, size_t); 461 void salloc_free(salloc_t, caddr_t); 462 void salloc_insert(salloc_t, struct salloc_head *, 463 struct salloc_zone *, int); 464 465 int maestro_match(struct device *, void *, void *); 466 void maestro_attach(struct device *, struct device *, void *); 467 int maestro_activate(struct device *, int); 468 int maestro_intr(void *); 469 470 int maestro_open(void *, int); 471 void maestro_close(void *); 472 int maestro_query_encoding(void *, struct audio_encoding *); 473 int maestro_set_params(void *, int, int, struct audio_params *, 474 struct audio_params *); 475 void maestro_get_default_params(void *, int, struct audio_params *); 476 int maestro_round_blocksize(void *, int); 477 int maestro_halt_output(void *); 478 int maestro_halt_input(void *); 479 int maestro_getdev(void *, struct audio_device *); 480 int maestro_set_port(void *, mixer_ctrl_t *); 481 int maestro_get_port(void *, mixer_ctrl_t *); 482 int maestro_query_devinfo(void *, mixer_devinfo_t *); 483 void *maestro_malloc(void *, int, size_t, int, int); 484 void maestro_free(void *, void *, int); 485 paddr_t maestro_mappage(void *, void *, off_t, int); 486 int maestro_get_props(void *); 487 int maestro_trigger_output(void *, void *, void *, int, void (*)(void *), 488 void *, struct audio_params *); 489 int maestro_trigger_input(void *, void *, void *, int, void (*)(void *), 490 void *, struct audio_params *); 491 492 int maestro_attach_codec(void *, struct ac97_codec_if *); 493 enum ac97_host_flags maestro_codec_flags(void *); 494 int maestro_read_codec(void *, u_int8_t, u_int16_t *); 495 int maestro_write_codec(void *, u_int8_t, u_int16_t); 496 void maestro_reset_codec(void *); 497 498 void maestro_initcodec(void *); 499 500 void maestro_set_speed(struct maestro_channel *, u_long *); 501 void maestro_init(struct maestro_softc *); 502 503 void maestro_channel_start(struct maestro_channel *); 504 void maestro_channel_stop(struct maestro_channel *); 505 void maestro_channel_advance_dma(struct maestro_channel *); 506 void maestro_channel_suppress_jitter(struct maestro_channel *); 507 508 int maestro_get_flags(struct pci_attach_args *); 509 510 void ringbus_setdest(struct maestro_softc *, int, int); 511 512 wpreg_t wp_reg_read(struct maestro_softc *, int); 513 void wp_reg_write(struct maestro_softc *, int, wpreg_t); 514 wpreg_t wp_apu_read(struct maestro_softc *, int, int); 515 void wp_apu_write(struct maestro_softc *, int, int, wpreg_t); 516 void wp_settimer(struct maestro_softc *, u_int); 517 void wp_starttimer(struct maestro_softc *); 518 void wp_stoptimer(struct maestro_softc *); 519 520 wcreg_t wc_reg_read(struct maestro_softc *, int); 521 void wc_reg_write(struct maestro_softc *, int, wcreg_t); 522 wcreg_t wc_ctrl_read(struct maestro_softc *, int); 523 void wc_ctrl_write(struct maestro_softc *, int, wcreg_t); 524 525 u_int maestro_calc_timer_freq(struct maestro_channel *); 526 void maestro_update_timer(struct maestro_softc *); 527 528 struct cfdriver maestro_cd = { 529 NULL, "maestro", DV_DULL 530 }; 531 532 struct cfattach maestro_ca = { 533 sizeof (struct maestro_softc), maestro_match, maestro_attach, 534 NULL, maestro_activate 535 }; 536 537 struct audio_hw_if maestro_hw_if = { 538 maestro_open, 539 maestro_close, 540 NULL, 541 maestro_query_encoding, 542 maestro_set_params, 543 maestro_round_blocksize, 544 NULL, 545 NULL, 546 NULL, 547 NULL, 548 NULL, 549 maestro_halt_output, 550 maestro_halt_input, 551 NULL, 552 maestro_getdev, 553 NULL, 554 maestro_set_port, 555 maestro_get_port, 556 maestro_query_devinfo, 557 maestro_malloc, 558 maestro_free, 559 NULL, 560 maestro_mappage, 561 maestro_get_props, 562 maestro_trigger_output, 563 maestro_trigger_input, 564 maestro_get_default_params 565 }; 566 567 struct audio_device maestro_audev = { 568 "ESS Maestro", "", "maestro" 569 }; 570 571 struct { 572 u_short vendor, product; 573 int flags; 574 } maestro_pcitab[] = { 575 { PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTROII, 0 }, 576 { PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTRO2E, 0 }, 577 { PCI_VENDOR_PLATFORM, PCI_PRODUCT_PLATFORM_ES1849, 0 }, 578 { PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VERSAMAESTRO, MAESTRO_FLAG_SETUPGPIO }, 579 { PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VERSAPRONXVA26D, MAESTRO_FLAG_SETUPGPIO } 580 }; 581 #define NMAESTRO_PCITAB lengthof(maestro_pcitab) 582 583 int 584 maestro_get_flags(struct pci_attach_args *pa) 585 { 586 int i; 587 588 /* Distinguish audio devices from modems with the same manfid */ 589 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_MULTIMEDIA) 590 return (-1); 591 if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MULTIMEDIA_AUDIO) 592 return (-1); 593 for (i = 0; i < NMAESTRO_PCITAB; i++) 594 if (PCI_VENDOR(pa->pa_id) == maestro_pcitab[i].vendor && 595 PCI_PRODUCT(pa->pa_id) == maestro_pcitab[i].product) 596 return (maestro_pcitab[i].flags); 597 return (-1); 598 } 599 600 /* ----------------------------- 601 * Driver interface. 602 */ 603 604 int 605 maestro_match(struct device *parent, void *match, void *aux) 606 { 607 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 608 609 if (maestro_get_flags(pa) == -1) 610 return (0); 611 else 612 return (1); 613 } 614 615 void 616 maestro_attach(struct device *parent, struct device *self, void *aux) 617 { 618 struct maestro_softc *sc = (struct maestro_softc *)self; 619 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 620 pci_chipset_tag_t pc = pa->pa_pc; 621 char const *intrstr; 622 pci_intr_handle_t ih; 623 int error; 624 u_int16_t cdata; 625 int dmastage = 0; 626 int rseg; 627 628 sc->sc_audev = &maestro_audev; 629 sc->flags = maestro_get_flags(pa); 630 631 sc->pc = pa->pa_pc; 632 sc->pt = pa->pa_tag; 633 sc->dmat = pa->pa_dmat; 634 635 /* Map interrupt */ 636 if (pci_intr_map(pa, &ih)) { 637 printf(": can't map interrupt\n"); 638 return; 639 } 640 intrstr = pci_intr_string(pc, ih); 641 sc->ih = pci_intr_establish(pc, ih, IPL_AUDIO | IPL_MPSAFE, 642 maestro_intr, sc, sc->dev.dv_xname); 643 if (sc->ih == NULL) { 644 printf(": can't establish interrupt"); 645 if (intrstr != NULL) 646 printf(" at %s\n", intrstr); 647 return; 648 } 649 printf(": %s", intrstr); 650 651 pci_set_powerstate(pc, sc->pt, PCI_PMCSR_STATE_D0); 652 653 /* Map i/o */ 654 if ((error = pci_mapreg_map(pa, PCI_MAPS, PCI_MAPREG_TYPE_IO, 655 0, &sc->iot, &sc->ioh, NULL, NULL, 0)) != 0) { 656 printf(", can't map i/o space\n"); 657 goto bad; 658 }; 659 660 /* Allocate fixed DMA segment :-( */ 661 sc->dmasize = MAESTRO_BUFSIZ * 16; 662 if ((error = bus_dmamem_alloc(sc->dmat, sc->dmasize, NBPG, 0, 663 &sc->dmaseg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 664 printf(", unable to alloc dma, error %d\n", error); 665 goto bad; 666 } 667 dmastage = 1; 668 if ((error = bus_dmamem_map(sc->dmat, &sc->dmaseg, 1, 669 sc->dmasize, &sc->dmabase, BUS_DMA_NOWAIT | 670 BUS_DMA_COHERENT)) != 0) { 671 printf(", unable to map dma, error %d\n", error); 672 goto bad; 673 } 674 dmastage = 2; 675 if ((error = bus_dmamap_create(sc->dmat, sc->dmasize, 1, 676 sc->dmasize, 0, BUS_DMA_NOWAIT, &sc->dmamap)) != 0) { 677 printf(", unable to create dma map, error %d\n", error); 678 goto bad; 679 } 680 dmastage = 3; 681 if ((error = bus_dmamap_load(sc->dmat, sc->dmamap, 682 sc->dmabase, sc->dmasize, NULL, BUS_DMA_NOWAIT)) != 0) { 683 printf(", unable to load dma map, error %d\n", error); 684 goto bad; 685 } 686 687 /* XXX 688 * The first byte of the allocated memory is not usable, 689 * the WP sometimes uses it to store status. 690 */ 691 /* Make DMA memory pool */ 692 if ((sc->dmapool = salloc_new(sc->dmabase+16, sc->dmasize-16, 693 128/*overkill?*/)) == NULL) { 694 printf(", unable to make dma pool\n"); 695 goto bad; 696 } 697 698 sc->physaddr = sc->dmamap->dm_segs[0].ds_addr; 699 700 printf("\n"); 701 702 /* Kick device */ 703 maestro_init(sc); 704 maestro_read_codec(sc, 0, &cdata); 705 if (cdata == 0x80) { 706 printf("%s: PT101 codec unsupported, no mixer\n", 707 sc->dev.dv_xname); 708 /* Init values from Linux, no idea what this does. */ 709 maestro_write_codec(sc, 0x2a, 0x0001); 710 maestro_write_codec(sc, 0x2C, 0x0000); 711 maestro_write_codec(sc, 0x2C, 0xFFFF); 712 maestro_write_codec(sc, 0x10, 0x9F1F); 713 maestro_write_codec(sc, 0x12, 0x0808); 714 maestro_write_codec(sc, 0x14, 0x9F1F); 715 maestro_write_codec(sc, 0x16, 0x9F1F); 716 maestro_write_codec(sc, 0x18, 0x0404); 717 maestro_write_codec(sc, 0x1A, 0x0000); 718 maestro_write_codec(sc, 0x1C, 0x0000); 719 maestro_write_codec(sc, 0x02, 0x0404); 720 maestro_write_codec(sc, 0x04, 0x0808); 721 maestro_write_codec(sc, 0x0C, 0x801F); 722 maestro_write_codec(sc, 0x0E, 0x801F); 723 /* no control over the mixer, sorry */ 724 sc->codec_if = NULL; 725 } else { 726 /* Attach the AC'97 */ 727 sc->host_if.arg = sc; 728 sc->host_if.attach = maestro_attach_codec; 729 sc->host_if.flags = maestro_codec_flags; 730 sc->host_if.read = maestro_read_codec; 731 sc->host_if.write = maestro_write_codec; 732 sc->host_if.reset = maestro_reset_codec; 733 if (ac97_attach(&sc->host_if) != 0) { 734 printf("%s: can't attach codec\n", sc->dev.dv_xname); 735 goto bad; 736 } 737 } 738 739 sc->play.mode = MAESTRO_PLAY; 740 sc->play.sc = sc; 741 sc->play.num = 0; 742 sc->record.sc = sc; 743 sc->record.num = 2; 744 sc->record.mode = 0; 745 746 /* Attach audio */ 747 audio_attach_mi(&maestro_hw_if, sc, &sc->dev); 748 return; 749 750 bad: 751 if (sc->ih) 752 pci_intr_disestablish(pc, sc->ih); 753 printf("%s: disabled\n", sc->dev.dv_xname); 754 if (sc->dmapool) 755 salloc_destroy(sc->dmapool); 756 if (dmastage >= 3) 757 bus_dmamap_destroy(sc->dmat, sc->dmamap); 758 if (dmastage >= 2) 759 bus_dmamem_unmap(sc->dmat, sc->dmabase, sc->dmasize); 760 if (dmastage >= 1) 761 bus_dmamem_free(sc->dmat, &sc->dmaseg, 1); 762 } 763 764 void 765 maestro_init(struct maestro_softc *sc) 766 { 767 int reg; 768 pcireg_t data; 769 770 /* Disable all legacy emulations. */ 771 data = pci_conf_read(sc->pc, sc->pt, CONF_LEGACY); 772 data |= LEGACY_DISABLED; 773 pci_conf_write(sc->pc, sc->pt, CONF_LEGACY, data); 774 775 /* Disconnect from CHI. (Makes Dell inspiron 7500 work?) 776 * Enable posted write. 777 * Prefer PCI timing rather than that of ISA. 778 * Don't swap L/R. */ 779 data = pci_conf_read(sc->pc, sc->pt, CONF_MAESTRO); 780 data |= MAESTRO_CHIBUS | MAESTRO_POSTEDWRITE | MAESTRO_DMA_PCITIMING; 781 data &= ~MAESTRO_SWAP_LR; 782 pci_conf_write(sc->pc, sc->pt, CONF_MAESTRO, data); 783 /* Reset direct sound. */ 784 bus_space_write_2(sc->iot, sc->ioh, PORT_HOSTINT_CTRL, 785 HOSTINT_CTRL_DSOUND_RESET); 786 DELAY(10000); /* XXX - too long? */ 787 bus_space_write_2(sc->iot, sc->ioh, PORT_HOSTINT_CTRL, 0); 788 DELAY(10000); 789 790 /* Enable direct sound and hardware volume control interruptions. */ 791 bus_space_write_2(sc->iot, sc->ioh, PORT_HOSTINT_CTRL, 792 HOSTINT_CTRL_DSOUND_INT_ENABLED | HOSTINT_CTRL_HWVOL_ENABLED); 793 794 /* Setup Wave Processor. */ 795 796 /* Enable WaveCache, set DMA base address. */ 797 wp_reg_write(sc, WPREG_WAVE_ROMRAM, 798 WP_WAVE_VIRTUAL_ENABLED | WP_WAVE_DRAM_ENABLED); 799 bus_space_write_2(sc->iot, sc->ioh, PORT_WAVCACHE_CTRL, 800 WAVCACHE_ENABLED | WAVCACHE_WTSIZE_4MB); 801 802 for (reg = WAVCACHE_PCMBAR; reg < WAVCACHE_PCMBAR + 4; reg++) 803 wc_reg_write(sc, reg, 804 sc->physaddr >> WAVCACHE_BASEADDR_SHIFT); 805 806 /* Setup Codec/Ringbus. */ 807 maestro_initcodec(sc); 808 bus_space_write_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL, 809 RINGBUS_CTRL_RINGBUS_ENABLED | RINGBUS_CTRL_ACLINK_ENABLED); 810 811 wp_reg_write(sc, WPREG_BASE, 0x8500); /* Parallel I/O */ 812 ringbus_setdest(sc, RINGBUS_SRC_ADC, 813 RINGBUS_DEST_STEREO | RINGBUS_DEST_DSOUND_IN); 814 ringbus_setdest(sc, RINGBUS_SRC_DSOUND, 815 RINGBUS_DEST_STEREO | RINGBUS_DEST_DAC); 816 817 /* Setup ASSP. Needed for Dell Inspiron 7500? */ 818 bus_space_write_1(sc->iot, sc->ioh, PORT_ASSP_CTRL_B, 0x00); 819 bus_space_write_1(sc->iot, sc->ioh, PORT_ASSP_CTRL_A, 0x03); 820 bus_space_write_1(sc->iot, sc->ioh, PORT_ASSP_CTRL_C, 0x00); 821 822 /* 823 * Reset hw volume to a known value so that we may handle diffs 824 * off to AC'97. 825 */ 826 827 bus_space_write_1(sc->iot, sc->ioh, PORT_HWVOL_MASTER, MIDDLE_VOLUME); 828 /* Setup GPIO if needed (NEC systems) */ 829 if (sc->flags & MAESTRO_FLAG_SETUPGPIO) { 830 /* Matthew Braithwaite <matt@braithwaite.net> reported that 831 * NEC Versa LX doesn't need GPIO operation. */ 832 bus_space_write_2(sc->iot, sc->ioh, 833 PORT_GPIO_MASK, 0x9ff); 834 bus_space_write_2(sc->iot, sc->ioh, PORT_GPIO_DIR, 835 bus_space_read_2(sc->iot, sc->ioh, PORT_GPIO_DIR) | 0x600); 836 bus_space_write_2(sc->iot, sc->ioh, 837 PORT_GPIO_DATA, 0x200); 838 } 839 } 840 841 /* ----------------------------- 842 * Audio interface 843 */ 844 845 int 846 maestro_round_blocksize(void *self, int blk) 847 { 848 return ((blk + 0xf) & ~0xf); 849 } 850 851 void * 852 maestro_malloc(void *arg, int dir, size_t size, int pool, int flags) 853 { 854 struct maestro_softc *sc = (struct maestro_softc *)arg; 855 856 return (salloc_alloc(sc->dmapool, size)); 857 } 858 859 void 860 maestro_free(void *self, void *ptr, int pool) 861 { 862 struct maestro_softc *sc = (struct maestro_softc *)self; 863 864 salloc_free(sc->dmapool, ptr); 865 } 866 867 paddr_t 868 maestro_mappage(void *self, void *mem, off_t off, int prot) 869 { 870 struct maestro_softc *sc = (struct maestro_softc *)self; 871 872 if (off < 0) 873 return -1; 874 return bus_dmamem_mmap(sc->dmat, &sc->dmaseg, 1, 875 off, prot, BUS_DMA_WAITOK); 876 } 877 878 int 879 maestro_get_props(void *self) 880 { 881 /* struct maestro_softc *sc = (struct maestro_softc *)self; */ 882 883 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT); /* XXX */ 884 } 885 886 int 887 maestro_getdev(void *self, struct audio_device *retp) 888 { 889 struct maestro_softc *sc = (struct maestro_softc *)self; 890 891 *retp = *sc->sc_audev; 892 return 0; 893 } 894 895 int 896 maestro_set_port(void *self, mixer_ctrl_t *cp) 897 { 898 struct ac97_codec_if *c = ((struct maestro_softc *)self)->codec_if; 899 int rc; 900 901 if (c) { 902 /* interrupts use the mixer */ 903 mtx_enter(&audio_lock); 904 rc = c->vtbl->mixer_set_port(c, cp); 905 mtx_leave(&audio_lock); 906 return rc; 907 } else 908 return (ENXIO); 909 } 910 911 int 912 maestro_get_port(void *self, mixer_ctrl_t *cp) 913 { 914 struct ac97_codec_if *c = ((struct maestro_softc *)self)->codec_if; 915 int rc; 916 917 if (c) { 918 /* interrupts use the mixer */ 919 mtx_enter(&audio_lock); 920 rc = c->vtbl->mixer_get_port(c, cp); 921 mtx_leave(&audio_lock); 922 return rc; 923 } else 924 return (ENXIO); 925 } 926 927 int 928 maestro_query_devinfo(void *self, mixer_devinfo_t *cp) 929 { 930 struct ac97_codec_if *c = ((struct maestro_softc *)self)->codec_if; 931 int rc; 932 933 if (c) { 934 /* interrupts use the mixer */ 935 mtx_enter(&audio_lock); 936 rc = c->vtbl->query_devinfo(c, cp); 937 mtx_leave(&audio_lock); 938 return rc; 939 } else 940 return (ENXIO); 941 } 942 943 struct audio_encoding maestro_tab[] = { 944 {0, AudioEslinear_le, AUDIO_ENCODING_SLINEAR_LE, 16, 2, 1, 0}, 945 {1, AudioEslinear, AUDIO_ENCODING_SLINEAR, 8, 1, 1, 0}, 946 {2, AudioEulinear, AUDIO_ENCODING_ULINEAR, 8, 1, 1, 0}, 947 {3, AudioEslinear_be, AUDIO_ENCODING_SLINEAR_BE, 16, 2, 1, 948 AUDIO_ENCODINGFLAG_EMULATED}, 949 {4, AudioEulinear_le, AUDIO_ENCODING_ULINEAR_LE, 16, 2, 1, 950 AUDIO_ENCODINGFLAG_EMULATED}, 951 {5, AudioEulinear_be, AUDIO_ENCODING_ULINEAR_BE, 16, 2, 1, 952 AUDIO_ENCODINGFLAG_EMULATED}, 953 {6, AudioEmulaw, AUDIO_ENCODING_ULAW, 8, 1, 1, 954 AUDIO_ENCODINGFLAG_EMULATED}, 955 {7, AudioEalaw, AUDIO_ENCODING_ALAW, 8, 1, 1, 956 AUDIO_ENCODINGFLAG_EMULATED} 957 }; 958 959 int 960 maestro_query_encoding(void *hdl, struct audio_encoding *fp) 961 { 962 if (fp->index < 0 || fp->index >= lengthof(maestro_tab)) 963 return (EINVAL); 964 *fp = maestro_tab[fp->index]; 965 return (0); 966 } 967 968 void 969 maestro_get_default_params(void *addr, int mode, struct audio_params *params) 970 { 971 ac97_get_default_params(params); 972 } 973 974 #define UNUSED __attribute__((unused)) 975 976 void 977 maestro_set_speed(struct maestro_channel *ch, u_long *prate) 978 { 979 ch->speed = *prate; 980 if ((ch->mode & (MAESTRO_8BIT | MAESTRO_STEREO)) == MAESTRO_8BIT) 981 ch->speed /= 2; 982 983 /* special common case */ 984 if (ch->speed == 48000) { 985 ch->dv = 0x10000; 986 } else { 987 /* compute 16 bits fixed point value of speed/48000, 988 * being careful not to overflow */ 989 ch->dv = (((ch->speed % 48000) << 16U) + 24000) / 48000 990 + ((ch->speed / 48000) << 16U); 991 /* And this is the real rate obtained */ 992 ch->speed = (ch->dv >> 16U) * 48000 + 993 (((ch->dv & 0xffff)*48000)>>16U); 994 } 995 *prate = ch->speed; 996 if ((ch->mode & (MAESTRO_8BIT | MAESTRO_STEREO)) == MAESTRO_8BIT) 997 *prate *= 2; 998 } 999 1000 u_int 1001 maestro_calc_timer_freq(struct maestro_channel *ch) 1002 { 1003 u_int ss = 2; 1004 1005 if (ch->mode & MAESTRO_8BIT) 1006 ss = 1; 1007 return (ch->speed * ss) / ch->blocksize; 1008 } 1009 1010 void 1011 maestro_update_timer(struct maestro_softc *sc) 1012 { 1013 u_int freq = 0; 1014 u_int n; 1015 1016 if (sc->play.mode & MAESTRO_RUNNING) 1017 freq = maestro_calc_timer_freq(&sc->play); 1018 if (sc->record.mode & MAESTRO_RUNNING) { 1019 n = maestro_calc_timer_freq(&sc->record); 1020 if (freq < n) 1021 freq = n; 1022 } 1023 if (freq) { 1024 wp_settimer(sc, freq); 1025 wp_starttimer(sc); 1026 } else 1027 wp_stoptimer(sc); 1028 } 1029 1030 1031 int 1032 maestro_set_params(void *hdl, int setmode, int usemode, 1033 struct audio_params *play, struct audio_params *rec) 1034 { 1035 struct maestro_softc *sc = (struct maestro_softc *)hdl; 1036 1037 if ((setmode & AUMODE_PLAY) == 0) 1038 return (0); 1039 1040 /* Disallow parameter change on a running audio for now */ 1041 if (sc->play.mode & MAESTRO_RUNNING) 1042 return (EINVAL); 1043 1044 if (play->sample_rate < 4000) 1045 play->sample_rate = 4000; 1046 else if (play->sample_rate > 48000) 1047 play->sample_rate = 48000; 1048 1049 play->factor = 1; 1050 play->sw_code = NULL; 1051 if (play->channels > 2) 1052 play->channels = 2; 1053 1054 sc->play.mode = MAESTRO_PLAY; 1055 if (play->channels == 2) 1056 sc->play.mode |= MAESTRO_STEREO; 1057 1058 if (play->encoding == AUDIO_ENCODING_ULAW) { 1059 play->factor = 2; 1060 play->sw_code = mulaw_to_slinear16_le; 1061 } else if (play->encoding == AUDIO_ENCODING_ALAW) { 1062 play->factor = 2; 1063 play->sw_code = alaw_to_slinear16_le; 1064 } else if (play->precision == 8) { 1065 sc->play.mode |= MAESTRO_8BIT; 1066 if (play->encoding == AUDIO_ENCODING_ULINEAR_LE || 1067 play->encoding == AUDIO_ENCODING_ULINEAR_BE) 1068 sc->play.mode |= MAESTRO_UNSIGNED; 1069 } 1070 else if (play->encoding == AUDIO_ENCODING_ULINEAR_LE) 1071 play->sw_code = change_sign16_le; 1072 else if (play->encoding == AUDIO_ENCODING_SLINEAR_BE) 1073 play->sw_code = swap_bytes; 1074 else if (play->encoding == AUDIO_ENCODING_ULINEAR_BE) 1075 play->sw_code = change_sign16_swap_bytes_le; 1076 else if (play->encoding != AUDIO_ENCODING_SLINEAR_LE) 1077 return (EINVAL); 1078 1079 play->bps = AUDIO_BPS(play->precision); 1080 play->msb = 1; 1081 1082 maestro_set_speed(&sc->play, &play->sample_rate); 1083 return (0); 1084 } 1085 1086 int 1087 maestro_open(void *hdl, int flags) 1088 { 1089 struct maestro_softc *sc = (struct maestro_softc *)hdl; 1090 DPRINTF(("%s: open(%d)\n", sc->dev.dv_xname, flags)); 1091 1092 /* XXX work around VM brokeness */ 1093 #if 0 1094 if ((OFLAGS(flags) & O_ACCMODE) != O_WRONLY) 1095 return (EINVAL); 1096 #endif 1097 sc->play.mode = MAESTRO_PLAY; 1098 sc->record.mode = 0; 1099 #ifdef AUDIO_DEBUG 1100 maestrointr_called = 0; 1101 maestrodma_effective = 0; 1102 #endif 1103 return (0); 1104 } 1105 1106 void 1107 maestro_close(void *hdl) 1108 { 1109 struct maestro_softc *sc UNUSED = (struct maestro_softc *)hdl; 1110 /* nothing to do */ 1111 } 1112 1113 1114 void 1115 maestro_channel_stop(struct maestro_channel *ch) 1116 { 1117 wp_apu_write(ch->sc, ch->num, APUREG_APUTYPE, 1118 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1119 if (ch->mode & MAESTRO_STEREO) 1120 wp_apu_write(ch->sc, ch->num+1, APUREG_APUTYPE, 1121 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1122 /* four channels for record... */ 1123 if (ch->mode & MAESTRO_PLAY) 1124 return; 1125 wp_apu_write(ch->sc, ch->num+2, APUREG_APUTYPE, 1126 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1127 if (ch->mode & MAESTRO_STEREO) 1128 wp_apu_write(ch->sc, ch->num+3, APUREG_APUTYPE, 1129 APUTYPE_INACTIVE << APU_APUTYPE_SHIFT); 1130 1131 } 1132 1133 int 1134 maestro_halt_input(void *hdl) 1135 { 1136 struct maestro_softc *sc = (struct maestro_softc *)hdl; 1137 1138 mtx_enter(&audio_lock); 1139 maestro_channel_stop(&sc->record); 1140 sc->record.mode &= ~MAESTRO_RUNNING; 1141 maestro_update_timer(sc); 1142 mtx_leave(&audio_lock); 1143 return 0; 1144 } 1145 1146 int 1147 maestro_halt_output(void *hdl) 1148 { 1149 struct maestro_softc *sc = (struct maestro_softc *)hdl; 1150 1151 mtx_enter(&audio_lock); 1152 maestro_channel_stop(&sc->play); 1153 sc->play.mode &= ~MAESTRO_RUNNING; 1154 maestro_update_timer(sc); 1155 mtx_leave(&audio_lock); 1156 return 0; 1157 } 1158 1159 int 1160 maestro_trigger_input(void *hdl, void *start, void *end, int blksize, 1161 void (*intr)(void *), void *arg, struct audio_params *param) 1162 { 1163 struct maestro_softc *sc = (struct maestro_softc *)hdl; 1164 1165 mtx_enter(&audio_lock); 1166 sc->record.mode |= MAESTRO_RUNNING; 1167 sc->record.blocksize = blksize; 1168 1169 maestro_channel_start(&sc->record); 1170 1171 sc->record.threshold = sc->record.start; 1172 maestro_update_timer(sc); 1173 mtx_leave(&audio_lock); 1174 return 0; 1175 } 1176 1177 void 1178 maestro_channel_start(struct maestro_channel *ch) 1179 { 1180 struct maestro_softc *sc = ch->sc; 1181 int n = ch->num; 1182 int aputype; 1183 wcreg_t wcreg = (sc->physaddr - 16) & WAVCACHE_CHCTL_ADDRTAG_MASK; 1184 1185 switch(ch->mode & (MAESTRO_STEREO | MAESTRO_8BIT)) { 1186 case 0: 1187 aputype = APUTYPE_16BITLINEAR; 1188 break; 1189 case MAESTRO_STEREO: 1190 aputype = APUTYPE_16BITSTEREO; 1191 break; 1192 case MAESTRO_8BIT: 1193 aputype = APUTYPE_8BITLINEAR; 1194 break; 1195 case MAESTRO_8BIT|MAESTRO_STEREO: 1196 aputype = APUTYPE_8BITSTEREO; 1197 break; 1198 } 1199 if (ch->mode & MAESTRO_UNSIGNED) 1200 wcreg |= WAVCACHE_CHCTL_U8; 1201 if ((ch->mode & MAESTRO_STEREO) == 0) { 1202 DPRINTF(("Setting mono parameters\n")); 1203 wp_apu_write(sc, n, APUREG_WAVESPACE, ch->wpwa & 0xff00); 1204 wp_apu_write(sc, n, APUREG_CURPTR, ch->current); 1205 wp_apu_write(sc, n, APUREG_ENDPTR, ch->end); 1206 wp_apu_write(sc, n, APUREG_LOOPLEN, ch->end - ch->start); 1207 wp_apu_write(sc, n, APUREG_AMPLITUDE, 0xe800); 1208 wp_apu_write(sc, n, APUREG_POSITION, 0x8f00 1209 | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT) 1210 | (PAN_FRONT << APU_PAN_SHIFT)); 1211 wp_apu_write(sc, n, APUREG_FREQ_LOBYTE, APU_plus6dB 1212 | ((ch->dv & 0xff) << APU_FREQ_LOBYTE_SHIFT)); 1213 wp_apu_write(sc, n, APUREG_FREQ_HIWORD, ch->dv >> 8); 1214 wc_ctrl_write(sc, n, wcreg); 1215 wp_apu_write(sc, n, APUREG_APUTYPE, 1216 (aputype << APU_APUTYPE_SHIFT) | APU_DMA_ENABLED | 0xf); 1217 } else { 1218 wcreg |= WAVCACHE_CHCTL_STEREO; 1219 DPRINTF(("Setting stereo parameters\n")); 1220 wp_apu_write(sc, n+1, APUREG_WAVESPACE, ch->wpwa & 0xff00); 1221 wp_apu_write(sc, n+1, APUREG_CURPTR, ch->current); 1222 wp_apu_write(sc, n+1, APUREG_ENDPTR, ch->end); 1223 wp_apu_write(sc, n+1, APUREG_LOOPLEN, ch->end - ch->start); 1224 wp_apu_write(sc, n+1, APUREG_AMPLITUDE, 0xe800); 1225 wp_apu_write(sc, n+1, APUREG_POSITION, 0x8f00 1226 | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT) 1227 | (PAN_LEFT << APU_PAN_SHIFT)); 1228 wp_apu_write(sc, n+1, APUREG_FREQ_LOBYTE, APU_plus6dB 1229 | ((ch->dv & 0xff) << APU_FREQ_LOBYTE_SHIFT)); 1230 wp_apu_write(sc, n+1, APUREG_FREQ_HIWORD, ch->dv >> 8); 1231 if (ch->mode & MAESTRO_8BIT) 1232 wp_apu_write(sc, n, APUREG_WAVESPACE, 1233 ch->wpwa & 0xff00); 1234 else 1235 wp_apu_write(sc, n, APUREG_WAVESPACE, 1236 (ch->wpwa|(APU_STEREO >> 1)) & 0xff00); 1237 wp_apu_write(sc, n, APUREG_CURPTR, ch->current); 1238 wp_apu_write(sc, n, APUREG_ENDPTR, ch->end); 1239 wp_apu_write(sc, n, APUREG_LOOPLEN, ch->end - ch->start); 1240 wp_apu_write(sc, n, APUREG_AMPLITUDE, 0xe800); 1241 wp_apu_write(sc, n, APUREG_POSITION, 0x8f00 1242 | (RADIUS_CENTERCIRCLE << APU_RADIUS_SHIFT) 1243 | (PAN_RIGHT << APU_PAN_SHIFT)); 1244 wp_apu_write(sc, n, APUREG_FREQ_LOBYTE, APU_plus6dB 1245 | ((ch->dv & 0xff) << APU_FREQ_LOBYTE_SHIFT)); 1246 wp_apu_write(sc, n, APUREG_FREQ_HIWORD, ch->dv >> 8); 1247 wc_ctrl_write(sc, n, wcreg); 1248 wc_ctrl_write(sc, n+1, wcreg); 1249 wp_apu_write(sc, n, APUREG_APUTYPE, 1250 (aputype << APU_APUTYPE_SHIFT) | APU_DMA_ENABLED | 0xf); 1251 wp_apu_write(sc, n+1, APUREG_APUTYPE, 1252 (aputype << APU_APUTYPE_SHIFT) | APU_DMA_ENABLED | 0xf); 1253 } 1254 } 1255 1256 int 1257 maestro_trigger_output(void *hdl, void *start, void *end, int blksize, 1258 void (*intr)(void *), void *arg, struct audio_params *param) 1259 { 1260 struct maestro_softc *sc = (struct maestro_softc *)hdl; 1261 u_int offset = ((caddr_t)start - sc->dmabase) >> 1; 1262 u_int size = ((char *)end - (char *)start) >> 1; 1263 1264 mtx_enter(&audio_lock); 1265 sc->play.mode |= MAESTRO_RUNNING; 1266 sc->play.wpwa = APU_USE_SYSMEM | (offset >> 8); 1267 DPRINTF(("maestro_trigger_output: start=%x, end=%x, blksize=%x ", 1268 start, end, blksize)); 1269 DPRINTF(("offset = %x, size=%x\n", offset, size)); 1270 1271 sc->play.intr = intr; 1272 sc->play.intr_arg = arg; 1273 sc->play.blocksize = blksize; 1274 sc->play.end = offset+size; 1275 sc->play.start = offset; 1276 sc->play.current = sc->play.start; 1277 if ((sc->play.mode & (MAESTRO_STEREO | MAESTRO_8BIT)) == MAESTRO_STEREO) { 1278 sc->play.wpwa >>= 1; 1279 sc->play.start >>= 1; 1280 sc->play.end >>= 1; 1281 sc->play.blocksize >>= 1; 1282 } 1283 maestro_channel_start(&sc->play); 1284 1285 sc->play.threshold = sc->play.start; 1286 maestro_update_timer(sc); 1287 mtx_leave(&audio_lock); 1288 return 0; 1289 } 1290 1291 /* ----------------------------- 1292 * Codec interface 1293 */ 1294 1295 enum ac97_host_flags 1296 maestro_codec_flags(void *self) 1297 { 1298 return AC97_HOST_DONT_READ; 1299 } 1300 1301 int 1302 maestro_read_codec(void *self, u_int8_t regno, u_int16_t *datap) 1303 { 1304 struct maestro_softc *sc = (struct maestro_softc *)self; 1305 int t; 1306 1307 /* We have to wait for a SAFE time to write addr/data */ 1308 for (t = 0; t < 20; t++) { 1309 if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT) 1310 & CODEC_STAT_MASK) != CODEC_STAT_PROGLESS) 1311 break; 1312 DELAY(2); /* 20.8us / 13 */ 1313 } 1314 if (t == 20) 1315 printf("%s: maestro_read_codec() PROGLESS timed out.\n", 1316 sc->dev.dv_xname); 1317 /* XXX return 1 */ 1318 1319 bus_space_write_1(sc->iot, sc->ioh, PORT_CODEC_CMD, 1320 CODEC_CMD_READ | regno); 1321 DELAY(21); /* AC97 cycle = 20.8usec */ 1322 1323 /* Wait for data retrieve */ 1324 for (t = 0; t < 20; t++) { 1325 if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT) 1326 & CODEC_STAT_MASK) == CODEC_STAT_RW_DONE) 1327 break; 1328 DELAY(2); /* 20.8us / 13 */ 1329 } 1330 if (t == 20) 1331 /* Timed out, but perform dummy read. */ 1332 printf("%s: maestro_read_codec() RW_DONE timed out.\n", 1333 sc->dev.dv_xname); 1334 1335 *datap = bus_space_read_2(sc->iot, sc->ioh, PORT_CODEC_REG); 1336 return 0; 1337 } 1338 1339 int 1340 maestro_write_codec(void *self, u_int8_t regno, u_int16_t data) 1341 { 1342 struct maestro_softc *sc = (struct maestro_softc *)self; 1343 int t; 1344 1345 /* We have to wait for a SAFE time to write addr/data */ 1346 for (t = 0; t < 20; t++) { 1347 if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT) 1348 & CODEC_STAT_MASK) != CODEC_STAT_PROGLESS) 1349 break; 1350 DELAY(2); /* 20.8us / 13 */ 1351 } 1352 if (t == 20) { 1353 /* Timed out. Abort writing. */ 1354 printf("%s: maestro_write_codec() PROGLESS timed out.\n", 1355 sc->dev.dv_xname); 1356 return 1; 1357 } 1358 1359 bus_space_write_2(sc->iot, sc->ioh, PORT_CODEC_REG, data); 1360 bus_space_write_1(sc->iot, sc->ioh, PORT_CODEC_CMD, 1361 CODEC_CMD_WRITE | regno); 1362 1363 return 0; 1364 } 1365 1366 int 1367 maestro_attach_codec(void *self, struct ac97_codec_if *cif) 1368 { 1369 struct maestro_softc *sc = (struct maestro_softc *)self; 1370 1371 sc->codec_if = cif; 1372 return 0; 1373 } 1374 1375 void 1376 maestro_reset_codec(void *self UNUSED) 1377 { 1378 } 1379 1380 void 1381 maestro_initcodec(void *self) 1382 { 1383 struct maestro_softc *sc = (struct maestro_softc *)self; 1384 u_int16_t data; 1385 1386 if (bus_space_read_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL) 1387 & RINGBUS_CTRL_ACLINK_ENABLED) { 1388 bus_space_write_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL, 0); 1389 DELAY(104); /* 20.8us * (4 + 1) */ 1390 } 1391 /* XXX - 2nd codec should be looked at. */ 1392 bus_space_write_4(sc->iot, sc->ioh, 1393 PORT_RINGBUS_CTRL, RINGBUS_CTRL_AC97_SWRESET); 1394 DELAY(2); 1395 bus_space_write_4(sc->iot, sc->ioh, 1396 PORT_RINGBUS_CTRL, RINGBUS_CTRL_ACLINK_ENABLED); 1397 DELAY(21); 1398 1399 maestro_read_codec(sc, 0, &data); 1400 if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT) 1401 & CODEC_STAT_MASK) != 0) { 1402 bus_space_write_4(sc->iot, sc->ioh, 1403 PORT_RINGBUS_CTRL, 0); 1404 DELAY(21); 1405 1406 /* Try cold reset. */ 1407 printf("%s: resetting codec\n", sc->dev.dv_xname); 1408 1409 data = bus_space_read_2(sc->iot, sc->ioh, PORT_GPIO_DIR); 1410 if (pci_conf_read(sc->pc, sc->pt, 0x58) & 1) 1411 data |= 0x10; 1412 data |= 0x009 & 1413 ~bus_space_read_2(sc->iot, sc->ioh, PORT_GPIO_DATA); 1414 bus_space_write_2(sc->iot, sc->ioh, 1415 PORT_GPIO_MASK, 0xff6); 1416 bus_space_write_2(sc->iot, sc->ioh, 1417 PORT_GPIO_DIR, data | 0x009); 1418 bus_space_write_2(sc->iot, sc->ioh, 1419 PORT_GPIO_DATA, 0x000); 1420 DELAY(2); 1421 bus_space_write_2(sc->iot, sc->ioh, 1422 PORT_GPIO_DATA, 0x001); 1423 DELAY(1); 1424 bus_space_write_2(sc->iot, sc->ioh, 1425 PORT_GPIO_DATA, 0x009); 1426 DELAY(500000); 1427 bus_space_write_2(sc->iot, sc->ioh, 1428 PORT_GPIO_DIR, data); 1429 DELAY(84); /* 20.8us * 4 */ 1430 bus_space_write_4(sc->iot, sc->ioh, 1431 PORT_RINGBUS_CTRL, RINGBUS_CTRL_ACLINK_ENABLED); 1432 DELAY(21); 1433 } 1434 1435 /* Check the codec to see is still busy */ 1436 if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT) & 1437 CODEC_STAT_MASK) != 0) { 1438 printf("%s: codec failure\n", sc->dev.dv_xname); 1439 } 1440 } 1441 1442 /* ----------------------------- 1443 * Power management interface 1444 */ 1445 1446 int 1447 maestro_activate(struct device *self, int act) 1448 { 1449 struct maestro_softc *sc = (struct maestro_softc *)self; 1450 1451 switch (act) { 1452 case DVACT_SUSPEND: 1453 /* Power down device on shutdown. */ 1454 DPRINTF(("maestro: power down\n")); 1455 if (sc->record.mode & MAESTRO_RUNNING) { 1456 sc->record.current = wp_apu_read(sc, sc->record.num, APUREG_CURPTR); 1457 maestro_channel_stop(&sc->record); 1458 } 1459 if (sc->play.mode & MAESTRO_RUNNING) { 1460 sc->play.current = wp_apu_read(sc, sc->play.num, APUREG_CURPTR); 1461 maestro_channel_stop(&sc->play); 1462 } 1463 1464 wp_stoptimer(sc); 1465 1466 /* Power down everything except clock. */ 1467 bus_space_write_2(sc->iot, sc->ioh, PORT_HOSTINT_CTRL, 0); 1468 maestro_write_codec(sc, AC97_REG_POWER, 0xdf00); 1469 DELAY(20); 1470 bus_space_write_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL, 0); 1471 DELAY(1); 1472 break; 1473 case DVACT_RESUME: 1474 /* Power up device on resume. */ 1475 DPRINTF(("maestro: power resume\n")); 1476 maestro_init(sc); 1477 /* Restore codec settings */ 1478 if (sc->codec_if) 1479 sc->codec_if->vtbl->restore_ports(sc->codec_if); 1480 if (sc->play.mode & MAESTRO_RUNNING) 1481 maestro_channel_start(&sc->play); 1482 if (sc->record.mode & MAESTRO_RUNNING) 1483 maestro_channel_start(&sc->record); 1484 maestro_update_timer(sc); 1485 break; 1486 } 1487 return 0; 1488 } 1489 1490 void 1491 maestro_channel_advance_dma(struct maestro_channel *ch) 1492 { 1493 wpreg_t pos; 1494 #ifdef AUDIO_DEBUG 1495 maestrointr_called++; 1496 #endif 1497 for (;;) { 1498 pos = wp_apu_read(ch->sc, ch->num, APUREG_CURPTR); 1499 /* Are we still processing the current dma block ? */ 1500 if (pos >= ch->threshold && 1501 pos < ch->threshold + ch->blocksize/2) 1502 break; 1503 ch->threshold += ch->blocksize/2; 1504 if (ch->threshold >= ch->end) 1505 ch->threshold = ch->start; 1506 (*ch->intr)(ch->intr_arg); 1507 #ifdef AUDIO_DEBUG 1508 maestrodma_effective++; 1509 #endif 1510 } 1511 1512 #ifdef AUDIO_DEBUG 1513 if (maestrodebug && maestrointr_called % 64 == 0) 1514 printf("maestro: dma advanced %lu for %lu calls\n", 1515 maestrodma_effective, maestrointr_called); 1516 #endif 1517 } 1518 1519 /* Some maestro makes sometimes get desynchronized in stereo mode. */ 1520 void 1521 maestro_channel_suppress_jitter(struct maestro_channel *ch) 1522 { 1523 int cp, diff; 1524 1525 /* Verify that both channels are not too far off. */ 1526 cp = wp_apu_read(ch->sc, ch->num, APUREG_CURPTR); 1527 diff = wp_apu_read(ch->sc, ch->num+1, APUREG_CURPTR) - cp; 1528 if (diff > 4 || diff < -4) 1529 /* Otherwise, directly resynch the 2nd channel. */ 1530 bus_space_write_2(ch->sc->iot, ch->sc->ioh, 1531 PORT_DSP_DATA, cp); 1532 } 1533 1534 /* ----------------------------- 1535 * Interrupt handler interface 1536 */ 1537 int 1538 maestro_intr(void *arg) 1539 { 1540 struct maestro_softc *sc = (struct maestro_softc *)arg; 1541 u_int16_t status; 1542 1543 status = bus_space_read_1(sc->iot, sc->ioh, PORT_HOSTINT_STAT); 1544 if (status == 0) 1545 return 0; /* Not for us? */ 1546 1547 mtx_enter(&audio_lock); 1548 1549 /* Acknowledge all. */ 1550 bus_space_write_2(sc->iot, sc->ioh, PORT_INT_STAT, 1); 1551 bus_space_write_1(sc->iot, sc->ioh, PORT_HOSTINT_STAT, status); 1552 1553 /* Hardware volume support */ 1554 if (status & HOSTINT_STAT_HWVOL && sc->codec_if != NULL) { 1555 int n, i, delta, v; 1556 mixer_ctrl_t hwvol; 1557 1558 n = bus_space_read_1(sc->iot, sc->ioh, PORT_HWVOL_MASTER); 1559 /* Special case: Mute key */ 1560 if (n & 0x11) { 1561 hwvol.type = AUDIO_MIXER_ENUM; 1562 hwvol.dev = 1563 sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if, 1564 AudioCoutputs, AudioNmaster, AudioNmute); 1565 sc->codec_if->vtbl->mixer_get_port(sc->codec_if, &hwvol); 1566 hwvol.un.ord = !hwvol.un.ord; 1567 } else { 1568 hwvol.type = AUDIO_MIXER_VALUE; 1569 hwvol.un.value.num_channels = 2; 1570 hwvol.dev = 1571 sc->codec_if->vtbl->get_portnum_by_name( 1572 sc->codec_if, AudioCoutputs, AudioNmaster, 1573 NULL); 1574 sc->codec_if->vtbl->mixer_get_port(sc->codec_if, &hwvol); 1575 /* XXX AC'97 yields five bits for master volume. */ 1576 delta = (n - MIDDLE_VOLUME)/STEP_VOLUME * 8; 1577 for (i = 0; i < hwvol.un.value.num_channels; i++) { 1578 v = ((int)hwvol.un.value.level[i]) + delta; 1579 if (v < 0) 1580 v = 0; 1581 else if (v > 255) 1582 v = 255; 1583 hwvol.un.value.level[i] = v; 1584 } 1585 } 1586 sc->codec_if->vtbl->mixer_set_port(sc->codec_if, &hwvol); 1587 /* Reset to compute next diffs */ 1588 bus_space_write_1(sc->iot, sc->ioh, PORT_HWVOL_MASTER, 1589 MIDDLE_VOLUME); 1590 } 1591 1592 if (sc->play.mode & MAESTRO_RUNNING) { 1593 maestro_channel_advance_dma(&sc->play); 1594 if (sc->play.mode & MAESTRO_STEREO) 1595 maestro_channel_suppress_jitter(&sc->play); 1596 } 1597 1598 if (sc->record.mode & MAESTRO_RUNNING) 1599 maestro_channel_advance_dma(&sc->record); 1600 1601 mtx_leave(&audio_lock); 1602 return 1; 1603 } 1604 1605 /* ----------------------------- 1606 * Hardware interface 1607 */ 1608 1609 /* Codec/Ringbus */ 1610 1611 void 1612 ringbus_setdest(struct maestro_softc *sc, int src, int dest) 1613 { 1614 u_int32_t data; 1615 1616 data = bus_space_read_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL); 1617 data &= ~(0xfU << src); 1618 data |= (0xfU & dest) << src; 1619 bus_space_write_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL, data); 1620 } 1621 1622 /* Wave Processor */ 1623 1624 wpreg_t 1625 wp_reg_read(struct maestro_softc *sc, int reg) 1626 { 1627 bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_INDEX, reg); 1628 return bus_space_read_2(sc->iot, sc->ioh, PORT_DSP_DATA); 1629 } 1630 1631 void 1632 wp_reg_write(struct maestro_softc *sc, int reg, wpreg_t data) 1633 { 1634 bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_INDEX, reg); 1635 bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_DATA, data); 1636 } 1637 1638 static void 1639 apu_setindex(struct maestro_softc *sc, int reg) 1640 { 1641 int t; 1642 1643 wp_reg_write(sc, WPREG_CRAM_PTR, reg); 1644 /* Sometimes WP fails to set apu register index. */ 1645 for (t = 0; t < 1000; t++) { 1646 if (bus_space_read_2(sc->iot, sc->ioh, 1647 PORT_DSP_DATA) == reg) 1648 break; 1649 bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_DATA, reg); 1650 } 1651 if (t == 1000) 1652 printf("%s: apu_setindex() timeout\n", sc->dev.dv_xname); 1653 } 1654 1655 wpreg_t 1656 wp_apu_read(struct maestro_softc *sc, int ch, int reg) 1657 { 1658 wpreg_t ret; 1659 1660 apu_setindex(sc, ((unsigned)ch << 4) + reg); 1661 ret = wp_reg_read(sc, WPREG_DATA_PORT); 1662 return ret; 1663 } 1664 1665 void 1666 wp_apu_write(struct maestro_softc *sc, int ch, int reg, wpreg_t data) 1667 { 1668 int t; 1669 1670 apu_setindex(sc, ((unsigned)ch << 4) + reg); 1671 wp_reg_write(sc, WPREG_DATA_PORT, data); 1672 for (t = 0; t < 1000; t++) { 1673 if (bus_space_read_2(sc->iot, sc->ioh, PORT_DSP_DATA) == data) 1674 break; 1675 bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_DATA, data); 1676 } 1677 if (t == 1000) 1678 printf("%s: wp_apu_write() timeout\n", sc->dev.dv_xname); 1679 } 1680 1681 void 1682 wp_settimer(struct maestro_softc *sc, u_int freq) 1683 { 1684 u_int clock = 48000 << 2; 1685 u_int prescale = 0, divide = (freq != 0) ? (clock / freq) : ~0; 1686 1687 if (divide < 4) 1688 divide = 4; 1689 else if (divide > 32 << 8) 1690 divide = 32 << 8; 1691 1692 for (; divide > 32 << 1; divide >>= 1) 1693 prescale++; 1694 divide = (divide + 1) >> 1; 1695 1696 for (; prescale < 7 && divide > 2 && !(divide & 1); divide >>= 1) 1697 prescale++; 1698 1699 wp_reg_write(sc, WPREG_TIMER_ENABLE, 0); 1700 wp_reg_write(sc, WPREG_TIMER_FREQ, 1701 (prescale << WP_TIMER_FREQ_PRESCALE_SHIFT) | (divide - 1)); 1702 wp_reg_write(sc, WPREG_TIMER_ENABLE, 1); 1703 } 1704 1705 void 1706 wp_starttimer(struct maestro_softc *sc) 1707 { 1708 wp_reg_write(sc, WPREG_TIMER_START, 1); 1709 } 1710 1711 void 1712 wp_stoptimer(struct maestro_softc *sc) 1713 { 1714 wp_reg_write(sc, WPREG_TIMER_START, 0); 1715 bus_space_write_2(sc->iot, sc->ioh, PORT_INT_STAT, 1); 1716 } 1717 1718 /* WaveCache */ 1719 1720 wcreg_t 1721 wc_reg_read(struct maestro_softc *sc, int reg) 1722 { 1723 bus_space_write_2(sc->iot, sc->ioh, PORT_WAVCACHE_INDEX, reg); 1724 return bus_space_read_2(sc->iot, sc->ioh, PORT_WAVCACHE_DATA); 1725 } 1726 1727 void 1728 wc_reg_write(struct maestro_softc *sc, int reg, wcreg_t data) 1729 { 1730 bus_space_write_2(sc->iot, sc->ioh, PORT_WAVCACHE_INDEX, reg); 1731 bus_space_write_2(sc->iot, sc->ioh, PORT_WAVCACHE_DATA, data); 1732 } 1733 1734 u_int16_t 1735 wc_ctrl_read(struct maestro_softc *sc, int ch) 1736 { 1737 return wc_reg_read(sc, ch << 3); 1738 } 1739 1740 void 1741 wc_ctrl_write(struct maestro_softc *sc, int ch, wcreg_t data) 1742 { 1743 wc_reg_write(sc, ch << 3, data); 1744 } 1745 1746 /* ----------------------------- 1747 * Simple zone allocator. 1748 * (All memory allocated in advance) 1749 */ 1750 1751 salloc_t 1752 salloc_new(caddr_t addr, size_t size, int nzones) 1753 { 1754 struct salloc_pool *pool; 1755 struct salloc_zone *space; 1756 int i; 1757 1758 pool = malloc(sizeof *pool + nzones * sizeof pool->zones[0], 1759 M_TEMP, M_NOWAIT); 1760 if (pool == NULL) 1761 return NULL; 1762 SLIST_INIT(&pool->free); 1763 SLIST_INIT(&pool->used); 1764 SLIST_INIT(&pool->spare); 1765 /* Espie says the following line is obvious */ 1766 pool->zones = (struct salloc_zone *)(pool + 1); 1767 for (i = 1; i < nzones; i++) 1768 SLIST_INSERT_HEAD(&pool->spare, &pool->zones[i], link); 1769 space = &pool->zones[0]; 1770 space->addr = addr; 1771 space->size = size; 1772 SLIST_INSERT_HEAD(&pool->free, space, link); 1773 return pool; 1774 } 1775 1776 void 1777 salloc_destroy(salloc_t pool) 1778 { 1779 free(pool, M_TEMP, 0); 1780 } 1781 1782 void 1783 salloc_insert(salloc_t pool, struct salloc_head *head, struct salloc_zone *zone, 1784 int merge) 1785 { 1786 struct salloc_zone *prev, *next; 1787 1788 /* 1789 * Insert a zone into an ordered list of zones, possibly 1790 * merging adjacent zones. 1791 */ 1792 prev = NULL; 1793 SLIST_FOREACH(next, head, link) { 1794 if (next->addr > zone->addr) 1795 break; 1796 prev = next; 1797 } 1798 1799 if (merge && prev && prev->addr + prev->size == zone->addr) { 1800 prev->size += zone->size; 1801 SLIST_INSERT_HEAD(&pool->spare, zone, link); 1802 zone = prev; 1803 } else if (prev) 1804 SLIST_INSERT_AFTER(prev, zone, link); 1805 else 1806 SLIST_INSERT_HEAD(head, zone, link); 1807 if (merge && next && zone->addr + zone->size == next->addr) { 1808 zone->size += next->size; 1809 SLIST_REMOVE(head, next, salloc_zone, link); 1810 SLIST_INSERT_HEAD(&pool->spare, next, link); 1811 } 1812 } 1813 1814 caddr_t 1815 salloc_alloc(salloc_t pool, size_t size) 1816 { 1817 struct salloc_zone *zone, *uzone; 1818 1819 SLIST_FOREACH(zone, &pool->free, link) 1820 if (zone->size >= size) 1821 break; 1822 if (zone == SLIST_END(&pool->free)) 1823 return NULL; 1824 if (zone->size == size) { 1825 SLIST_REMOVE(&pool->free, zone, salloc_zone, link); 1826 uzone = zone; 1827 } else { 1828 uzone = SLIST_FIRST(&pool->spare); 1829 if (uzone == NULL) 1830 return NULL; /* XXX */ 1831 SLIST_REMOVE_HEAD(&pool->spare, link); 1832 uzone->size = size; 1833 uzone->addr = zone->addr; 1834 zone->size -= size; 1835 zone->addr += size; 1836 } 1837 salloc_insert(pool, &pool->used, uzone, 0); 1838 return uzone->addr; 1839 } 1840 1841 void 1842 salloc_free(salloc_t pool, caddr_t addr) 1843 { 1844 struct salloc_zone *zone; 1845 1846 SLIST_FOREACH(zone, &pool->used, link) 1847 if (zone->addr == addr) 1848 break; 1849 #ifdef DIAGNOSTIC 1850 if (zone == SLIST_END(&pool->used)) 1851 panic("salloc_free: freeing unallocated memory"); 1852 #endif 1853 SLIST_REMOVE(&pool->used, zone, salloc_zone, link); 1854 salloc_insert(pool, &pool->free, zone, 1); 1855 } 1856