1 /* $OpenBSD: kate.c,v 1.5 2009/01/26 15:07:49 kettenis Exp $ */ 2 3 /* 4 * Copyright (c) 2008 Constantine A. Murenin <cnst+openbsd@bugmail.mojo.ru> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/param.h> 20 #include <sys/systm.h> 21 #include <sys/device.h> 22 #include <sys/sensors.h> 23 24 #include <machine/bus.h> 25 26 #include <dev/pci/pcireg.h> 27 #include <dev/pci/pcivar.h> 28 #include <dev/pci/pcidevs.h> 29 30 31 /* 32 * AMD NPT Family 0Fh Processors, Function 3 -- Miscellaneous Control 33 */ 34 35 /* Function 3 Registers */ 36 #define K_THERMTRIP_STAT_R 0xe4 37 #define K_NORTHBRIDGE_CAP_R 0xe8 38 #define K_CPUID_FAMILY_MODEL_R 0xfc 39 40 /* Bits within Thermtrip Status Register */ 41 #define K_THERM_SENSE_SEL (1 << 6) 42 #define K_THERM_SENSE_CORE_SEL (1 << 2) 43 44 /* Flip core and sensor selection bits */ 45 #define K_T_SEL_C0(v) (v |= K_THERM_SENSE_CORE_SEL) 46 #define K_T_SEL_C1(v) (v &= ~(K_THERM_SENSE_CORE_SEL)) 47 #define K_T_SEL_S0(v) (v &= ~(K_THERM_SENSE_SEL)) 48 #define K_T_SEL_S1(v) (v |= K_THERM_SENSE_SEL) 49 50 51 /* 52 * Revision Guide for AMD NPT Family 0Fh Processors, 53 * Publication # 33610, Revision 3.30, February 2008 54 */ 55 static const struct { 56 const char rev[5]; 57 const pcireg_t cpuid[5]; 58 } kate_proc[] = { 59 { "BH-F", { 0x00040FB0, 0x00040F80, 0, 0, 0 } }, /* F2 */ 60 { "DH-F", { 0x00040FF0, 0x00050FF0, 0x00040FC0, 0, 0 } }, /* F2, F3 */ 61 { "JH-F", { 0x00040F10, 0x00040F30, 0x000C0F10, 0, 0 } }, /* F2, F3 */ 62 { "BH-G", { 0x00060FB0, 0x00060F80, 0, 0, 0 } }, /* G1, G2 */ 63 { "DH-G", { 0x00070FF0, 0x00060FF0, 64 0x00060FC0, 0x00070FC0, 0 } } /* G1, G2 */ 65 }; 66 67 68 struct kate_softc { 69 struct device sc_dev; 70 71 pci_chipset_tag_t sc_pc; 72 pcitag_t sc_pcitag; 73 74 struct ksensor sc_sensors[4]; 75 struct ksensordev sc_sensordev; 76 77 char sc_rev; 78 int8_t sc_numsensors; 79 }; 80 81 int kate_match(struct device *, void *, void *); 82 void kate_attach(struct device *, struct device *, void *); 83 void kate_refresh(void *); 84 85 struct cfattach kate_ca = { 86 sizeof(struct kate_softc), kate_match, kate_attach 87 }; 88 89 struct cfdriver kate_cd = { 90 NULL, "kate", DV_DULL 91 }; 92 93 94 int 95 kate_match(struct device *parent, void *match, void *aux) 96 { 97 struct pci_attach_args *pa = aux; 98 #ifndef KATE_STRICT 99 struct kate_softc ks; 100 struct kate_softc *sc = &ks; 101 #endif /* !KATE_STRICT */ 102 pcireg_t c; 103 int i, j; 104 105 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_AMD || 106 PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_AMD_AMD64_0F_MISC) 107 return 0; 108 109 /* 110 * First, let's probe for chips at or after Revision F, which is 111 * when the temperature readings were officially introduced. 112 */ 113 c = pci_conf_read(pa->pa_pc, pa->pa_tag, K_CPUID_FAMILY_MODEL_R); 114 for (i = 0; i < sizeof(kate_proc) / sizeof(kate_proc[0]); i++) 115 for (j = 0; kate_proc[i].cpuid[j] != 0; j++) 116 if ((c & ~0xf) == kate_proc[i].cpuid[j]) 117 return 2; /* supersede pchb(4) */ 118 119 #ifndef KATE_STRICT 120 /* 121 * If the probe above was not successful, let's try to actually 122 * read the sensors from the chip, and see if they make any sense. 123 */ 124 sc->sc_numsensors = 4; 125 sc->sc_pc = pa->pa_pc; 126 sc->sc_pcitag = pa->pa_tag; 127 kate_refresh(sc); 128 for (i = 0; i < sc->sc_numsensors; i++) 129 if (!(sc->sc_sensors[i].flags & SENSOR_FINVALID)) 130 return 2; /* supersede pchb(4) */ 131 #endif /* !KATE_STRICT */ 132 133 return 0; 134 } 135 136 void 137 kate_attach(struct device *parent, struct device *self, void *aux) 138 { 139 struct kate_softc *sc = (struct kate_softc *)self; 140 struct pci_attach_args *pa = aux; 141 pcireg_t c, d; 142 int i, j, cmpcap; 143 144 c = pci_conf_read(pa->pa_pc, pa->pa_tag, K_CPUID_FAMILY_MODEL_R); 145 for (i = 0; i < sizeof(kate_proc) / sizeof(kate_proc[0]) && 146 sc->sc_rev == '\0'; i++) 147 for (j = 0; kate_proc[i].cpuid[j] != 0; j++) 148 if ((c & ~0xf) == kate_proc[i].cpuid[j]) { 149 sc->sc_rev = kate_proc[i].rev[3]; 150 printf(": core rev %.4s%.1x", 151 kate_proc[i].rev, c & 0xf); 152 } 153 154 if (c != 0x0 && sc->sc_rev == '\0') { 155 /* CPUID Family Model Register was introduced in Revision F */ 156 sc->sc_rev = 'G'; /* newer than E, assume G */ 157 printf(": cpuid 0x%x", c); 158 } 159 160 d = pci_conf_read(pa->pa_pc, pa->pa_tag, K_NORTHBRIDGE_CAP_R); 161 cmpcap = (d >> 12) & 0x3; 162 163 sc->sc_pc = pa->pa_pc; 164 sc->sc_pcitag = pa->pa_tag; 165 166 #ifndef KATE_STRICT 167 sc->sc_numsensors = 4; 168 kate_refresh(sc); 169 if (cmpcap == 0 && 170 (sc->sc_sensors[2].flags & SENSOR_FINVALID) && 171 (sc->sc_sensors[3].flags & SENSOR_FINVALID)) 172 sc->sc_numsensors = 2; 173 #else 174 sc->sc_numsensors = cmpcap ? 4 : 2; 175 #endif /* !KATE_STRICT */ 176 177 strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname, 178 sizeof(sc->sc_sensordev.xname)); 179 180 for (i = 0; i < sc->sc_numsensors; i++) { 181 sc->sc_sensors[i].type = SENSOR_TEMP; 182 sensor_attach(&sc->sc_sensordev, &sc->sc_sensors[i]); 183 } 184 185 if (sensor_task_register(sc, kate_refresh, 5) == NULL) { 186 printf(": unable to register update task\n"); 187 return; 188 } 189 190 sensordev_install(&sc->sc_sensordev); 191 192 printf("\n"); 193 } 194 195 void 196 kate_refresh(void *arg) 197 { 198 struct kate_softc *sc = arg; 199 struct ksensor *s = sc->sc_sensors; 200 int8_t n = sc->sc_numsensors; 201 pcireg_t t, m; 202 int i, v; 203 204 t = pci_conf_read(sc->sc_pc, sc->sc_pcitag, K_THERMTRIP_STAT_R); 205 206 for (i = 0; i < n; i++) { 207 switch(i) { 208 case 0: 209 K_T_SEL_C0(t); 210 K_T_SEL_S0(t); 211 break; 212 case 1: 213 K_T_SEL_C0(t); 214 K_T_SEL_S1(t); 215 break; 216 case 2: 217 K_T_SEL_C1(t); 218 K_T_SEL_S0(t); 219 break; 220 case 3: 221 K_T_SEL_C1(t); 222 K_T_SEL_S1(t); 223 break; 224 } 225 m = t & (K_THERM_SENSE_CORE_SEL | K_THERM_SENSE_SEL); 226 pci_conf_write(sc->sc_pc, sc->sc_pcitag, K_THERMTRIP_STAT_R, t); 227 t = pci_conf_read(sc->sc_pc, sc->sc_pcitag, K_THERMTRIP_STAT_R); 228 v = 0x3ff & (t >> 14); 229 #ifdef KATE_STRICT 230 if (sc->sc_rev != 'G') 231 v &= ~0x3; 232 #endif /* KATE_STRICT */ 233 if ((t & (K_THERM_SENSE_CORE_SEL | K_THERM_SENSE_SEL)) == m && 234 (v & ~0x3) != 0) 235 s[i].flags &= ~SENSOR_FINVALID; 236 else 237 s[i].flags |= SENSOR_FINVALID; 238 s[i].value = (v * 250000 - 49000000) + 273150000; 239 } 240 } 241