1 /******************************************************************************* 2 3 Copyright (c) 2001-2005, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 *******************************************************************************/ 33 34 /* $OpenBSD: ixgb_ee.c,v 1.2 2007/06/26 10:30:05 tom Exp $ */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/sockio.h> 39 #include <sys/mbuf.h> 40 #include <sys/malloc.h> 41 #include <sys/kernel.h> 42 #include <sys/device.h> 43 #include <sys/socket.h> 44 45 #include <net/if.h> 46 #include <net/if_dl.h> 47 #include <net/if_media.h> 48 49 #ifdef INET 50 #include <netinet/in.h> 51 #include <netinet/in_systm.h> 52 #include <netinet/in_var.h> 53 #include <netinet/ip.h> 54 #include <netinet/if_ether.h> 55 #endif 56 57 #include <uvm/uvm_extern.h> 58 59 #include <dev/pci/pcireg.h> 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcidevs.h> 62 63 #include <dev/pci/ixgb_hw.h> 64 #include <dev/pci/ixgb_ee.h> 65 66 /* Local prototypes */ 67 static uint16_t ixgb_shift_in_bits(struct ixgb_hw *hw); 68 69 static void ixgb_shift_out_bits(struct ixgb_hw *hw, uint16_t data, 70 uint16_t count); 71 static void ixgb_standby_eeprom(struct ixgb_hw *hw); 72 73 static boolean_t ixgb_wait_eeprom_command(struct ixgb_hw *hw); 74 75 static void ixgb_cleanup_eeprom(struct ixgb_hw *hw); 76 77 /****************************************************************************** 78 * Raises the EEPROM's clock input. 79 * 80 * hw - Struct containing variables accessed by shared code 81 * eecd_reg - EECD's current value 82 *****************************************************************************/ 83 static void 84 ixgb_raise_clock(struct ixgb_hw *hw, uint32_t *eecd_reg) 85 { 86 /* Raise the clock input to the EEPROM (by setting the SK bit), and 87 * then wait 50 microseconds. */ 88 *eecd_reg = *eecd_reg | IXGB_EECD_SK; 89 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 90 usec_delay(50); 91 return; 92 } 93 94 /****************************************************************************** 95 * Lowers the EEPROM's clock input. 96 * 97 * hw - Struct containing variables accessed by shared code 98 * eecd_reg - EECD's current value 99 *****************************************************************************/ 100 static void 101 ixgb_lower_clock(struct ixgb_hw *hw, uint32_t *eecd_reg) 102 { 103 /* Lower the clock input to the EEPROM (by clearing the SK bit), and 104 * then wait 50 microseconds. */ 105 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; 106 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 107 usec_delay(50); 108 return; 109 } 110 111 /****************************************************************************** 112 * Shift data bits out to the EEPROM. 113 * 114 * hw - Struct containing variables accessed by shared code 115 * data - data to send to the EEPROM 116 * count - number of bits to shift out 117 *****************************************************************************/ 118 static void 119 ixgb_shift_out_bits(struct ixgb_hw *hw, uint16_t data, uint16_t count) 120 { 121 uint32_t eecd_reg; 122 uint32_t mask; 123 124 /* We need to shift "count" bits out to the EEPROM. So, value in the 125 * "data" parameter will be shifted out to the EEPROM one bit at a 126 * time. In order to do this, "data" must be broken down into bits. */ 127 mask = 0x01 << (count - 1); 128 eecd_reg = IXGB_READ_REG(hw, EECD); 129 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 130 do { 131 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a 132 * "1", and then raising and then lowering the clock (the SK 133 * bit controls the clock input to the EEPROM). A "0" is 134 * shifted out to the EEPROM by setting "DI" to "0" and then 135 * raising and then lowering the clock. */ 136 eecd_reg &= ~IXGB_EECD_DI; 137 138 if(data & mask) 139 eecd_reg |= IXGB_EECD_DI; 140 141 IXGB_WRITE_REG(hw, EECD, eecd_reg); 142 143 usec_delay(50); 144 145 ixgb_raise_clock(hw, &eecd_reg); 146 ixgb_lower_clock(hw, &eecd_reg); 147 148 mask = mask >> 1; 149 150 } while(mask); 151 152 /* We leave the "DI" bit set to "0" when we leave this routine. */ 153 eecd_reg &= ~IXGB_EECD_DI; 154 IXGB_WRITE_REG(hw, EECD, eecd_reg); 155 return; 156 } 157 158 /****************************************************************************** 159 * Shift data bits in from the EEPROM 160 * 161 * hw - Struct containing variables accessed by shared code 162 *****************************************************************************/ 163 static uint16_t 164 ixgb_shift_in_bits(struct ixgb_hw *hw) 165 { 166 uint32_t eecd_reg; 167 uint32_t i; 168 uint16_t data; 169 170 /* In order to read a register from the EEPROM, we need to shift 16 171 * bits in from the EEPROM. Bits are "shifted in" by raising the clock 172 * input to the EEPROM (setting the SK bit), and then reading the value 173 * of the "DO" bit. During this "shifting in" process the "DI" bit 174 * should always be clear.. */ 175 176 eecd_reg = IXGB_READ_REG(hw, EECD); 177 178 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 179 data = 0; 180 181 for(i = 0; i < 16; i++) { 182 data = data << 1; 183 ixgb_raise_clock(hw, &eecd_reg); 184 185 eecd_reg = IXGB_READ_REG(hw, EECD); 186 187 eecd_reg &= ~(IXGB_EECD_DI); 188 if(eecd_reg & IXGB_EECD_DO) 189 data |= 1; 190 191 ixgb_lower_clock(hw, &eecd_reg); 192 } 193 194 return data; 195 } 196 197 /****************************************************************************** 198 * Prepares EEPROM for access 199 * 200 * hw - Struct containing variables accessed by shared code 201 * 202 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This 203 * function should be called before issuing a command to the EEPROM. 204 *****************************************************************************/ 205 static void 206 ixgb_setup_eeprom(struct ixgb_hw *hw) 207 { 208 uint32_t eecd_reg; 209 210 eecd_reg = IXGB_READ_REG(hw, EECD); 211 212 /* Clear SK and DI */ 213 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI); 214 IXGB_WRITE_REG(hw, EECD, eecd_reg); 215 216 /* Set CS */ 217 eecd_reg |= IXGB_EECD_CS; 218 IXGB_WRITE_REG(hw, EECD, eecd_reg); 219 return; 220 } 221 222 /****************************************************************************** 223 * Returns EEPROM to a "standby" state 224 * 225 * hw - Struct containing variables accessed by shared code 226 *****************************************************************************/ 227 static void 228 ixgb_standby_eeprom(struct ixgb_hw *hw) 229 { 230 uint32_t eecd_reg; 231 232 eecd_reg = IXGB_READ_REG(hw, EECD); 233 234 /* Deselct EEPROM */ 235 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK); 236 IXGB_WRITE_REG(hw, EECD, eecd_reg); 237 usec_delay(50); 238 239 /* Clock high */ 240 eecd_reg |= IXGB_EECD_SK; 241 IXGB_WRITE_REG(hw, EECD, eecd_reg); 242 usec_delay(50); 243 244 /* Select EEPROM */ 245 eecd_reg |= IXGB_EECD_CS; 246 IXGB_WRITE_REG(hw, EECD, eecd_reg); 247 usec_delay(50); 248 249 /* Clock low */ 250 eecd_reg &= ~IXGB_EECD_SK; 251 IXGB_WRITE_REG(hw, EECD, eecd_reg); 252 usec_delay(50); 253 return; 254 } 255 256 /****************************************************************************** 257 * Raises then lowers the EEPROM's clock pin 258 * 259 * hw - Struct containing variables accessed by shared code 260 *****************************************************************************/ 261 static void 262 ixgb_clock_eeprom(struct ixgb_hw *hw) 263 { 264 uint32_t eecd_reg; 265 266 eecd_reg = IXGB_READ_REG(hw, EECD); 267 268 /* Rising edge of clock */ 269 eecd_reg |= IXGB_EECD_SK; 270 IXGB_WRITE_REG(hw, EECD, eecd_reg); 271 usec_delay(50); 272 273 /* Falling edge of clock */ 274 eecd_reg &= ~IXGB_EECD_SK; 275 IXGB_WRITE_REG(hw, EECD, eecd_reg); 276 usec_delay(50); 277 return; 278 } 279 280 /****************************************************************************** 281 * Terminates a command by lowering the EEPROM's chip select pin 282 * 283 * hw - Struct containing variables accessed by shared code 284 *****************************************************************************/ 285 static void 286 ixgb_cleanup_eeprom(struct ixgb_hw *hw) 287 { 288 uint32_t eecd_reg; 289 290 eecd_reg = IXGB_READ_REG(hw, EECD); 291 292 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI); 293 294 IXGB_WRITE_REG(hw, EECD, eecd_reg); 295 296 ixgb_clock_eeprom(hw); 297 return; 298 } 299 300 /****************************************************************************** 301 * Waits for the EEPROM to finish the current command. 302 * 303 * hw - Struct containing variables accessed by shared code 304 * 305 * The command is done when the EEPROM's data out pin goes high. 306 * 307 * Returns: 308 * TRUE: EEPROM data pin is high before timeout. 309 * FALSE: Time expired. 310 *****************************************************************************/ 311 static boolean_t 312 ixgb_wait_eeprom_command(struct ixgb_hw *hw) 313 { 314 uint32_t eecd_reg; 315 uint32_t i; 316 317 /* Toggle the CS line. This in effect tells to EEPROM to actually 318 * execute the command in question. */ 319 ixgb_standby_eeprom(hw); 320 321 /* Now read DO repeatedly until is high (equal to '1'). The EEEPROM 322 * will signal that the command has been completed by raising the DO 323 * signal. If DO does not go high in 10 milliseconds, then error out. */ 324 for(i = 0; i < 200; i++) { 325 eecd_reg = IXGB_READ_REG(hw, EECD); 326 327 if(eecd_reg & IXGB_EECD_DO) 328 return (TRUE); 329 330 usec_delay(50); 331 } 332 ASSERT(0); 333 return (FALSE); 334 } 335 336 /****************************************************************************** 337 * Verifies that the EEPROM has a valid checksum 338 * 339 * hw - Struct containing variables accessed by shared code 340 * 341 * Reads the first 64 16 bit words of the EEPROM and sums the values read. 342 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is 343 * valid. 344 * 345 * Returns: 346 * TRUE: Checksum is valid 347 * FALSE: Checksum is not valid. 348 *****************************************************************************/ 349 boolean_t 350 ixgb_validate_eeprom_checksum(struct ixgb_hw *hw) 351 { 352 uint16_t checksum = 0; 353 uint16_t i; 354 355 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) 356 checksum += ixgb_read_eeprom(hw, i); 357 358 if(checksum == (uint16_t)EEPROM_SUM) 359 return (TRUE); 360 else 361 return (FALSE); 362 } 363 364 /****************************************************************************** 365 * Calculates the EEPROM checksum and writes it to the EEPROM 366 * 367 * hw - Struct containing variables accessed by shared code 368 * 369 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA. 370 * Writes the difference to word offset 63 of the EEPROM. 371 *****************************************************************************/ 372 void 373 ixgb_update_eeprom_checksum(struct ixgb_hw *hw) 374 { 375 uint16_t checksum = 0; 376 uint16_t i; 377 378 for(i = 0; i < EEPROM_CHECKSUM_REG; i++) 379 checksum += ixgb_read_eeprom(hw, i); 380 381 checksum = (uint16_t)EEPROM_SUM - checksum; 382 383 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); 384 return; 385 } 386 387 /****************************************************************************** 388 * Writes a 16 bit word to a given offset in the EEPROM. 389 * 390 * hw - Struct containing variables accessed by shared code 391 * reg - offset within the EEPROM to be written to 392 * data - 16 bit word to be writen to the EEPROM 393 * 394 * If ixgb_update_eeprom_checksum is not called after this function, the 395 * EEPROM will most likely contain an invalid checksum. 396 * 397 *****************************************************************************/ 398 void 399 ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data) 400 { 401 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 402 403 /* Prepare the EEPROM for writing */ 404 ixgb_setup_eeprom(hw); 405 406 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit 407 * opcode plus 4-bit dummy). This puts the EEPROM into write/erase 408 * mode. */ 409 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5); 410 ixgb_shift_out_bits(hw, 0, 4); 411 412 /* Prepare the EEPROM */ 413 ixgb_standby_eeprom(hw); 414 415 /* Send the Write command (3-bit opcode + 6-bit addr) */ 416 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3); 417 ixgb_shift_out_bits(hw, offset, 6); 418 419 /* Send the data */ 420 ixgb_shift_out_bits(hw, data, 16); 421 422 ixgb_wait_eeprom_command(hw); 423 424 /* Recover from write */ 425 ixgb_standby_eeprom(hw); 426 427 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit 428 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase 429 * mode. */ 430 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5); 431 ixgb_shift_out_bits(hw, 0, 4); 432 433 /* Done with writing */ 434 ixgb_cleanup_eeprom(hw); 435 436 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ 437 ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR); 438 439 return; 440 } 441 442 /****************************************************************************** 443 * Reads a 16 bit word from the EEPROM. 444 * 445 * hw - Struct containing variables accessed by shared code 446 * offset - offset of 16 bit word in the EEPROM to read 447 * 448 * Returns: 449 * The 16-bit value read from the eeprom 450 *****************************************************************************/ 451 uint16_t 452 ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t offset) 453 { 454 uint16_t data; 455 456 /* Prepare the EEPROM for reading */ 457 ixgb_setup_eeprom(hw); 458 459 /* Send the READ command (opcode + addr) */ 460 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3); 461 /* 462 * We have a 64 word EEPROM, there are 6 address bits 463 */ 464 ixgb_shift_out_bits(hw, offset, 6); 465 466 /* Read the data */ 467 data = ixgb_shift_in_bits(hw); 468 469 /* End this read operation */ 470 ixgb_standby_eeprom(hw); 471 472 return (data); 473 } 474 475 /****************************************************************************** 476 * Reads eeprom and stores data in shared structure. 477 * Validates eeprom checksum and eeprom signature. 478 * 479 * hw - Struct containing variables accessed by shared code 480 * 481 * Returns: 482 * TRUE: if eeprom read is successful 483 * FALSE: otherwise. 484 *****************************************************************************/ 485 boolean_t 486 ixgb_get_eeprom_data(struct ixgb_hw *hw) 487 { 488 uint16_t i; 489 uint16_t checksum = 0; 490 struct ixgb_ee_map_type *ee_map; 491 492 DEBUGFUNC("ixgb_get_eeprom_data"); 493 494 ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 495 496 DEBUGOUT("ixgb_ee: Reading eeprom data\n"); 497 for(i = 0; i < IXGB_EEPROM_SIZE; i++) { 498 uint16_t ee_data; 499 500 ee_data = ixgb_read_eeprom(hw, i); 501 checksum += ee_data; 502 hw->eeprom[i] = le16_to_cpu(ee_data); 503 } 504 505 if(checksum != (uint16_t)EEPROM_SUM) { 506 DEBUGOUT("ixgb_ee: Checksum invalid.\n"); 507 /* clear the init_ctrl_reg_1 to signify that the cache is 508 * invalidated */ 509 ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR); 510 return (FALSE); 511 } 512 513 if((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK)) 514 != le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) { 515 DEBUGOUT("ixgb_ee: Signature invalid.\n"); 516 return (FALSE); 517 } 518 519 return (TRUE); 520 } 521 522 /****************************************************************************** 523 * Local function to check if the eeprom signature is good 524 * If the eeprom signature is good, calls ixgb)get_eeprom_data. 525 * 526 * hw - Struct containing variables accessed by shared code 527 * 528 * Returns: 529 * TRUE: eeprom signature was good and the eeprom read was successful 530 * FALSE: otherwise. 531 ******************************************************************************/ 532 static boolean_t 533 ixgb_check_and_get_eeprom_data(struct ixgb_hw *hw) 534 { 535 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 536 537 if((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK)) 538 == le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) { 539 return (TRUE); 540 } else { 541 return ixgb_get_eeprom_data(hw); 542 } 543 } 544 545 /****************************************************************************** 546 * return a word from the eeprom 547 * 548 * hw - Struct containing variables accessed by shared code 549 * index - Offset of eeprom word 550 * 551 * Returns: 552 * Word at indexed offset in eeprom, if valid, 0 otherwise. 553 ******************************************************************************/ 554 uint16_t 555 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index) 556 { 557 558 if((index < IXGB_EEPROM_SIZE) && 559 (ixgb_check_and_get_eeprom_data(hw) == TRUE)) { 560 return (hw->eeprom[index]); 561 } 562 563 return (0); 564 } 565 566 /****************************************************************************** 567 * return the mac address from EEPROM 568 * 569 * hw - Struct containing variables accessed by shared code 570 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise 571 * 572 * Returns: None. 573 ******************************************************************************/ 574 void 575 ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr) 576 { 577 int i; 578 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 579 580 DEBUGFUNC("ixgb_get_ee_mac_addr"); 581 582 if(ixgb_check_and_get_eeprom_data(hw) == TRUE) { 583 for(i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) { 584 mac_addr[i] = ee_map->mac_addr[i]; 585 DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]); 586 } 587 } 588 } 589 590 591 /****************************************************************************** 592 * return the Printed Board Assembly number from EEPROM 593 * 594 * hw - Struct containing variables accessed by shared code 595 * 596 * Returns: 597 * PBA number if EEPROM contents are valid, 0 otherwise 598 ******************************************************************************/ 599 uint32_t 600 ixgb_get_ee_pba_number(struct ixgb_hw *hw) 601 { 602 if(ixgb_check_and_get_eeprom_data(hw) == TRUE) 603 return (le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG]) 604 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG]) << 16)); 605 606 return (0); 607 } 608 609 610 /****************************************************************************** 611 * return the Device Id from EEPROM 612 * 613 * hw - Struct containing variables accessed by shared code 614 * 615 * Returns: 616 * Device Id if EEPROM contents are valid, 0 otherwise 617 ******************************************************************************/ 618 uint16_t 619 ixgb_get_ee_device_id(struct ixgb_hw *hw) 620 { 621 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 622 623 if(ixgb_check_and_get_eeprom_data(hw) == TRUE) 624 return (le16_to_cpu(ee_map->device_id)); 625 626 return (0); 627 } 628 629