1 /* $OpenBSD: if_xl_pci.c,v 1.16 2003/06/29 16:39:02 jason Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: if_xl.c,v 1.72 2000/01/09 21:12:59 wpaul Exp $ 35 */ 36 37 #include "bpfilter.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/protosw.h> 43 #include <sys/socket.h> 44 #include <sys/ioctl.h> 45 #include <sys/errno.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/proc.h> /* only for declaration of wakeup() used by vm.h */ 49 #include <sys/device.h> 50 51 #include <net/if.h> 52 #include <net/if_dl.h> 53 #include <net/if_types.h> 54 #include <net/if_media.h> 55 56 #ifdef INET 57 #include <netinet/in.h> 58 #include <netinet/in_systm.h> 59 #include <netinet/in_var.h> 60 #include <netinet/ip.h> 61 #include <netinet/if_ether.h> 62 #endif 63 64 #include <dev/mii/mii.h> 65 #include <dev/mii/miivar.h> 66 #include <dev/pci/pcireg.h> 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/pcidevs.h> 69 70 #if NBPFILTER > 0 71 #include <net/bpf.h> 72 #endif 73 74 #include <uvm/uvm_extern.h> /* for vtophys */ 75 76 /* 77 * The following #define causes the code to use PIO to access the 78 * chip's registers instead of memory mapped mode. The reason PIO mode 79 * is on by default is that the Etherlink XL manual seems to indicate 80 * that only the newer revision chips (3c905B) support both PIO and 81 * memory mapped access. Since we want to be compatible with the older 82 * bus master chips, we use PIO here. If you comment this out, the 83 * driver will use memory mapped I/O, which may be faster but which 84 * might not work on some devices. 85 */ 86 #define XL_USEIOSPACE 87 88 #define XL_PCI_FUNCMEM 0x0018 89 #define XL_PCI_INTR 0x0004 90 #define XL_PCI_INTRACK 0x8000 91 92 #include <dev/ic/xlreg.h> 93 94 int xl_pci_match(struct device *, void *, void *); 95 void xl_pci_attach(struct device *, struct device *, void *); 96 void xl_pci_intr_ack(struct xl_softc *); 97 98 struct cfattach xl_pci_ca = { 99 sizeof(struct xl_softc), xl_pci_match, xl_pci_attach, 100 }; 101 102 const struct pci_matchid xl_pci_devices[] = { 103 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSOHO100TX }, 104 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900TPO }, 105 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900COMBO }, 106 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900B }, 107 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BCOMBO }, 108 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BTPC }, 109 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BFL }, 110 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905TX }, 111 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905T4 }, 112 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BTX }, 113 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BT4 }, 114 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BCOMBO }, 115 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BFX }, 116 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980TX }, 117 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980CTX }, 118 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905CTX }, 119 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C450 }, 120 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C555 }, 121 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556 }, 122 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556B }, 123 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C9201 }, 124 }; 125 126 int 127 xl_pci_match(parent, match, aux) 128 struct device *parent; 129 void *match; 130 void *aux; 131 { 132 return (pci_matchbyid((struct pci_attach_args *)aux, xl_pci_devices, 133 sizeof(xl_pci_devices)/sizeof(xl_pci_devices[0]))); 134 } 135 136 void 137 xl_pci_attach(parent, self, aux) 138 struct device *parent, *self; 139 void *aux; 140 { 141 struct xl_softc *sc = (struct xl_softc *)self; 142 struct pci_attach_args *pa = aux; 143 pci_chipset_tag_t pc = pa->pa_pc; 144 pci_intr_handle_t ih; 145 const char *intrstr = NULL; 146 bus_addr_t iobase; 147 bus_size_t iosize; 148 u_int32_t command; 149 150 sc->sc_dmat = pa->pa_dmat; 151 152 sc->xl_flags = 0; 153 154 /* set flags required for 3Com MiniPCI adapters */ 155 switch (PCI_PRODUCT(pa->pa_id)) { 156 case TC_DEVICEID_HURRICANE_555: 157 sc->xl_flags |= XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM; 158 break; 159 case TC_DEVICEID_HURRICANE_556: 160 sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | 161 XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET; 162 sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR; 163 sc->xl_flags |= XL_FLAG_8BITROM; 164 break; 165 case TC_DEVICEID_HURRICANE_556B: 166 sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | 167 XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET; 168 sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR; 169 break; 170 case PCI_PRODUCT_3COM_3C9201: 171 sc->xl_flags |= XL_FLAG_PHYOK; 172 break; 173 default: 174 break; 175 } 176 177 /* 178 * If this is a 3c905B, we have to check one extra thing. 179 * The 905B supports power management and may be placed in 180 * a low-power mode (D3 mode), typically by certain operating 181 * systems which shall not be named. The PCI BIOS is supposed 182 * to reset the NIC and bring it out of low-power mode, but 183 * some do not. Consequently, we have to see if this chip 184 * supports power management, and if so, make sure it's not 185 * in low-power mode. If power management is available, the 186 * capid byte will be 0x01. 187 * 188 * I _think_ that what actually happens is that the chip 189 * loses its PCI configuration during the transition from 190 * D3 back to D0; this means that it should be possible for 191 * us to save the PCI iobase, membase and IRQ, put the chip 192 * back in the D0 state, then restore the PCI config ourselves. 193 */ 194 command = pci_conf_read(pc, pa->pa_tag, XL_PCI_CAPID) & 0xff; 195 if (command == 0x01) { 196 197 command = pci_conf_read(pc, pa->pa_tag, 198 XL_PCI_PWRMGMTCTRL); 199 if (command & XL_PSTATE_MASK) { 200 u_int32_t io, mem, irq; 201 202 /* Save PCI config */ 203 io = pci_conf_read(pc, pa->pa_tag, XL_PCI_LOIO); 204 mem = pci_conf_read(pc, pa->pa_tag, XL_PCI_LOMEM); 205 irq = pci_conf_read(pc, pa->pa_tag, XL_PCI_INTLINE); 206 207 /* Reset the power state. */ 208 printf("%s: chip is in D%d power mode " 209 "-- setting to D0\n", 210 sc->sc_dev.dv_xname, command & XL_PSTATE_MASK); 211 command &= 0xFFFFFFFC; 212 pci_conf_write(pc, pa->pa_tag, 213 XL_PCI_PWRMGMTCTRL, command); 214 215 pci_conf_write(pc, pa->pa_tag, XL_PCI_LOIO, io); 216 pci_conf_write(pc, pa->pa_tag, XL_PCI_LOMEM, mem); 217 pci_conf_write(pc, pa->pa_tag, XL_PCI_INTLINE, irq); 218 } 219 } 220 221 /* 222 * Map control/status registers. 223 */ 224 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 225 command |= PCI_COMMAND_IO_ENABLE | 226 PCI_COMMAND_MEM_ENABLE | 227 PCI_COMMAND_MASTER_ENABLE; 228 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 229 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 230 231 #ifdef XL_USEIOSPACE 232 if (!(command & PCI_COMMAND_IO_ENABLE)) { 233 printf("%s: failed to enable i/o ports\n", 234 sc->sc_dev.dv_xname); 235 return; 236 } 237 /* 238 * Map control/status registers. 239 */ 240 if (pci_io_find(pc, pa->pa_tag, XL_PCI_LOIO, &iobase, &iosize)) { 241 printf(": can't find i/o space\n"); 242 return; 243 } 244 if (bus_space_map(pa->pa_iot, iobase, iosize, 0, &sc->xl_bhandle)) { 245 printf(": can't map i/o space\n"); 246 return; 247 } 248 sc->xl_btag = pa->pa_iot; 249 #else 250 if (!(command & PCI_COMMAND_MEM_ENABLE)) { 251 printf(": failed to enable memory mapping\n"); 252 return; 253 } 254 if (pci_mem_find(pc, pa->pa_tag, XL_PCI_LOMEM, &iobase, &iosize, NULL)){ 255 printf(": can't find mem space\n"); 256 return; 257 } 258 if (bus_space_map(pa->pa_memt, iobase, iosize, 0, &sc->xl_bhandle)) { 259 printf(": can't map mem space\n"); 260 return; 261 } 262 sc->xl_btag = pa->pa_memt; 263 #endif 264 265 if (sc->xl_flags & XL_FLAG_FUNCREG) { 266 if (pci_mem_find(pc, pa->pa_tag, XL_PCI_FUNCMEM, &iobase, 267 &iosize, NULL)) { 268 printf(": can't find func space\n"); 269 return; 270 } 271 if (bus_space_map(pa->pa_memt, iobase, iosize, 0, 272 &sc->xl_funch)) { 273 printf(": can't map func space\n"); 274 return; 275 } 276 sc->xl_funct = pa->pa_memt; 277 sc->intr_ack = xl_pci_intr_ack; 278 } 279 280 /* 281 * Allocate our interrupt. 282 */ 283 if (pci_intr_map(pa, &ih)) { 284 printf(": couldn't map interrupt\n"); 285 return; 286 } 287 288 intrstr = pci_intr_string(pc, ih); 289 sc->xl_intrhand = pci_intr_establish(pc, ih, IPL_NET, xl_intr, sc, 290 self->dv_xname); 291 if (sc->xl_intrhand == NULL) { 292 printf(": couldn't establish interrupt"); 293 if (intrstr != NULL) 294 printf(" at %s", intrstr); 295 return; 296 } 297 printf(": %s", intrstr); 298 299 xl_attach(sc); 300 } 301 302 303 void 304 xl_pci_intr_ack(sc) 305 struct xl_softc *sc; 306 { 307 bus_space_write_4(sc->xl_funct, sc->xl_funch, XL_PCI_INTR, 308 XL_PCI_INTRACK); 309 } 310