1 /* $OpenBSD: if_xl_pci.c,v 1.44 2015/03/14 03:38:48 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: if_xl.c,v 1.72 2000/01/09 21:12:59 wpaul Exp $ 35 */ 36 37 #include "bpfilter.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/protosw.h> 43 #include <sys/socket.h> 44 #include <sys/ioctl.h> 45 #include <sys/errno.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/device.h> 49 50 #include <net/if.h> 51 #include <net/if_dl.h> 52 #include <net/if_types.h> 53 #include <net/if_media.h> 54 55 #include <netinet/in.h> 56 #include <netinet/if_ether.h> 57 58 #include <dev/mii/miivar.h> 59 #include <dev/pci/pcireg.h> 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcidevs.h> 62 63 #if NBPFILTER > 0 64 #include <net/bpf.h> 65 #endif 66 67 /* 68 * The following #define causes the code to use PIO to access the 69 * chip's registers instead of memory mapped mode. The reason PIO mode 70 * is on by default is that the Etherlink XL manual seems to indicate 71 * that only the newer revision chips (3c905B) support both PIO and 72 * memory mapped access. Since we want to be compatible with the older 73 * bus master chips, we use PIO here. If you comment this out, the 74 * driver will use memory mapped I/O, which may be faster but which 75 * might not work on some devices. 76 */ 77 #define XL_USEIOSPACE 78 79 #define XL_PCI_FUNCMEM 0x0018 80 #define XL_PCI_INTR 0x0004 81 #define XL_PCI_INTRACK 0x8000 82 83 #include <dev/ic/xlreg.h> 84 85 int xl_pci_match(struct device *, void *, void *); 86 void xl_pci_attach(struct device *, struct device *, void *); 87 int xl_pci_detach(struct device *, int); 88 void xl_pci_intr_ack(struct xl_softc *); 89 #ifndef SMALL_KERNEL 90 void xl_pci_wol_power(void *); 91 #endif 92 93 struct xl_pci_softc { 94 struct xl_softc psc_softc; 95 pci_chipset_tag_t psc_pc; 96 pcitag_t psc_tag; 97 bus_size_t psc_iosize; 98 bus_size_t psc_funsize; 99 }; 100 101 struct cfattach xl_pci_ca = { 102 sizeof(struct xl_pci_softc), xl_pci_match, xl_pci_attach, 103 xl_pci_detach, xl_activate 104 }; 105 106 const struct pci_matchid xl_pci_devices[] = { 107 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSOHO100TX }, 108 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900TPO }, 109 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900COMBO }, 110 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900B }, 111 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BCOMBO }, 112 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BTPC }, 113 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BFL }, 114 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905TX }, 115 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905T4 }, 116 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BTX }, 117 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BT4 }, 118 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BCOMBO }, 119 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BFX }, 120 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980TX }, 121 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980CTX }, 122 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905CTX }, 123 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C450 }, 124 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C555 }, 125 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556 }, 126 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556B }, 127 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C9201 }, 128 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C920BEMBW }, 129 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C575 }, 130 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFE575BT }, 131 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFE575CT }, 132 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656 }, 133 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656B }, 134 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656C }, 135 }; 136 137 int 138 xl_pci_match(struct device *parent, void *match, void *aux) 139 { 140 return (pci_matchbyid((struct pci_attach_args *)aux, xl_pci_devices, 141 nitems(xl_pci_devices))); 142 } 143 144 void 145 xl_pci_attach(struct device *parent, struct device *self, void *aux) 146 { 147 struct xl_pci_softc *psc = (void *)self; 148 struct xl_softc *sc = &psc->psc_softc; 149 struct pci_attach_args *pa = aux; 150 pci_chipset_tag_t pc = pa->pa_pc; 151 pci_intr_handle_t ih; 152 const char *intrstr = NULL; 153 bus_size_t iosize, funsize; 154 #ifndef SMALL_KERNEL 155 u_int32_t command; 156 #endif 157 158 psc->psc_pc = pc; 159 psc->psc_tag = pa->pa_tag; 160 sc->sc_dmat = pa->pa_dmat; 161 162 sc->xl_flags = 0; 163 sc->wol_power = sc->wol_power_arg = NULL; 164 165 /* set required flags */ 166 switch (PCI_PRODUCT(pa->pa_id)) { 167 case TC_DEVICEID_HURRICANE_555: 168 sc->xl_flags |= XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM; 169 break; 170 case TC_DEVICEID_HURRICANE_556: 171 sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | 172 XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET; 173 sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR; 174 sc->xl_flags |= XL_FLAG_8BITROM; 175 break; 176 case TC_DEVICEID_HURRICANE_556B: 177 sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | 178 XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET; 179 sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR; 180 break; 181 case PCI_PRODUCT_3COM_3C9201: 182 case PCI_PRODUCT_3COM_3C920BEMBW: 183 sc->xl_flags |= XL_FLAG_PHYOK; 184 break; 185 case TC_DEVICEID_BOOMERANG_10_100BT: 186 sc->xl_flags |= XL_FLAG_NO_MMIO; 187 break; 188 case PCI_PRODUCT_3COM_3C575: 189 sc->xl_flags |= XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 190 XL_FLAG_8BITROM; 191 break; 192 case PCI_PRODUCT_3COM_3CCFE575BT: 193 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 194 XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR; 195 sc->xl_flags |= XL_FLAG_FUNCREG; 196 break; 197 case PCI_PRODUCT_3COM_3CCFE575CT: 198 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 199 XL_FLAG_8BITROM | XL_FLAG_INVERT_MII_PWR; 200 sc->xl_flags |= XL_FLAG_FUNCREG; 201 break; 202 case PCI_PRODUCT_3COM_3CCFEM656: 203 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 204 XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR | 205 XL_FLAG_INVERT_MII_PWR; 206 sc->xl_flags |= XL_FLAG_FUNCREG; 207 break; 208 case PCI_PRODUCT_3COM_3CCFEM656B: 209 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 210 XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR | 211 XL_FLAG_INVERT_MII_PWR; 212 sc->xl_flags |= XL_FLAG_FUNCREG; 213 break; 214 case PCI_PRODUCT_3COM_3CCFEM656C: 215 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 216 XL_FLAG_8BITROM | XL_FLAG_INVERT_MII_PWR; 217 sc->xl_flags |= XL_FLAG_FUNCREG; 218 break; 219 default: 220 break; 221 } 222 223 pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 224 225 #ifndef SMALL_KERNEL 226 /* 227 * The card is WOL-capable if it supports PME# assertion 228 * from D3hot power state. Install a callback to configure 229 * PCI power state for WOL. It will be invoked when the 230 * interface stops and WOL was enabled. 231 */ 232 command = pci_conf_read(pc, pa->pa_tag, XL_PCI_CAPID); 233 if ((command >> 16) & XL_PME_CAP_D3_HOT) { 234 sc->wol_power = xl_pci_wol_power; 235 sc->wol_power_arg = psc; 236 } 237 #endif 238 239 /* 240 * Map control/status registers. 241 */ 242 #ifdef XL_USEIOSPACE 243 if (pci_mapreg_map(pa, XL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 244 &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) { 245 printf(": can't map i/o space\n"); 246 return; 247 } 248 #else 249 if (pci_mapreg_map(pa, XL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 250 &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) { 251 printf(": can't map i/o space\n"); 252 return; 253 } 254 #endif 255 psc->psc_iosize = iosize; 256 257 if (sc->xl_flags & XL_FLAG_FUNCREG) { 258 if (pci_mapreg_map(pa, XL_PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0, 259 &sc->xl_funct, &sc->xl_funch, NULL, &funsize, 0)) { 260 printf(": can't map i/o space\n"); 261 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize); 262 return; 263 } 264 psc->psc_funsize = funsize; 265 sc->intr_ack = xl_pci_intr_ack; 266 } 267 268 /* 269 * Allocate our interrupt. 270 */ 271 if (pci_intr_map(pa, &ih)) { 272 printf(": couldn't map interrupt\n"); 273 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize); 274 if (sc->xl_flags & XL_FLAG_FUNCREG) 275 bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize); 276 return; 277 } 278 279 intrstr = pci_intr_string(pc, ih); 280 sc->xl_intrhand = pci_intr_establish(pc, ih, IPL_NET, xl_intr, sc, 281 self->dv_xname); 282 if (sc->xl_intrhand == NULL) { 283 printf(": couldn't establish interrupt"); 284 if (intrstr != NULL) 285 printf(" at %s", intrstr); 286 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize); 287 if (sc->xl_flags & XL_FLAG_FUNCREG) 288 bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize); 289 return; 290 } 291 printf(": %s", intrstr); 292 293 xl_attach(sc); 294 } 295 296 int 297 xl_pci_detach(struct device *self, int flags) 298 { 299 struct xl_pci_softc *psc = (void *)self; 300 struct xl_softc *sc = &psc->psc_softc; 301 302 if (sc->xl_intrhand != NULL) { 303 pci_intr_disestablish(psc->psc_pc, sc->xl_intrhand); 304 xl_detach(sc); 305 } 306 if (psc->psc_iosize > 0) 307 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, psc->psc_iosize); 308 if (psc->psc_funsize > 0) 309 bus_space_unmap(sc->xl_funct, sc->xl_funch, psc->psc_funsize); 310 return (0); 311 } 312 313 void 314 xl_pci_intr_ack(struct xl_softc *sc) 315 { 316 bus_space_write_4(sc->xl_funct, sc->xl_funch, XL_PCI_INTR, 317 XL_PCI_INTRACK); 318 } 319 320 #ifndef SMALL_KERNEL 321 void 322 xl_pci_wol_power(void *ppsc) 323 { 324 struct xl_pci_softc *psc = (struct xl_pci_softc*)ppsc; 325 u_int32_t command; 326 327 /* Make sure wake-up generation is enabled. */ 328 command = pci_conf_read(psc->psc_pc, psc->psc_tag, XL_PCI_PWRMGMTCTRL); 329 command |= XL_PME_EN; 330 pci_conf_write(psc->psc_pc, psc->psc_tag, XL_PCI_PWRMGMTCTRL, command); 331 } 332 #endif 333