1 /* $OpenBSD: if_xl_pci.c,v 1.41 2013/08/07 01:06:39 bluhm Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: if_xl.c,v 1.72 2000/01/09 21:12:59 wpaul Exp $ 35 */ 36 37 #include "bpfilter.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/protosw.h> 43 #include <sys/socket.h> 44 #include <sys/ioctl.h> 45 #include <sys/errno.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/device.h> 49 50 #include <net/if.h> 51 #include <net/if_dl.h> 52 #include <net/if_types.h> 53 #include <net/if_media.h> 54 55 #ifdef INET 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/ip.h> 59 #include <netinet/if_ether.h> 60 #endif 61 62 #include <dev/mii/mii.h> 63 #include <dev/mii/miivar.h> 64 #include <dev/pci/pcireg.h> 65 #include <dev/pci/pcivar.h> 66 #include <dev/pci/pcidevs.h> 67 68 #if NBPFILTER > 0 69 #include <net/bpf.h> 70 #endif 71 72 /* 73 * The following #define causes the code to use PIO to access the 74 * chip's registers instead of memory mapped mode. The reason PIO mode 75 * is on by default is that the Etherlink XL manual seems to indicate 76 * that only the newer revision chips (3c905B) support both PIO and 77 * memory mapped access. Since we want to be compatible with the older 78 * bus master chips, we use PIO here. If you comment this out, the 79 * driver will use memory mapped I/O, which may be faster but which 80 * might not work on some devices. 81 */ 82 #define XL_USEIOSPACE 83 84 #define XL_PCI_FUNCMEM 0x0018 85 #define XL_PCI_INTR 0x0004 86 #define XL_PCI_INTRACK 0x8000 87 88 #include <dev/ic/xlreg.h> 89 90 int xl_pci_match(struct device *, void *, void *); 91 void xl_pci_attach(struct device *, struct device *, void *); 92 int xl_pci_detach(struct device *, int); 93 void xl_pci_intr_ack(struct xl_softc *); 94 #ifndef SMALL_KERNEL 95 void xl_pci_wol_power(void *); 96 #endif 97 98 struct xl_pci_softc { 99 struct xl_softc psc_softc; 100 pci_chipset_tag_t psc_pc; 101 pcitag_t psc_tag; 102 bus_size_t psc_iosize; 103 bus_size_t psc_funsize; 104 }; 105 106 struct cfattach xl_pci_ca = { 107 sizeof(struct xl_pci_softc), xl_pci_match, xl_pci_attach, 108 xl_pci_detach, xl_activate 109 }; 110 111 const struct pci_matchid xl_pci_devices[] = { 112 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSOHO100TX }, 113 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900TPO }, 114 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900COMBO }, 115 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900B }, 116 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BCOMBO }, 117 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BTPC }, 118 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BFL }, 119 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905TX }, 120 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905T4 }, 121 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BTX }, 122 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BT4 }, 123 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BCOMBO }, 124 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BFX }, 125 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980TX }, 126 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980CTX }, 127 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905CTX }, 128 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C450 }, 129 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C555 }, 130 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556 }, 131 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556B }, 132 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C9201 }, 133 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C920BEMBW }, 134 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C575 }, 135 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFE575BT }, 136 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFE575CT }, 137 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656 }, 138 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656B }, 139 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656C }, 140 }; 141 142 int 143 xl_pci_match(struct device *parent, void *match, void *aux) 144 { 145 return (pci_matchbyid((struct pci_attach_args *)aux, xl_pci_devices, 146 nitems(xl_pci_devices))); 147 } 148 149 void 150 xl_pci_attach(struct device *parent, struct device *self, void *aux) 151 { 152 struct xl_pci_softc *psc = (void *)self; 153 struct xl_softc *sc = &psc->psc_softc; 154 struct pci_attach_args *pa = aux; 155 pci_chipset_tag_t pc = pa->pa_pc; 156 pci_intr_handle_t ih; 157 const char *intrstr = NULL; 158 bus_size_t iosize, funsize; 159 #ifndef SMALL_KERNEL 160 u_int32_t command; 161 #endif 162 163 psc->psc_pc = pc; 164 psc->psc_tag = pa->pa_tag; 165 sc->sc_dmat = pa->pa_dmat; 166 167 sc->xl_flags = 0; 168 sc->wol_power = sc->wol_power_arg = NULL; 169 170 /* set required flags */ 171 switch (PCI_PRODUCT(pa->pa_id)) { 172 case TC_DEVICEID_HURRICANE_555: 173 sc->xl_flags |= XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM; 174 break; 175 case TC_DEVICEID_HURRICANE_556: 176 sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | 177 XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET; 178 sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR; 179 sc->xl_flags |= XL_FLAG_8BITROM; 180 break; 181 case TC_DEVICEID_HURRICANE_556B: 182 sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | 183 XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET; 184 sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR; 185 break; 186 case PCI_PRODUCT_3COM_3C9201: 187 case PCI_PRODUCT_3COM_3C920BEMBW: 188 sc->xl_flags |= XL_FLAG_PHYOK; 189 break; 190 case TC_DEVICEID_BOOMERANG_10_100BT: 191 sc->xl_flags |= XL_FLAG_NO_MMIO; 192 break; 193 case PCI_PRODUCT_3COM_3C575: 194 sc->xl_flags |= XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 195 XL_FLAG_8BITROM; 196 break; 197 case PCI_PRODUCT_3COM_3CCFE575BT: 198 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 199 XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR; 200 sc->xl_flags |= XL_FLAG_FUNCREG; 201 break; 202 case PCI_PRODUCT_3COM_3CCFE575CT: 203 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 204 XL_FLAG_8BITROM | XL_FLAG_INVERT_MII_PWR; 205 sc->xl_flags |= XL_FLAG_FUNCREG; 206 break; 207 case PCI_PRODUCT_3COM_3CCFEM656: 208 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 209 XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR | 210 XL_FLAG_INVERT_MII_PWR; 211 sc->xl_flags |= XL_FLAG_FUNCREG; 212 break; 213 case PCI_PRODUCT_3COM_3CCFEM656B: 214 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 215 XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR | 216 XL_FLAG_INVERT_MII_PWR; 217 sc->xl_flags |= XL_FLAG_FUNCREG; 218 break; 219 case PCI_PRODUCT_3COM_3CCFEM656C: 220 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 221 XL_FLAG_8BITROM | XL_FLAG_INVERT_MII_PWR; 222 sc->xl_flags |= XL_FLAG_FUNCREG; 223 break; 224 default: 225 break; 226 } 227 228 pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 229 230 #ifndef SMALL_KERNEL 231 /* 232 * The card is WOL-capable if it supports PME# assertion 233 * from D3hot power state. Install a callback to configure 234 * PCI power state for WOL. It will be invoked when the 235 * interface stops and WOL was enabled. 236 */ 237 command = pci_conf_read(pc, pa->pa_tag, XL_PCI_CAPID); 238 if ((command >> 16) & XL_PME_CAP_D3_HOT) { 239 sc->wol_power = xl_pci_wol_power; 240 sc->wol_power_arg = psc; 241 } 242 #endif 243 244 /* 245 * Map control/status registers. 246 */ 247 #ifdef XL_USEIOSPACE 248 if (pci_mapreg_map(pa, XL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 249 &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) { 250 printf(": can't map i/o space\n"); 251 return; 252 } 253 #else 254 if (pci_mapreg_map(pa, XL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 255 &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) { 256 printf(": can't map i/o space\n"); 257 return; 258 } 259 #endif 260 psc->psc_iosize = iosize; 261 262 if (sc->xl_flags & XL_FLAG_FUNCREG) { 263 if (pci_mapreg_map(pa, XL_PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0, 264 &sc->xl_funct, &sc->xl_funch, NULL, &funsize, 0)) { 265 printf(": can't map i/o space\n"); 266 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize); 267 return; 268 } 269 psc->psc_funsize = funsize; 270 sc->intr_ack = xl_pci_intr_ack; 271 } 272 273 /* 274 * Allocate our interrupt. 275 */ 276 if (pci_intr_map(pa, &ih)) { 277 printf(": couldn't map interrupt\n"); 278 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize); 279 if (sc->xl_flags & XL_FLAG_FUNCREG) 280 bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize); 281 return; 282 } 283 284 intrstr = pci_intr_string(pc, ih); 285 sc->xl_intrhand = pci_intr_establish(pc, ih, IPL_NET, xl_intr, sc, 286 self->dv_xname); 287 if (sc->xl_intrhand == NULL) { 288 printf(": couldn't establish interrupt"); 289 if (intrstr != NULL) 290 printf(" at %s", intrstr); 291 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize); 292 if (sc->xl_flags & XL_FLAG_FUNCREG) 293 bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize); 294 return; 295 } 296 printf(": %s", intrstr); 297 298 xl_attach(sc); 299 } 300 301 int 302 xl_pci_detach(struct device *self, int flags) 303 { 304 struct xl_pci_softc *psc = (void *)self; 305 struct xl_softc *sc = &psc->psc_softc; 306 307 if (sc->xl_intrhand != NULL) { 308 pci_intr_disestablish(psc->psc_pc, sc->xl_intrhand); 309 xl_detach(sc); 310 } 311 if (psc->psc_iosize > 0) 312 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, psc->psc_iosize); 313 if (psc->psc_funsize > 0) 314 bus_space_unmap(sc->xl_funct, sc->xl_funch, psc->psc_funsize); 315 return (0); 316 } 317 318 void 319 xl_pci_intr_ack(struct xl_softc *sc) 320 { 321 bus_space_write_4(sc->xl_funct, sc->xl_funch, XL_PCI_INTR, 322 XL_PCI_INTRACK); 323 } 324 325 #ifndef SMALL_KERNEL 326 void 327 xl_pci_wol_power(void *ppsc) 328 { 329 struct xl_pci_softc *psc = (struct xl_pci_softc*)ppsc; 330 u_int32_t command; 331 332 /* Make sure wake-up generation is enabled. */ 333 command = pci_conf_read(psc->psc_pc, psc->psc_tag, XL_PCI_PWRMGMTCTRL); 334 command |= XL_PME_EN; 335 pci_conf_write(psc->psc_pc, psc->psc_tag, XL_PCI_PWRMGMTCTRL, command); 336 } 337 #endif 338