1 /* $OpenBSD: if_wi_pci.c,v 1.50 2013/12/06 21:03:04 deraadt Exp $ */ 2 3 /* 4 * Copyright (c) 2001-2003 Todd C. Miller <Todd.Miller@courtesan.com> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 * 18 * Sponsored in part by the Defense Advanced Research Projects 19 * Agency (DARPA) and Air Force Research Laboratory, Air Force 20 * Materiel Command, USAF, under agreement number F39502-99-1-0512. 21 */ 22 23 /* 24 * PCI attachment for the Wavelan driver. There are two basic types 25 * of PCI card supported: 26 * 27 * 1) Cards based on the Prism2.5 Mini-PCI chipset 28 * 2) Cards that use a dumb PCMCIA->PCI bridge 29 * 30 * Only the first type are "true" PCI cards. 31 * 32 * The latter are simply PCMCIA cards (or the guts of same) with some 33 * type of dumb PCMCIA->PCI bridge. They are "dumb" in that they 34 * are not true PCMCIA bridges and really just serve to deal with 35 * the different interrupt types and timings of the ISA vs. PCI bus. 36 * 37 * The following bridge types are supported: 38 * o PLX 9052 (the most common) 39 * o TMD 7160 (found in some NDC/Sohoware NCP130 cards) 40 * o ACEX EP1K30 (really a PLD, found in Symbol cards and their OEMs) 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 #include <sys/timeout.h> 47 #include <sys/socket.h> 48 #include <sys/tree.h> 49 50 #include <net/if.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 54 #ifdef INET 55 #include <netinet/in.h> 56 #include <netinet/if_ether.h> 57 #endif 58 59 #include <net80211/ieee80211_var.h> 60 #include <net80211/ieee80211_ioctl.h> 61 62 #include <machine/bus.h> 63 64 #include <dev/pci/pcireg.h> 65 #include <dev/pci/pcivar.h> 66 #include <dev/pci/pcidevs.h> 67 68 #include <dev/ic/if_wireg.h> 69 #include <dev/ic/if_wi_ieee.h> 70 #include <dev/ic/if_wivar.h> 71 72 /* For printing CIS of the actual PCMCIA card */ 73 #define CIS_MFG_NAME_OFFSET 0x16 74 #define CIS_INFO_SIZE 256 75 76 const struct wi_pci_product *wi_pci_lookup(struct pci_attach_args *pa); 77 int wi_pci_match(struct device *, void *, void *); 78 void wi_pci_attach(struct device *, struct device *, void *); 79 int wi_pci_activate(struct device *, int); 80 void wi_pci_wakeup(struct wi_softc *); 81 int wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc); 82 int wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc); 83 int wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc); 84 int wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc); 85 int wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc); 86 void wi_pci_plx_print_cis(struct wi_softc *); 87 88 struct wi_pci_softc { 89 struct wi_softc sc_wi; /* real softc */ 90 }; 91 92 struct cfattach wi_pci_ca = { 93 sizeof (struct wi_pci_softc), wi_pci_match, wi_pci_attach, NULL, 94 wi_pci_activate 95 }; 96 97 static const struct wi_pci_product { 98 pci_vendor_id_t pp_vendor; 99 pci_product_id_t pp_product; 100 int (*pp_attach)(struct pci_attach_args *pa, struct wi_softc *sc); 101 } wi_pci_products[] = { 102 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P, wi_pci_plx_attach }, 103 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02, wi_pci_plx_attach }, 104 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P03, wi_pci_plx_attach }, 105 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_8031, wi_pci_plx_attach }, 106 { PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P, wi_pci_plx_attach }, 107 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_WL11000P, wi_pci_plx_attach }, 108 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRWE777A, wi_pci_plx_attach }, 109 { PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_MA301, wi_pci_plx_attach }, 110 { PCI_VENDOR_EFFICIENTNETS, PCI_PRODUCT_EFFICIENTNETS_SS1023, wi_pci_plx_attach }, 111 { PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_AWA100, wi_pci_plx_attach }, 112 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6000, wi_pci_plx_attach }, 113 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130, wi_pci_plx_attach }, 114 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130A2, wi_pci_tmd_attach }, 115 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN, wi_pci_native_attach }, 116 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_ISL3872, wi_pci_native_attach }, 117 { PCI_VENDOR_SAMSUNG, PCI_PRODUCT_SAMSUNG_SWL2210P, wi_pci_native_attach }, 118 { PCI_VENDOR_NORTEL, PCI_PRODUCT_NORTEL_211818A, wi_pci_acex_attach }, 119 { PCI_VENDOR_SYMBOL, PCI_PRODUCT_SYMBOL_LA41X3, wi_pci_acex_attach }, 120 { 0, 0, 0 } 121 }; 122 123 const struct wi_pci_product * 124 wi_pci_lookup(struct pci_attach_args *pa) 125 { 126 const struct wi_pci_product *pp; 127 128 for (pp = wi_pci_products; pp->pp_product != 0; pp++) { 129 if (PCI_VENDOR(pa->pa_id) == pp->pp_vendor && 130 PCI_PRODUCT(pa->pa_id) == pp->pp_product) 131 return (pp); 132 } 133 134 return (NULL); 135 } 136 137 int 138 wi_pci_match(struct device *parent, void *match, void *aux) 139 { 140 return (wi_pci_lookup(aux) != NULL); 141 } 142 143 void 144 wi_pci_attach(struct device *parent, struct device *self, void *aux) 145 { 146 struct wi_softc *sc = (struct wi_softc *)self; 147 struct pci_attach_args *pa = aux; 148 const struct wi_pci_product *pp; 149 150 pp = wi_pci_lookup(pa); 151 if (pp->pp_attach(pa, sc) != 0) 152 return; 153 printf("\n"); 154 wi_attach(sc, &wi_func_io); 155 } 156 157 int 158 wi_pci_activate(struct device *self, int act) 159 { 160 struct wi_softc *sc = (struct wi_softc *)self; 161 struct ifnet *ifp = &sc->sc_ic.ic_if; 162 163 switch (act) { 164 case DVACT_SUSPEND: 165 if (ifp->if_flags & IFF_RUNNING) 166 wi_stop(sc); 167 break; 168 case DVACT_WAKEUP: 169 if (ifp->if_flags & IFF_UP) 170 wi_pci_wakeup(sc); 171 break; 172 } 173 return (0); 174 } 175 176 void 177 wi_pci_wakeup(struct wi_softc *sc) 178 { 179 int s; 180 181 s = splnet(); 182 while (sc->wi_flags & WI_FLAGS_BUSY) 183 tsleep(&sc->wi_flags, 0, "wipwr", 0); 184 sc->wi_flags |= WI_FLAGS_BUSY; 185 186 wi_init(sc); 187 188 sc->wi_flags &= ~WI_FLAGS_BUSY; 189 wakeup(&sc->wi_flags); 190 splx(s); 191 } 192 193 /* 194 * ACEX EP1K30-based PCMCIA->PCI bridge attachment. 195 * 196 * The ACEX EP1K30 is a programmable logic device (PLD) used as a 197 * PCMCIA->PCI bridge on the Symbol LA4123 and its OEM equivalents 198 * (such as the Nortel E-mobility 211818-A). There are 3 I/O ports: 199 * BAR0 at 0x10 appears to be a command port. 200 * BAR1 at 0x14 contains COR at offset 0xe0. 201 * BAR2 at 0x18 maps the actual PCMCIA card. 202 * 203 * The datasheet for the ACEX EP1K30 is available from Altera but that 204 * doesn't really help much since we don't know how it is programmed. 205 * Details for this attachment were gleaned from a version of the 206 * Linux orinoco driver modified by Tobias Hoffmann based on 207 * what he discoverd from the Windows driver. 208 */ 209 int 210 wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc) 211 { 212 bus_space_handle_t commandh, localh, ioh; 213 bus_space_tag_t commandt, localt; 214 bus_space_tag_t iot = pa->pa_iot; 215 bus_size_t commandsize, localsize, iosize; 216 int i; 217 218 if (pci_mapreg_map(pa, WI_ACEX_CMDRES, PCI_MAPREG_TYPE_IO, 219 0, &commandt, &commandh, NULL, &commandsize, 0) != 0) { 220 printf(": can't map command i/o space\n"); 221 return (ENXIO); 222 } 223 224 if (pci_mapreg_map(pa, WI_ACEX_LOCALRES, PCI_MAPREG_TYPE_IO, 225 0, &localt, &localh, NULL, &localsize, 0) != 0) { 226 printf(": can't map local i/o space\n"); 227 bus_space_unmap(commandt, commandh, commandsize); 228 return (ENXIO); 229 } 230 sc->wi_ltag = localt; 231 sc->wi_lhandle = localh; 232 233 if (pci_mapreg_map(pa, WI_TMD_IORES, PCI_MAPREG_TYPE_IO, 234 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 235 printf(": can't map i/o space\n"); 236 bus_space_unmap(localt, localh, localsize); 237 bus_space_unmap(commandt, commandh, commandsize); 238 return (ENXIO); 239 } 240 sc->wi_btag = iot; 241 sc->wi_bhandle = ioh; 242 243 /* 244 * Setup bridge chip. 245 */ 246 if (bus_space_read_4(commandt, commandh, 0) & 1) { 247 printf(": bridge not ready\n"); 248 bus_space_unmap(iot, ioh, iosize); 249 bus_space_unmap(localt, localh, localsize); 250 bus_space_unmap(commandt, commandh, commandsize); 251 return (ENXIO); 252 } 253 bus_space_write_4(commandt, commandh, 2, 0x118); 254 bus_space_write_4(commandt, commandh, 2, 0x108); 255 DELAY(30 * 1000); 256 bus_space_write_4(commandt, commandh, 2, 0x8); 257 for (i = 0; i < 30; i++) { 258 DELAY(30 * 1000); 259 if (bus_space_read_4(commandt, commandh, 0) & 0x10) 260 break; 261 } 262 if (i == 30) { 263 printf(": bridge timeout\n"); 264 bus_space_unmap(iot, ioh, iosize); 265 bus_space_unmap(localt, localh, localsize); 266 bus_space_unmap(commandt, commandh, commandsize); 267 return (ENXIO); 268 } 269 if ((bus_space_read_4(localt, localh, 0xe0) & 1) || 270 (bus_space_read_4(localt, localh, 0xe2) & 1) || 271 (bus_space_read_4(localt, localh, 0xe4) & 1)) { 272 printf(": failed bridge setup\n"); 273 bus_space_unmap(iot, ioh, iosize); 274 bus_space_unmap(localt, localh, localsize); 275 bus_space_unmap(commandt, commandh, commandsize); 276 return (ENXIO); 277 } 278 279 if (wi_pci_common_attach(pa, sc) != 0) { 280 bus_space_unmap(iot, ioh, iosize); 281 bus_space_unmap(localt, localh, localsize); 282 bus_space_unmap(commandt, commandh, commandsize); 283 return (ENXIO); 284 } 285 286 /* 287 * Enable I/O mode and level interrupts on the embedded PCMCIA 288 * card. 289 */ 290 bus_space_write_1(localt, localh, WI_ACEX_COR_OFFSET, WI_COR_IOMODE); 291 sc->wi_cor_offset = WI_ACEX_COR_OFFSET; 292 293 /* Unmap registers we no longer need access to. */ 294 bus_space_unmap(commandt, commandh, commandsize); 295 296 return (0); 297 } 298 299 /* 300 * PLX 9052-based PCMCIA->PCI bridge attachment. 301 * 302 * These are often sold as "PCI wireless card adapters" and are 303 * sold by several vendors. Most are simply rebadged versions of the 304 * Eumitcom WL11000P or Global Sun Technology GL24110P02. 305 * These cards use the PLX 9052 dumb bridge chip to connect a PCMCIA 306 * wireless card to the PCI bus. Because it is a dumb bridge and 307 * not a true PCMCIA bridge, the PCMCIA subsystem is not involved 308 * (or even required). The PLX 9052 provides multiple PCI address 309 * space mappings. The primary mappings at PCI registers 0x10 (mem) 310 * and 0x14 (I/O) are for the PLX chip itself, *NOT* the PCMCIA card. 311 * The mem and I/O spaces for the PCMCIA card are mapped to 0x18 and 312 * 0x1C respectively. 313 * The PLX 9050/9052 datasheet may be downloaded from PLX at 314 * http://www.plxtech.com/products/toolbox/9050.htm 315 */ 316 int 317 wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc) 318 { 319 bus_space_handle_t localh, ioh, memh; 320 bus_space_tag_t localt; 321 bus_space_tag_t iot = pa->pa_iot; 322 bus_space_tag_t memt = pa->pa_memt; 323 bus_size_t localsize, memsize, iosize; 324 u_int32_t intcsr; 325 326 if (pci_mapreg_map(pa, WI_PLX_MEMRES, PCI_MAPREG_TYPE_MEM, 0, 327 &memt, &memh, NULL, &memsize, 0) != 0) { 328 printf(": can't map mem space\n"); 329 return (ENXIO); 330 } 331 sc->wi_ltag = memt; 332 sc->wi_lhandle = memh; 333 334 if (pci_mapreg_map(pa, WI_PLX_IORES, 335 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 336 printf(": can't map i/o space\n"); 337 bus_space_unmap(memt, memh, memsize); 338 return (ENXIO); 339 } 340 sc->wi_btag = iot; 341 sc->wi_bhandle = ioh; 342 343 /* 344 * Some cards, such as the PLX version of the NDC NCP130, 345 * don't have the PLX local registers mapped. In general 346 * this is OK since on those cards the serial EEPROM has 347 * already set things up for us. 348 * As such, we don't consider an error here to be fatal. 349 */ 350 localsize = 0; 351 if (pci_mapreg_type(pa->pa_pc, pa->pa_tag, WI_PLX_LOCALRES) 352 == PCI_MAPREG_TYPE_IO) { 353 if (pci_mapreg_map(pa, WI_PLX_LOCALRES, PCI_MAPREG_TYPE_IO, 354 0, &localt, &localh, NULL, &localsize, 0) != 0) 355 printf(": can't map PLX I/O space\n"); 356 } 357 358 if (wi_pci_common_attach(pa, sc) != 0) { 359 if (localsize) 360 bus_space_unmap(localt, localh, localsize); 361 bus_space_unmap(iot, ioh, iosize); 362 bus_space_unmap(memt, memh, memsize); 363 return (ENXIO); 364 } 365 366 if (localsize != 0) { 367 intcsr = bus_space_read_4(localt, localh, 368 WI_PLX_INTCSR); 369 370 /* 371 * The Netgear MA301 has local interrupt 1 active 372 * when there is no card in the adapter. We bail 373 * early in this case since our attempt to check 374 * for the presence of a card later will hang the 375 * MA301. 376 */ 377 if (intcsr & WI_PLX_LINT1STAT) { 378 printf("\n%s: no PCMCIA card detected in bridge card\n", 379 WI_PRT_ARG(sc)); 380 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 381 if (localsize) 382 bus_space_unmap(localt, localh, localsize); 383 bus_space_unmap(iot, ioh, iosize); 384 bus_space_unmap(memt, memh, memsize); 385 return (ENXIO); 386 } 387 388 /* 389 * Enable PCI interrupts on the PLX chip if they are 390 * not already enabled. On most adapters the serial 391 * EEPROM has done this for us but some (such as 392 * the Netgear MA301) do not. 393 */ 394 if (!(intcsr & WI_PLX_INTEN)) { 395 intcsr |= WI_PLX_INTEN; 396 bus_space_write_4(localt, localh, WI_PLX_INTCSR, 397 intcsr); 398 } 399 } 400 401 /* 402 * Enable I/O mode and level interrupts on the PCMCIA card. 403 * The PCMCIA card's COR is the first byte after the CIS. 404 */ 405 bus_space_write_1(memt, memh, WI_PLX_COR_OFFSET, WI_COR_IOMODE); 406 sc->wi_cor_offset = WI_PLX_COR_OFFSET; 407 408 if (localsize != 0) { 409 /* 410 * Test the presence of a wi(4) card by writing 411 * a magic number to the first software support 412 * register and then reading it back. 413 */ 414 CSR_WRITE_2(sc, WI_SW0, WI_DRVR_MAGIC); 415 DELAY(1000); 416 if (CSR_READ_2(sc, WI_SW0) != WI_DRVR_MAGIC) { 417 printf("\n%s: no PCMCIA card detected in bridge card\n", 418 WI_PRT_ARG(sc)); 419 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 420 if (localsize) 421 bus_space_unmap(localt, localh, localsize); 422 bus_space_unmap(iot, ioh, iosize); 423 bus_space_unmap(memt, memh, memsize); 424 return (ENXIO); 425 } 426 427 /* Unmap registers we no longer need access to. */ 428 bus_space_unmap(localt, localh, localsize); 429 430 /* Print PCMCIA card's CIS strings. */ 431 wi_pci_plx_print_cis(sc); 432 } 433 434 return (0); 435 } 436 437 /* 438 * TMD 7160-based PCMCIA->PCI bridge attachment. 439 * 440 * The TMD7160 dumb bridge chip is used on some versions of the 441 * NDC/Sohoware NCP130. The TMD7160 provides two PCI I/O registers. 442 * The first, at 0x14, maps to the Prism2 COR. 443 * The second, at 0x18, is for the Prism2 chip itself. 444 * 445 * The datasheet for the TMD7160 does not seem to be publicly available. 446 * Details for this attachment were gleaned from a version of the 447 * Linux WLAN driver modified by NDC. 448 */ 449 int 450 wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc) 451 { 452 bus_space_handle_t localh, ioh; 453 bus_space_tag_t localt; 454 bus_space_tag_t iot = pa->pa_iot; 455 bus_size_t localsize, iosize; 456 457 if (pci_mapreg_map(pa, WI_TMD_LOCALRES, PCI_MAPREG_TYPE_IO, 458 0, &localt, &localh, NULL, &localsize, 0) != 0) { 459 printf(": can't map TMD I/O space\n"); 460 return (ENXIO); 461 } 462 sc->wi_ltag = localt; 463 sc->wi_lhandle = localh; 464 465 if (pci_mapreg_map(pa, WI_TMD_IORES, PCI_MAPREG_TYPE_IO, 466 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 467 printf(": can't map i/o space\n"); 468 bus_space_unmap(localt, localh, localsize); 469 return (ENXIO); 470 } 471 sc->wi_btag = iot; 472 sc->wi_bhandle = ioh; 473 474 if (wi_pci_common_attach(pa, sc) != 0) { 475 bus_space_unmap(iot, ioh, iosize); 476 bus_space_unmap(localt, localh, localsize); 477 return (ENXIO); 478 } 479 480 /* 481 * Enable I/O mode and level interrupts on the embedded PCMCIA 482 * card. The PCMCIA card's COR is the first byte of BAR 0. 483 */ 484 bus_space_write_1(localt, localh, 0, WI_COR_IOMODE); 485 sc->wi_cor_offset = 0; 486 487 return (0); 488 } 489 490 int 491 wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc) 492 { 493 bus_space_handle_t ioh; 494 bus_space_tag_t iot = pa->pa_iot; 495 bus_size_t iosize; 496 497 if (pci_mapreg_map(pa, WI_PCI_CBMA, PCI_MAPREG_TYPE_MEM, 498 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 499 printf(": can't map mem space\n"); 500 return (ENXIO); 501 } 502 sc->wi_ltag = iot; 503 sc->wi_lhandle = ioh; 504 sc->wi_btag = iot; 505 sc->wi_bhandle = ioh; 506 sc->sc_pci = 1; 507 508 if (wi_pci_common_attach(pa, sc) != 0) { 509 bus_space_unmap(iot, ioh, iosize); 510 return (ENXIO); 511 } 512 513 /* Do a soft reset of the HFA3842 MAC core */ 514 bus_space_write_2(iot, ioh, WI_PCI_COR_OFFSET, WI_COR_SOFT_RESET); 515 DELAY(100*1000); /* 100 m sec */ 516 bus_space_write_2(iot, ioh, WI_PCI_COR_OFFSET, WI_COR_CLEAR); 517 DELAY(100*1000); /* 100 m sec */ 518 sc->wi_cor_offset = WI_PCI_COR_OFFSET; 519 520 return (0); 521 } 522 523 int 524 wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc) 525 { 526 pci_intr_handle_t ih; 527 pci_chipset_tag_t pc = pa->pa_pc; 528 const char *intrstr; 529 530 /* Make sure interrupts are disabled. */ 531 CSR_WRITE_2(sc, WI_INT_EN, 0); 532 CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF); 533 534 /* Map and establish the interrupt. */ 535 if (pci_intr_map(pa, &ih)) { 536 printf(": couldn't map interrupt\n"); 537 return (ENXIO); 538 } 539 intrstr = pci_intr_string(pc, ih); 540 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc, 541 sc->sc_dev.dv_xname); 542 if (sc->sc_ih == NULL) { 543 printf(": couldn't establish interrupt"); 544 if (intrstr != NULL) 545 printf(" at %s", intrstr); 546 printf("\n"); 547 return (ENXIO); 548 } 549 printf(": %s", intrstr); 550 551 return (0); 552 } 553 554 void 555 wi_pci_plx_print_cis(struct wi_softc *sc) 556 { 557 int i, stringno; 558 char cisbuf[CIS_INFO_SIZE]; 559 char *cis_strings[3]; 560 u_int8_t value; 561 const u_int8_t cis_magic[] = { 562 0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67 563 }; 564 565 /* Make sure the CIS data is valid. */ 566 for (i = 0; i < 8; i++) { 567 value = bus_space_read_1(sc->wi_ltag, sc->wi_lhandle, i * 2); 568 if (value != cis_magic[i]) 569 return; 570 } 571 572 cis_strings[0] = cisbuf; 573 stringno = 0; 574 for (i = 0; i < CIS_INFO_SIZE && stringno < 3; i++) { 575 cisbuf[i] = bus_space_read_1(sc->wi_ltag, 576 sc->wi_lhandle, (CIS_MFG_NAME_OFFSET + i) * 2); 577 if (cisbuf[i] == '\0' && ++stringno < 3) 578 cis_strings[stringno] = &cisbuf[i + 1]; 579 } 580 cisbuf[CIS_INFO_SIZE - 1] = '\0'; 581 printf("\n%s: \"%s, %s, %s\"", WI_PRT_ARG(sc), 582 cis_strings[0], cis_strings[1], cis_strings[2]); 583 } 584