1 /* $OpenBSD: if_rtw_pci.c,v 1.11 2008/06/26 05:42:17 ray Exp $ */ 2 /* $NetBSD: if_rtw_pci.c,v 1.1 2004/09/26 02:33:36 dyoung Exp $ */ 3 4 /*- 5 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center; Charles M. Hannum; and David Young. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * PCI bus front-end for the Realtek RTL8180L 802.11 MAC/BBP chip. 36 * 37 * Derived from the ADMtek ADM8211 PCI bus front-end. 38 * 39 * Derived from the ``Tulip'' PCI bus front-end. 40 */ 41 42 #include <sys/cdefs.h> 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/mbuf.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/socket.h> 49 #include <sys/ioctl.h> 50 #include <sys/errno.h> 51 #include <sys/device.h> 52 53 #include <machine/endian.h> 54 55 #include <net/if.h> 56 #include <net/if_dl.h> 57 #include <net/if_media.h> 58 #ifdef INET 59 #include <netinet/in.h> 60 #include <netinet/if_ether.h> 61 #endif 62 63 #include <net80211/ieee80211_radiotap.h> 64 #include <net80211/ieee80211_var.h> 65 66 #include <machine/bus.h> 67 #include <machine/intr.h> 68 69 #include <dev/ic/rtwreg.h> 70 #include <dev/ic/sa2400reg.h> 71 #include <dev/ic/rtwvar.h> 72 73 #include <dev/pci/pcivar.h> 74 #include <dev/pci/pcireg.h> 75 #include <dev/pci/pcidevs.h> 76 77 int rtw_pci_enable(struct rtw_softc *); 78 void rtw_pci_disable(struct rtw_softc *); 79 80 /* 81 * PCI configuration space registers used by the RTL8180L. 82 */ 83 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 84 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 85 86 struct rtw_pci_softc { 87 struct rtw_softc psc_rtw; /* real RTL8180L softc */ 88 89 pci_intr_handle_t psc_ih; /* interrupt handle */ 90 void *psc_intrcookie; 91 92 pci_chipset_tag_t psc_pc; /* our PCI chipset */ 93 pcitag_t psc_pcitag; /* our PCI tag */ 94 }; 95 96 int rtw_pci_match(struct device *, void *, void *); 97 void rtw_pci_attach(struct device *, struct device *, void *); 98 99 struct cfattach rtw_pci_ca = { 100 sizeof (struct rtw_pci_softc), rtw_pci_match, rtw_pci_attach 101 }; 102 103 const struct pci_matchid rtw_pci_products[] = { 104 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180 }, 105 #ifdef RTW_DEBUG 106 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8185 }, 107 #endif 108 { PCI_VENDOR_BELKIN2, PCI_PRODUCT_BELKIN2_F5D6001 }, 109 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DWL610 }, 110 }; 111 112 int 113 rtw_pci_match(struct device *parent, void *match, void *aux) 114 { 115 return (pci_matchbyid((struct pci_attach_args *)aux, rtw_pci_products, 116 sizeof(rtw_pci_products)/sizeof(rtw_pci_products[0]))); 117 } 118 119 int 120 rtw_pci_enable(struct rtw_softc *sc) 121 { 122 struct rtw_pci_softc *psc = (void *)sc; 123 124 /* Establish the interrupt. */ 125 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih, 126 IPL_NET, rtw_intr, sc, sc->sc_dev.dv_xname); 127 if (psc->psc_intrcookie == NULL) { 128 printf("%s: unable to establish interrupt\n", 129 sc->sc_dev.dv_xname); 130 return (1); 131 } 132 133 return (0); 134 } 135 136 void 137 rtw_pci_disable(struct rtw_softc *sc) 138 { 139 struct rtw_pci_softc *psc = (void *)sc; 140 141 /* Unhook the interrupt handler. */ 142 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 143 psc->psc_intrcookie = NULL; 144 } 145 146 void 147 rtw_pci_attach(struct device *parent, struct device *self, void *aux) 148 { 149 struct rtw_pci_softc *psc = (void *) self; 150 struct rtw_softc *sc = &psc->psc_rtw; 151 struct rtw_regs *regs = &sc->sc_regs; 152 struct pci_attach_args *pa = aux; 153 pci_chipset_tag_t pc = pa->pa_pc; 154 const char *intrstr = NULL; 155 bus_space_tag_t iot, memt; 156 bus_space_handle_t ioh, memh; 157 int ioh_valid, memh_valid; 158 int state; 159 160 psc->psc_pc = pa->pa_pc; 161 psc->psc_pcitag = pa->pa_tag; 162 163 /* 164 * No power management hooks. 165 * XXX Maybe we should add some! 166 */ 167 sc->sc_flags |= RTW_F_ENABLED; 168 169 /* 170 * Get revision info, and set some chip-specific variables. 171 */ 172 sc->sc_rev = PCI_REVISION(pa->pa_class); 173 174 /* 175 * Check to see if the device is in power-save mode, and 176 * being it out if necessary. 177 * 178 * XXX This code comes almost verbatim from if_tlp_pci.c. I do 179 * not understand it. Tulip clears the "sleep mode" bit in the 180 * CFDA register, first. There is an equivalent (?) register at the 181 * same place in the ADM8211, but the docs do not assign its bits 182 * any meanings. -dcy 183 */ 184 state = pci_set_powerstate(pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 185 if (state == PCI_PMCSR_STATE_D3) { 186 /* 187 * The card has lost all configuration data in 188 * this state, so punt. 189 */ 190 printf(": unable to wake up from power state D3, " 191 "reboot required.\n"); 192 return; 193 } 194 195 /* 196 * Map the device. 197 */ 198 ioh_valid = (pci_mapreg_map(pa, RTW_PCI_IOBA, 199 PCI_MAPREG_TYPE_IO, 0, 200 &iot, &ioh, NULL, NULL, 0) == 0); 201 memh_valid = (pci_mapreg_map(pa, RTW_PCI_MMBA, 202 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 203 &memt, &memh, NULL, NULL, 0) == 0); 204 205 if (memh_valid) { 206 regs->r_bt = memt; 207 regs->r_bh = memh; 208 } else if (ioh_valid) { 209 regs->r_bt = iot; 210 regs->r_bh = ioh; 211 } else { 212 printf(": unable to map device registers\n"); 213 return; 214 } 215 216 sc->sc_dmat = pa->pa_dmat; 217 218 /* 219 * Map and establish our interrupt. 220 */ 221 if (pci_intr_map(pa, &psc->psc_ih)) { 222 printf(": unable to map interrupt\n"); 223 return; 224 } 225 intrstr = pci_intr_string(pc, psc->psc_ih); 226 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET, 227 rtw_intr, sc, sc->sc_dev.dv_xname); 228 if (psc->psc_intrcookie == NULL) { 229 printf(": unable to establish interrupt"); 230 if (intrstr != NULL) 231 printf(" at %s", intrstr); 232 printf("\n"); 233 return; 234 } 235 236 printf(": %s\n", intrstr); 237 238 sc->sc_enable = rtw_pci_enable; 239 sc->sc_disable = rtw_pci_disable; 240 241 /* 242 * Finish off the attach. 243 */ 244 rtw_attach(sc); 245 } 246