1 /* $OpenBSD: if_re_pci.c,v 1.48 2015/03/14 03:38:48 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2005 Peter Valchev <pvalchev@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * PCI front-end for the Realtek 8169 21 */ 22 23 #include <sys/param.h> 24 #include <sys/endian.h> 25 #include <sys/systm.h> 26 #include <sys/sockio.h> 27 #include <sys/mbuf.h> 28 #include <sys/malloc.h> 29 #include <sys/kernel.h> 30 #include <sys/device.h> 31 #include <sys/timeout.h> 32 #include <sys/socket.h> 33 34 #include <net/if.h> 35 #include <net/if_dl.h> 36 #include <net/if_media.h> 37 38 #include <netinet/in.h> 39 #include <netinet/if_ether.h> 40 41 #include <dev/mii/miivar.h> 42 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pcivar.h> 45 #include <dev/pci/pcidevs.h> 46 47 #include <dev/ic/rtl81x9reg.h> 48 #include <dev/ic/revar.h> 49 50 struct re_pci_softc { 51 /* General */ 52 struct rl_softc sc_rl; 53 54 /* PCI-specific data */ 55 void *sc_ih; 56 pci_chipset_tag_t sc_pc; 57 pcitag_t sc_pcitag; 58 59 bus_size_t sc_iosize; 60 }; 61 62 const struct pci_matchid re_pci_devices[] = { 63 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CGLAPCIGT }, 64 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T }, 65 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE530T_C1 }, 66 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E }, 67 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168 }, 68 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169 }, 69 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC }, 70 { PCI_VENDOR_TTTECH, PCI_PRODUCT_TTTECH_MC322 }, 71 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902 } 72 }; 73 74 #define RE_LINKSYS_EG1032_SUBID 0x00241737 75 76 int re_pci_probe(struct device *, void *, void *); 77 void re_pci_attach(struct device *, struct device *, void *); 78 int re_pci_detach(struct device *, int); 79 int re_pci_activate(struct device *, int); 80 81 /* 82 * PCI autoconfig definitions 83 */ 84 struct cfattach re_pci_ca = { 85 sizeof(struct re_pci_softc), 86 re_pci_probe, 87 re_pci_attach, 88 re_pci_detach, 89 re_pci_activate 90 }; 91 92 /* 93 * Probe for a Realtek 8169/8110 chip. Check the PCI vendor and device 94 * IDs against our list and return a device name if we find a match. 95 */ 96 int 97 re_pci_probe(struct device *parent, void *match, void *aux) 98 { 99 struct pci_attach_args *pa = aux; 100 pci_chipset_tag_t pc = pa->pa_pc; 101 pcireg_t subid; 102 103 subid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 104 105 /* C+ mode 8139's */ 106 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK && 107 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139 && 108 PCI_REVISION(pa->pa_class) == 0x20) 109 return (1); 110 111 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS && 112 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 && 113 subid == RE_LINKSYS_EG1032_SUBID) 114 return (1); 115 116 return (pci_matchbyid((struct pci_attach_args *)aux, re_pci_devices, 117 nitems(re_pci_devices))); 118 } 119 120 /* 121 * PCI-specific attach routine 122 */ 123 void 124 re_pci_attach(struct device *parent, struct device *self, void *aux) 125 { 126 struct re_pci_softc *psc = (struct re_pci_softc *)self; 127 struct rl_softc *sc = &psc->sc_rl; 128 struct pci_attach_args *pa = aux; 129 pci_chipset_tag_t pc = pa->pa_pc; 130 pci_intr_handle_t ih; 131 const char *intrstr = NULL; 132 133 pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 134 135 #ifndef SMALL_KERNEL 136 /* Enable power management for wake on lan. */ 137 pci_conf_write(pc, pa->pa_tag, RL_PCI_PMCSR, RL_PME_EN); 138 #endif 139 140 /* 141 * Map control/status registers. 142 */ 143 if (pci_mapreg_map(pa, RL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 144 &sc->rl_btag, &sc->rl_bhandle, NULL, &psc->sc_iosize, 0)) { 145 if (pci_mapreg_map(pa, RL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 146 &sc->rl_btag, &sc->rl_bhandle, NULL, &psc->sc_iosize, 0)) { 147 printf(": can't map mem or i/o space\n"); 148 return; 149 } 150 } 151 152 /* Allocate interrupt */ 153 if (pci_intr_map_msi(pa, &ih) == 0) 154 sc->rl_flags |= RL_FLAG_MSI; 155 else if (pci_intr_map(pa, &ih) != 0) { 156 printf(": couldn't map interrupt\n"); 157 return; 158 } 159 intrstr = pci_intr_string(pc, ih); 160 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc, 161 sc->sc_dev.dv_xname); 162 if (psc->sc_ih == NULL) { 163 printf(": couldn't establish interrupt"); 164 if (intrstr != NULL) 165 printf(" at %s", intrstr); 166 return; 167 } 168 169 sc->sc_dmat = pa->pa_dmat; 170 psc->sc_pc = pc; 171 172 /* 173 * PCI Express check. 174 */ 175 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PCIEXPRESS, 176 NULL, NULL)) 177 sc->rl_flags |= RL_FLAG_PCIE; 178 179 if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK && 180 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139)) { 181 u_int8_t cfg; 182 183 CSR_WRITE_1(sc, RL_EECMD, RL_EE_MODE); 184 cfg = CSR_READ_1(sc, RL_CFG2); 185 if (sc->rl_flags & RL_FLAG_MSI) { 186 cfg |= RL_CFG2_MSI; 187 CSR_WRITE_1(sc, RL_CFG2, cfg); 188 } else { 189 if ((cfg & RL_CFG2_MSI) != 0) { 190 cfg &= ~RL_CFG2_MSI; 191 CSR_WRITE_1(sc, RL_CFG2, cfg); 192 } 193 } 194 CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF); 195 } 196 197 sc->sc_product = PCI_PRODUCT(pa->pa_id); 198 199 /* Call bus-independent attach routine */ 200 if (re_attach(sc, intrstr)) { 201 pci_intr_disestablish(pc, psc->sc_ih); 202 bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->sc_iosize); 203 } 204 } 205 206 int 207 re_pci_detach(struct device *self, int flags) 208 { 209 struct re_pci_softc *psc = (struct re_pci_softc *)self; 210 struct rl_softc *sc = &psc->sc_rl; 211 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 212 213 /* Remove timeout handler */ 214 timeout_del(&sc->timer_handle); 215 216 /* Detach PHY */ 217 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) 218 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 219 220 /* Delete media stuff */ 221 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 222 ether_ifdetach(ifp); 223 if_detach(ifp); 224 225 /* Disable interrupts */ 226 if (psc->sc_ih != NULL) 227 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 228 229 /* Free pci resources */ 230 bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->sc_iosize); 231 232 return (0); 233 } 234 235 int 236 re_pci_activate(struct device *self, int act) 237 { 238 struct re_pci_softc *psc = (struct re_pci_softc *)self; 239 struct rl_softc *sc = &psc->sc_rl; 240 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 241 242 switch (act) { 243 case DVACT_SUSPEND: 244 if (ifp->if_flags & IFF_RUNNING) 245 re_stop(ifp); 246 break; 247 case DVACT_RESUME: 248 if (ifp->if_flags & IFF_UP) 249 re_init(ifp); 250 break; 251 } 252 253 return (0); 254 } 255