1 /* $OpenBSD: if_re_pci.c,v 1.43 2014/10/24 23:30:05 brad Exp $ */ 2 3 /* 4 * Copyright (c) 2005 Peter Valchev <pvalchev@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* 20 * PCI front-end for the Realtek 8169 21 */ 22 23 #include <sys/param.h> 24 #include <sys/endian.h> 25 #include <sys/systm.h> 26 #include <sys/sockio.h> 27 #include <sys/mbuf.h> 28 #include <sys/malloc.h> 29 #include <sys/kernel.h> 30 #include <sys/device.h> 31 #include <sys/timeout.h> 32 #include <sys/socket.h> 33 34 #include <net/if.h> 35 #include <net/if_dl.h> 36 #include <net/if_media.h> 37 38 #ifdef INET 39 #include <netinet/in.h> 40 #include <netinet/if_ether.h> 41 #endif 42 43 #include <dev/mii/mii.h> 44 #include <dev/mii/miivar.h> 45 46 #include <dev/pci/pcireg.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcidevs.h> 49 50 #include <dev/ic/rtl81x9reg.h> 51 #include <dev/ic/revar.h> 52 53 struct re_pci_softc { 54 /* General */ 55 struct rl_softc sc_rl; 56 57 /* PCI-specific data */ 58 void *sc_ih; 59 pci_chipset_tag_t sc_pc; 60 pcitag_t sc_pcitag; 61 62 bus_size_t sc_iosize; 63 }; 64 65 const struct pci_matchid re_pci_devices[] = { 66 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CGLAPCIGT }, 67 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T }, 68 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE530T_C1 }, 69 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E }, 70 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168 }, 71 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169 }, 72 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC }, 73 { PCI_VENDOR_TTTECH, PCI_PRODUCT_TTTECH_MC322 }, 74 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902 } 75 }; 76 77 #define RE_LINKSYS_EG1032_SUBID 0x00241737 78 79 int re_pci_probe(struct device *, void *, void *); 80 void re_pci_attach(struct device *, struct device *, void *); 81 int re_pci_detach(struct device *, int); 82 int re_pci_activate(struct device *, int); 83 84 /* 85 * PCI autoconfig definitions 86 */ 87 struct cfattach re_pci_ca = { 88 sizeof(struct re_pci_softc), 89 re_pci_probe, 90 re_pci_attach, 91 re_pci_detach, 92 re_pci_activate 93 }; 94 95 /* 96 * Probe for a Realtek 8169/8110 chip. Check the PCI vendor and device 97 * IDs against our list and return a device name if we find a match. 98 */ 99 int 100 re_pci_probe(struct device *parent, void *match, void *aux) 101 { 102 struct pci_attach_args *pa = aux; 103 pci_chipset_tag_t pc = pa->pa_pc; 104 pcireg_t subid; 105 106 subid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 107 108 /* C+ mode 8139's */ 109 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK && 110 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139 && 111 PCI_REVISION(pa->pa_class) == 0x20) 112 return (1); 113 114 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS && 115 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 && 116 subid == RE_LINKSYS_EG1032_SUBID) 117 return (1); 118 119 return (pci_matchbyid((struct pci_attach_args *)aux, re_pci_devices, 120 nitems(re_pci_devices))); 121 } 122 123 /* 124 * PCI-specific attach routine 125 */ 126 void 127 re_pci_attach(struct device *parent, struct device *self, void *aux) 128 { 129 struct re_pci_softc *psc = (struct re_pci_softc *)self; 130 struct rl_softc *sc = &psc->sc_rl; 131 struct pci_attach_args *pa = aux; 132 pci_chipset_tag_t pc = pa->pa_pc; 133 pci_intr_handle_t ih; 134 const char *intrstr = NULL; 135 136 pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 137 138 #ifndef SMALL_KERNEL 139 /* Enable power management for wake on lan. */ 140 pci_conf_write(pc, pa->pa_tag, RL_PCI_PMCSR, RL_PME_EN); 141 #endif 142 143 /* 144 * Map control/status registers. 145 */ 146 if (pci_mapreg_map(pa, RL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 147 &sc->rl_btag, &sc->rl_bhandle, NULL, &psc->sc_iosize, 0)) { 148 if (pci_mapreg_map(pa, RL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 149 &sc->rl_btag, &sc->rl_bhandle, NULL, &psc->sc_iosize, 0)) { 150 printf(": can't map mem or i/o space\n"); 151 return; 152 } 153 } 154 155 /* Allocate interrupt */ 156 if (pci_intr_map_msi(pa, &ih) == 0) 157 sc->rl_flags |= RL_FLAG_MSI; 158 else if (pci_intr_map(pa, &ih) != 0) { 159 printf(": couldn't map interrupt\n"); 160 return; 161 } 162 intrstr = pci_intr_string(pc, ih); 163 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc, 164 sc->sc_dev.dv_xname); 165 if (psc->sc_ih == NULL) { 166 printf(": couldn't establish interrupt"); 167 if (intrstr != NULL) 168 printf(" at %s", intrstr); 169 return; 170 } 171 172 sc->sc_dmat = pa->pa_dmat; 173 psc->sc_pc = pc; 174 175 /* 176 * PCI Express check. 177 */ 178 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PCIEXPRESS, 179 NULL, NULL)) 180 sc->rl_flags |= RL_FLAG_PCIE; 181 182 if (!(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK && 183 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139)) { 184 u_int8_t cfg; 185 186 CSR_WRITE_1(sc, RL_EECMD, RL_EE_MODE); 187 cfg = CSR_READ_1(sc, RL_CFG2); 188 if (sc->rl_flags & RL_FLAG_MSI) { 189 cfg |= RL_CFG2_MSI; 190 CSR_WRITE_1(sc, RL_CFG2, cfg); 191 } else { 192 if ((cfg & RL_CFG2_MSI) != 0) { 193 cfg &= ~RL_CFG2_MSI; 194 CSR_WRITE_1(sc, RL_CFG2, cfg); 195 } 196 } 197 CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF); 198 } 199 200 sc->sc_product = PCI_PRODUCT(pa->pa_id); 201 202 /* Call bus-independent attach routine */ 203 if (re_attach(sc, intrstr)) { 204 pci_intr_disestablish(pc, psc->sc_ih); 205 bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->sc_iosize); 206 } 207 } 208 209 int 210 re_pci_detach(struct device *self, int flags) 211 { 212 struct re_pci_softc *psc = (struct re_pci_softc *)self; 213 struct rl_softc *sc = &psc->sc_rl; 214 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 215 216 /* Remove timeout handler */ 217 timeout_del(&sc->timer_handle); 218 219 /* Detach PHY */ 220 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) 221 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 222 223 /* Delete media stuff */ 224 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 225 ether_ifdetach(ifp); 226 if_detach(ifp); 227 228 /* Disable interrupts */ 229 if (psc->sc_ih != NULL) 230 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 231 232 /* Free pci resources */ 233 bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->sc_iosize); 234 235 return (0); 236 } 237 238 int 239 re_pci_activate(struct device *self, int act) 240 { 241 struct re_pci_softc *psc = (struct re_pci_softc *)self; 242 struct rl_softc *sc = &psc->sc_rl; 243 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 244 245 switch (act) { 246 case DVACT_SUSPEND: 247 if (ifp->if_flags & IFF_RUNNING) 248 re_stop(ifp); 249 break; 250 case DVACT_RESUME: 251 if (ifp->if_flags & IFF_UP) 252 re_init(ifp); 253 break; 254 } 255 256 return (0); 257 } 258