1 /* $OpenBSD: if_ix.h,v 1.13 2011/06/15 00:03:00 dlg Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2008, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe.h,v 1.4 2008/05/16 18:46:30 jfv Exp $*/ 36 37 #ifndef _IX_H_ 38 #define _IX_H_ 39 40 #include <dev/pci/ixgbe.h> 41 42 /* Tunables */ 43 44 /* 45 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 46 * number of transmit descriptors allocated by the driver. Increasing this 47 * value allows the driver to queue more transmits. Each descriptor is 16 48 * bytes. Performance tests have show the 2K value to be optimal for top 49 * performance. 50 */ 51 #define DEFAULT_TXD 256 52 #define PERFORM_TXD 2048 53 #define MAX_TXD 4096 54 #define MIN_TXD 64 55 56 /* 57 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 58 * number of receive descriptors allocated for each RX queue. Increasing this 59 * value allows the driver to buffer more incoming packets. Each descriptor 60 * is 16 bytes. A receive buffer is also allocated for each descriptor. 61 * 62 * Note: with 8 rings and a dual port card, it is possible to bump up 63 * against the system mbuf pool limit, you can tune nmbclusters 64 * to adjust for this. 65 */ 66 #define DEFAULT_RXD 256 67 #define PERFORM_RXD 2048 68 #define MAX_RXD 4096 69 #define MIN_RXD 64 70 71 /* Alignment for rings */ 72 #define DBA_ALIGN 128 73 74 /* 75 * This parameter controls the duration of transmit watchdog timer. 76 */ 77 #define IXGBE_TX_TIMEOUT 5 /* set to 5 seconds */ 78 79 /* 80 * This parameters control when the driver calls the routine to reclaim 81 * transmit descriptors. 82 */ 83 #define IXGBE_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 8) 84 #define IXGBE_TX_OP_THRESHOLD (sc->num_tx_desc / 32) 85 86 #define IXGBE_MAX_FRAME_SIZE 0x3F00 87 88 /* Flow control constants */ 89 #define IXGBE_FC_PAUSE 0xFFFF 90 #define IXGBE_FC_HI 0x20000 91 #define IXGBE_FC_LO 0x10000 92 93 /* Defines for printing debug information */ 94 #define DEBUG_INIT 0 95 #define DEBUG_IOCTL 0 96 #define DEBUG_HW 0 97 98 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 99 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 100 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 101 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 102 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 103 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 104 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 105 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 106 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 107 108 #define MAX_NUM_MULTICAST_ADDRESSES 128 109 #define IXGBE_82598_SCATTER 100 110 #define IXGBE_82599_SCATTER 32 111 #define IXGBE_MSIX_BAR 3 112 #define IXGBE_TSO_SIZE 65535 113 #define IXGBE_TX_BUFFER_SIZE ((uint32_t) 1514) 114 #define IXGBE_RX_HDR 128 115 #define IXGBE_VFTA_SIZE 128 116 #define IXGBE_BR_SIZE 4096 117 #define IXGBE_QUEUE_IDLE 0 118 #define IXGBE_QUEUE_WORKING 1 119 #define IXGBE_QUEUE_HUNG 2 120 121 /* 122 * Interrupt Moderation parameters 123 */ 124 #define IXGBE_LOW_LATENCY 128 125 #define IXGBE_AVE_LATENCY 400 126 #define IXGBE_BULK_LATENCY 1200 127 #define IXGBE_LINK_ITR 2000 128 129 /* Used for auto RX queue configuration */ 130 extern int mp_ncpus; 131 132 struct ixgbe_tx_buf { 133 uint32_t eop_index; 134 struct mbuf *m_head; 135 bus_dmamap_t map; 136 }; 137 138 struct ixgbe_rx_buf { 139 struct mbuf *m_head; 140 struct mbuf *m_pack; 141 struct mbuf *fmp; 142 bus_dmamap_t hmap; 143 bus_dmamap_t pmap; 144 }; 145 146 /* 147 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 148 */ 149 struct ixgbe_dma_alloc { 150 caddr_t dma_vaddr; 151 bus_dma_tag_t dma_tag; 152 bus_dmamap_t dma_map; 153 bus_dma_segment_t dma_seg; 154 bus_size_t dma_size; 155 int dma_nseg; 156 }; 157 158 /* 159 * Driver queue struct: this is the interrupt container 160 * for the associated tx and rx ring. 161 */ 162 struct ix_queue { 163 struct ix_softc *sc; 164 uint32_t msix; /* This queue's MSIX vector */ 165 uint32_t eims; /* This queue's EIMS bit */ 166 uint32_t eitr_setting; 167 /* struct resource *res; */ 168 void *tag; 169 struct tx_ring *txr; 170 struct rx_ring *rxr; 171 uint64_t irqs; 172 }; 173 174 /* 175 * The transmit ring, one per tx queue 176 */ 177 struct tx_ring { 178 struct ix_softc *sc; 179 struct mutex tx_mtx; 180 uint32_t me; 181 int queue_status; 182 uint32_t watchdog_timer; 183 union ixgbe_adv_tx_desc *tx_base; 184 struct ixgbe_dma_alloc txdma; 185 uint32_t next_avail_desc; 186 uint32_t next_to_clean; 187 struct ixgbe_tx_buf *tx_buffers; 188 volatile uint16_t tx_avail; 189 uint32_t txd_cmd; 190 bus_dma_tag_t txtag; 191 uint32_t bytes; /* Used for AIM calc */ 192 uint32_t packets; 193 /* Soft Stats */ 194 uint64_t no_desc_avail; 195 uint64_t tx_packets; 196 }; 197 198 199 /* 200 * The Receive ring, one per rx queue 201 */ 202 struct rx_ring { 203 struct ix_softc *sc; 204 struct mutex rx_mtx; 205 uint32_t me; 206 union ixgbe_adv_rx_desc *rx_base; 207 struct ixgbe_dma_alloc rxdma; 208 #if 0 209 struct lro_ctrl lro; 210 #endif 211 int lro_enabled; 212 int hdr_split; 213 int hw_rsc; 214 int discard; 215 unsigned int next_to_refresh; 216 unsigned int next_to_check; 217 unsigned int last_desc_filled; 218 int rx_ndescs; 219 struct ixgbe_rx_buf *rx_buffers; 220 221 uint32_t bytes; /* Used for AIM calc */ 222 uint32_t packets; 223 224 /* Soft stats */ 225 uint64_t rx_irq; 226 uint64_t rx_split_packets; 227 uint64_t rx_packets; 228 uint64_t rx_bytes; 229 uint64_t rx_discarded; 230 uint64_t rsc_num; 231 }; 232 233 /* Our adapter structure */ 234 struct ix_softc { 235 struct device dev; 236 struct arpcom arpcom; 237 238 struct ixgbe_hw hw; 239 struct ixgbe_osdep osdep; 240 241 /* struct resource *pci_mem; */ 242 /* struct resource *msix_mem; */ 243 244 void *tag; 245 /* struct resource *res; */ 246 247 struct ifmedia media; 248 struct timeout timer; 249 struct timeout rx_refill; 250 int msix; 251 int if_flags; 252 253 struct mutex core_mtx; 254 255 uint16_t num_vlans; 256 uint16_t num_queues; 257 258 /* 259 * Shadow VFTA table, this is needed because 260 * the real vlan filter table gets cleared during 261 * a soft reset and the driver needs to be able 262 * to repopulate it. 263 */ 264 uint32_t shadow_vfta[IXGBE_VFTA_SIZE]; 265 266 /* Info about the interface */ 267 uint optics; 268 int advertise; /* link speeds */ 269 int link_active; 270 uint16_t max_frame_size; 271 uint16_t num_segs; 272 uint32_t link_speed; 273 int link_up; 274 uint32_t linkvec; 275 276 /* Mbuf cluster size */ 277 uint32_t rx_mbuf_sz; 278 279 /* Support for pluggable optics */ 280 int sfp_probe; 281 workq_fn link_task; /* Link tasklet */ 282 workq_fn mod_task; /* SFP tasklet */ 283 workq_fn msf_task; /* Multispeed Fiber */ 284 285 /* 286 * Queues: 287 * This is the irq holder, it has 288 * and RX/TX pair or rings associated 289 * with it. 290 */ 291 struct ix_queue *queues; 292 293 /* 294 * Transmit rings: 295 * Allocated at run time, an array of rings. 296 */ 297 struct tx_ring *tx_rings; 298 int num_tx_desc; 299 300 /* 301 * Receive rings: 302 * Allocated at run time, an array of rings. 303 */ 304 struct rx_ring *rx_rings; 305 uint64_t que_mask; 306 int num_rx_desc; 307 uint32_t rx_process_limit; 308 309 /* Multicast array memory */ 310 uint8_t *mta; 311 312 /* Misc stats maintained by the driver */ 313 unsigned long dropped_pkts; 314 unsigned long mbuf_defrag_failed; 315 unsigned long mbuf_header_failed; 316 unsigned long mbuf_packet_failed; 317 unsigned long no_tx_map_avail; 318 unsigned long no_tx_dma_setup; 319 unsigned long watchdog_events; 320 unsigned long tso_tx; 321 unsigned long link_irq; 322 323 struct ixgbe_hw_stats stats; 324 }; 325 326 #endif /* _IX_H_ */ 327