1 /* $OpenBSD: if_ix.h,v 1.15 2012/07/05 14:36:22 mikeb Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2008, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe.h,v 1.4 2008/05/16 18:46:30 jfv Exp $*/ 36 37 #ifndef _IX_H_ 38 #define _IX_H_ 39 40 #include <dev/pci/ixgbe.h> 41 42 /* Tunables */ 43 44 /* 45 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 46 * number of transmit descriptors allocated by the driver. Increasing this 47 * value allows the driver to queue more transmits. Each descriptor is 16 48 * bytes. Performance tests have show the 2K value to be optimal for top 49 * performance. 50 */ 51 #define DEFAULT_TXD 256 52 #define PERFORM_TXD 2048 53 #define MAX_TXD 4096 54 #define MIN_TXD 64 55 56 /* 57 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 58 * number of receive descriptors allocated for each RX queue. Increasing this 59 * value allows the driver to buffer more incoming packets. Each descriptor 60 * is 16 bytes. A receive buffer is also allocated for each descriptor. 61 * 62 * Note: with 8 rings and a dual port card, it is possible to bump up 63 * against the system mbuf pool limit, you can tune nmbclusters 64 * to adjust for this. 65 */ 66 #define DEFAULT_RXD 256 67 #define PERFORM_RXD 2048 68 #define MAX_RXD 4096 69 #define MIN_RXD 64 70 71 /* Alignment for rings */ 72 #define DBA_ALIGN 128 73 74 /* 75 * This parameter controls the duration of transmit watchdog timer. 76 */ 77 #define IXGBE_TX_TIMEOUT 5 /* set to 5 seconds */ 78 79 /* 80 * This parameters control when the driver calls the routine to reclaim 81 * transmit descriptors. 82 */ 83 #define IXGBE_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 16) 84 #define IXGBE_TX_OP_THRESHOLD (sc->num_tx_desc / 32) 85 86 #define IXGBE_MAX_FRAME_SIZE 0x3F00 87 88 /* Flow control constants */ 89 #define IXGBE_FC_PAUSE 0xFFFF 90 #define IXGBE_FC_HI 0x20000 91 #define IXGBE_FC_LO 0x10000 92 93 /* Defines for printing debug information */ 94 #define DEBUG_INIT 0 95 #define DEBUG_IOCTL 0 96 #define DEBUG_HW 0 97 98 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 99 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 100 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 101 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 102 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 103 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 104 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 105 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 106 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 107 108 #define MAX_NUM_MULTICAST_ADDRESSES 128 109 #define IXGBE_82598_SCATTER 100 110 #define IXGBE_82599_SCATTER 32 111 #define IXGBE_MSIX_BAR 3 112 #define IXGBE_TSO_SIZE 65535 113 #define IXGBE_TX_BUFFER_SIZE ((uint32_t) 1514) 114 #define IXGBE_RX_HDR 128 115 #define IXGBE_VFTA_SIZE 128 116 #define IXGBE_BR_SIZE 4096 117 #define IXGBE_QUEUE_IDLE 0 118 #define IXGBE_QUEUE_WORKING 1 119 #define IXGBE_QUEUE_HUNG 2 120 121 /* 122 * Interrupt Moderation parameters 123 */ 124 #define IXGBE_INTS_PER_SEC 8000 125 126 /* Used for auto RX queue configuration */ 127 extern int mp_ncpus; 128 129 struct ixgbe_tx_buf { 130 uint32_t eop_index; 131 struct mbuf *m_head; 132 bus_dmamap_t map; 133 }; 134 135 struct ixgbe_rx_buf { 136 struct mbuf *m_head; 137 struct mbuf *m_pack; 138 struct mbuf *fmp; 139 bus_dmamap_t hmap; 140 bus_dmamap_t pmap; 141 }; 142 143 /* 144 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 145 */ 146 struct ixgbe_dma_alloc { 147 caddr_t dma_vaddr; 148 bus_dma_tag_t dma_tag; 149 bus_dmamap_t dma_map; 150 bus_dma_segment_t dma_seg; 151 bus_size_t dma_size; 152 int dma_nseg; 153 }; 154 155 /* 156 * Driver queue struct: this is the interrupt container 157 * for the associated tx and rx ring. 158 */ 159 struct ix_queue { 160 struct ix_softc *sc; 161 uint32_t msix; /* This queue's MSIX vector */ 162 uint32_t eims; /* This queue's EIMS bit */ 163 uint32_t eitr_setting; 164 /* struct resource *res; */ 165 void *tag; 166 struct tx_ring *txr; 167 struct rx_ring *rxr; 168 uint64_t irqs; 169 }; 170 171 /* 172 * The transmit ring, one per tx queue 173 */ 174 struct tx_ring { 175 struct ix_softc *sc; 176 struct mutex tx_mtx; 177 uint32_t me; 178 int queue_status; 179 uint32_t watchdog_timer; 180 union ixgbe_adv_tx_desc *tx_base; 181 struct ixgbe_dma_alloc txdma; 182 uint32_t next_avail_desc; 183 uint32_t next_to_clean; 184 struct ixgbe_tx_buf *tx_buffers; 185 volatile uint16_t tx_avail; 186 uint32_t txd_cmd; 187 bus_dma_tag_t txtag; 188 uint32_t bytes; /* Used for AIM calc */ 189 uint32_t packets; 190 /* Soft Stats */ 191 uint64_t tx_packets; 192 }; 193 194 195 /* 196 * The Receive ring, one per rx queue 197 */ 198 struct rx_ring { 199 struct ix_softc *sc; 200 struct mutex rx_mtx; 201 uint32_t me; 202 union ixgbe_adv_rx_desc *rx_base; 203 struct ixgbe_dma_alloc rxdma; 204 #if 0 205 struct lro_ctrl lro; 206 #endif 207 int lro_enabled; 208 int hdr_split; 209 int hw_rsc; 210 int discard; 211 unsigned int next_to_refresh; 212 unsigned int next_to_check; 213 unsigned int last_desc_filled; 214 int rx_ndescs; 215 struct ixgbe_rx_buf *rx_buffers; 216 217 uint32_t bytes; /* Used for AIM calc */ 218 uint32_t packets; 219 220 /* Soft stats */ 221 uint64_t rx_irq; 222 uint64_t rx_split_packets; 223 uint64_t rx_packets; 224 uint64_t rx_bytes; 225 uint64_t rx_discarded; 226 uint64_t rsc_num; 227 }; 228 229 /* Our adapter structure */ 230 struct ix_softc { 231 struct device dev; 232 struct arpcom arpcom; 233 234 struct ixgbe_hw hw; 235 struct ixgbe_osdep osdep; 236 237 /* struct resource *pci_mem; */ 238 /* struct resource *msix_mem; */ 239 240 void *tag; 241 /* struct resource *res; */ 242 243 struct ifmedia media; 244 struct timeout timer; 245 struct timeout rx_refill; 246 int msix; 247 int if_flags; 248 249 struct mutex core_mtx; 250 251 uint16_t num_vlans; 252 uint16_t num_queues; 253 254 /* 255 * Shadow VFTA table, this is needed because 256 * the real vlan filter table gets cleared during 257 * a soft reset and the driver needs to be able 258 * to repopulate it. 259 */ 260 uint32_t shadow_vfta[IXGBE_VFTA_SIZE]; 261 262 /* Info about the interface */ 263 uint optics; 264 int advertise; /* link speeds */ 265 int link_active; 266 uint16_t max_frame_size; 267 uint16_t num_segs; 268 uint32_t link_speed; 269 int link_up; 270 uint32_t linkvec; 271 272 /* Mbuf cluster size */ 273 uint32_t rx_mbuf_sz; 274 275 /* Support for pluggable optics */ 276 int sfp_probe; 277 workq_fn link_task; /* Link tasklet */ 278 workq_fn mod_task; /* SFP tasklet */ 279 workq_fn msf_task; /* Multispeed Fiber */ 280 281 /* 282 * Queues: 283 * This is the irq holder, it has 284 * and RX/TX pair or rings associated 285 * with it. 286 */ 287 struct ix_queue *queues; 288 289 /* 290 * Transmit rings: 291 * Allocated at run time, an array of rings. 292 */ 293 struct tx_ring *tx_rings; 294 int num_tx_desc; 295 296 /* 297 * Receive rings: 298 * Allocated at run time, an array of rings. 299 */ 300 struct rx_ring *rx_rings; 301 uint64_t que_mask; 302 int num_rx_desc; 303 uint32_t rx_process_limit; 304 305 /* Multicast array memory */ 306 uint8_t *mta; 307 308 /* Misc stats maintained by the driver */ 309 unsigned long dropped_pkts; 310 unsigned long mbuf_defrag_failed; 311 unsigned long mbuf_header_failed; 312 unsigned long mbuf_packet_failed; 313 unsigned long no_tx_map_avail; 314 unsigned long no_tx_dma_setup; 315 unsigned long watchdog_events; 316 unsigned long tso_tx; 317 unsigned long link_irq; 318 319 struct ixgbe_hw_stats stats; 320 }; 321 322 #endif /* _IX_H_ */ 323