1 /* $OpenBSD: if_ix.h,v 1.3 2008/06/08 21:15:34 reyk Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2008, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe.h,v 1.4 2008/05/16 18:46:30 jfv Exp $*/ 36 37 #ifndef _IX_H_ 38 #define _IX_H_ 39 40 #include <dev/pci/ixgbe.h> 41 42 #if 0 43 #include "tcp_lro.h" 44 #endif 45 46 /* Tunables */ 47 48 /* 49 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 50 * number of transmit descriptors allocated by the driver. Increasing this 51 * value allows the driver to queue more transmits. Each descriptor is 16 52 * bytes. Performance tests have show the 2K value to be optimal for top 53 * performance. 54 */ 55 #define DEFAULT_TXD 256 56 #define PERFORM_TXD 2048 57 #define MAX_TXD 4096 58 #define MIN_TXD 64 59 60 /* 61 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 62 * number of receive descriptors allocated for each RX queue. Increasing this 63 * value allows the driver to buffer more incoming packets. Each descriptor 64 * is 16 bytes. A receive buffer is also allocated for each descriptor. 65 * 66 * Note: with 8 rings and a dual port card, it is possible to bump up 67 * against the system mbuf pool limit, you can tune nmbclusters 68 * to adjust for this. 69 */ 70 #define DEFAULT_RXD 256 71 #define PERFORM_RXD 2048 72 #define MAX_RXD 4096 73 #define MIN_RXD 64 74 75 /* Alignment for rings */ 76 #define DBA_ALIGN 128 77 78 /* 79 * This parameter controls the maximum no of times the driver will loop in 80 * the isr. Minimum Value = 1 81 */ 82 #define MAX_INTR 10 83 84 /* 85 * This parameter controls the duration of transmit watchdog timer. 86 */ 87 #define IXGBE_TX_TIMEOUT 5 /* set to 5 seconds */ 88 89 /* 90 * This parameters control when the driver calls the routine to reclaim 91 * transmit descriptors. 92 */ 93 #define IXGBE_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 8) 94 #define IXGBE_TX_OP_THRESHOLD (sc->num_tx_desc / 32) 95 96 #define IXGBE_MAX_FRAME_SIZE 0x3F00 97 98 /* Flow control constants */ 99 #define IXGBE_FC_PAUSE 0x680 100 #define IXGBE_FC_HI 0x20000 101 #define IXGBE_FC_LO 0x10000 102 103 /* Defines for printing debug information */ 104 #define DEBUG_INIT 0 105 #define DEBUG_IOCTL 0 106 #define DEBUG_HW 0 107 108 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 109 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 110 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 111 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 112 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 113 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 114 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 115 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 116 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 117 118 #define MAX_NUM_MULTICAST_ADDRESSES 128 119 #define IXGBE_MAX_SCATTER 100 120 #define IXGBE_MSIX_BAR 3 121 #if 0 122 #define IXGBE_TSO_SIZE 65535 123 #else 124 #define IXGBE_TSO_SIZE IXGBE_MAX_FRAME_SIZE 125 #endif 126 #define IXGBE_TX_BUFFER_SIZE ((uint32_t) 1514) 127 #define IXGBE_RX_HDR_SIZE ((uint32_t) 256) 128 #define CSUM_OFFLOAD 7 /* Bits in csum flags */ 129 130 /* The number of MSIX messages the 82598 supports */ 131 #define IXGBE_MSGS 18 132 133 /* For 6.X code compatibility */ 134 #if __FreeBSD_version < 700000 135 #define ETHER_BPF_MTAP BPF_MTAP 136 #define CSUM_TSO 0 137 #define IFCAP_TSO4 0 138 #define FILTER_STRAY 139 #define FILTER_HANDLED 140 #endif 141 142 /* 143 * Interrupt Moderation parameters 144 * for now we hardcode, later 145 * it would be nice to do dynamic 146 */ 147 #define MAX_IRQ_SEC 8000 148 #define DEFAULT_ITR 1000000000/(MAX_IRQ_SEC * 256) 149 #define LINK_ITR 1000000000/(1950 * 256) 150 151 /* Used for auto RX queue configuration */ 152 extern int mp_ncpus; 153 154 struct ixgbe_tx_buf { 155 struct mbuf *m_head; 156 bus_dmamap_t map; 157 }; 158 159 struct ixgbe_rx_buf { 160 struct mbuf *m_head; 161 int bigbuf; 162 /* one small and one large map */ 163 bus_dmamap_t map[2]; 164 }; 165 166 /* 167 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 168 */ 169 struct ixgbe_dma_alloc { 170 caddr_t dma_vaddr; 171 bus_dma_tag_t dma_tag; 172 bus_dmamap_t dma_map; 173 bus_dma_segment_t dma_seg; 174 bus_size_t dma_size; 175 int dma_nseg; 176 }; 177 178 /* 179 * The transmit ring, one per tx queue 180 */ 181 struct tx_ring { 182 struct ix_softc *sc; 183 struct mutex tx_mtx; 184 uint32_t me; 185 uint32_t msix; 186 uint32_t eims; 187 uint32_t watchdog_timer; 188 union ixgbe_adv_tx_desc *tx_base; 189 uint32_t *tx_hwb; 190 struct ixgbe_dma_alloc txdma; 191 struct ixgbe_dma_alloc txwbdma; 192 uint32_t next_avail_tx_desc; 193 uint32_t next_tx_to_clean; 194 struct ixgbe_tx_buf *tx_buffers; 195 volatile uint16_t tx_avail; 196 uint32_t txd_cmd; 197 bus_dma_tag_t txtag; 198 /* Soft Stats */ 199 uint32_t no_tx_desc_avail; 200 uint32_t no_tx_desc_late; 201 uint64_t tx_irq; 202 uint64_t tx_packets; 203 }; 204 205 206 /* 207 * The Receive ring, one per rx queue 208 */ 209 struct rx_ring { 210 struct ix_softc *sc; 211 struct mutex rx_mtx; 212 uint32_t me; 213 uint32_t msix; 214 uint32_t eims; 215 uint32_t payload; 216 union ixgbe_adv_rx_desc *rx_base; 217 struct ixgbe_dma_alloc rxdma; 218 #if 0 219 struct lro_ctrl lro; 220 #endif 221 unsigned int last_cleaned; 222 unsigned int next_to_check; 223 struct ixgbe_rx_buf *rx_buffers; 224 bus_dma_tag_t rxtag[2]; 225 bus_dmamap_t spare_map[2]; 226 struct mbuf *fmp; 227 struct mbuf *lmp; 228 /* Soft stats */ 229 uint64_t rx_irq; 230 uint64_t packet_count; 231 uint64_t byte_count; 232 }; 233 234 /* Our adapter structure */ 235 struct ix_softc { 236 struct device dev; 237 struct arpcom arpcom; 238 239 struct ixgbe_hw hw; 240 struct ixgbe_osdep osdep; 241 void *powerhook; 242 void *shutdownhook; 243 244 struct resource *pci_mem; 245 struct resource *msix_mem; 246 247 /* 248 * Interrupt resources: 249 * Oplin has 20 MSIX messages 250 * so allocate that for now. 251 */ 252 void *tag[IXGBE_MSGS]; 253 struct resource *res[IXGBE_MSGS]; 254 int rid[IXGBE_MSGS]; 255 uint32_t eims_mask; 256 257 struct ifmedia media; 258 struct timeout timer; 259 int msix; 260 int if_flags; 261 262 struct mutex core_mtx; 263 264 /* Legacy Fast Intr handling */ 265 workq_fn link_task; 266 267 /* Info about the board itself */ 268 uint32_t part_num; 269 int link_active; 270 uint16_t max_frame_size; 271 uint32_t link_speed; 272 uint32_t tx_int_delay; 273 uint32_t tx_abs_int_delay; 274 uint32_t rx_int_delay; 275 uint32_t rx_abs_int_delay; 276 277 /* Indicates the cluster size to use */ 278 int bigbufs; 279 280 /* 281 * Transmit rings: 282 * Allocated at run time, an array of rings. 283 */ 284 struct tx_ring *tx_rings; 285 int num_tx_desc; 286 int num_tx_queues; 287 288 /* 289 * Receive rings: 290 * Allocated at run time, an array of rings. 291 */ 292 struct rx_ring *rx_rings; 293 int num_rx_desc; 294 int num_rx_queues; 295 uint32_t rx_process_limit; 296 uint optics; 297 298 /* Misc stats maintained by the driver */ 299 unsigned long dropped_pkts; 300 unsigned long mbuf_alloc_failed; 301 unsigned long mbuf_cluster_failed; 302 unsigned long no_tx_map_avail; 303 unsigned long no_tx_dma_setup; 304 unsigned long watchdog_events; 305 unsigned long tso_tx; 306 unsigned long linkvec; 307 unsigned long link_irq; 308 309 struct ixgbe_hw_stats stats; 310 }; 311 312 #endif /* _IX_H_ */ 313