1 /* $OpenBSD: if_hme_pci.c,v 1.21 2015/11/24 17:11:39 mpi Exp $ */ 2 /* $NetBSD: if_hme_pci.c,v 1.3 2000/12/28 22:59:13 sommerfeld Exp $ */ 3 4 /* 5 * Copyright (c) 2000 Matthew R. Green 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 /* 33 * PCI front-end device driver for the HME ethernet device. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/syslog.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 #include <sys/socket.h> 42 43 #include <net/if.h> 44 #include <net/if_media.h> 45 46 #include <netinet/in.h> 47 #include <netinet/if_ether.h> 48 49 #include <dev/mii/miivar.h> 50 51 #ifdef __sparc64__ 52 #include <machine/autoconf.h> 53 #include <dev/ofw/openfirm.h> 54 #endif 55 #include <machine/cpu.h> 56 57 #include <dev/pci/pcivar.h> 58 #include <dev/pci/pcireg.h> 59 #include <dev/pci/pcidevs.h> 60 61 #include <dev/ic/hmevar.h> 62 63 struct hme_pci_softc { 64 struct hme_softc hsc_hme; /* HME device */ 65 bus_space_tag_t hsc_memt; 66 bus_space_handle_t hsc_memh; 67 bus_size_t hsc_memsize; 68 void *hsc_ih; 69 pci_chipset_tag_t hsc_pc; 70 }; 71 72 int hmematch_pci(struct device *, void *, void *); 73 void hmeattach_pci(struct device *, struct device *, void *); 74 int hmedetach_pci(struct device *, int); 75 int hme_pci_enaddr(struct hme_softc *, struct pci_attach_args *); 76 77 struct cfattach hme_pci_ca = { 78 sizeof(struct hme_pci_softc), hmematch_pci, hmeattach_pci, hmedetach_pci 79 }; 80 81 int 82 hmematch_pci(parent, vcf, aux) 83 struct device *parent; 84 void *vcf; 85 void *aux; 86 { 87 struct pci_attach_args *pa = aux; 88 89 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 90 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_HME) 91 return (1); 92 93 return (0); 94 } 95 96 #define PCI_EBUS2_BOOTROM 0x10 97 #define PCI_EBUS2_BOOTROM_SIZE 0x20000 98 #define PROMHDR_PTR_DATA 0x18 99 #define PROMDATA_PTR_VPD 0x08 100 #define PROMDATA_LENGTH 0x0a 101 #define PROMDATA_REVISION 0x0c 102 #define PROMDATA_SUBCLASS 0x0e 103 #define PROMDATA_CLASS 0x0f 104 105 static const u_int8_t hme_promhdr[] = { 0x55, 0xaa }; 106 static const u_int8_t hme_promdat[] = { 107 'P', 'C', 'I', 'R', 108 PCI_VENDOR_SUN & 0xff, PCI_VENDOR_SUN >> 8, 109 PCI_PRODUCT_SUN_HME & 0xff, PCI_PRODUCT_SUN_HME >> 8 110 }; 111 112 int 113 hme_pci_enaddr(struct hme_softc *sc, struct pci_attach_args *hpa) 114 { 115 struct pci_attach_args epa; 116 struct pci_vpd *vpd; 117 pcireg_t cl, id; 118 bus_space_handle_t romh; 119 bus_space_tag_t romt; 120 bus_size_t romsize = 0; 121 u_int8_t buf[32]; 122 int dataoff, vpdoff, length; 123 124 /* 125 * Dig out VPD (vital product data) and acquire Ethernet address. 126 * The VPD of hme resides in the Boot PROM (PCI FCode) attached 127 * to the EBus interface. 128 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later) 129 * chapter 2 describes the data structure. 130 */ 131 132 /* get a PCI tag for the EBus bridge (function 0 of the same device) */ 133 epa = *hpa; 134 epa.pa_tag = pci_make_tag(hpa->pa_pc, hpa->pa_bus, hpa->pa_device, 0); 135 cl = pci_conf_read(epa.pa_pc, epa.pa_tag, PCI_CLASS_REG); 136 id = pci_conf_read(epa.pa_pc, epa.pa_tag, PCI_ID_REG); 137 138 if (PCI_CLASS(cl) != PCI_CLASS_BRIDGE || 139 PCI_PRODUCT(id) != PCI_PRODUCT_SUN_EBUS) 140 goto fail; 141 142 if (pci_mapreg_map(&epa, PCI_EBUS2_BOOTROM, PCI_MAPREG_TYPE_MEM, 0, 143 &romt, &romh, 0, &romsize, PCI_EBUS2_BOOTROM_SIZE)) 144 goto fail; 145 146 bus_space_read_region_1(romt, romh, 0, buf, sizeof(buf)); 147 if (bcmp(buf, hme_promhdr, sizeof(hme_promhdr))) 148 goto fail; 149 150 dataoff = buf[PROMHDR_PTR_DATA] | (buf[PROMHDR_PTR_DATA + 1] << 8); 151 if (dataoff < 0x1c) 152 goto fail; 153 154 bus_space_read_region_1(romt, romh, dataoff, buf, sizeof(buf)); 155 if (bcmp(buf, hme_promdat, sizeof(hme_promdat))) 156 goto fail; 157 158 /* 159 * Don't check the interface part of the class code, since 160 * some cards have a bogus value there. 161 */ 162 length = buf[PROMDATA_LENGTH] | (buf[PROMDATA_LENGTH + 1] << 8); 163 if (length != 0x18 || buf[PROMDATA_REVISION] != 0x00 || 164 buf[PROMDATA_SUBCLASS] != PCI_SUBCLASS_NETWORK_ETHERNET || 165 buf[PROMDATA_CLASS] != PCI_CLASS_NETWORK) 166 goto fail; 167 168 vpdoff = buf[PROMDATA_PTR_VPD] | (buf[PROMDATA_PTR_VPD + 1] << 8); 169 if (vpdoff < 0x1c) 170 goto fail; 171 172 /* 173 * The VPD of hme is not in PCI 2.2 standard format. The length 174 * in the resource header is in big endian, and resources are not 175 * properly terminated (only one resource and no end tag). 176 */ 177 bus_space_read_region_1(romt, romh, vpdoff, buf, sizeof(buf)); 178 179 /* XXX TODO: Get the data from VPD */ 180 vpd = (struct pci_vpd *)(buf + 3); 181 if (!PCI_VPDRES_ISLARGE(buf[0]) || 182 PCI_VPDRES_LARGE_NAME(buf[0]) != PCI_VPDRES_TYPE_VPD) 183 goto fail; 184 if (vpd->vpd_key0 != 'N' || vpd->vpd_key1 != 'A') 185 goto fail; 186 187 bcopy(buf + 6, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN); 188 sc->sc_arpcom.ac_enaddr[5] += hpa->pa_device; 189 bus_space_unmap(romt, romh, romsize); 190 return (0); 191 192 fail: 193 if (romsize != 0) 194 bus_space_unmap(romt, romh, romsize); 195 return (-1); 196 } 197 198 void 199 hmeattach_pci(parent, self, aux) 200 struct device *parent, *self; 201 void *aux; 202 { 203 struct pci_attach_args *pa = aux; 204 struct hme_pci_softc *hsc = (void *)self; 205 struct hme_softc *sc = &hsc->hsc_hme; 206 pci_intr_handle_t ih; 207 /* XXX the following declarations should be elsewhere */ 208 extern void myetheraddr(u_char *); 209 pcireg_t csr; 210 const char *intrstr = NULL; 211 int type, gotenaddr = 0; 212 213 hsc->hsc_pc = pa->pa_pc; 214 215 /* 216 * enable io/memory-space accesses. this is kinda of gross; but 217 * the hme comes up with neither IO space enabled, or memory space. 218 */ 219 if (pa->pa_memt) 220 pa->pa_flags |= PCI_FLAGS_MEM_ENABLED; 221 if (pa->pa_iot) 222 pa->pa_flags |= PCI_FLAGS_IO_ENABLED; 223 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 224 if (pa->pa_memt) { 225 type = PCI_MAPREG_TYPE_MEM; 226 csr |= PCI_COMMAND_MEM_ENABLE; 227 sc->sc_bustag = pa->pa_memt; 228 } else { 229 type = PCI_MAPREG_TYPE_IO; 230 csr |= PCI_COMMAND_IO_ENABLE; 231 sc->sc_bustag = pa->pa_iot; 232 } 233 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 234 csr | PCI_COMMAND_MEM_ENABLE); 235 236 sc->sc_dmatag = pa->pa_dmat; 237 238 sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */ 239 /* 240 * Map five register banks: 241 * 242 * bank 0: HME SEB registers: +0x0000 243 * bank 1: HME ETX registers: +0x2000 244 * bank 2: HME ERX registers: +0x4000 245 * bank 3: HME MAC registers: +0x6000 246 * bank 4: HME MIF registers: +0x7000 247 * 248 */ 249 250 #define PCI_HME_BASEADDR 0x10 251 if (pci_mapreg_map(pa, PCI_HME_BASEADDR, type, 0, 252 &hsc->hsc_memt, &hsc->hsc_memh, NULL, &hsc->hsc_memsize, 0) != 0) { 253 printf(": can't map registers\n"); 254 return; 255 } 256 sc->sc_seb = hsc->hsc_memh; 257 bus_space_subregion(sc->sc_bustag, hsc->hsc_memh, 0x2000, 0x2000, 258 &sc->sc_etx); 259 bus_space_subregion(sc->sc_bustag, hsc->hsc_memh, 0x4000, 0x2000, 260 &sc->sc_erx); 261 bus_space_subregion(sc->sc_bustag, hsc->hsc_memh, 0x6000, 0x1000, 262 &sc->sc_mac); 263 bus_space_subregion(sc->sc_bustag, hsc->hsc_memh, 0x7000, 0x1000, 264 &sc->sc_mif); 265 266 if (hme_pci_enaddr(sc, pa) == 0) 267 gotenaddr = 1; 268 269 #ifdef __sparc64__ 270 if (!gotenaddr) { 271 if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address", 272 sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0) 273 myetheraddr(sc->sc_arpcom.ac_enaddr); 274 gotenaddr = 1; 275 } 276 #endif 277 #ifdef __powerpc__ 278 if (!gotenaddr) { 279 pci_ether_hw_addr(pa->pa_pc, sc->sc_arpcom.ac_enaddr); 280 gotenaddr = 1; 281 } 282 #endif 283 284 sc->sc_burst = 16; /* XXX */ 285 286 if (pci_intr_map(pa, &ih) != 0) { 287 printf(": couldn't map interrupt\n"); 288 bus_space_unmap(hsc->hsc_memt, hsc->hsc_memh, hsc->hsc_memsize); 289 return; 290 } 291 intrstr = pci_intr_string(pa->pa_pc, ih); 292 hsc->hsc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, 293 hme_intr, sc, self->dv_xname); 294 if (hsc->hsc_ih == NULL) { 295 printf(": couldn't establish interrupt"); 296 if (intrstr != NULL) 297 printf(" at %s", intrstr); 298 printf("\n"); 299 bus_space_unmap(hsc->hsc_memt, hsc->hsc_memh, hsc->hsc_memsize); 300 return; 301 } 302 303 printf(": %s", intrstr); 304 305 /* 306 * call the main configure 307 */ 308 hme_config(sc); 309 } 310 311 int 312 hmedetach_pci(struct device *self, int flags) 313 { 314 struct hme_pci_softc *hsc = (void *)self; 315 struct hme_softc *sc = &hsc->hsc_hme; 316 317 timeout_del(&sc->sc_tick_ch); 318 pci_intr_disestablish(hsc->hsc_pc, hsc->hsc_ih); 319 320 hme_unconfig(sc); 321 bus_space_unmap(hsc->hsc_memt, hsc->hsc_memh, hsc->hsc_memsize); 322 return (0); 323 } 324