1 /* $OpenBSD: if_fxp_pci.c,v 1.66 2020/01/05 01:07:58 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 1995, David Greenman 5 * All rights reserved. 6 * 7 * Modifications to support NetBSD: 8 * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice unmodified, this list of conditions, and the following 15 * disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * Id: if_fxp.c,v 1.55 1998/08/04 08:53:12 dg Exp 33 */ 34 35 /* 36 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 37 */ 38 39 #include "bpfilter.h" 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/malloc.h> 45 #include <sys/kernel.h> 46 #include <sys/socket.h> 47 #include <sys/timeout.h> 48 #include <sys/syslog.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <netinet/in.h> 54 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <netinet/if_ether.h> 60 61 #include <machine/cpu.h> 62 #include <machine/bus.h> 63 #include <machine/intr.h> 64 65 #include <dev/mii/miivar.h> 66 67 #include <dev/ic/fxpreg.h> 68 #include <dev/ic/fxpvar.h> 69 70 #include <dev/pci/pcivar.h> 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcidevs.h> 73 74 int fxp_pci_match(struct device *, void *, void *); 75 void fxp_pci_attach(struct device *, struct device *, void *); 76 int fxp_pci_detach(struct device *, int); 77 78 struct fxp_pci_softc { 79 struct fxp_softc psc_softc; 80 pci_chipset_tag_t psc_pc; 81 bus_size_t psc_mapsize; 82 }; 83 84 struct cfattach fxp_pci_ca = { 85 sizeof(struct fxp_pci_softc), fxp_pci_match, fxp_pci_attach, 86 fxp_pci_detach, fxp_activate 87 }; 88 89 const struct pci_matchid fxp_pci_devices[] = { 90 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8255X }, 91 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82552 }, 92 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82559 }, 93 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82559ER }, 94 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562 }, 95 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_0 }, 96 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_1 }, 97 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_2 }, 98 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_0 }, 99 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_1 }, 100 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_2 }, 101 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_3 }, 102 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_4 }, 103 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_5 }, 104 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_6 }, 105 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_7 }, 106 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_8 }, 107 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_0 }, 108 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_1 }, 109 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_2 }, 110 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_3 }, 111 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_4 }, 112 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_5 }, 113 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_6 }, 114 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_7 }, 115 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_8 }, 116 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_9 }, 117 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_10 }, 118 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_11 }, 119 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_12 }, 120 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_13 }, 121 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_14 }, 122 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_15 }, 123 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_16 }, 124 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_17 }, 125 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_18 }, 126 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_19 }, 127 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_M }, 128 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100 }, 129 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_LAN }, 130 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LAN_1 }, 131 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LAN_2 }, 132 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LAN }, 133 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LAN_2 }, 134 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FBM_LAN }, 135 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GB_LAN }, 136 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GB_LAN_2 }, 137 }; 138 139 int 140 fxp_pci_match(struct device *parent, void *match, void *aux) 141 { 142 return (pci_matchbyid((struct pci_attach_args *)aux, fxp_pci_devices, 143 nitems(fxp_pci_devices))); 144 } 145 146 void 147 fxp_pci_attach(struct device *parent, struct device *self, void *aux) 148 { 149 struct fxp_pci_softc *psc = (void *)self; 150 struct fxp_softc *sc = &psc->psc_softc; 151 struct pci_attach_args *pa = aux; 152 pci_chipset_tag_t pc = pa->pa_pc; 153 pci_intr_handle_t ih; 154 const char *chipname = NULL; 155 const char *intrstr = NULL; 156 157 if (pci_mapreg_map(pa, FXP_PCI_IOBA, PCI_MAPREG_TYPE_IO, 0, 158 &sc->sc_st, &sc->sc_sh, NULL, &psc->psc_mapsize, 0)) { 159 printf(": can't map i/o space\n"); 160 return; 161 } 162 psc->psc_pc = pa->pa_pc; 163 sc->sc_dmat = pa->pa_dmat; 164 165 sc->sc_revision = PCI_REVISION(pa->pa_class); 166 167 /* 168 * Allocate our interrupt. 169 */ 170 if (pci_intr_map(pa, &ih)) { 171 printf(": couldn't map interrupt\n"); 172 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->psc_mapsize); 173 return; 174 } 175 176 intrstr = pci_intr_string(pc, ih); 177 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc, 178 self->dv_xname); 179 if (sc->sc_ih == NULL) { 180 printf(": couldn't establish interrupt"); 181 if (intrstr != NULL) 182 printf(" at %s", intrstr); 183 printf("\n"); 184 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->psc_mapsize); 185 return; 186 } 187 188 switch (PCI_PRODUCT(pa->pa_id)) { 189 case PCI_PRODUCT_INTEL_8255X: 190 case PCI_PRODUCT_INTEL_82559: 191 case PCI_PRODUCT_INTEL_82559ER: 192 chipname = "i82557"; 193 if (sc->sc_revision >= FXP_REV_82558_A4) 194 chipname = "i82558"; 195 if (sc->sc_revision >= FXP_REV_82559_A0) 196 chipname = "i82559"; 197 if (sc->sc_revision >= FXP_REV_82559S_A) 198 chipname = "i82559S"; 199 if (sc->sc_revision >= FXP_REV_82550) 200 chipname = "i82550"; 201 if (sc->sc_revision >= FXP_REV_82551_E) 202 chipname = "i82551"; 203 break; 204 case PCI_PRODUCT_INTEL_82552: 205 chipname = "i82552"; 206 break; 207 default: 208 chipname = "i82562"; 209 break; 210 } 211 212 if (chipname != NULL) 213 printf(", %s", chipname); 214 215 /* 216 * Cards for which we should WRITE TO THE EEPROM 217 * to turn off dynamic standby mode to avoid 218 * a problem where the card will fail to resume when 219 * entering the IDLE state. We use this nasty if statement 220 * and corresponding pci dev numbers directly so that people 221 * know not to add new cards to this unless you are really 222 * certain what you are doing and are not going to end up 223 * killing people's eeproms. 224 */ 225 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) && 226 (PCI_PRODUCT(pa->pa_id) == 0x2449 || 227 (PCI_PRODUCT(pa->pa_id) > 0x1030 && 228 PCI_PRODUCT(pa->pa_id) < 0x1039) || 229 (PCI_PRODUCT(pa->pa_id) == 0x1229 && 230 (sc->sc_revision >= 8 && sc->sc_revision <= 16)))) 231 sc->sc_flags |= FXPF_DISABLE_STANDBY; 232 233 /* 234 * enable PCI Memory Write and Invalidate command 235 */ 236 if (sc->sc_revision >= FXP_REV_82558_A4) 237 if (PCI_CACHELINE(pci_conf_read(pa->pa_pc, pa->pa_tag, 238 PCI_BHLC_REG))) { 239 pci_conf_write(pa->pa_pc, pa->pa_tag, 240 PCI_COMMAND_STATUS_REG, 241 PCI_COMMAND_INVALIDATE_ENABLE | 242 pci_conf_read(pa->pa_pc, pa->pa_tag, 243 PCI_COMMAND_STATUS_REG)); 244 sc->sc_flags |= FXPF_MWI_ENABLE; 245 } 246 247 /* Do generic parts of attach. */ 248 if (fxp_attach(sc, intrstr)) { 249 /* Failed! */ 250 pci_intr_disestablish(pc, sc->sc_ih); 251 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->psc_mapsize); 252 return; 253 } 254 } 255 256 int 257 fxp_pci_detach(struct device *self, int flags) 258 { 259 struct fxp_pci_softc *psc = (void *)self; 260 struct fxp_softc *sc = &psc->psc_softc; 261 262 if (sc->sc_ih != NULL) 263 pci_intr_disestablish(psc->psc_pc, sc->sc_ih); 264 fxp_detach(sc); 265 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->psc_mapsize); 266 267 return (0); 268 } 269