1 /* $OpenBSD: if_epic_pci.c,v 1.12 2013/08/07 01:06:35 bluhm Exp $ */ 2 /* $NetBSD: if_epic_pci.c,v 1.28 2005/02/27 00:27:32 perry Exp $ */ 3 4 /*- 5 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * PCI bus front-end for the Standard Microsystems Corp. 83C170 36 * Ethernet PCI Integrated Controller (EPIC/100) driver. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/malloc.h> 43 #include <sys/kernel.h> 44 #include <sys/socket.h> 45 #include <sys/ioctl.h> 46 #include <sys/errno.h> 47 #include <sys/device.h> 48 49 #include <net/if.h> 50 #include <net/if_dl.h> 51 #include <net/if_types.h> 52 53 #ifdef INET 54 #include <netinet/in.h> 55 #include <netinet/in_systm.h> 56 #include <netinet/ip.h> 57 #include <netinet/if_ether.h> 58 #endif 59 60 #include <net/if_media.h> 61 62 #include <machine/bus.h> 63 #include <machine/intr.h> 64 65 #include <dev/mii/miivar.h> 66 67 #include <dev/ic/smc83c170reg.h> 68 #include <dev/ic/smc83c170var.h> 69 70 #include <dev/pci/pcivar.h> 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcidevs.h> 73 74 /* 75 * PCI configuration space registers used by the EPIC. 76 */ 77 #define EPIC_PCI_IOBA 0x10 /* i/o mapped base */ 78 #define EPIC_PCI_MMBA 0x14 /* memory mapped base */ 79 80 struct epic_pci_softc { 81 struct epic_softc sc_epic; /* real EPIC softc */ 82 83 /* PCI-specific goo. */ 84 void *sc_ih; /* interrupt handle */ 85 }; 86 87 int epic_pci_match(struct device *, void *, void *); 88 void epic_pci_attach(struct device *, struct device *, void *); 89 90 struct cfattach epic_pci_ca = { 91 sizeof(struct epic_pci_softc), epic_pci_match, epic_pci_attach 92 }; 93 94 const struct pci_matchid epic_pci_devices[] = { 95 { PCI_VENDOR_SMC, PCI_PRODUCT_SMC_83C170 }, 96 { PCI_VENDOR_SMC, PCI_PRODUCT_SMC_83C175 }, 97 }; 98 99 static const struct epic_pci_subsys_info { 100 pcireg_t subsysid; 101 int flags; 102 } epic_pci_subsys_info[] = { 103 { PCI_ID_CODE(PCI_VENDOR_SMC, 0xa015), /* SMC9432BTX */ 104 EPIC_HAS_BNC }, 105 { PCI_ID_CODE(PCI_VENDOR_SMC, 0xa024), /* SMC9432BTX1 */ 106 EPIC_HAS_BNC }, 107 { PCI_ID_CODE(PCI_VENDOR_SMC, 0xa016), /* SMC9432FTX */ 108 EPIC_HAS_MII_FIBER | EPIC_DUPLEXLED_ON_694 }, 109 { 0xffffffff, 110 0 } 111 }; 112 113 static const struct epic_pci_subsys_info * 114 epic_pci_subsys_lookup(const struct pci_attach_args *pa) 115 { 116 pci_chipset_tag_t pc = pa->pa_pc; 117 pcireg_t reg; 118 const struct epic_pci_subsys_info *esp; 119 120 reg = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 121 122 for (esp = epic_pci_subsys_info; esp->subsysid != 0xffffffff; esp++) 123 if (esp->subsysid == reg) 124 return (esp); 125 126 return (NULL); 127 } 128 129 int 130 epic_pci_match(struct device *parent, void *match, void *aux) 131 { 132 return (pci_matchbyid((struct pci_attach_args *)aux, epic_pci_devices, 133 nitems(epic_pci_devices))); 134 } 135 136 void 137 epic_pci_attach(struct device *parent, struct device *self, void *aux) 138 { 139 struct epic_pci_softc *psc = (struct epic_pci_softc *)self; 140 struct epic_softc *sc = &psc->sc_epic; 141 struct pci_attach_args *pa = aux; 142 pci_chipset_tag_t pc = pa->pa_pc; 143 pci_intr_handle_t ih; 144 const char *intrstr = NULL; 145 const struct epic_pci_subsys_info *esp; 146 bus_space_tag_t iot, memt; 147 bus_space_handle_t ioh, memh; 148 int ioh_valid, memh_valid; 149 150 pci_set_powerstate(pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 151 152 /* 153 * Map the device. 154 */ 155 ioh_valid = (pci_mapreg_map(pa, EPIC_PCI_IOBA, 156 PCI_MAPREG_TYPE_IO, 0, 157 &iot, &ioh, NULL, NULL, 0) == 0); 158 memh_valid = (pci_mapreg_map(pa, EPIC_PCI_MMBA, 159 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 160 &memt, &memh, NULL, NULL, 0) == 0); 161 162 if (memh_valid) { 163 sc->sc_st = memt; 164 sc->sc_sh = memh; 165 } else if (ioh_valid) { 166 sc->sc_st = iot; 167 sc->sc_sh = ioh; 168 } else { 169 printf(": unable to map device registers\n"); 170 return; 171 } 172 173 sc->sc_dmat = pa->pa_dmat; 174 175 /* 176 * Map and establish our interrupt. 177 */ 178 if (pci_intr_map(pa, &ih)) { 179 printf(": unable to map interrupt\n"); 180 return; 181 } 182 intrstr = pci_intr_string(pc, ih); 183 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, epic_intr, sc, 184 self->dv_xname); 185 if (psc->sc_ih == NULL) { 186 printf(": unable to establish interrupt"); 187 if (intrstr != NULL) 188 printf(" at %s", intrstr); 189 printf("\n"); 190 return; 191 } 192 193 esp = epic_pci_subsys_lookup(pa); 194 if (esp) 195 sc->sc_hwflags = esp->flags; 196 197 /* 198 * Finish off the attach. 199 */ 200 epic_attach(sc, intrstr); 201 } 202