1 /* $OpenBSD: if_epic_pci.c,v 1.9 2008/06/26 05:42:17 ray Exp $ */ 2 /* $NetBSD: if_epic_pci.c,v 1.28 2005/02/27 00:27:32 perry Exp $ */ 3 4 /*- 5 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * PCI bus front-end for the Standard Microsystems Corp. 83C170 36 * Ethernet PCI Integrated Controller (EPIC/100) driver. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/malloc.h> 43 #include <sys/kernel.h> 44 #include <sys/socket.h> 45 #include <sys/ioctl.h> 46 #include <sys/errno.h> 47 #include <sys/device.h> 48 49 #include <net/if.h> 50 #include <net/if_dl.h> 51 #include <net/if_types.h> 52 53 #ifdef INET 54 #include <netinet/in.h> 55 #include <netinet/in_systm.h> 56 #include <netinet/in_var.h> 57 #include <netinet/ip.h> 58 #include <netinet/if_ether.h> 59 #endif 60 61 #include <net/if_media.h> 62 63 #include <machine/bus.h> 64 #include <machine/intr.h> 65 66 #include <dev/mii/miivar.h> 67 68 #include <dev/ic/smc83c170reg.h> 69 #include <dev/ic/smc83c170var.h> 70 71 #include <dev/pci/pcivar.h> 72 #include <dev/pci/pcireg.h> 73 #include <dev/pci/pcidevs.h> 74 75 /* 76 * PCI configuration space registers used by the EPIC. 77 */ 78 #define EPIC_PCI_IOBA 0x10 /* i/o mapped base */ 79 #define EPIC_PCI_MMBA 0x14 /* memory mapped base */ 80 81 struct epic_pci_softc { 82 struct epic_softc sc_epic; /* real EPIC softc */ 83 84 /* PCI-specific goo. */ 85 void *sc_ih; /* interrupt handle */ 86 }; 87 88 int epic_pci_match(struct device *, void *, void *); 89 void epic_pci_attach(struct device *, struct device *, void *); 90 91 struct cfattach epic_pci_ca = { 92 sizeof(struct epic_pci_softc), epic_pci_match, epic_pci_attach 93 }; 94 95 const struct pci_matchid epic_pci_devices[] = { 96 { PCI_VENDOR_SMC, PCI_PRODUCT_SMC_83C170 }, 97 { PCI_VENDOR_SMC, PCI_PRODUCT_SMC_83C175 }, 98 }; 99 100 static const struct epic_pci_subsys_info { 101 pcireg_t subsysid; 102 int flags; 103 } epic_pci_subsys_info[] = { 104 { PCI_ID_CODE(PCI_VENDOR_SMC, 0xa015), /* SMC9432BTX */ 105 EPIC_HAS_BNC }, 106 { PCI_ID_CODE(PCI_VENDOR_SMC, 0xa024), /* SMC9432BTX1 */ 107 EPIC_HAS_BNC }, 108 { PCI_ID_CODE(PCI_VENDOR_SMC, 0xa016), /* SMC9432FTX */ 109 EPIC_HAS_MII_FIBER | EPIC_DUPLEXLED_ON_694 }, 110 { 0xffffffff, 111 0 } 112 }; 113 114 static const struct epic_pci_subsys_info * 115 epic_pci_subsys_lookup(const struct pci_attach_args *pa) 116 { 117 pci_chipset_tag_t pc = pa->pa_pc; 118 pcireg_t reg; 119 const struct epic_pci_subsys_info *esp; 120 121 reg = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 122 123 for (esp = epic_pci_subsys_info; esp->subsysid != 0xffffffff; esp++) 124 if (esp->subsysid == reg) 125 return (esp); 126 127 return (NULL); 128 } 129 130 int 131 epic_pci_match(struct device *parent, void *match, void *aux) 132 { 133 return (pci_matchbyid((struct pci_attach_args *)aux, epic_pci_devices, 134 sizeof(epic_pci_devices)/sizeof(epic_pci_devices[0]))); 135 } 136 137 void 138 epic_pci_attach(struct device *parent, struct device *self, void *aux) 139 { 140 struct epic_pci_softc *psc = (struct epic_pci_softc *)self; 141 struct epic_softc *sc = &psc->sc_epic; 142 struct pci_attach_args *pa = aux; 143 pci_chipset_tag_t pc = pa->pa_pc; 144 pci_intr_handle_t ih; 145 const char *intrstr = NULL; 146 const struct epic_pci_subsys_info *esp; 147 bus_space_tag_t iot, memt; 148 bus_space_handle_t ioh, memh; 149 int state, ioh_valid, memh_valid; 150 151 state = pci_set_powerstate(pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 152 if (state == PCI_PMCSR_STATE_D3) { 153 /* 154 * IO and MEM are disabled. We can't enable 155 * the card because the BARs might be invalid. 156 */ 157 printf(": unable to wake up from power state D3, " 158 "reboot required.\n"); 159 return; 160 } 161 162 /* 163 * Map the device. 164 */ 165 ioh_valid = (pci_mapreg_map(pa, EPIC_PCI_IOBA, 166 PCI_MAPREG_TYPE_IO, 0, 167 &iot, &ioh, NULL, NULL, 0) == 0); 168 memh_valid = (pci_mapreg_map(pa, EPIC_PCI_MMBA, 169 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 170 &memt, &memh, NULL, NULL, 0) == 0); 171 172 if (memh_valid) { 173 sc->sc_st = memt; 174 sc->sc_sh = memh; 175 } else if (ioh_valid) { 176 sc->sc_st = iot; 177 sc->sc_sh = ioh; 178 } else { 179 printf(": unable to map device registers\n"); 180 return; 181 } 182 183 sc->sc_dmat = pa->pa_dmat; 184 185 /* 186 * Map and establish our interrupt. 187 */ 188 if (pci_intr_map(pa, &ih)) { 189 printf(": unable to map interrupt\n"); 190 return; 191 } 192 intrstr = pci_intr_string(pc, ih); 193 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, epic_intr, sc, 194 self->dv_xname); 195 if (psc->sc_ih == NULL) { 196 printf(": unable to establish interrupt"); 197 if (intrstr != NULL) 198 printf(" at %s", intrstr); 199 printf("\n"); 200 return; 201 } 202 203 esp = epic_pci_subsys_lookup(pa); 204 if (esp) 205 sc->sc_hwflags = esp->flags; 206 207 /* 208 * Finish off the attach. 209 */ 210 epic_attach(sc, intrstr); 211 } 212